1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/init.h>
30 #include <linux/pci.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/skbuff.h>
34 #include <linux/netdevice.h>
35 #include <linux/wireless.h>
36 #include <net/mac80211.h>
37 #include <linux/etherdevice.h>
38 #include <asm/unaligned.h>
40 #include "iwl-eeprom.h"
44 #include "iwl-helpers.h"
45 #include "iwl-calib.h"
47 #include "iwl-agn-led.h"
49 static int iwl4965_send_tx_power(struct iwl_priv *priv);
50 static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
52 /* Highest firmware API version supported */
53 #define IWL4965_UCODE_API_MAX 2
55 /* Lowest firmware API version supported */
56 #define IWL4965_UCODE_API_MIN 2
58 #define IWL4965_FW_PRE "iwlwifi-4965-"
59 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
60 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
63 /* module parameters */
64 static struct iwl_mod_params iwl4965_mod_params = {
67 /* the rest are 0 by default */
70 /* check contents of special bootstrap uCode SRAM */
71 static int iwl4965_verify_bsm(struct iwl_priv *priv)
73 __le32 *image = priv->ucode_boot.v_addr;
74 u32 len = priv->ucode_boot.len;
78 IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
80 /* verify BSM SRAM contents */
81 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
82 for (reg = BSM_SRAM_LOWER_BOUND;
83 reg < BSM_SRAM_LOWER_BOUND + len;
84 reg += sizeof(u32), image++) {
85 val = iwl_read_prph(priv, reg);
86 if (val != le32_to_cpu(*image)) {
87 IWL_ERR(priv, "BSM uCode verification failed at "
88 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
90 reg - BSM_SRAM_LOWER_BOUND, len,
91 val, le32_to_cpu(*image));
96 IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
102 * iwl4965_load_bsm - Load bootstrap instructions
106 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
107 * in special SRAM that does not power down during RFKILL. When powering back
108 * up after power-saving sleeps (or during initial uCode load), the BSM loads
109 * the bootstrap program into the on-board processor, and starts it.
111 * The bootstrap program loads (via DMA) instructions and data for a new
112 * program from host DRAM locations indicated by the host driver in the
113 * BSM_DRAM_* registers. Once the new program is loaded, it starts
116 * When initializing the NIC, the host driver points the BSM to the
117 * "initialize" uCode image. This uCode sets up some internal data, then
118 * notifies host via "initialize alive" that it is complete.
120 * The host then replaces the BSM_DRAM_* pointer values to point to the
121 * normal runtime uCode instructions and a backup uCode data cache buffer
122 * (filled initially with starting data values for the on-board processor),
123 * then triggers the "initialize" uCode to load and launch the runtime uCode,
124 * which begins normal operation.
126 * When doing a power-save shutdown, runtime uCode saves data SRAM into
127 * the backup data cache in DRAM before SRAM is powered down.
129 * When powering back up, the BSM loads the bootstrap program. This reloads
130 * the runtime uCode instructions and the backup data cache into SRAM,
131 * and re-launches the runtime uCode from where it left off.
133 static int iwl4965_load_bsm(struct iwl_priv *priv)
135 __le32 *image = priv->ucode_boot.v_addr;
136 u32 len = priv->ucode_boot.len;
146 IWL_DEBUG_INFO(priv, "Begin load bsm\n");
148 priv->ucode_type = UCODE_RT;
150 /* make sure bootstrap program is no larger than BSM's SRAM size */
151 if (len > IWL49_MAX_BSM_SIZE)
154 /* Tell bootstrap uCode where to find the "Initialize" uCode
155 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
156 * NOTE: iwl_init_alive_start() will replace these values,
157 * after the "initialize" uCode has run, to point to
158 * runtime/protocol instructions and backup data cache.
160 pinst = priv->ucode_init.p_addr >> 4;
161 pdata = priv->ucode_init_data.p_addr >> 4;
162 inst_len = priv->ucode_init.len;
163 data_len = priv->ucode_init_data.len;
165 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
166 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
167 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
168 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
170 /* Fill BSM memory with bootstrap instructions */
171 for (reg_offset = BSM_SRAM_LOWER_BOUND;
172 reg_offset < BSM_SRAM_LOWER_BOUND + len;
173 reg_offset += sizeof(u32), image++)
174 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
176 ret = iwl4965_verify_bsm(priv);
180 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
181 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
182 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
183 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
185 /* Load bootstrap code into instruction SRAM now,
186 * to prepare to load "initialize" uCode */
187 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
189 /* Wait for load of bootstrap uCode to finish */
190 for (i = 0; i < 100; i++) {
191 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
192 if (!(done & BSM_WR_CTRL_REG_BIT_START))
197 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
199 IWL_ERR(priv, "BSM write did not complete!\n");
203 /* Enable future boot loads whenever power management unit triggers it
204 * (e.g. when powering back up after power-save shutdown) */
205 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
212 * iwl4965_set_ucode_ptrs - Set uCode address location
214 * Tell initialization uCode where to find runtime uCode.
216 * BSM registers initially contain pointers to initialization uCode.
217 * We need to replace them to load runtime uCode inst and data,
218 * and to save runtime data when powering down.
220 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
226 /* bits 35:4 for 4965 */
227 pinst = priv->ucode_code.p_addr >> 4;
228 pdata = priv->ucode_data_backup.p_addr >> 4;
230 /* Tell bootstrap uCode where to find image to load */
231 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
232 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
233 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
234 priv->ucode_data.len);
236 /* Inst byte count must be last to set up, bit 31 signals uCode
237 * that all new ptr/size info is in place */
238 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
239 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
240 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
246 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
248 * Called after REPLY_ALIVE notification received from "initialize" uCode.
250 * The 4965 "initialize" ALIVE reply contains calibration data for:
251 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
252 * (3945 does not contain this data).
254 * Tell "initialize" uCode to go ahead and load the runtime uCode.
256 static void iwl4965_init_alive_start(struct iwl_priv *priv)
258 /* Check alive response for "valid" sign from uCode */
259 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
260 /* We had an error bringing up the hardware, so take it
261 * all the way back down so we can try again */
262 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
266 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
267 * This is a paranoid check, because we would not have gotten the
268 * "initialize" alive if code weren't properly loaded. */
269 if (iwl_verify_ucode(priv)) {
270 /* Runtime instruction load was bad;
271 * take it all the way back down so we can try again */
272 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
276 /* Calculate temperature */
277 priv->temperature = iwl4965_hw_get_temperature(priv);
279 /* Send pointers to protocol/runtime uCode image ... init code will
280 * load and launch runtime uCode, which will send us another "Alive"
282 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
283 if (iwl4965_set_ucode_ptrs(priv)) {
284 /* Runtime instruction load won't happen;
285 * take it all the way back down so we can try again */
286 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
292 queue_work(priv->workqueue, &priv->restart);
295 static bool is_ht40_channel(__le32 rxon_flags)
297 int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
298 >> RXON_FLG_CHANNEL_MODE_POS;
299 return ((chan_mod == CHANNEL_MODE_PURE_40) ||
300 (chan_mod == CHANNEL_MODE_MIXED));
306 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
308 return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
312 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
313 * must be called under priv->lock and mac access
315 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
317 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
320 static void iwl4965_nic_config(struct iwl_priv *priv)
325 spin_lock_irqsave(&priv->lock, flags);
327 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
329 /* write radio config values to register */
330 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
331 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
332 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
333 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
334 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
336 /* set CSR_HW_CONFIG_REG for uCode use */
337 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
338 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
339 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
341 priv->calib_info = (struct iwl_eeprom_calib_info *)
342 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
344 spin_unlock_irqrestore(&priv->lock, flags);
347 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
348 * Called after every association, but this runs only once!
349 * ... once chain noise is calibrated the first time, it's good forever. */
350 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
352 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
354 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
355 struct iwl_calib_diff_gain_cmd cmd;
357 memset(&cmd, 0, sizeof(cmd));
358 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
362 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
365 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
366 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
367 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
371 static void iwl4965_gain_computation(struct iwl_priv *priv,
373 u16 min_average_noise_antenna_i,
374 u32 min_average_noise,
378 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
380 data->delta_gain_code[min_average_noise_antenna_i] = 0;
382 for (i = default_chain; i < NUM_RX_CHAINS; i++) {
385 if (!(data->disconn_array[i]) &&
386 (data->delta_gain_code[i] ==
387 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
388 delta_g = average_noise[i] - min_average_noise;
389 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
390 data->delta_gain_code[i] =
391 min(data->delta_gain_code[i],
392 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
394 data->delta_gain_code[i] =
395 (data->delta_gain_code[i] | (1 << 2));
397 data->delta_gain_code[i] = 0;
400 IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
401 data->delta_gain_code[0],
402 data->delta_gain_code[1],
403 data->delta_gain_code[2]);
405 /* Differential gain gets sent to uCode only once */
406 if (!data->radio_write) {
407 struct iwl_calib_diff_gain_cmd cmd;
408 data->radio_write = 1;
410 memset(&cmd, 0, sizeof(cmd));
411 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
412 cmd.diff_gain_a = data->delta_gain_code[0];
413 cmd.diff_gain_b = data->delta_gain_code[1];
414 cmd.diff_gain_c = data->delta_gain_code[2];
415 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
418 IWL_DEBUG_CALIB(priv, "fail sending cmd "
419 "REPLY_PHY_CALIBRATION_CMD \n");
421 /* TODO we might want recalculate
422 * rx_chain in rxon cmd */
424 /* Mark so we run this algo only once! */
425 data->state = IWL_CHAIN_NOISE_CALIBRATED;
427 data->chain_noise_a = 0;
428 data->chain_noise_b = 0;
429 data->chain_noise_c = 0;
430 data->chain_signal_a = 0;
431 data->chain_signal_b = 0;
432 data->chain_signal_c = 0;
433 data->beacon_count = 0;
436 static void iwl4965_bg_txpower_work(struct work_struct *work)
438 struct iwl_priv *priv = container_of(work, struct iwl_priv,
441 /* If a scan happened to start before we got here
442 * then just return; the statistics notification will
443 * kick off another scheduled work to compensate for
444 * any temperature delta we missed here. */
445 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
446 test_bit(STATUS_SCANNING, &priv->status))
449 mutex_lock(&priv->mutex);
451 /* Regardless of if we are associated, we must reconfigure the
452 * TX power since frames can be sent on non-radar channels while
454 iwl4965_send_tx_power(priv);
456 /* Update last_temperature to keep is_calib_needed from running
457 * when it isn't needed... */
458 priv->last_temperature = priv->temperature;
460 mutex_unlock(&priv->mutex);
464 * Acquire priv->lock before calling this function !
466 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
468 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
469 (index & 0xff) | (txq_id << 8));
470 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
474 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
475 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
476 * @scd_retry: (1) Indicates queue will be used in aggregation mode
478 * NOTE: Acquire priv->lock before calling this function !
480 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
481 struct iwl_tx_queue *txq,
482 int tx_fifo_id, int scd_retry)
484 int txq_id = txq->q.id;
486 /* Find out whether to activate Tx queue */
487 int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
489 /* Set up and activate */
490 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
491 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
492 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
493 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
494 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
495 IWL49_SCD_QUEUE_STTS_REG_MSK);
497 txq->sched_retry = scd_retry;
499 IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
500 active ? "Activate" : "Deactivate",
501 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
504 static const u16 default_queue_to_tx_fifo[] = {
514 static int iwl4965_alive_notify(struct iwl_priv *priv)
521 spin_lock_irqsave(&priv->lock, flags);
523 /* Clear 4965's internal Tx Scheduler data base */
524 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
525 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
526 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
527 iwl_write_targ_mem(priv, a, 0);
528 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
529 iwl_write_targ_mem(priv, a, 0);
530 for (; a < priv->scd_base_addr +
531 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
532 iwl_write_targ_mem(priv, a, 0);
534 /* Tel 4965 where to find Tx byte count tables */
535 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
536 priv->scd_bc_tbls.dma >> 10);
538 /* Enable DMA channel */
539 for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
540 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
541 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
542 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
544 /* Update FH chicken bits */
545 reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
546 iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
547 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
549 /* Disable chain mode for all queues */
550 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
552 /* Initialize each Tx queue (including the command queue) */
553 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
555 /* TFD circular buffer read/write indexes */
556 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
557 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
559 /* Max Tx Window size for Scheduler-ACK mode */
560 iwl_write_targ_mem(priv, priv->scd_base_addr +
561 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
563 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
564 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
567 iwl_write_targ_mem(priv, priv->scd_base_addr +
568 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
571 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
572 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
575 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
576 (1 << priv->hw_params.max_txq_num) - 1);
578 /* Activate all Tx DMA/FIFO channels */
579 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
581 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
583 /* Map each Tx/cmd queue to its corresponding fifo */
584 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
585 int ac = default_queue_to_tx_fifo[i];
586 iwl_txq_ctx_activate(priv, i);
587 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
590 spin_unlock_irqrestore(&priv->lock, flags);
595 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
597 .max_nrg_cck = 0, /* not used, set to 0 */
599 .auto_corr_min_ofdm = 85,
600 .auto_corr_min_ofdm_mrc = 170,
601 .auto_corr_min_ofdm_x1 = 105,
602 .auto_corr_min_ofdm_mrc_x1 = 220,
604 .auto_corr_max_ofdm = 120,
605 .auto_corr_max_ofdm_mrc = 210,
606 .auto_corr_max_ofdm_x1 = 140,
607 .auto_corr_max_ofdm_mrc_x1 = 270,
609 .auto_corr_min_cck = 125,
610 .auto_corr_max_cck = 200,
611 .auto_corr_min_cck_mrc = 200,
612 .auto_corr_max_cck_mrc = 400,
617 .barker_corr_th_min = 190,
618 .barker_corr_th_min_mrc = 390,
622 static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
625 priv->hw_params.ct_kill_threshold =
626 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
630 * iwl4965_hw_set_hw_params
632 * Called when initializing driver
634 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
636 if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
637 priv->cfg->mod_params->num_of_queues <= IWL49_NUM_QUEUES)
638 priv->cfg->num_of_queues =
639 priv->cfg->mod_params->num_of_queues;
641 priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
642 priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
643 priv->hw_params.scd_bc_tbls_size =
644 priv->cfg->num_of_queues *
645 sizeof(struct iwl4965_scd_bc_tbl);
646 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
647 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
648 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
649 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
650 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
651 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
652 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
654 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
656 priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
657 priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
658 priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
659 priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
660 if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
661 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
663 priv->hw_params.sens = &iwl4965_sensitivity;
668 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
681 *res = ((num * 2 + denom) / (denom * 2)) * sign;
687 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
689 * Determines power supply voltage compensation for txpower calculations.
690 * Returns number of 1/2-dB steps to subtract from gain table index,
691 * to compensate for difference between power supply voltage during
692 * factory measurements, vs. current power supply voltage.
694 * Voltage indication is higher for lower voltage.
695 * Lower voltage requires more gain (lower gain table index).
697 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
702 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
703 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
706 iwl4965_math_div_round(current_voltage - eeprom_voltage,
707 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
709 if (current_voltage > eeprom_voltage)
711 if ((comp < -2) || (comp > 2))
717 static s32 iwl4965_get_tx_atten_grp(u16 channel)
719 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
720 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
721 return CALIB_CH_GROUP_5;
723 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
724 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
725 return CALIB_CH_GROUP_1;
727 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
728 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
729 return CALIB_CH_GROUP_2;
731 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
732 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
733 return CALIB_CH_GROUP_3;
735 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
736 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
737 return CALIB_CH_GROUP_4;
742 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
746 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
747 if (priv->calib_info->band_info[b].ch_from == 0)
750 if ((channel >= priv->calib_info->band_info[b].ch_from)
751 && (channel <= priv->calib_info->band_info[b].ch_to))
758 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
765 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
771 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
773 * Interpolates factory measurements from the two sample channels within a
774 * sub-band, to apply to channel of interest. Interpolation is proportional to
775 * differences in channel frequencies, which is proportional to differences
778 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
779 struct iwl_eeprom_calib_ch_info *chan_info)
784 const struct iwl_eeprom_calib_measure *m1;
785 const struct iwl_eeprom_calib_measure *m2;
786 struct iwl_eeprom_calib_measure *omeas;
790 s = iwl4965_get_sub_band(priv, channel);
791 if (s >= EEPROM_TX_POWER_BANDS) {
792 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
796 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
797 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
798 chan_info->ch_num = (u8) channel;
800 IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
801 channel, s, ch_i1, ch_i2);
803 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
804 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
805 m1 = &(priv->calib_info->band_info[s].ch1.
807 m2 = &(priv->calib_info->band_info[s].ch2.
809 omeas = &(chan_info->measurements[c][m]);
812 (u8) iwl4965_interpolate_value(channel, ch_i1,
817 (u8) iwl4965_interpolate_value(channel, ch_i1,
821 (u8) iwl4965_interpolate_value(channel, ch_i1,
826 (s8) iwl4965_interpolate_value(channel, ch_i1,
830 IWL_DEBUG_TXPOWER(priv,
831 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
832 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
833 IWL_DEBUG_TXPOWER(priv,
834 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
835 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
836 IWL_DEBUG_TXPOWER(priv,
837 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
838 m1->pa_det, m2->pa_det, omeas->pa_det);
839 IWL_DEBUG_TXPOWER(priv,
840 "chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
841 m1->temperature, m2->temperature,
849 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
850 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
851 static s32 back_off_table[] = {
852 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
853 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
854 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
855 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
859 /* Thermal compensation values for txpower for various frequency ranges ...
860 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
861 static struct iwl4965_txpower_comp_entry {
862 s32 degrees_per_05db_a;
863 s32 degrees_per_05db_a_denom;
864 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
865 {9, 2}, /* group 0 5.2, ch 34-43 */
866 {4, 1}, /* group 1 5.2, ch 44-70 */
867 {4, 1}, /* group 2 5.2, ch 71-124 */
868 {4, 1}, /* group 3 5.2, ch 125-200 */
869 {3, 1} /* group 4 2.4, ch all */
872 static s32 get_min_power_index(s32 rate_power_index, u32 band)
875 if ((rate_power_index & 7) <= 4)
876 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
878 return MIN_TX_GAIN_INDEX;
886 static const struct gain_entry gain_table[2][108] = {
887 /* 5.2GHz power gain index table */
889 {123, 0x3F}, /* highest txpower */
998 /* 2.4GHz power gain index table */
1000 {110, 0x3f}, /* highest txpower */
1111 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1112 u8 is_ht40, u8 ctrl_chan_high,
1113 struct iwl4965_tx_power_db *tx_power_tbl)
1115 u8 saturation_power;
1117 s32 user_target_power;
1121 s32 current_regulatory;
1122 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1125 const struct iwl_channel_info *ch_info = NULL;
1126 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1127 const struct iwl_eeprom_calib_measure *measurement;
1130 s32 voltage_compensation;
1131 s32 degrees_per_05db_num;
1132 s32 degrees_per_05db_denom;
1134 s32 temperature_comp[2];
1135 s32 factory_gain_index[2];
1136 s32 factory_actual_pwr[2];
1139 /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1140 * are used for indexing into txpower table) */
1141 user_target_power = 2 * priv->tx_power_user_lmt;
1143 /* Get current (RXON) channel, band, width */
1144 IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
1147 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1149 if (!is_channel_valid(ch_info))
1152 /* get txatten group, used to select 1) thermal txpower adjustment
1153 * and 2) mimo txpower balance between Tx chains. */
1154 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1155 if (txatten_grp < 0) {
1156 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1161 IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1162 channel, txatten_grp);
1171 /* hardware txpower limits ...
1172 * saturation (clipping distortion) txpowers are in half-dBm */
1174 saturation_power = priv->calib_info->saturation_power24;
1176 saturation_power = priv->calib_info->saturation_power52;
1178 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1179 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1181 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1183 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1186 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1187 * max_power_avg values are in dBm, convert * 2 */
1189 reg_limit = ch_info->ht40_max_power_avg * 2;
1191 reg_limit = ch_info->max_power_avg * 2;
1193 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1194 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1196 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1198 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1201 /* Interpolate txpower calibration values for this channel,
1202 * based on factory calibration tests on spaced channels. */
1203 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1205 /* calculate tx gain adjustment based on power supply voltage */
1206 voltage = priv->calib_info->voltage;
1207 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1208 voltage_compensation =
1209 iwl4965_get_voltage_compensation(voltage, init_voltage);
1211 IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1213 voltage, voltage_compensation);
1215 /* get current temperature (Celsius) */
1216 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1217 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1218 current_temp = KELVIN_TO_CELSIUS(current_temp);
1220 /* select thermal txpower adjustment params, based on channel group
1221 * (same frequency group used for mimo txatten adjustment) */
1222 degrees_per_05db_num =
1223 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1224 degrees_per_05db_denom =
1225 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1227 /* get per-chain txpower values from factory measurements */
1228 for (c = 0; c < 2; c++) {
1229 measurement = &ch_eeprom_info.measurements[c][1];
1231 /* txgain adjustment (in half-dB steps) based on difference
1232 * between factory and current temperature */
1233 factory_temp = measurement->temperature;
1234 iwl4965_math_div_round((current_temp - factory_temp) *
1235 degrees_per_05db_denom,
1236 degrees_per_05db_num,
1237 &temperature_comp[c]);
1239 factory_gain_index[c] = measurement->gain_idx;
1240 factory_actual_pwr[c] = measurement->actual_pow;
1242 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1243 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1244 "curr tmp %d, comp %d steps\n",
1245 factory_temp, current_temp,
1246 temperature_comp[c]);
1248 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1249 factory_gain_index[c],
1250 factory_actual_pwr[c]);
1253 /* for each of 33 bit-rates (including 1 for CCK) */
1254 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1256 union iwl4965_tx_power_dual_stream tx_power;
1258 /* for mimo, reduce each chain's txpower by half
1259 * (3dB, 6 steps), so total output power is regulatory
1262 current_regulatory = reg_limit -
1263 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1266 current_regulatory = reg_limit;
1270 /* find txpower limit, either hardware or regulatory */
1271 power_limit = saturation_power - back_off_table[i];
1272 if (power_limit > current_regulatory)
1273 power_limit = current_regulatory;
1275 /* reduce user's txpower request if necessary
1276 * for this rate on this channel */
1277 target_power = user_target_power;
1278 if (target_power > power_limit)
1279 target_power = power_limit;
1281 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1282 i, saturation_power - back_off_table[i],
1283 current_regulatory, user_target_power,
1286 /* for each of 2 Tx chains (radio transmitters) */
1287 for (c = 0; c < 2; c++) {
1292 (s32)le32_to_cpu(priv->card_alive_init.
1293 tx_atten[txatten_grp][c]);
1297 /* calculate index; higher index means lower txpower */
1298 power_index = (u8) (factory_gain_index[c] -
1300 factory_actual_pwr[c]) -
1301 temperature_comp[c] -
1302 voltage_compensation +
1305 /* IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1308 if (power_index < get_min_power_index(i, band))
1309 power_index = get_min_power_index(i, band);
1311 /* adjust 5 GHz index to support negative indexes */
1315 /* CCK, rate 32, reduce txpower for CCK */
1316 if (i == POWER_TABLE_CCK_ENTRY)
1318 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1320 /* stay within the table! */
1321 if (power_index > 107) {
1322 IWL_WARN(priv, "txpower index %d > 107\n",
1326 if (power_index < 0) {
1327 IWL_WARN(priv, "txpower index %d < 0\n",
1332 /* fill txpower command for this rate/chain */
1333 tx_power.s.radio_tx_gain[c] =
1334 gain_table[band][power_index].radio;
1335 tx_power.s.dsp_predis_atten[c] =
1336 gain_table[band][power_index].dsp;
1338 IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1339 "gain 0x%02x dsp %d\n",
1340 c, atten_value, power_index,
1341 tx_power.s.radio_tx_gain[c],
1342 tx_power.s.dsp_predis_atten[c]);
1343 } /* for each chain */
1345 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1347 } /* for each rate */
1353 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1355 * Uses the active RXON for channel, band, and characteristics (ht40, high)
1356 * The power limit is taken from priv->tx_power_user_lmt.
1358 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1360 struct iwl4965_txpowertable_cmd cmd = { 0 };
1363 bool is_ht40 = false;
1364 u8 ctrl_chan_high = 0;
1366 if (test_bit(STATUS_SCANNING, &priv->status)) {
1367 /* If this gets hit a lot, switch it to a BUG() and catch
1368 * the stack trace to find out who is calling this during
1370 IWL_WARN(priv, "TX Power requested while scanning!\n");
1374 band = priv->band == IEEE80211_BAND_2GHZ;
1376 is_ht40 = is_ht40_channel(priv->active_rxon.flags);
1379 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1383 cmd.channel = priv->active_rxon.channel;
1385 ret = iwl4965_fill_txpower_tbl(priv, band,
1386 le16_to_cpu(priv->active_rxon.channel),
1387 is_ht40, ctrl_chan_high, &cmd.tx_power);
1391 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1397 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1400 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1401 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1402 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1404 if ((rxon1->flags == rxon2->flags) &&
1405 (rxon1->filter_flags == rxon2->filter_flags) &&
1406 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1407 (rxon1->ofdm_ht_single_stream_basic_rates ==
1408 rxon2->ofdm_ht_single_stream_basic_rates) &&
1409 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1410 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1411 (rxon1->rx_chain == rxon2->rx_chain) &&
1412 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1413 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
1417 rxon_assoc.flags = priv->staging_rxon.flags;
1418 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1419 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1420 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1421 rxon_assoc.reserved = 0;
1422 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1423 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1424 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1425 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1426 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1428 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1429 sizeof(rxon_assoc), &rxon_assoc, NULL);
1436 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1437 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1441 bool is_ht40 = false;
1442 u8 ctrl_chan_high = 0;
1443 struct iwl4965_channel_switch_cmd cmd = { 0 };
1444 const struct iwl_channel_info *ch_info;
1446 band = priv->band == IEEE80211_BAND_2GHZ;
1448 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1450 is_ht40 = is_ht40_channel(priv->staging_rxon.flags);
1453 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1457 cmd.expect_beacon = 0;
1458 cmd.channel = cpu_to_le16(channel);
1459 cmd.rxon_flags = priv->active_rxon.flags;
1460 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1461 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1463 cmd.expect_beacon = is_channel_radar(ch_info);
1465 cmd.expect_beacon = 1;
1467 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40,
1468 ctrl_chan_high, &cmd.tx_power);
1470 IWL_DEBUG_11H(priv, "error:%d fill txpower_tbl\n", rc);
1474 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1480 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1482 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1483 struct iwl_tx_queue *txq,
1486 struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1487 int txq_id = txq->q.id;
1488 int write_ptr = txq->q.write_ptr;
1489 int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1492 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1494 bc_ent = cpu_to_le16(len & 0xFFF);
1495 /* Set up byte count within first 256 entries */
1496 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1498 /* If within first 64 entries, duplicate at end */
1499 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1501 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1505 * sign_extend - Sign extend a value using specified bit as sign-bit
1507 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1508 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1510 * @param oper value to sign extend
1511 * @param index 0 based bit index (0<=index<32) to sign bit
1513 static s32 sign_extend(u32 oper, int index)
1515 u8 shift = 31 - index;
1517 return (s32)(oper << shift) >> shift;
1521 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1522 * @statistics: Provides the temperature reading from the uCode
1524 * A return of <0 indicates bogus data in the statistics
1526 static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1533 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1534 (priv->statistics.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
1535 IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
1536 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1537 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1538 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1539 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1541 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1542 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1543 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1544 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1545 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1549 * Temperature is only 23 bits, so sign extend out to 32.
1551 * NOTE If we haven't received a statistics notification yet
1552 * with an updated temperature, use R4 provided to us in the
1553 * "initialize" ALIVE response.
1555 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1556 vt = sign_extend(R4, 23);
1559 le32_to_cpu(priv->statistics.general.temperature), 23);
1561 IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1564 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1568 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1569 * Add offset to center the adjustment around 0 degrees Centigrade. */
1570 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1571 temperature /= (R3 - R1);
1572 temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1574 IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1575 temperature, KELVIN_TO_CELSIUS(temperature));
1580 /* Adjust Txpower only if temperature variance is greater than threshold. */
1581 #define IWL_TEMPERATURE_THRESHOLD 3
1584 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1586 * If the temperature changed has changed sufficiently, then a recalibration
1589 * Assumes caller will replace priv->last_temperature once calibration
1592 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1596 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1597 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1601 temp_diff = priv->temperature - priv->last_temperature;
1603 /* get absolute value */
1604 if (temp_diff < 0) {
1605 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
1606 temp_diff = -temp_diff;
1607 } else if (temp_diff == 0)
1608 IWL_DEBUG_POWER(priv, "Same temp, \n");
1610 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
1612 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1613 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
1617 IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
1622 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1626 temp = iwl4965_hw_get_temperature(priv);
1630 if (priv->temperature != temp) {
1631 if (priv->temperature)
1632 IWL_DEBUG_TEMP(priv, "Temperature changed "
1633 "from %dC to %dC\n",
1634 KELVIN_TO_CELSIUS(priv->temperature),
1635 KELVIN_TO_CELSIUS(temp));
1637 IWL_DEBUG_TEMP(priv, "Temperature "
1638 "initialized to %dC\n",
1639 KELVIN_TO_CELSIUS(temp));
1642 priv->temperature = temp;
1643 iwl_tt_handler(priv);
1644 set_bit(STATUS_TEMPERATURE, &priv->status);
1646 if (!priv->disable_tx_power_cal &&
1647 unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1648 iwl4965_is_temp_calib_needed(priv))
1649 queue_work(priv->workqueue, &priv->txpower_work);
1653 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1655 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1658 /* Simply stop the queue, but don't change any configuration;
1659 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1660 iwl_write_prph(priv,
1661 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1662 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1663 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1667 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1668 * priv->lock must be held by the caller
1670 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1671 u16 ssn_idx, u8 tx_fifo)
1673 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1674 (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1677 "queue number out of range: %d, must be %d to %d\n",
1678 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1679 IWL49_FIRST_AMPDU_QUEUE +
1680 priv->cfg->num_of_ampdu_queues - 1);
1684 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1686 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1688 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1689 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1690 /* supposes that ssn_idx is valid (!= 0xFFF) */
1691 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1693 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1694 iwl_txq_ctx_deactivate(priv, txq_id);
1695 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1701 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1703 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1710 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1712 tbl_dw_addr = priv->scd_base_addr +
1713 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1715 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1718 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1720 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1722 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1729 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1731 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1732 * i.e. it must be one of the higher queues used for aggregation
1734 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1735 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1737 unsigned long flags;
1740 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1741 (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1744 "queue number out of range: %d, must be %d to %d\n",
1745 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1746 IWL49_FIRST_AMPDU_QUEUE +
1747 priv->cfg->num_of_ampdu_queues - 1);
1751 ra_tid = BUILD_RAxTID(sta_id, tid);
1753 /* Modify device's station table to Tx this TID */
1754 iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1756 spin_lock_irqsave(&priv->lock, flags);
1758 /* Stop this Tx queue before configuring it */
1759 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1761 /* Map receiver-address / traffic-ID to this queue */
1762 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1764 /* Set this queue as a chain-building queue */
1765 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1767 /* Place first TFD at index corresponding to start sequence number.
1768 * Assumes that ssn_idx is valid (!= 0xFFF) */
1769 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1770 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1771 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1773 /* Set up Tx window size and frame limit for this queue */
1774 iwl_write_targ_mem(priv,
1775 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1776 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1777 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1779 iwl_write_targ_mem(priv, priv->scd_base_addr +
1780 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1781 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1782 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1784 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1786 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1787 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1789 spin_unlock_irqrestore(&priv->lock, flags);
1795 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1799 return (u16) sizeof(struct iwl4965_rxon_cmd);
1805 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1807 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1808 addsta->mode = cmd->mode;
1809 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1810 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1811 addsta->station_flags = cmd->station_flags;
1812 addsta->station_flags_msk = cmd->station_flags_msk;
1813 addsta->tid_disable_tx = cmd->tid_disable_tx;
1814 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1815 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1816 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1817 addsta->reserved1 = cpu_to_le16(0);
1818 addsta->reserved2 = cpu_to_le32(0);
1820 return (u16)sizeof(struct iwl4965_addsta_cmd);
1823 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1825 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1829 * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1831 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1832 struct iwl_ht_agg *agg,
1833 struct iwl4965_tx_resp *tx_resp,
1834 int txq_id, u16 start_idx)
1837 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1838 struct ieee80211_tx_info *info = NULL;
1839 struct ieee80211_hdr *hdr = NULL;
1840 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1843 if (agg->wait_for_ba)
1844 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
1846 agg->frame_count = tx_resp->frame_count;
1847 agg->start_idx = start_idx;
1848 agg->rate_n_flags = rate_n_flags;
1851 /* num frames attempted by Tx command */
1852 if (agg->frame_count == 1) {
1853 /* Only one frame was attempted; no block-ack will arrive */
1854 status = le16_to_cpu(frame_status[0].status);
1857 /* FIXME: code repetition */
1858 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
1859 agg->frame_count, agg->start_idx, idx);
1861 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1862 info->status.rates[0].count = tx_resp->failure_frame + 1;
1863 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1864 info->flags |= iwl_is_tx_success(status) ?
1865 IEEE80211_TX_STAT_ACK : 0;
1866 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
1867 /* FIXME: code repetition end */
1869 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
1870 status & 0xff, tx_resp->failure_frame);
1871 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
1873 agg->wait_for_ba = 0;
1875 /* Two or more frames were attempted; expect block-ack */
1877 int start = agg->start_idx;
1879 /* Construct bit-map of pending frames within Tx window */
1880 for (i = 0; i < agg->frame_count; i++) {
1882 status = le16_to_cpu(frame_status[i].status);
1883 seq = le16_to_cpu(frame_status[i].sequence);
1884 idx = SEQ_TO_INDEX(seq);
1885 txq_id = SEQ_TO_QUEUE(seq);
1887 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1888 AGG_TX_STATE_ABORT_MSK))
1891 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
1892 agg->frame_count, txq_id, idx);
1894 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
1897 "BUG_ON idx doesn't point to valid skb"
1898 " idx=%d, txq_id=%d\n", idx, txq_id);
1902 sc = le16_to_cpu(hdr->seq_ctrl);
1903 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
1905 "BUG_ON idx doesn't match seq control"
1906 " idx=%d, seq_idx=%d, seq=%d\n",
1907 idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
1911 IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
1912 i, idx, SEQ_TO_SN(sc));
1916 sh = (start - idx) + 0xff;
1917 bitmap = bitmap << sh;
1920 } else if (sh < -64)
1921 sh = 0xff - (start - idx);
1925 bitmap = bitmap << sh;
1928 bitmap |= 1ULL << sh;
1929 IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
1930 start, (unsigned long long)bitmap);
1933 agg->bitmap = bitmap;
1934 agg->start_idx = start;
1935 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
1936 agg->frame_count, agg->start_idx,
1937 (unsigned long long)agg->bitmap);
1940 agg->wait_for_ba = 1;
1946 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
1948 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
1949 struct iwl_rx_mem_buffer *rxb)
1951 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1952 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
1953 int txq_id = SEQ_TO_QUEUE(sequence);
1954 int index = SEQ_TO_INDEX(sequence);
1955 struct iwl_tx_queue *txq = &priv->txq[txq_id];
1956 struct ieee80211_hdr *hdr;
1957 struct ieee80211_tx_info *info;
1958 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
1959 u32 status = le32_to_cpu(tx_resp->u.status);
1960 int tid = MAX_TID_COUNT;
1965 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
1966 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
1967 "is out of range [0-%d] %d %d\n", txq_id,
1968 index, txq->q.n_bd, txq->q.write_ptr,
1973 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
1974 memset(&info->status, 0, sizeof(info->status));
1976 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
1977 if (ieee80211_is_data_qos(hdr->frame_control)) {
1978 qc = ieee80211_get_qos_ctl(hdr);
1982 sta_id = iwl_get_ra_sta_id(priv, hdr);
1983 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
1984 IWL_ERR(priv, "Station not known\n");
1988 if (txq->sched_retry) {
1989 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
1990 struct iwl_ht_agg *agg = NULL;
1994 agg = &priv->stations[sta_id].tid[tid].agg;
1996 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
1998 /* check if BAR is needed */
1999 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2000 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2002 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2003 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2004 IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2005 "%d index %d\n", scd_ssn , index);
2006 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2007 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2009 if (priv->mac80211_registered &&
2010 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2011 (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2012 if (agg->state == IWL_AGG_OFF)
2013 iwl_wake_queue(priv, txq_id);
2015 iwl_wake_queue(priv, txq->swq_id);
2019 info->status.rates[0].count = tx_resp->failure_frame + 1;
2020 info->flags |= iwl_is_tx_success(status) ?
2021 IEEE80211_TX_STAT_ACK : 0;
2022 iwl_hwrate_to_tx_control(priv,
2023 le32_to_cpu(tx_resp->rate_n_flags),
2026 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2027 "rate_n_flags 0x%x retries %d\n",
2029 iwl_get_tx_fail_reason(status), status,
2030 le32_to_cpu(tx_resp->rate_n_flags),
2031 tx_resp->failure_frame);
2033 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2034 if (qc && likely(sta_id != IWL_INVALID_STATION))
2035 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2037 if (priv->mac80211_registered &&
2038 (iwl_queue_space(&txq->q) > txq->q.low_mark))
2039 iwl_wake_queue(priv, txq_id);
2042 if (qc && likely(sta_id != IWL_INVALID_STATION))
2043 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2045 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2046 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
2049 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2050 struct iwl_rx_phy_res *rx_resp)
2052 /* data from PHY/DSP regarding signal strength, etc.,
2053 * contents are always there, not configurable by host. */
2054 struct iwl4965_rx_non_cfg_phy *ncphy =
2055 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2056 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2057 >> IWL49_AGC_DB_POS;
2059 u32 valid_antennae =
2060 (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2061 >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2065 /* Find max rssi among 3 possible receivers.
2066 * These values are measured by the digital signal processor (DSP).
2067 * They should stay fairly constant even as the signal strength varies,
2068 * if the radio's automatic gain control (AGC) is working right.
2069 * AGC value (see below) will provide the "interesting" info. */
2070 for (i = 0; i < 3; i++)
2071 if (valid_antennae & (1 << i))
2072 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2074 IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2075 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2078 /* dBm = max_rssi dB - agc dB - constant.
2079 * Higher AGC (higher radio gain) means lower signal. */
2080 return max_rssi - agc - IWL49_RSSI_OFFSET;
2084 /* Set up 4965-specific Rx frame reply handlers */
2085 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2087 /* Legacy Rx frames */
2088 priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2090 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2093 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2095 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2098 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2100 cancel_work_sync(&priv->txpower_work);
2103 #define IWL4965_UCODE_GET(item) \
2104 static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2107 return le32_to_cpu(ucode->u.v1.item); \
2110 static u32 iwl4965_ucode_get_header_size(u32 api_ver)
2112 return UCODE_HEADER_SIZE(1);
2114 static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode,
2119 static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode,
2122 return (u8 *) ucode->u.v1.data;
2125 IWL4965_UCODE_GET(inst_size);
2126 IWL4965_UCODE_GET(data_size);
2127 IWL4965_UCODE_GET(init_size);
2128 IWL4965_UCODE_GET(init_data_size);
2129 IWL4965_UCODE_GET(boot_size);
2131 static struct iwl_hcmd_ops iwl4965_hcmd = {
2132 .rxon_assoc = iwl4965_send_rxon_assoc,
2133 .commit_rxon = iwl_commit_rxon,
2134 .set_rxon_chain = iwl_set_rxon_chain,
2137 static struct iwl_ucode_ops iwl4965_ucode = {
2138 .get_header_size = iwl4965_ucode_get_header_size,
2139 .get_build = iwl4965_ucode_get_build,
2140 .get_inst_size = iwl4965_ucode_get_inst_size,
2141 .get_data_size = iwl4965_ucode_get_data_size,
2142 .get_init_size = iwl4965_ucode_get_init_size,
2143 .get_init_data_size = iwl4965_ucode_get_init_data_size,
2144 .get_boot_size = iwl4965_ucode_get_boot_size,
2145 .get_data = iwl4965_ucode_get_data,
2147 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2148 .get_hcmd_size = iwl4965_get_hcmd_size,
2149 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2150 .chain_noise_reset = iwl4965_chain_noise_reset,
2151 .gain_computation = iwl4965_gain_computation,
2152 .rts_tx_cmd_flag = iwlcore_rts_tx_cmd_flag,
2153 .calc_rssi = iwl4965_calc_rssi,
2156 static struct iwl_lib_ops iwl4965_lib = {
2157 .set_hw_params = iwl4965_hw_set_hw_params,
2158 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2159 .txq_set_sched = iwl4965_txq_set_sched,
2160 .txq_agg_enable = iwl4965_txq_agg_enable,
2161 .txq_agg_disable = iwl4965_txq_agg_disable,
2162 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2163 .txq_free_tfd = iwl_hw_txq_free_tfd,
2164 .txq_init = iwl_hw_tx_queue_init,
2165 .rx_handler_setup = iwl4965_rx_handler_setup,
2166 .setup_deferred_work = iwl4965_setup_deferred_work,
2167 .cancel_deferred_work = iwl4965_cancel_deferred_work,
2168 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2169 .alive_notify = iwl4965_alive_notify,
2170 .init_alive_start = iwl4965_init_alive_start,
2171 .load_ucode = iwl4965_load_bsm,
2172 .dump_nic_event_log = iwl_dump_nic_event_log,
2173 .dump_nic_error_log = iwl_dump_nic_error_log,
2175 .init = iwl_apm_init,
2176 .stop = iwl_apm_stop,
2177 .config = iwl4965_nic_config,
2178 .set_pwr_src = iwl_set_pwr_src,
2181 .regulatory_bands = {
2182 EEPROM_REGULATORY_BAND_1_CHANNELS,
2183 EEPROM_REGULATORY_BAND_2_CHANNELS,
2184 EEPROM_REGULATORY_BAND_3_CHANNELS,
2185 EEPROM_REGULATORY_BAND_4_CHANNELS,
2186 EEPROM_REGULATORY_BAND_5_CHANNELS,
2187 EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2188 EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
2190 .verify_signature = iwlcore_eeprom_verify_signature,
2191 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2192 .release_semaphore = iwlcore_eeprom_release_semaphore,
2193 .calib_version = iwl4965_eeprom_calib_version,
2194 .query_addr = iwlcore_eeprom_query_addr,
2196 .send_tx_power = iwl4965_send_tx_power,
2197 .update_chain_flags = iwl_update_chain_flags,
2198 .post_associate = iwl_post_associate,
2199 .config_ap = iwl_config_ap,
2200 .isr = iwl_isr_legacy,
2202 .temperature = iwl4965_temperature_calib,
2203 .set_ct_kill = iwl4965_set_ct_threshold,
2207 static struct iwl_ops iwl4965_ops = {
2208 .ucode = &iwl4965_ucode,
2209 .lib = &iwl4965_lib,
2210 .hcmd = &iwl4965_hcmd,
2211 .utils = &iwl4965_hcmd_utils,
2212 .led = &iwlagn_led_ops,
2215 struct iwl_cfg iwl4965_agn_cfg = {
2217 .fw_name_pre = IWL4965_FW_PRE,
2218 .ucode_api_max = IWL4965_UCODE_API_MAX,
2219 .ucode_api_min = IWL4965_UCODE_API_MIN,
2220 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2221 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2222 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2223 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2224 .ops = &iwl4965_ops,
2225 .num_of_queues = IWL49_NUM_QUEUES,
2226 .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
2227 .mod_params = &iwl4965_mod_params,
2228 .valid_tx_ant = ANT_AB,
2229 .valid_rx_ant = ANT_AB,
2233 .use_isr_legacy = true,
2234 .ht_greenfield_support = false,
2235 .broken_powersave = true,
2236 .led_compensation = 61,
2237 .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
2240 /* Module firmware */
2241 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2243 module_param_named(antenna, iwl4965_mod_params.antenna, int, S_IRUGO);
2244 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2245 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, S_IRUGO);
2246 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2248 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, S_IRUGO);
2249 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2251 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, S_IRUGO);
2252 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2254 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, S_IRUGO);
2255 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2256 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K,
2258 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2260 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, S_IRUGO);
2261 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");