1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
43 #include <net/mac80211.h>
45 #include <asm/div64.h>
47 #define DRV_NAME "iwlagn"
49 #include "iwl-eeprom.h"
53 #include "iwl-helpers.h"
55 #include "iwl-calib.h"
58 /******************************************************************************
62 ******************************************************************************/
65 * module name, copyright, version, etc.
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
69 #ifdef CONFIG_IWLWIFI_DEBUG
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
81 #define DRV_VERSION IWLWIFI_VERSION VD VS
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
90 /*************** STATION TABLE MANAGEMENT ****
91 * mac80211 should be examined to determine if sta_info is duplicating
92 * the functionality provided here
95 /**************************************************************/
98 * iwl_commit_rxon - commit staging_rxon to hardware
100 * The RXON command in staging_rxon is committed to the hardware and
101 * the active_rxon structure is updated with the new data. This
102 * function correctly transitions out of the RXON_ASSOC_MSK state if
103 * a HW tune is required based on the RXON structure changes.
105 int iwl_commit_rxon(struct iwl_priv *priv)
107 /* cast away the const for active_rxon in this function */
108 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
111 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
113 if (!iwl_is_alive(priv))
116 /* always get timestamp with Rx frame */
117 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
118 /* allow CTS-to-self if possible. this is relevant only for
119 * 5000, but will not damage 4965 */
120 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
122 ret = iwl_check_rxon_cmd(priv);
124 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
128 /* If we don't need to send a full RXON, we can use
129 * iwl_rxon_assoc_cmd which is used to reconfigure filter
130 * and other flags for the current radio configuration. */
131 if (!iwl_full_rxon_required(priv)) {
132 ret = iwl_send_rxon_assoc(priv);
134 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
138 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
142 /* station table will be cleared */
143 priv->assoc_station_added = 0;
145 /* If we are currently associated and the new config requires
146 * an RXON_ASSOC and the new config wants the associated mask enabled,
147 * we must clear the associated from the active configuration
148 * before we apply the new config */
149 if (iwl_is_associated(priv) && new_assoc) {
150 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
151 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
153 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
154 sizeof(struct iwl_rxon_cmd),
157 /* If the mask clearing failed then we set
158 * active_rxon back to what it was previously */
160 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
161 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
166 IWL_DEBUG_INFO(priv, "Sending RXON\n"
167 "* with%s RXON_FILTER_ASSOC_MSK\n"
170 (new_assoc ? "" : "out"),
171 le16_to_cpu(priv->staging_rxon.channel),
172 priv->staging_rxon.bssid_addr);
174 iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
176 /* Apply the new configuration
177 * RXON unassoc clears the station table in uCode, send it before
178 * we add the bcast station. If assoc bit is set, we will send RXON
179 * after having added the bcast and bssid station.
182 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
183 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
185 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
188 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
191 priv->cfg->ops->smgmt->clear_station_table(priv);
193 priv->start_calib = 0;
195 /* Add the broadcast address so we can send broadcast frames */
196 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
197 IWL_INVALID_STATION) {
198 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
202 /* If we have set the ASSOC_MSK and we are in BSS mode then
203 * add the IWL_AP_ID to the station rate table */
205 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
206 ret = iwl_rxon_add_station(priv,
207 priv->active_rxon.bssid_addr, 1);
208 if (ret == IWL_INVALID_STATION) {
210 "Error adding AP address for TX.\n");
213 priv->assoc_station_added = 1;
214 if (priv->default_wep_key &&
215 iwl_send_static_wepkey_cmd(priv, 0))
217 "Could not send WEP static key.\n");
220 /* Apply the new configuration
221 * RXON assoc doesn't clear the station table in uCode,
223 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
224 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
226 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
229 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
232 iwl_init_sensitivity(priv);
234 /* If we issue a new RXON command which required a tune then we must
235 * send a new TXPOWER command or we won't be able to Tx any frames */
236 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
238 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
245 void iwl_update_chain_flags(struct iwl_priv *priv)
248 if (priv->cfg->ops->hcmd->set_rxon_chain)
249 priv->cfg->ops->hcmd->set_rxon_chain(priv);
250 iwlcore_commit_rxon(priv);
253 static void iwl_clear_free_frames(struct iwl_priv *priv)
255 struct list_head *element;
257 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
260 while (!list_empty(&priv->free_frames)) {
261 element = priv->free_frames.next;
263 kfree(list_entry(element, struct iwl_frame, list));
264 priv->frames_count--;
267 if (priv->frames_count) {
268 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
270 priv->frames_count = 0;
274 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
276 struct iwl_frame *frame;
277 struct list_head *element;
278 if (list_empty(&priv->free_frames)) {
279 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
281 IWL_ERR(priv, "Could not allocate frame!\n");
285 priv->frames_count++;
289 element = priv->free_frames.next;
291 return list_entry(element, struct iwl_frame, list);
294 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
296 memset(frame, 0, sizeof(*frame));
297 list_add(&frame->list, &priv->free_frames);
300 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
301 struct ieee80211_hdr *hdr,
304 if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
305 ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
306 (priv->iw_mode != NL80211_IFTYPE_AP)))
309 if (priv->ibss_beacon->len > left)
312 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
314 return priv->ibss_beacon->len;
317 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
318 struct iwl_frame *frame, u8 rate)
320 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
321 unsigned int frame_size;
323 tx_beacon_cmd = &frame->u.beacon;
324 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
326 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
327 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
329 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
330 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
332 BUG_ON(frame_size > MAX_MPDU_SIZE);
333 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
335 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
336 tx_beacon_cmd->tx.rate_n_flags =
337 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
339 tx_beacon_cmd->tx.rate_n_flags =
340 iwl_hw_set_rate_n_flags(rate, 0);
342 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
344 TX_CMD_FLG_STA_RATE_MSK;
346 return sizeof(*tx_beacon_cmd) + frame_size;
348 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
350 struct iwl_frame *frame;
351 unsigned int frame_size;
355 frame = iwl_get_free_frame(priv);
358 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
363 rate = iwl_rate_get_lowest_plcp(priv);
365 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
367 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
370 iwl_free_frame(priv, frame);
375 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
377 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
379 dma_addr_t addr = get_unaligned_le32(&tb->lo);
380 if (sizeof(dma_addr_t) > sizeof(u32))
382 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
387 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
389 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
391 return le16_to_cpu(tb->hi_n_len) >> 4;
394 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
395 dma_addr_t addr, u16 len)
397 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
398 u16 hi_n_len = len << 4;
400 put_unaligned_le32(addr, &tb->lo);
401 if (sizeof(dma_addr_t) > sizeof(u32))
402 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
404 tb->hi_n_len = cpu_to_le16(hi_n_len);
406 tfd->num_tbs = idx + 1;
409 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
411 return tfd->num_tbs & 0x1f;
415 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
416 * @priv - driver private data
419 * Does NOT advance any TFD circular buffer read/write indexes
420 * Does NOT free the TFD itself (which is within circular buffer)
422 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
424 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
426 struct pci_dev *dev = priv->pci_dev;
427 int index = txq->q.read_ptr;
431 tfd = &tfd_tmp[index];
433 /* Sanity check on number of chunks */
434 num_tbs = iwl_tfd_get_num_tbs(tfd);
436 if (num_tbs >= IWL_NUM_OF_TBS) {
437 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
438 /* @todo issue fatal error, it is quite serious situation */
444 pci_unmap_single(dev,
445 pci_unmap_addr(&txq->cmd[index]->meta, mapping),
446 pci_unmap_len(&txq->cmd[index]->meta, len),
447 PCI_DMA_BIDIRECTIONAL);
449 /* Unmap chunks, if any. */
450 for (i = 1; i < num_tbs; i++) {
451 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
452 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
455 dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
456 txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
461 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
462 struct iwl_tx_queue *txq,
463 dma_addr_t addr, u16 len,
467 struct iwl_tfd *tfd, *tfd_tmp;
471 tfd_tmp = (struct iwl_tfd *)txq->tfds;
472 tfd = &tfd_tmp[q->write_ptr];
475 memset(tfd, 0, sizeof(*tfd));
477 num_tbs = iwl_tfd_get_num_tbs(tfd);
479 /* Each TFD can point to a maximum 20 Tx buffers */
480 if (num_tbs >= IWL_NUM_OF_TBS) {
481 IWL_ERR(priv, "Error can not send more than %d chunks\n",
486 BUG_ON(addr & ~DMA_BIT_MASK(36));
487 if (unlikely(addr & ~IWL_TX_DMA_MASK))
488 IWL_ERR(priv, "Unaligned address = %llx\n",
489 (unsigned long long)addr);
491 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
497 * Tell nic where to find circular buffer of Tx Frame Descriptors for
498 * given Tx queue, and enable the DMA channel used for that queue.
500 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
501 * channels supported in hardware.
503 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
504 struct iwl_tx_queue *txq)
506 int txq_id = txq->q.id;
508 /* Circular buffer (TFD queue in DRAM) physical base address */
509 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
510 txq->q.dma_addr >> 8);
516 /******************************************************************************
518 * Misc. internal state and helper functions
520 ******************************************************************************/
522 #define MAX_UCODE_BEACON_INTERVAL 4096
524 static u16 iwl_adjust_beacon_interval(u16 beacon_val)
527 u16 beacon_factor = 0;
529 beacon_factor = (beacon_val + MAX_UCODE_BEACON_INTERVAL)
530 / MAX_UCODE_BEACON_INTERVAL;
531 new_val = beacon_val / beacon_factor;
534 new_val = MAX_UCODE_BEACON_INTERVAL;
539 static void iwl_setup_rxon_timing(struct iwl_priv *priv)
542 s32 interval_tm, rem;
544 struct ieee80211_conf *conf = NULL;
547 conf = ieee80211_get_hw_conf(priv->hw);
549 spin_lock_irqsave(&priv->lock, flags);
550 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
551 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
553 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
554 beacon_int = iwl_adjust_beacon_interval(priv->beacon_int);
555 priv->rxon_timing.atim_window = 0;
557 beacon_int = iwl_adjust_beacon_interval(
558 priv->vif->bss_conf.beacon_int);
560 /* TODO: we need to get atim_window from upper stack
561 * for now we set to 0 */
562 priv->rxon_timing.atim_window = 0;
565 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
567 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
568 interval_tm = beacon_int * 1024;
569 rem = do_div(tsf, interval_tm);
570 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
572 spin_unlock_irqrestore(&priv->lock, flags);
573 IWL_DEBUG_ASSOC(priv, "beacon interval %d beacon timer %d beacon tim %d\n",
574 le16_to_cpu(priv->rxon_timing.beacon_interval),
575 le32_to_cpu(priv->rxon_timing.beacon_init_val),
576 le16_to_cpu(priv->rxon_timing.atim_window));
579 /******************************************************************************
581 * Generic RX handler implementations
583 ******************************************************************************/
584 static void iwl_rx_reply_alive(struct iwl_priv *priv,
585 struct iwl_rx_mem_buffer *rxb)
587 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
588 struct iwl_alive_resp *palive;
589 struct delayed_work *pwork;
591 palive = &pkt->u.alive_frame;
593 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
595 palive->is_valid, palive->ver_type,
596 palive->ver_subtype);
598 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
599 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
600 memcpy(&priv->card_alive_init,
602 sizeof(struct iwl_init_alive_resp));
603 pwork = &priv->init_alive_start;
605 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
606 memcpy(&priv->card_alive, &pkt->u.alive_frame,
607 sizeof(struct iwl_alive_resp));
608 pwork = &priv->alive_start;
611 /* We delay the ALIVE response by 5ms to
612 * give the HW RF Kill time to activate... */
613 if (palive->is_valid == UCODE_VALID_OK)
614 queue_delayed_work(priv->workqueue, pwork,
615 msecs_to_jiffies(5));
617 IWL_WARN(priv, "uCode did not respond OK.\n");
620 static void iwl_bg_beacon_update(struct work_struct *work)
622 struct iwl_priv *priv =
623 container_of(work, struct iwl_priv, beacon_update);
624 struct sk_buff *beacon;
626 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
627 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
630 IWL_ERR(priv, "update beacon failed\n");
634 mutex_lock(&priv->mutex);
635 /* new beacon skb is allocated every time; dispose previous.*/
636 if (priv->ibss_beacon)
637 dev_kfree_skb(priv->ibss_beacon);
639 priv->ibss_beacon = beacon;
640 mutex_unlock(&priv->mutex);
642 iwl_send_beacon_cmd(priv);
646 * iwl_bg_statistics_periodic - Timer callback to queue statistics
648 * This callback is provided in order to send a statistics request.
650 * This timer function is continually reset to execute within
651 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
652 * was received. We need to ensure we receive the statistics in order
653 * to update the temperature used for calibrating the TXPOWER.
655 static void iwl_bg_statistics_periodic(unsigned long data)
657 struct iwl_priv *priv = (struct iwl_priv *)data;
659 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
662 /* dont send host command if rf-kill is on */
663 if (!iwl_is_ready_rf(priv))
666 iwl_send_statistics_request(priv, CMD_ASYNC);
669 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
670 struct iwl_rx_mem_buffer *rxb)
672 #ifdef CONFIG_IWLWIFI_DEBUG
673 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
674 struct iwl4965_beacon_notif *beacon =
675 (struct iwl4965_beacon_notif *)pkt->u.raw;
676 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
678 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
679 "tsf %d %d rate %d\n",
680 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
681 beacon->beacon_notify_hdr.failure_frame,
682 le32_to_cpu(beacon->ibss_mgr_status),
683 le32_to_cpu(beacon->high_tsf),
684 le32_to_cpu(beacon->low_tsf), rate);
687 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
688 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
689 queue_work(priv->workqueue, &priv->beacon_update);
692 /* Handle notification from uCode that card's power state is changing
693 * due to software, hardware, or critical temperature RFKILL */
694 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
695 struct iwl_rx_mem_buffer *rxb)
697 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
698 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
699 unsigned long status = priv->status;
700 unsigned long reg_flags;
702 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
703 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
704 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
706 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
709 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
710 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
712 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
713 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
715 if (!(flags & RXON_CARD_DISABLED)) {
716 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
717 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
718 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
719 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
723 if (flags & RF_CARD_DISABLED) {
724 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
725 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
726 iwl_read32(priv, CSR_UCODE_DRV_GP1);
727 spin_lock_irqsave(&priv->reg_lock, reg_flags);
728 if (!iwl_grab_nic_access(priv))
729 iwl_release_nic_access(priv);
730 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
734 if (flags & HW_CARD_DISABLED)
735 set_bit(STATUS_RF_KILL_HW, &priv->status);
737 clear_bit(STATUS_RF_KILL_HW, &priv->status);
740 if (flags & SW_CARD_DISABLED)
741 set_bit(STATUS_RF_KILL_SW, &priv->status);
743 clear_bit(STATUS_RF_KILL_SW, &priv->status);
745 if (!(flags & RXON_CARD_DISABLED))
746 iwl_scan_cancel(priv);
748 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
749 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
750 (test_bit(STATUS_RF_KILL_SW, &status) !=
751 test_bit(STATUS_RF_KILL_SW, &priv->status)))
752 queue_work(priv->workqueue, &priv->rf_kill);
754 wake_up_interruptible(&priv->wait_command_queue);
757 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
759 if (src == IWL_PWR_SRC_VAUX) {
760 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
761 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
762 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
763 ~APMG_PS_CTRL_MSK_PWR_SRC);
765 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
766 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
767 ~APMG_PS_CTRL_MSK_PWR_SRC);
774 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
776 * Setup the RX handlers for each of the reply types sent from the uCode
779 * This function chains into the hardware specific files for them to setup
780 * any hardware specific handlers as well.
782 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
784 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
785 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
786 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
787 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
788 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
789 iwl_rx_pm_debug_statistics_notif;
790 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
793 * The same handler is used for both the REPLY to a discrete
794 * statistics request from the host as well as for the periodic
795 * statistics notifications (after received beacons) from the uCode.
797 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
798 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
800 iwl_setup_spectrum_handlers(priv);
801 iwl_setup_rx_scan_handlers(priv);
803 /* status change handler */
804 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
806 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
807 iwl_rx_missed_beacon_notif;
809 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
810 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
812 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
813 /* Set up hardware specific Rx handlers */
814 priv->cfg->ops->lib->rx_handler_setup(priv);
818 * iwl_rx_handle - Main entry function for receiving responses from uCode
820 * Uses the priv->rx_handlers callback function array to invoke
821 * the appropriate handlers, including command responses,
822 * frame-received notifications, and other notifications.
824 void iwl_rx_handle(struct iwl_priv *priv)
826 struct iwl_rx_mem_buffer *rxb;
827 struct iwl_rx_packet *pkt;
828 struct iwl_rx_queue *rxq = &priv->rxq;
836 /* uCode's read index (stored in shared DRAM) indicates the last Rx
837 * buffer that the driver may process (last buffer filled by ucode). */
838 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
841 /* Rx interrupt, but nothing sent from uCode */
843 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
845 /* calculate total frames need to be restock after handling RX */
846 total_empty = r - priv->rxq.write_actual;
848 total_empty += RX_QUEUE_SIZE;
850 if (total_empty > (RX_QUEUE_SIZE / 2))
856 /* If an RXB doesn't have a Rx queue slot associated with it,
857 * then a bug has been introduced in the queue refilling
858 * routines -- catch it here */
861 rxq->queue[i] = NULL;
863 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
864 priv->hw_params.rx_buf_size + 256,
866 pkt = (struct iwl_rx_packet *)rxb->skb->data;
868 /* Reclaim a command buffer only if this packet is a response
869 * to a (driver-originated) command.
870 * If the packet (e.g. Rx frame) originated from uCode,
871 * there is no command buffer to reclaim.
872 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
873 * but apparently a few don't get set; catch them here. */
874 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
875 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
876 (pkt->hdr.cmd != REPLY_RX) &&
877 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
878 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
879 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
880 (pkt->hdr.cmd != REPLY_TX);
882 /* Based on type of command response or notification,
883 * handle those that need handling via function in
884 * rx_handlers table. See iwl_setup_rx_handlers() */
885 if (priv->rx_handlers[pkt->hdr.cmd]) {
886 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
887 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
888 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
889 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
891 /* No handling needed */
893 "r %d i %d No handler needed for %s, 0x%02x\n",
894 r, i, get_cmd_string(pkt->hdr.cmd),
899 /* Invoke any callbacks, transfer the skb to caller, and
900 * fire off the (possibly) blocking iwl_send_cmd()
901 * as we reclaim the driver command queue */
903 iwl_tx_cmd_complete(priv, rxb);
905 IWL_WARN(priv, "Claim null rxb?\n");
908 /* For now we just don't re-use anything. We can tweak this
909 * later to try and re-use notification packets and SKBs that
910 * fail to Rx correctly */
911 if (rxb->skb != NULL) {
912 priv->alloc_rxb_skb--;
913 dev_kfree_skb_any(rxb->skb);
917 spin_lock_irqsave(&rxq->lock, flags);
918 list_add_tail(&rxb->list, &priv->rxq.rx_used);
919 spin_unlock_irqrestore(&rxq->lock, flags);
920 i = (i + 1) & RX_QUEUE_MASK;
921 /* If there are a lot of unused frames,
922 * restock the Rx queue so ucode wont assert. */
927 iwl_rx_replenish_now(priv);
933 /* Backtrack one entry */
936 iwl_rx_replenish_now(priv);
938 iwl_rx_queue_restock(priv);
941 /* call this function to flush any scheduled tasklet */
942 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
944 /* wait to make sure we flush pending tasklet*/
945 synchronize_irq(priv->pci_dev->irq);
946 tasklet_kill(&priv->irq_tasklet);
949 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
951 u32 inta, handled = 0;
954 #ifdef CONFIG_IWLWIFI_DEBUG
958 spin_lock_irqsave(&priv->lock, flags);
960 /* Ack/clear/reset pending uCode interrupts.
961 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
962 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
963 inta = iwl_read32(priv, CSR_INT);
964 iwl_write32(priv, CSR_INT, inta);
966 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
967 * Any new interrupts that happen after this, either while we're
968 * in this tasklet, or later, will show up in next ISR/tasklet. */
969 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
970 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
972 #ifdef CONFIG_IWLWIFI_DEBUG
973 if (priv->debug_level & IWL_DL_ISR) {
975 inta_mask = iwl_read32(priv, CSR_INT_MASK);
976 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
977 inta, inta_mask, inta_fh);
981 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
982 * atomic, make sure that inta covers all the interrupts that
983 * we've discovered, even if FH interrupt came in just after
984 * reading CSR_INT. */
985 if (inta_fh & CSR49_FH_INT_RX_MASK)
986 inta |= CSR_INT_BIT_FH_RX;
987 if (inta_fh & CSR49_FH_INT_TX_MASK)
988 inta |= CSR_INT_BIT_FH_TX;
990 /* Now service all interrupt bits discovered above. */
991 if (inta & CSR_INT_BIT_HW_ERR) {
992 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
994 /* Tell the device to stop sending interrupts */
995 iwl_disable_interrupts(priv);
997 priv->isr_stats.hw++;
998 iwl_irq_handle_error(priv);
1000 handled |= CSR_INT_BIT_HW_ERR;
1002 spin_unlock_irqrestore(&priv->lock, flags);
1007 #ifdef CONFIG_IWLWIFI_DEBUG
1008 if (priv->debug_level & (IWL_DL_ISR)) {
1009 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1010 if (inta & CSR_INT_BIT_SCD) {
1011 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1012 "the frame/frames.\n");
1013 priv->isr_stats.sch++;
1016 /* Alive notification via Rx interrupt will do the real work */
1017 if (inta & CSR_INT_BIT_ALIVE) {
1018 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1019 priv->isr_stats.alive++;
1023 /* Safely ignore these bits for debug checks below */
1024 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1026 /* HW RF KILL switch toggled */
1027 if (inta & CSR_INT_BIT_RF_KILL) {
1029 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1030 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1033 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
1034 hw_rf_kill ? "disable radio" : "enable radio");
1036 priv->isr_stats.rfkill++;
1038 /* driver only loads ucode once setting the interface up.
1039 * the driver allows loading the ucode even if the radio
1040 * is killed. Hence update the killswitch state here. The
1041 * rfkill handler will care about restarting if needed.
1043 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1045 set_bit(STATUS_RF_KILL_HW, &priv->status);
1047 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1048 queue_work(priv->workqueue, &priv->rf_kill);
1051 handled |= CSR_INT_BIT_RF_KILL;
1054 /* Chip got too hot and stopped itself */
1055 if (inta & CSR_INT_BIT_CT_KILL) {
1056 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1057 priv->isr_stats.ctkill++;
1058 handled |= CSR_INT_BIT_CT_KILL;
1061 /* Error detected by uCode */
1062 if (inta & CSR_INT_BIT_SW_ERR) {
1063 IWL_ERR(priv, "Microcode SW error detected. "
1064 " Restarting 0x%X.\n", inta);
1065 priv->isr_stats.sw++;
1066 priv->isr_stats.sw_err = inta;
1067 iwl_irq_handle_error(priv);
1068 handled |= CSR_INT_BIT_SW_ERR;
1071 /* uCode wakes up after power-down sleep */
1072 if (inta & CSR_INT_BIT_WAKEUP) {
1073 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1074 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1075 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1076 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1077 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1078 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1079 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1080 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1082 priv->isr_stats.wakeup++;
1084 handled |= CSR_INT_BIT_WAKEUP;
1087 /* All uCode command responses, including Tx command responses,
1088 * Rx "responses" (frame-received notification), and other
1089 * notifications from uCode come through here*/
1090 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1091 iwl_rx_handle(priv);
1092 priv->isr_stats.rx++;
1093 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1096 if (inta & CSR_INT_BIT_FH_TX) {
1097 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1098 priv->isr_stats.tx++;
1099 handled |= CSR_INT_BIT_FH_TX;
1100 /* FH finished to write, send event */
1101 priv->ucode_write_complete = 1;
1102 wake_up_interruptible(&priv->wait_command_queue);
1105 if (inta & ~handled) {
1106 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1107 priv->isr_stats.unhandled++;
1110 if (inta & ~(priv->inta_mask)) {
1111 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1112 inta & ~priv->inta_mask);
1113 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1116 /* Re-enable all interrupts */
1117 /* only Re-enable if diabled by irq */
1118 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1119 iwl_enable_interrupts(priv);
1121 #ifdef CONFIG_IWLWIFI_DEBUG
1122 if (priv->debug_level & (IWL_DL_ISR)) {
1123 inta = iwl_read32(priv, CSR_INT);
1124 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1125 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1126 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1127 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1130 spin_unlock_irqrestore(&priv->lock, flags);
1133 /* tasklet for iwlagn interrupt */
1134 static void iwl_irq_tasklet(struct iwl_priv *priv)
1138 unsigned long flags;
1139 #ifdef CONFIG_IWLWIFI_DEBUG
1143 spin_lock_irqsave(&priv->lock, flags);
1145 /* Ack/clear/reset pending uCode interrupts.
1146 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1148 iwl_write32(priv, CSR_INT, priv->inta);
1152 #ifdef CONFIG_IWLWIFI_DEBUG
1153 if (priv->debug_level & IWL_DL_ISR) {
1154 /* just for debug */
1155 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1156 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1160 /* saved interrupt in inta variable now we can reset priv->inta */
1163 /* Now service all interrupt bits discovered above. */
1164 if (inta & CSR_INT_BIT_HW_ERR) {
1165 IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
1167 /* Tell the device to stop sending interrupts */
1168 iwl_disable_interrupts(priv);
1170 priv->isr_stats.hw++;
1171 iwl_irq_handle_error(priv);
1173 handled |= CSR_INT_BIT_HW_ERR;
1175 spin_unlock_irqrestore(&priv->lock, flags);
1180 #ifdef CONFIG_IWLWIFI_DEBUG
1181 if (priv->debug_level & (IWL_DL_ISR)) {
1182 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1183 if (inta & CSR_INT_BIT_SCD) {
1184 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1185 "the frame/frames.\n");
1186 priv->isr_stats.sch++;
1189 /* Alive notification via Rx interrupt will do the real work */
1190 if (inta & CSR_INT_BIT_ALIVE) {
1191 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1192 priv->isr_stats.alive++;
1196 /* Safely ignore these bits for debug checks below */
1197 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1199 /* HW RF KILL switch toggled */
1200 if (inta & CSR_INT_BIT_RF_KILL) {
1202 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1203 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1206 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
1207 hw_rf_kill ? "disable radio" : "enable radio");
1209 priv->isr_stats.rfkill++;
1211 /* driver only loads ucode once setting the interface up.
1212 * the driver allows loading the ucode even if the radio
1213 * is killed. Hence update the killswitch state here. The
1214 * rfkill handler will care about restarting if needed.
1216 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1218 set_bit(STATUS_RF_KILL_HW, &priv->status);
1220 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1221 queue_work(priv->workqueue, &priv->rf_kill);
1224 handled |= CSR_INT_BIT_RF_KILL;
1227 /* Chip got too hot and stopped itself */
1228 if (inta & CSR_INT_BIT_CT_KILL) {
1229 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1230 priv->isr_stats.ctkill++;
1231 handled |= CSR_INT_BIT_CT_KILL;
1234 /* Error detected by uCode */
1235 if (inta & CSR_INT_BIT_SW_ERR) {
1236 IWL_ERR(priv, "Microcode SW error detected. "
1237 " Restarting 0x%X.\n", inta);
1238 priv->isr_stats.sw++;
1239 priv->isr_stats.sw_err = inta;
1240 iwl_irq_handle_error(priv);
1241 handled |= CSR_INT_BIT_SW_ERR;
1244 /* uCode wakes up after power-down sleep */
1245 if (inta & CSR_INT_BIT_WAKEUP) {
1246 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1247 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1248 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1249 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1250 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1251 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1252 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1253 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1255 priv->isr_stats.wakeup++;
1257 handled |= CSR_INT_BIT_WAKEUP;
1260 /* All uCode command responses, including Tx command responses,
1261 * Rx "responses" (frame-received notification), and other
1262 * notifications from uCode come through here*/
1263 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1264 CSR_INT_BIT_RX_PERIODIC)) {
1265 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1266 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1267 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1268 iwl_write32(priv, CSR_FH_INT_STATUS,
1269 CSR49_FH_INT_RX_MASK);
1271 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1272 handled |= CSR_INT_BIT_RX_PERIODIC;
1273 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1275 /* Sending RX interrupt require many steps to be done in the
1277 * 1- write interrupt to current index in ICT table.
1279 * 3- update RX shared data to indicate last write index.
1280 * 4- send interrupt.
1281 * This could lead to RX race, driver could receive RX interrupt
1282 * but the shared data changes does not reflect this.
1283 * this could lead to RX race, RX periodic will solve this race
1285 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1286 CSR_INT_PERIODIC_DIS);
1287 iwl_rx_handle(priv);
1288 /* Only set RX periodic if real RX is received. */
1289 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1290 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1291 CSR_INT_PERIODIC_ENA);
1293 priv->isr_stats.rx++;
1296 if (inta & CSR_INT_BIT_FH_TX) {
1297 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1298 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1299 priv->isr_stats.tx++;
1300 handled |= CSR_INT_BIT_FH_TX;
1301 /* FH finished to write, send event */
1302 priv->ucode_write_complete = 1;
1303 wake_up_interruptible(&priv->wait_command_queue);
1306 if (inta & ~handled) {
1307 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1308 priv->isr_stats.unhandled++;
1311 if (inta & ~(priv->inta_mask)) {
1312 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1313 inta & ~priv->inta_mask);
1317 /* Re-enable all interrupts */
1318 /* only Re-enable if diabled by irq */
1319 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1320 iwl_enable_interrupts(priv);
1322 spin_unlock_irqrestore(&priv->lock, flags);
1327 /******************************************************************************
1329 * uCode download functions
1331 ******************************************************************************/
1333 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1335 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1336 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1337 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1338 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1339 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1340 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1343 static void iwl_nic_start(struct iwl_priv *priv)
1345 /* Remove all resets to allow NIC to operate */
1346 iwl_write32(priv, CSR_RESET, 0);
1351 * iwl_read_ucode - Read uCode images from disk file.
1353 * Copy into buffers for card to fetch via bus-mastering
1355 static int iwl_read_ucode(struct iwl_priv *priv)
1357 struct iwl_ucode *ucode;
1358 int ret = -EINVAL, index;
1359 const struct firmware *ucode_raw;
1360 const char *name_pre = priv->cfg->fw_name_pre;
1361 const unsigned int api_max = priv->cfg->ucode_api_max;
1362 const unsigned int api_min = priv->cfg->ucode_api_min;
1366 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1368 /* Ask kernel firmware_class module to get the boot firmware off disk.
1369 * request_firmware() is synchronous, file is in memory on return. */
1370 for (index = api_max; index >= api_min; index--) {
1371 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1372 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1374 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1381 if (index < api_max)
1382 IWL_ERR(priv, "Loaded firmware %s, "
1383 "which is deprecated. "
1384 "Please use API v%u instead.\n",
1387 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1388 buf, ucode_raw->size);
1396 /* Make sure that we got at least our header! */
1397 if (ucode_raw->size < sizeof(*ucode)) {
1398 IWL_ERR(priv, "File size way too small!\n");
1403 /* Data from ucode file: header followed by uCode images */
1404 ucode = (void *)ucode_raw->data;
1406 priv->ucode_ver = le32_to_cpu(ucode->ver);
1407 api_ver = IWL_UCODE_API(priv->ucode_ver);
1408 inst_size = le32_to_cpu(ucode->inst_size);
1409 data_size = le32_to_cpu(ucode->data_size);
1410 init_size = le32_to_cpu(ucode->init_size);
1411 init_data_size = le32_to_cpu(ucode->init_data_size);
1412 boot_size = le32_to_cpu(ucode->boot_size);
1414 /* api_ver should match the api version forming part of the
1415 * firmware filename ... but we don't check for that and only rely
1416 * on the API version read from firmware header from here on forward */
1418 if (api_ver < api_min || api_ver > api_max) {
1419 IWL_ERR(priv, "Driver unable to support your firmware API. "
1420 "Driver supports v%u, firmware is v%u.\n",
1422 priv->ucode_ver = 0;
1426 if (api_ver != api_max)
1427 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1428 "got v%u. New firmware can be obtained "
1429 "from http://www.intellinuxwireless.org.\n",
1432 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1433 IWL_UCODE_MAJOR(priv->ucode_ver),
1434 IWL_UCODE_MINOR(priv->ucode_ver),
1435 IWL_UCODE_API(priv->ucode_ver),
1436 IWL_UCODE_SERIAL(priv->ucode_ver));
1438 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1440 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1442 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1444 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1446 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1448 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1451 /* Verify size of file vs. image size info in file's header */
1452 if (ucode_raw->size < sizeof(*ucode) +
1453 inst_size + data_size + init_size +
1454 init_data_size + boot_size) {
1456 IWL_DEBUG_INFO(priv, "uCode file size %d too small\n",
1457 (int)ucode_raw->size);
1462 /* Verify that uCode images will fit in card's SRAM */
1463 if (inst_size > priv->hw_params.max_inst_size) {
1464 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1470 if (data_size > priv->hw_params.max_data_size) {
1471 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1476 if (init_size > priv->hw_params.max_inst_size) {
1477 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1482 if (init_data_size > priv->hw_params.max_data_size) {
1483 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1488 if (boot_size > priv->hw_params.max_bsm_size) {
1489 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1495 /* Allocate ucode buffers for card's bus-master loading ... */
1497 /* Runtime instructions and 2 copies of data:
1498 * 1) unmodified from disk
1499 * 2) backup cache for save/restore during power-downs */
1500 priv->ucode_code.len = inst_size;
1501 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1503 priv->ucode_data.len = data_size;
1504 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1506 priv->ucode_data_backup.len = data_size;
1507 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1509 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1510 !priv->ucode_data_backup.v_addr)
1513 /* Initialization instructions and data */
1514 if (init_size && init_data_size) {
1515 priv->ucode_init.len = init_size;
1516 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1518 priv->ucode_init_data.len = init_data_size;
1519 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1521 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1525 /* Bootstrap (instructions only, no data) */
1527 priv->ucode_boot.len = boot_size;
1528 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1530 if (!priv->ucode_boot.v_addr)
1534 /* Copy images into buffers for card's bus-master reads ... */
1536 /* Runtime instructions (first block of data in file) */
1537 src = &ucode->data[0];
1538 len = priv->ucode_code.len;
1539 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1540 memcpy(priv->ucode_code.v_addr, src, len);
1541 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1542 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1544 /* Runtime data (2nd block)
1545 * NOTE: Copy into backup buffer will be done in iwl_up() */
1546 src = &ucode->data[inst_size];
1547 len = priv->ucode_data.len;
1548 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1549 memcpy(priv->ucode_data.v_addr, src, len);
1550 memcpy(priv->ucode_data_backup.v_addr, src, len);
1552 /* Initialization instructions (3rd block) */
1554 src = &ucode->data[inst_size + data_size];
1555 len = priv->ucode_init.len;
1556 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1558 memcpy(priv->ucode_init.v_addr, src, len);
1561 /* Initialization data (4th block) */
1562 if (init_data_size) {
1563 src = &ucode->data[inst_size + data_size + init_size];
1564 len = priv->ucode_init_data.len;
1565 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1567 memcpy(priv->ucode_init_data.v_addr, src, len);
1570 /* Bootstrap instructions (5th block) */
1571 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
1572 len = priv->ucode_boot.len;
1573 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1574 memcpy(priv->ucode_boot.v_addr, src, len);
1576 /* We have our copies now, allow OS release its copies */
1577 release_firmware(ucode_raw);
1581 IWL_ERR(priv, "failed to allocate pci memory\n");
1583 iwl_dealloc_ucode_pci(priv);
1586 release_firmware(ucode_raw);
1593 * iwl_alive_start - called after REPLY_ALIVE notification received
1594 * from protocol/runtime uCode (initialization uCode's
1595 * Alive gets handled by iwl_init_alive_start()).
1597 static void iwl_alive_start(struct iwl_priv *priv)
1601 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1603 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1604 /* We had an error bringing up the hardware, so take it
1605 * all the way back down so we can try again */
1606 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1610 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1611 * This is a paranoid check, because we would not have gotten the
1612 * "runtime" alive if code weren't properly loaded. */
1613 if (iwl_verify_ucode(priv)) {
1614 /* Runtime instruction load was bad;
1615 * take it all the way back down so we can try again */
1616 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1620 priv->cfg->ops->smgmt->clear_station_table(priv);
1621 ret = priv->cfg->ops->lib->alive_notify(priv);
1624 "Could not complete ALIVE transition [ntf]: %d\n", ret);
1628 /* After the ALIVE response, we can send host commands to the uCode */
1629 set_bit(STATUS_ALIVE, &priv->status);
1631 if (iwl_is_rfkill(priv))
1634 ieee80211_wake_queues(priv->hw);
1636 priv->active_rate = priv->rates_mask;
1637 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1639 if (iwl_is_associated(priv)) {
1640 struct iwl_rxon_cmd *active_rxon =
1641 (struct iwl_rxon_cmd *)&priv->active_rxon;
1642 /* apply any changes in staging */
1643 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1644 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1646 /* Initialize our rx_config data */
1647 iwl_connection_init_rx_config(priv, priv->iw_mode);
1649 if (priv->cfg->ops->hcmd->set_rxon_chain)
1650 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1652 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1655 /* Configure Bluetooth device coexistence support */
1656 iwl_send_bt_config(priv);
1658 iwl_reset_run_time_calib(priv);
1660 /* Configure the adapter for unassociated operation */
1661 iwlcore_commit_rxon(priv);
1663 /* At this point, the NIC is initialized and operational */
1664 iwl_rf_kill_ct_config(priv);
1666 iwl_leds_register(priv);
1668 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1669 set_bit(STATUS_READY, &priv->status);
1670 wake_up_interruptible(&priv->wait_command_queue);
1672 iwl_power_update_mode(priv, 1);
1674 /* reassociate for ADHOC mode */
1675 if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1676 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1679 iwl_mac_beacon_update(priv->hw, beacon);
1683 if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1684 iwl_set_mode(priv, priv->iw_mode);
1689 queue_work(priv->workqueue, &priv->restart);
1692 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1694 static void __iwl_down(struct iwl_priv *priv)
1696 unsigned long flags;
1697 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1699 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1702 set_bit(STATUS_EXIT_PENDING, &priv->status);
1704 iwl_leds_unregister(priv);
1706 priv->cfg->ops->smgmt->clear_station_table(priv);
1708 /* Unblock any waiting calls */
1709 wake_up_interruptible_all(&priv->wait_command_queue);
1711 /* Wipe out the EXIT_PENDING status bit if we are not actually
1712 * exiting the module */
1714 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1716 /* stop and reset the on-board processor */
1717 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1719 /* tell the device to stop sending interrupts */
1720 spin_lock_irqsave(&priv->lock, flags);
1721 iwl_disable_interrupts(priv);
1722 spin_unlock_irqrestore(&priv->lock, flags);
1723 iwl_synchronize_irq(priv);
1725 if (priv->mac80211_registered)
1726 ieee80211_stop_queues(priv->hw);
1728 /* If we have not previously called iwl_init() then
1729 * clear all bits but the RF Kill bits and return */
1730 if (!iwl_is_init(priv)) {
1731 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1733 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1735 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1736 STATUS_GEO_CONFIGURED |
1737 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1738 STATUS_EXIT_PENDING;
1742 /* ...otherwise clear out all the status bits but the RF Kill
1743 * bits and continue taking the NIC down. */
1744 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1746 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
1748 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1749 STATUS_GEO_CONFIGURED |
1750 test_bit(STATUS_FW_ERROR, &priv->status) <<
1752 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1753 STATUS_EXIT_PENDING;
1755 /* device going down, Stop using ICT table */
1756 iwl_disable_ict(priv);
1757 spin_lock_irqsave(&priv->lock, flags);
1758 iwl_clear_bit(priv, CSR_GP_CNTRL,
1759 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1760 spin_unlock_irqrestore(&priv->lock, flags);
1762 iwl_txq_ctx_stop(priv);
1765 iwl_write_prph(priv, APMG_CLK_DIS_REG,
1766 APMG_CLK_VAL_DMA_CLK_RQT);
1770 /* FIXME: apm_ops.suspend(priv) */
1772 priv->cfg->ops->lib->apm_ops.stop(priv);
1774 priv->cfg->ops->lib->apm_ops.reset(priv);
1776 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1778 if (priv->ibss_beacon)
1779 dev_kfree_skb(priv->ibss_beacon);
1780 priv->ibss_beacon = NULL;
1782 /* clear out any free frames */
1783 iwl_clear_free_frames(priv);
1786 static void iwl_down(struct iwl_priv *priv)
1788 mutex_lock(&priv->mutex);
1790 mutex_unlock(&priv->mutex);
1792 iwl_cancel_deferred_work(priv);
1795 #define HW_READY_TIMEOUT (50)
1797 static int iwl_set_hw_ready(struct iwl_priv *priv)
1801 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1802 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1804 /* See if we got it */
1805 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1806 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1807 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1809 if (ret != -ETIMEDOUT)
1810 priv->hw_ready = true;
1812 priv->hw_ready = false;
1814 IWL_DEBUG_INFO(priv, "hardware %s\n",
1815 (priv->hw_ready == 1) ? "ready" : "not ready");
1819 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1823 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1825 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1826 CSR_HW_IF_CONFIG_REG_PREPARE);
1828 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1829 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1830 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1832 if (ret != -ETIMEDOUT)
1833 iwl_set_hw_ready(priv);
1838 #define MAX_HW_RESTARTS 5
1840 static int __iwl_up(struct iwl_priv *priv)
1845 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1846 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1850 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1851 IWL_ERR(priv, "ucode not available for device bringup\n");
1855 iwl_prepare_card_hw(priv);
1857 if (!priv->hw_ready) {
1858 IWL_WARN(priv, "Exit HW not ready\n");
1862 /* If platform's RF_KILL switch is NOT set to KILL */
1863 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1864 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1866 set_bit(STATUS_RF_KILL_HW, &priv->status);
1868 if (iwl_is_rfkill(priv)) {
1869 iwl_enable_interrupts(priv);
1870 IWL_WARN(priv, "Radio disabled by %s RF Kill switch\n",
1871 test_bit(STATUS_RF_KILL_HW, &priv->status) ? "HW" : "SW");
1875 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1877 ret = iwl_hw_nic_init(priv);
1879 IWL_ERR(priv, "Unable to init nic\n");
1883 /* make sure rfkill handshake bits are cleared */
1884 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1885 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1886 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
1888 /* clear (again), then enable host interrupts */
1889 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
1890 /* enable dram interrupt */
1891 iwl_reset_ict(priv);
1892 iwl_enable_interrupts(priv);
1894 /* really make sure rfkill handshake bits are cleared */
1895 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1896 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1898 /* Copy original ucode data image from disk into backup cache.
1899 * This will be used to initialize the on-board processor's
1900 * data SRAM for a clean start when the runtime program first loads. */
1901 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
1902 priv->ucode_data.len);
1904 for (i = 0; i < MAX_HW_RESTARTS; i++) {
1906 priv->cfg->ops->smgmt->clear_station_table(priv);
1908 /* load bootstrap state machine,
1909 * load bootstrap program into processor's memory,
1910 * prepare to load the "initialize" uCode */
1911 ret = priv->cfg->ops->lib->load_ucode(priv);
1914 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
1919 /* start card; "initialize" will load runtime ucode */
1920 iwl_nic_start(priv);
1922 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
1927 set_bit(STATUS_EXIT_PENDING, &priv->status);
1929 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1931 /* tried to restart and config the device for as long as our
1932 * patience could withstand */
1933 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
1938 /*****************************************************************************
1940 * Workqueue callbacks
1942 *****************************************************************************/
1944 static void iwl_bg_init_alive_start(struct work_struct *data)
1946 struct iwl_priv *priv =
1947 container_of(data, struct iwl_priv, init_alive_start.work);
1949 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1952 mutex_lock(&priv->mutex);
1953 priv->cfg->ops->lib->init_alive_start(priv);
1954 mutex_unlock(&priv->mutex);
1957 static void iwl_bg_alive_start(struct work_struct *data)
1959 struct iwl_priv *priv =
1960 container_of(data, struct iwl_priv, alive_start.work);
1962 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1965 mutex_lock(&priv->mutex);
1966 iwl_alive_start(priv);
1967 mutex_unlock(&priv->mutex);
1970 static void iwl_bg_run_time_calib_work(struct work_struct *work)
1972 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1973 run_time_calib_work);
1975 mutex_lock(&priv->mutex);
1977 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1978 test_bit(STATUS_SCANNING, &priv->status)) {
1979 mutex_unlock(&priv->mutex);
1983 if (priv->start_calib) {
1984 iwl_chain_noise_calibration(priv, &priv->statistics);
1986 iwl_sensitivity_calibration(priv, &priv->statistics);
1989 mutex_unlock(&priv->mutex);
1993 static void iwl_bg_up(struct work_struct *data)
1995 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
1997 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2000 mutex_lock(&priv->mutex);
2002 mutex_unlock(&priv->mutex);
2003 iwl_rfkill_set_hw_state(priv);
2006 static void iwl_bg_restart(struct work_struct *data)
2008 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2010 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2013 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2014 mutex_lock(&priv->mutex);
2017 mutex_unlock(&priv->mutex);
2019 ieee80211_restart_hw(priv->hw);
2022 queue_work(priv->workqueue, &priv->up);
2026 static void iwl_bg_rx_replenish(struct work_struct *data)
2028 struct iwl_priv *priv =
2029 container_of(data, struct iwl_priv, rx_replenish);
2031 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2034 mutex_lock(&priv->mutex);
2035 iwl_rx_replenish(priv);
2036 mutex_unlock(&priv->mutex);
2039 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2041 void iwl_post_associate(struct iwl_priv *priv)
2043 struct ieee80211_conf *conf = NULL;
2045 unsigned long flags;
2047 if (priv->iw_mode == NL80211_IFTYPE_AP) {
2048 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2052 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2053 priv->assoc_id, priv->active_rxon.bssid_addr);
2056 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2060 if (!priv->vif || !priv->is_open)
2063 iwl_scan_cancel_timeout(priv, 200);
2065 conf = ieee80211_get_hw_conf(priv->hw);
2067 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2068 iwlcore_commit_rxon(priv);
2070 iwl_setup_rxon_timing(priv);
2071 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2072 sizeof(priv->rxon_timing), &priv->rxon_timing);
2074 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2075 "Attempting to continue.\n");
2077 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2079 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2081 if (priv->cfg->ops->hcmd->set_rxon_chain)
2082 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2084 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2086 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2087 priv->assoc_id, priv->beacon_int);
2089 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2090 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2092 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2094 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2095 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2096 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2098 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2100 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2101 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2105 iwlcore_commit_rxon(priv);
2107 switch (priv->iw_mode) {
2108 case NL80211_IFTYPE_STATION:
2111 case NL80211_IFTYPE_ADHOC:
2113 /* assume default assoc id */
2116 iwl_rxon_add_station(priv, priv->bssid, 0);
2117 iwl_send_beacon_cmd(priv);
2122 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2123 __func__, priv->iw_mode);
2127 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2128 priv->assoc_station_added = 1;
2130 spin_lock_irqsave(&priv->lock, flags);
2131 iwl_activate_qos(priv, 0);
2132 spin_unlock_irqrestore(&priv->lock, flags);
2134 /* the chain noise calibration will enabled PM upon completion
2135 * If chain noise has already been run, then we need to enable
2136 * power management here */
2137 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2138 iwl_power_update_mode(priv, 0);
2140 /* Enable Rx differential gain and sensitivity calibrations */
2141 iwl_chain_noise_reset(priv);
2142 priv->start_calib = 1;
2146 /*****************************************************************************
2148 * mac80211 entry point functions
2150 *****************************************************************************/
2152 #define UCODE_READY_TIMEOUT (4 * HZ)
2154 static int iwl_mac_start(struct ieee80211_hw *hw)
2156 struct iwl_priv *priv = hw->priv;
2159 IWL_DEBUG_MAC80211(priv, "enter\n");
2161 /* we should be verifying the device is ready to be opened */
2162 mutex_lock(&priv->mutex);
2164 memset(&priv->staging_rxon, 0, sizeof(struct iwl_rxon_cmd));
2165 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2166 * ucode filename and max sizes are card-specific. */
2168 if (!priv->ucode_code.len) {
2169 ret = iwl_read_ucode(priv);
2171 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2172 mutex_unlock(&priv->mutex);
2177 ret = __iwl_up(priv);
2179 mutex_unlock(&priv->mutex);
2181 iwl_rfkill_set_hw_state(priv);
2186 if (iwl_is_rfkill(priv))
2189 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2191 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2192 * mac80211 will not be run successfully. */
2193 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2194 test_bit(STATUS_READY, &priv->status),
2195 UCODE_READY_TIMEOUT);
2197 if (!test_bit(STATUS_READY, &priv->status)) {
2198 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2199 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2206 IWL_DEBUG_MAC80211(priv, "leave\n");
2210 static void iwl_mac_stop(struct ieee80211_hw *hw)
2212 struct iwl_priv *priv = hw->priv;
2214 IWL_DEBUG_MAC80211(priv, "enter\n");
2221 if (iwl_is_ready_rf(priv)) {
2222 /* stop mac, cancel any scan request and clear
2223 * RXON_FILTER_ASSOC_MSK BIT
2225 mutex_lock(&priv->mutex);
2226 iwl_scan_cancel_timeout(priv, 100);
2227 mutex_unlock(&priv->mutex);
2232 flush_workqueue(priv->workqueue);
2234 /* enable interrupts again in order to receive rfkill changes */
2235 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2236 iwl_enable_interrupts(priv);
2238 IWL_DEBUG_MAC80211(priv, "leave\n");
2241 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2243 struct iwl_priv *priv = hw->priv;
2245 IWL_DEBUG_MACDUMP(priv, "enter\n");
2247 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2248 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2250 if (iwl_tx_skb(priv, skb))
2251 dev_kfree_skb_any(skb);
2253 IWL_DEBUG_MACDUMP(priv, "leave\n");
2254 return NETDEV_TX_OK;
2257 void iwl_config_ap(struct iwl_priv *priv)
2260 unsigned long flags;
2262 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2265 /* The following should be done only at AP bring up */
2266 if (!iwl_is_associated(priv)) {
2268 /* RXON - unassoc (to set timing command) */
2269 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2270 iwlcore_commit_rxon(priv);
2273 iwl_setup_rxon_timing(priv);
2274 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2275 sizeof(priv->rxon_timing), &priv->rxon_timing);
2277 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2278 "Attempting to continue.\n");
2280 if (priv->cfg->ops->hcmd->set_rxon_chain)
2281 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2283 /* FIXME: what should be the assoc_id for AP? */
2284 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2285 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2286 priv->staging_rxon.flags |=
2287 RXON_FLG_SHORT_PREAMBLE_MSK;
2289 priv->staging_rxon.flags &=
2290 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2292 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2293 if (priv->assoc_capability &
2294 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2295 priv->staging_rxon.flags |=
2296 RXON_FLG_SHORT_SLOT_MSK;
2298 priv->staging_rxon.flags &=
2299 ~RXON_FLG_SHORT_SLOT_MSK;
2301 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2302 priv->staging_rxon.flags &=
2303 ~RXON_FLG_SHORT_SLOT_MSK;
2305 /* restore RXON assoc */
2306 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2307 iwlcore_commit_rxon(priv);
2308 spin_lock_irqsave(&priv->lock, flags);
2309 iwl_activate_qos(priv, 1);
2310 spin_unlock_irqrestore(&priv->lock, flags);
2311 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2313 iwl_send_beacon_cmd(priv);
2315 /* FIXME - we need to add code here to detect a totally new
2316 * configuration, reset the AP, unassoc, rxon timing, assoc,
2317 * clear sta table, add BCAST sta... */
2320 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2321 struct ieee80211_key_conf *keyconf, const u8 *addr,
2322 u32 iv32, u16 *phase1key)
2325 struct iwl_priv *priv = hw->priv;
2326 IWL_DEBUG_MAC80211(priv, "enter\n");
2328 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2330 IWL_DEBUG_MAC80211(priv, "leave\n");
2333 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2334 struct ieee80211_vif *vif,
2335 struct ieee80211_sta *sta,
2336 struct ieee80211_key_conf *key)
2338 struct iwl_priv *priv = hw->priv;
2342 bool is_default_wep_key = false;
2344 IWL_DEBUG_MAC80211(priv, "enter\n");
2346 if (priv->hw_params.sw_crypto) {
2347 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2350 addr = sta ? sta->addr : iwl_bcast_addr;
2351 sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
2352 if (sta_id == IWL_INVALID_STATION) {
2353 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2359 mutex_lock(&priv->mutex);
2360 iwl_scan_cancel_timeout(priv, 100);
2361 mutex_unlock(&priv->mutex);
2363 /* If we are getting WEP group key and we didn't receive any key mapping
2364 * so far, we are in legacy wep mode (group key only), otherwise we are
2366 * In legacy wep mode, we use another host command to the uCode */
2367 if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2368 priv->iw_mode != NL80211_IFTYPE_AP) {
2370 is_default_wep_key = !priv->key_mapping_key;
2372 is_default_wep_key =
2373 (key->hw_key_idx == HW_KEY_DEFAULT);
2378 if (is_default_wep_key)
2379 ret = iwl_set_default_wep_key(priv, key);
2381 ret = iwl_set_dynamic_key(priv, key, sta_id);
2383 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2386 if (is_default_wep_key)
2387 ret = iwl_remove_default_wep_key(priv, key);
2389 ret = iwl_remove_dynamic_key(priv, key, sta_id);
2391 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2397 IWL_DEBUG_MAC80211(priv, "leave\n");
2402 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2403 enum ieee80211_ampdu_mlme_action action,
2404 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2406 struct iwl_priv *priv = hw->priv;
2409 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2412 if (!(priv->cfg->sku & IWL_SKU_N))
2416 case IEEE80211_AMPDU_RX_START:
2417 IWL_DEBUG_HT(priv, "start Rx\n");
2418 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2419 case IEEE80211_AMPDU_RX_STOP:
2420 IWL_DEBUG_HT(priv, "stop Rx\n");
2421 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2422 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2426 case IEEE80211_AMPDU_TX_START:
2427 IWL_DEBUG_HT(priv, "start Tx\n");
2428 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2429 case IEEE80211_AMPDU_TX_STOP:
2430 IWL_DEBUG_HT(priv, "stop Tx\n");
2431 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2432 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2437 IWL_DEBUG_HT(priv, "unknown\n");
2444 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2445 struct ieee80211_low_level_stats *stats)
2447 struct iwl_priv *priv = hw->priv;
2450 IWL_DEBUG_MAC80211(priv, "enter\n");
2451 IWL_DEBUG_MAC80211(priv, "leave\n");
2456 /*****************************************************************************
2460 *****************************************************************************/
2462 #ifdef CONFIG_IWLWIFI_DEBUG
2465 * The following adds a new attribute to the sysfs representation
2466 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2467 * used for controlling the debug level.
2469 * See the level definitions in iwl for details.
2472 static ssize_t show_debug_level(struct device *d,
2473 struct device_attribute *attr, char *buf)
2475 struct iwl_priv *priv = dev_get_drvdata(d);
2477 return sprintf(buf, "0x%08X\n", priv->debug_level);
2479 static ssize_t store_debug_level(struct device *d,
2480 struct device_attribute *attr,
2481 const char *buf, size_t count)
2483 struct iwl_priv *priv = dev_get_drvdata(d);
2487 ret = strict_strtoul(buf, 0, &val);
2489 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2491 priv->debug_level = val;
2493 return strnlen(buf, count);
2496 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2497 show_debug_level, store_debug_level);
2500 #endif /* CONFIG_IWLWIFI_DEBUG */
2503 static ssize_t show_version(struct device *d,
2504 struct device_attribute *attr, char *buf)
2506 struct iwl_priv *priv = dev_get_drvdata(d);
2507 struct iwl_alive_resp *palive = &priv->card_alive;
2511 if (palive->is_valid)
2512 pos += sprintf(buf + pos,
2513 "fw version: 0x%01X.0x%01X.0x%01X.0x%01X\n"
2514 "fw type: 0x%01X 0x%01X\n",
2515 palive->ucode_major, palive->ucode_minor,
2516 palive->sw_rev[0], palive->sw_rev[1],
2517 palive->ver_type, palive->ver_subtype);
2519 pos += sprintf(buf + pos, "fw not loaded\n");
2522 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
2523 pos += sprintf(buf + pos, "NVM Type: %s, version: 0x%x\n",
2524 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
2525 ? "OTP" : "EEPROM", eeprom_ver);
2528 pos += sprintf(buf + pos, "EEPROM not initialzed\n");
2534 static DEVICE_ATTR(version, S_IWUSR | S_IRUGO, show_version, NULL);
2536 static ssize_t show_temperature(struct device *d,
2537 struct device_attribute *attr, char *buf)
2539 struct iwl_priv *priv = dev_get_drvdata(d);
2541 if (!iwl_is_alive(priv))
2544 return sprintf(buf, "%d\n", priv->temperature);
2547 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2549 static ssize_t show_tx_power(struct device *d,
2550 struct device_attribute *attr, char *buf)
2552 struct iwl_priv *priv = dev_get_drvdata(d);
2554 if (!iwl_is_ready_rf(priv))
2555 return sprintf(buf, "off\n");
2557 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2560 static ssize_t store_tx_power(struct device *d,
2561 struct device_attribute *attr,
2562 const char *buf, size_t count)
2564 struct iwl_priv *priv = dev_get_drvdata(d);
2568 ret = strict_strtoul(buf, 10, &val);
2570 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2572 iwl_set_tx_power(priv, val, false);
2577 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2579 static ssize_t show_flags(struct device *d,
2580 struct device_attribute *attr, char *buf)
2582 struct iwl_priv *priv = dev_get_drvdata(d);
2584 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2587 static ssize_t store_flags(struct device *d,
2588 struct device_attribute *attr,
2589 const char *buf, size_t count)
2591 struct iwl_priv *priv = dev_get_drvdata(d);
2594 int ret = strict_strtoul(buf, 0, &val);
2599 mutex_lock(&priv->mutex);
2600 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2601 /* Cancel any currently running scans... */
2602 if (iwl_scan_cancel_timeout(priv, 100))
2603 IWL_WARN(priv, "Could not cancel scan.\n");
2605 IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2606 priv->staging_rxon.flags = cpu_to_le32(flags);
2607 iwlcore_commit_rxon(priv);
2610 mutex_unlock(&priv->mutex);
2615 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2617 static ssize_t show_filter_flags(struct device *d,
2618 struct device_attribute *attr, char *buf)
2620 struct iwl_priv *priv = dev_get_drvdata(d);
2622 return sprintf(buf, "0x%04X\n",
2623 le32_to_cpu(priv->active_rxon.filter_flags));
2626 static ssize_t store_filter_flags(struct device *d,
2627 struct device_attribute *attr,
2628 const char *buf, size_t count)
2630 struct iwl_priv *priv = dev_get_drvdata(d);
2633 int ret = strict_strtoul(buf, 0, &val);
2636 filter_flags = (u32)val;
2638 mutex_lock(&priv->mutex);
2639 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2640 /* Cancel any currently running scans... */
2641 if (iwl_scan_cancel_timeout(priv, 100))
2642 IWL_WARN(priv, "Could not cancel scan.\n");
2644 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2645 "0x%04X\n", filter_flags);
2646 priv->staging_rxon.filter_flags =
2647 cpu_to_le32(filter_flags);
2648 iwlcore_commit_rxon(priv);
2651 mutex_unlock(&priv->mutex);
2656 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2657 store_filter_flags);
2659 static ssize_t store_power_level(struct device *d,
2660 struct device_attribute *attr,
2661 const char *buf, size_t count)
2663 struct iwl_priv *priv = dev_get_drvdata(d);
2668 mutex_lock(&priv->mutex);
2670 ret = strict_strtoul(buf, 10, &mode);
2674 ret = iwl_power_set_user_mode(priv, mode);
2676 IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
2682 mutex_unlock(&priv->mutex);
2686 static ssize_t show_power_level(struct device *d,
2687 struct device_attribute *attr, char *buf)
2689 struct iwl_priv *priv = dev_get_drvdata(d);
2690 int mode = priv->power_data.user_power_setting;
2691 int level = priv->power_data.power_mode;
2694 p += sprintf(p, "INDEX:%d\t", level);
2695 p += sprintf(p, "USER:%d\n", mode);
2699 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
2702 static ssize_t show_qos(struct device *d,
2703 struct device_attribute *attr, char *buf)
2705 struct iwl_priv *priv = dev_get_drvdata(d);
2709 for (q = 0; q < AC_NUM; q++) {
2710 p += sprintf(p, "\tcw_min\tcw_max\taifsn\ttxop\n");
2711 p += sprintf(p, "AC[%d]\t%u\t%u\t%u\t%u\n", q,
2712 priv->qos_data.def_qos_parm.ac[q].cw_min,
2713 priv->qos_data.def_qos_parm.ac[q].cw_max,
2714 priv->qos_data.def_qos_parm.ac[q].aifsn,
2715 priv->qos_data.def_qos_parm.ac[q].edca_txop);
2721 static DEVICE_ATTR(qos, S_IRUGO, show_qos, NULL);
2723 static ssize_t show_statistics(struct device *d,
2724 struct device_attribute *attr, char *buf)
2726 struct iwl_priv *priv = dev_get_drvdata(d);
2727 u32 size = sizeof(struct iwl_notif_statistics);
2728 u32 len = 0, ofs = 0;
2729 u8 *data = (u8 *)&priv->statistics;
2732 if (!iwl_is_alive(priv))
2735 mutex_lock(&priv->mutex);
2736 rc = iwl_send_statistics_request(priv, 0);
2737 mutex_unlock(&priv->mutex);
2741 "Error sending statistics request: 0x%08X\n", rc);
2745 while (size && (PAGE_SIZE - len)) {
2746 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2747 PAGE_SIZE - len, 1);
2749 if (PAGE_SIZE - len)
2753 size -= min(size, 16U);
2759 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2762 /*****************************************************************************
2764 * driver setup and teardown
2766 *****************************************************************************/
2768 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2770 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2772 init_waitqueue_head(&priv->wait_command_queue);
2774 INIT_WORK(&priv->up, iwl_bg_up);
2775 INIT_WORK(&priv->restart, iwl_bg_restart);
2776 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2777 INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
2778 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2779 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2780 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2781 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2783 iwl_setup_scan_deferred_work(priv);
2785 if (priv->cfg->ops->lib->setup_deferred_work)
2786 priv->cfg->ops->lib->setup_deferred_work(priv);
2788 init_timer(&priv->statistics_periodic);
2789 priv->statistics_periodic.data = (unsigned long)priv;
2790 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2792 if (!priv->cfg->use_isr_legacy)
2793 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2794 iwl_irq_tasklet, (unsigned long)priv);
2796 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2797 iwl_irq_tasklet_legacy, (unsigned long)priv);
2800 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2802 if (priv->cfg->ops->lib->cancel_deferred_work)
2803 priv->cfg->ops->lib->cancel_deferred_work(priv);
2805 cancel_delayed_work_sync(&priv->init_alive_start);
2806 cancel_delayed_work(&priv->scan_check);
2807 cancel_delayed_work(&priv->alive_start);
2808 cancel_work_sync(&priv->beacon_update);
2809 del_timer_sync(&priv->statistics_periodic);
2812 static struct attribute *iwl_sysfs_entries[] = {
2813 &dev_attr_flags.attr,
2814 &dev_attr_filter_flags.attr,
2815 &dev_attr_power_level.attr,
2816 &dev_attr_statistics.attr,
2817 &dev_attr_temperature.attr,
2818 &dev_attr_tx_power.attr,
2819 #ifdef CONFIG_IWLWIFI_DEBUG
2820 &dev_attr_debug_level.attr,
2822 &dev_attr_version.attr,
2827 static struct attribute_group iwl_attribute_group = {
2828 .name = NULL, /* put in device directory */
2829 .attrs = iwl_sysfs_entries,
2832 static struct ieee80211_ops iwl_hw_ops = {
2834 .start = iwl_mac_start,
2835 .stop = iwl_mac_stop,
2836 .add_interface = iwl_mac_add_interface,
2837 .remove_interface = iwl_mac_remove_interface,
2838 .config = iwl_mac_config,
2839 .configure_filter = iwl_configure_filter,
2840 .set_key = iwl_mac_set_key,
2841 .update_tkip_key = iwl_mac_update_tkip_key,
2842 .get_stats = iwl_mac_get_stats,
2843 .get_tx_stats = iwl_mac_get_tx_stats,
2844 .conf_tx = iwl_mac_conf_tx,
2845 .reset_tsf = iwl_mac_reset_tsf,
2846 .bss_info_changed = iwl_bss_info_changed,
2847 .ampdu_action = iwl_mac_ampdu_action,
2848 .hw_scan = iwl_mac_hw_scan
2851 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2854 struct iwl_priv *priv;
2855 struct ieee80211_hw *hw;
2856 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2857 unsigned long flags;
2860 /************************
2861 * 1. Allocating HW data
2862 ************************/
2864 /* Disabling hardware scan means that mac80211 will perform scans
2865 * "the hard way", rather than using device's scan. */
2866 if (cfg->mod_params->disable_hw_scan) {
2867 if (cfg->mod_params->debug & IWL_DL_INFO)
2868 dev_printk(KERN_DEBUG, &(pdev->dev),
2869 "Disabling hw_scan\n");
2870 iwl_hw_ops.hw_scan = NULL;
2873 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2879 /* At this point both hw and priv are allocated. */
2881 SET_IEEE80211_DEV(hw, &pdev->dev);
2883 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2885 priv->pci_dev = pdev;
2886 priv->inta_mask = CSR_INI_SET_MASK;
2888 #ifdef CONFIG_IWLWIFI_DEBUG
2889 priv->debug_level = priv->cfg->mod_params->debug;
2890 atomic_set(&priv->restrict_refcnt, 0);
2893 /**************************
2894 * 2. Initializing PCI bus
2895 **************************/
2896 if (pci_enable_device(pdev)) {
2898 goto out_ieee80211_free_hw;
2901 pci_set_master(pdev);
2903 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2905 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2907 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2909 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2910 /* both attempts failed: */
2912 IWL_WARN(priv, "No suitable DMA available.\n");
2913 goto out_pci_disable_device;
2917 err = pci_request_regions(pdev, DRV_NAME);
2919 goto out_pci_disable_device;
2921 pci_set_drvdata(pdev, priv);
2924 /***********************
2925 * 3. Read REV register
2926 ***********************/
2927 priv->hw_base = pci_iomap(pdev, 0, 0);
2928 if (!priv->hw_base) {
2930 goto out_pci_release_regions;
2933 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
2934 (unsigned long long) pci_resource_len(pdev, 0));
2935 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
2937 /* this spin lock will be used in apm_ops.init and EEPROM access
2938 * we should init now
2940 spin_lock_init(&priv->reg_lock);
2941 iwl_hw_detect(priv);
2942 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
2943 priv->cfg->name, priv->hw_rev);
2945 /* We disable the RETRY_TIMEOUT register (0x41) to keep
2946 * PCI Tx retries from interfering with C3 CPU state */
2947 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2949 iwl_prepare_card_hw(priv);
2950 if (!priv->hw_ready) {
2951 IWL_WARN(priv, "Failed, HW not ready\n");
2956 err = priv->cfg->ops->lib->apm_ops.init(priv);
2958 IWL_ERR(priv, "Failed to init APMG\n");
2964 /* Read the EEPROM */
2965 err = iwl_eeprom_init(priv);
2967 IWL_ERR(priv, "Unable to init EEPROM\n");
2970 err = iwl_eeprom_check_version(priv);
2972 goto out_free_eeprom;
2974 /* extract MAC Address */
2975 iwl_eeprom_get_mac(priv, priv->mac_addr);
2976 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
2977 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
2979 /************************
2980 * 5. Setup HW constants
2981 ************************/
2982 if (iwl_set_hw_params(priv)) {
2983 IWL_ERR(priv, "failed to set hw parameters\n");
2984 goto out_free_eeprom;
2987 /*******************
2989 *******************/
2991 err = iwl_init_drv(priv);
2993 goto out_free_eeprom;
2994 /* At this point both hw and priv are initialized. */
2996 /********************
2998 ********************/
2999 spin_lock_irqsave(&priv->lock, flags);
3000 iwl_disable_interrupts(priv);
3001 spin_unlock_irqrestore(&priv->lock, flags);
3003 pci_enable_msi(priv->pci_dev);
3005 iwl_alloc_isr_ict(priv);
3006 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3007 IRQF_SHARED, DRV_NAME, priv);
3009 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3010 goto out_disable_msi;
3012 err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3014 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3018 iwl_setup_deferred_work(priv);
3019 iwl_setup_rx_handlers(priv);
3021 /**********************************
3022 * 8. Setup and register mac80211
3023 **********************************/
3025 /* enable interrupts if needed: hw bug w/a */
3026 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3027 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3028 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3029 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3032 iwl_enable_interrupts(priv);
3034 err = iwl_setup_mac(priv);
3036 goto out_remove_sysfs;
3038 err = iwl_dbgfs_register(priv, DRV_NAME);
3040 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3042 /* If platform's RF_KILL switch is NOT set to KILL */
3043 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3044 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3046 set_bit(STATUS_RF_KILL_HW, &priv->status);
3048 err = iwl_rfkill_init(priv);
3050 IWL_ERR(priv, "Unable to initialize RFKILL system. "
3051 "Ignoring error: %d\n", err);
3053 iwl_rfkill_set_hw_state(priv);
3055 iwl_power_initialize(priv);
3059 destroy_workqueue(priv->workqueue);
3060 priv->workqueue = NULL;
3061 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3063 free_irq(priv->pci_dev->irq, priv);
3064 iwl_free_isr_ict(priv);
3066 pci_disable_msi(priv->pci_dev);
3067 iwl_uninit_drv(priv);
3069 iwl_eeprom_free(priv);
3071 pci_iounmap(pdev, priv->hw_base);
3072 out_pci_release_regions:
3073 pci_set_drvdata(pdev, NULL);
3074 pci_release_regions(pdev);
3075 out_pci_disable_device:
3076 pci_disable_device(pdev);
3077 out_ieee80211_free_hw:
3078 ieee80211_free_hw(priv->hw);
3083 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3085 struct iwl_priv *priv = pci_get_drvdata(pdev);
3086 unsigned long flags;
3091 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3093 iwl_dbgfs_unregister(priv);
3094 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3096 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3097 * to be called and iwl_down since we are removing the device
3098 * we need to set STATUS_EXIT_PENDING bit.
3100 set_bit(STATUS_EXIT_PENDING, &priv->status);
3101 if (priv->mac80211_registered) {
3102 ieee80211_unregister_hw(priv->hw);
3103 priv->mac80211_registered = 0;
3108 /* make sure we flush any pending irq or
3109 * tasklet for the driver
3111 spin_lock_irqsave(&priv->lock, flags);
3112 iwl_disable_interrupts(priv);
3113 spin_unlock_irqrestore(&priv->lock, flags);
3115 iwl_synchronize_irq(priv);
3117 iwl_rfkill_unregister(priv);
3118 iwl_dealloc_ucode_pci(priv);
3121 iwl_rx_queue_free(priv, &priv->rxq);
3122 iwl_hw_txq_ctx_free(priv);
3124 priv->cfg->ops->smgmt->clear_station_table(priv);
3125 iwl_eeprom_free(priv);
3128 /*netif_stop_queue(dev); */
3129 flush_workqueue(priv->workqueue);
3131 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3132 * priv->workqueue... so we can't take down the workqueue
3134 destroy_workqueue(priv->workqueue);
3135 priv->workqueue = NULL;
3137 free_irq(priv->pci_dev->irq, priv);
3138 pci_disable_msi(priv->pci_dev);
3139 pci_iounmap(pdev, priv->hw_base);
3140 pci_release_regions(pdev);
3141 pci_disable_device(pdev);
3142 pci_set_drvdata(pdev, NULL);
3144 iwl_uninit_drv(priv);
3146 iwl_free_isr_ict(priv);
3148 if (priv->ibss_beacon)
3149 dev_kfree_skb(priv->ibss_beacon);
3151 ieee80211_free_hw(priv->hw);
3155 /*****************************************************************************
3157 * driver and module entry point
3159 *****************************************************************************/
3161 /* Hardware specific file defines the PCI IDs table for that hardware module */
3162 static struct pci_device_id iwl_hw_card_ids[] = {
3163 #ifdef CONFIG_IWL4965
3164 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3165 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3166 #endif /* CONFIG_IWL4965 */
3167 #ifdef CONFIG_IWL5000
3168 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)},
3169 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)},
3170 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)},
3171 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)},
3172 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)},
3173 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)},
3174 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)},
3175 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)},
3176 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)},
3177 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)},
3178 /* 5350 WiFi/WiMax */
3179 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)},
3180 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)},
3181 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)},
3182 /* 5150 Wifi/WiMax */
3183 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)},
3184 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)},
3185 /* 6000/6050 Series */
3186 {IWL_PCI_DEVICE(0x0082, 0x1102, iwl6000_2ag_cfg)},
3187 {IWL_PCI_DEVICE(0x0085, 0x1112, iwl6000_2ag_cfg)},
3188 {IWL_PCI_DEVICE(0x0082, 0x1122, iwl6000_2ag_cfg)},
3189 {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)},
3190 {IWL_PCI_DEVICE(0x422C, PCI_ANY_ID, iwl6000_2agn_cfg)},
3191 {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)},
3192 {IWL_PCI_DEVICE(0x4239, PCI_ANY_ID, iwl6000_2agn_cfg)},
3193 {IWL_PCI_DEVICE(0x0082, PCI_ANY_ID, iwl6000_2agn_cfg)},
3194 {IWL_PCI_DEVICE(0x0085, PCI_ANY_ID, iwl6000_3agn_cfg)},
3195 {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)},
3196 {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)},
3197 {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)},
3198 {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)},
3199 /* 1000 Series WiFi */
3200 {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl1000_bgn_cfg)},
3201 {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl1000_bgn_cfg)},
3202 #endif /* CONFIG_IWL5000 */
3206 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3208 static struct pci_driver iwl_driver = {
3210 .id_table = iwl_hw_card_ids,
3211 .probe = iwl_pci_probe,
3212 .remove = __devexit_p(iwl_pci_remove),
3214 .suspend = iwl_pci_suspend,
3215 .resume = iwl_pci_resume,
3219 static int __init iwl_init(void)
3223 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3224 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3226 ret = iwlagn_rate_control_register();
3228 printk(KERN_ERR DRV_NAME
3229 "Unable to register rate control algorithm: %d\n", ret);
3233 ret = pci_register_driver(&iwl_driver);
3235 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3236 goto error_register;
3242 iwlagn_rate_control_unregister();
3246 static void __exit iwl_exit(void)
3248 pci_unregister_driver(&iwl_driver);
3249 iwlagn_rate_control_unregister();
3252 module_exit(iwl_exit);
3253 module_init(iwl_init);