1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2012 - 2013 Intel Corporation. All rights reserved.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
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21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * The full GNU General Public License is included in this distribution
25 * in the file called COPYING.
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28 * Intel Linux Wireless <ilw@linux.intel.com>
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62 *****************************************************************************/
67 #include "fw-api-rs.h"
68 #include "fw-api-tx.h"
69 #include "fw-api-sta.h"
70 #include "fw-api-mac.h"
71 #include "fw-api-power.h"
72 #include "fw-api-d3.h"
73 #include "fw-api-bt-coex.h"
75 /* queue and FIFO numbers by usage */
77 IWL_MVM_OFFCHANNEL_QUEUE = 8,
78 IWL_MVM_CMD_QUEUE = 9,
79 IWL_MVM_AUX_QUEUE = 15,
80 IWL_MVM_FIRST_AGG_QUEUE = 16,
81 IWL_MVM_NUM_QUEUES = 20,
82 IWL_MVM_LAST_AGG_QUEUE = IWL_MVM_NUM_QUEUES - 1,
86 #define IWL_MVM_STATION_COUNT 16
93 INIT_COMPLETE_NOTIF = 0x4,
95 /* PHY context commands */
96 PHY_CONTEXT_CMD = 0x8,
106 MGMT_MCAST_KEY = 0x1f,
111 /* MAC and Binding commands */
112 MAC_CONTEXT_CMD = 0x28,
113 TIME_EVENT_CMD = 0x29, /* both CMD and response */
114 TIME_EVENT_NOTIFICATION = 0x2a,
115 BINDING_CONTEXT_CMD = 0x2b,
116 TIME_QUOTA_CMD = 0x2c,
121 TEMPERATURE_NOTIFICATION = 0x62,
122 CALIBRATION_CFG_CMD = 0x65,
123 CALIBRATION_RES_NOTIFICATION = 0x66,
124 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
125 RADIO_VERSION_NOTIFICATION = 0x68,
128 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
129 SCAN_OFFLOAD_ABORT_CMD = 0x52,
130 SCAN_OFFLOAD_COMPLETE = 0x6D,
131 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
132 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
135 PHY_CONFIGURATION_CMD = 0x6a,
136 CALIB_RES_NOTIF_PHY_DB = 0x6b,
137 /* PHY_DB_CMD = 0x6c, */
140 POWER_TABLE_CMD = 0x77,
143 SCAN_REQUEST_CMD = 0x80,
144 SCAN_ABORT_CMD = 0x81,
145 SCAN_START_NOTIFICATION = 0x82,
146 SCAN_RESULTS_NOTIFICATION = 0x83,
147 SCAN_COMPLETE_NOTIFICATION = 0x84,
150 NVM_ACCESS_CMD = 0x88,
152 SET_CALIB_DEFAULT_CMD = 0x8e,
154 BEACON_TEMPLATE_CMD = 0x91,
155 TX_ANT_CONFIGURATION_CMD = 0x98,
157 STATISTICS_NOTIFICATION = 0x9d,
159 /* RF-KILL commands and notifications */
160 CARD_STATE_CMD = 0xa0,
161 CARD_STATE_NOTIFICATION = 0xa1,
163 REPLY_RX_PHY_CMD = 0xc0,
164 REPLY_RX_MPDU_CMD = 0xc1,
168 BT_COEX_PRIO_TABLE = 0xcc,
169 BT_COEX_PROT_ENV = 0xcd,
170 BT_PROFILE_NOTIFICATION = 0xce,
172 REPLY_DEBUG_CMD = 0xf0,
173 DEBUG_LOG_MSG = 0xf7,
175 /* D3 commands/notifications */
176 D3_CONFIG_CMD = 0xd3,
177 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
178 OFFLOADS_QUERY_CMD = 0xd5,
179 REMOTE_WAKE_CONFIG_CMD = 0xd6,
181 /* for WoWLAN in particular */
182 WOWLAN_PATTERNS = 0xe0,
183 WOWLAN_CONFIGURATION = 0xe1,
184 WOWLAN_TSC_RSC_PARAM = 0xe2,
185 WOWLAN_TKIP_PARAM = 0xe3,
186 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
187 WOWLAN_GET_STATUSES = 0xe5,
188 WOWLAN_TX_POWER_PER_DB = 0xe6,
190 /* and for NetDetect */
191 NET_DETECT_CONFIG_CMD = 0x54,
192 NET_DETECT_PROFILES_QUERY_CMD = 0x56,
193 NET_DETECT_PROFILES_CMD = 0x57,
194 NET_DETECT_HOTSPOTS_CMD = 0x58,
195 NET_DETECT_HOTSPOTS_QUERY_CMD = 0x59,
201 * struct iwl_cmd_response - generic response struct for most commands
202 * @status: status of the command asked, changes for each one
204 struct iwl_cmd_response {
209 * struct iwl_tx_ant_cfg_cmd
210 * @valid: valid antenna configuration
212 struct iwl_tx_ant_cfg_cmd {
217 * Calibration control struct.
218 * Sent as part of the phy configuration command.
219 * @flow_trigger: bitmap for which calibrations to perform according to
221 * @event_trigger: bitmap for which calibrations to perform according to
224 struct iwl_calib_ctrl {
226 __le32 event_trigger;
229 /* This enum defines the bitmap of various calibrations to enable in both
230 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
233 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
234 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
235 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
236 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
237 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
238 IWL_CALIB_CFG_DC_IDX = BIT(5),
239 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
240 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
241 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
242 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
243 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
244 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
245 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
246 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
247 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
248 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
249 IWL_CALIB_CFG_DAC_IDX = BIT(16),
250 IWL_CALIB_CFG_ABS_IDX = BIT(17),
251 IWL_CALIB_CFG_AGC_IDX = BIT(18),
255 * Phy configuration command.
257 struct iwl_phy_cfg_cmd {
259 struct iwl_calib_ctrl calib_control;
262 #define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
263 #define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
264 #define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
265 #define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
266 #define PHY_CFG_TX_CHAIN_A BIT(8)
267 #define PHY_CFG_TX_CHAIN_B BIT(9)
268 #define PHY_CFG_TX_CHAIN_C BIT(10)
269 #define PHY_CFG_RX_CHAIN_A BIT(12)
270 #define PHY_CFG_RX_CHAIN_B BIT(13)
271 #define PHY_CFG_RX_CHAIN_C BIT(14)
274 /* Target of the NVM_ACCESS_CMD */
276 NVM_ACCESS_TARGET_CACHE = 0,
277 NVM_ACCESS_TARGET_OTP = 1,
278 NVM_ACCESS_TARGET_EEPROM = 2,
281 /* Section types for NVM_ACCESS_CMD */
283 NVM_SECTION_TYPE_HW = 0,
285 NVM_SECTION_TYPE_PAPD,
287 NVM_SECTION_TYPE_CALIBRATION,
288 NVM_SECTION_TYPE_PRODUCTION,
289 NVM_SECTION_TYPE_POST_FCS_CALIB,
294 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
295 * @op_code: 0 - read, 1 - write
296 * @target: NVM_ACCESS_TARGET_*
297 * @type: NVM_SECTION_TYPE_*
298 * @offset: offset in bytes into the section
299 * @length: in bytes, to read/write
300 * @data: if write operation, the data to write. On read its empty
302 struct iwl_nvm_access_cmd {
309 } __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
312 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
313 * @offset: offset in bytes into the section
314 * @length: in bytes, either how much was written or read
315 * @type: NVM_SECTION_TYPE_*
316 * @status: 0 for success, fail otherwise
317 * @data: if read operation, the data returned. Empty on write.
319 struct iwl_nvm_access_resp {
325 } __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
329 /* alive response is_valid values */
330 #define ALIVE_RESP_UCODE_OK BIT(0)
331 #define ALIVE_RESP_RFKILL BIT(1)
333 /* alive response ver_type values */
343 /* alive response ver_subtype values */
345 FW_SUBTYPE_FULL_FEATURE = 0,
346 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
347 FW_SUBTYPE_REDUCED = 2,
348 FW_SUBTYPE_ALIVE_ONLY = 3,
349 FW_SUBTYPE_WOWLAN = 4,
350 FW_SUBTYPE_AP_SUBTYPE = 5,
351 FW_SUBTYPE_WIPAN = 6,
352 FW_SUBTYPE_INITIALIZE = 9
355 #define IWL_ALIVE_STATUS_ERR 0xDEAD
356 #define IWL_ALIVE_STATUS_OK 0xCAFE
358 #define IWL_ALIVE_FLG_RFKILL BIT(0)
360 struct mvm_alive_resp {
374 __le32 error_event_table_ptr; /* SRAM address for error log */
375 __le32 log_event_table_ptr; /* SRAM address for event log */
376 __le32 cpu_register_ptr;
377 __le32 dbgm_config_ptr;
378 __le32 alive_counter_ptr;
379 __le32 scd_base_ptr; /* SRAM address for SCD */
380 } __packed; /* ALIVE_RES_API_S_VER_1 */
382 /* Error response/notification */
384 FW_ERR_UNKNOWN_CMD = 0x0,
385 FW_ERR_INVALID_CMD_PARAM = 0x1,
386 FW_ERR_SERVICE = 0x2,
387 FW_ERR_ARC_MEMORY = 0x3,
388 FW_ERR_ARC_CODE = 0x4,
389 FW_ERR_WATCH_DOG = 0x5,
390 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
391 FW_ERR_WEP_KEY_SIZE = 0x11,
392 FW_ERR_OBSOLETE_FUNC = 0x12,
393 FW_ERR_UNEXPECTED = 0xFE,
398 * struct iwl_error_resp - FW error indication
399 * ( REPLY_ERROR = 0x2 )
400 * @error_type: one of FW_ERR_*
401 * @cmd_id: the command ID for which the error occured
402 * @bad_cmd_seq_num: sequence number of the erroneous command
403 * @error_service: which service created the error, applicable only if
404 * error_type = 2, otherwise 0
405 * @timestamp: TSF in usecs.
407 struct iwl_error_resp {
411 __le16 bad_cmd_seq_num;
412 __le32 error_service;
417 /* Common PHY, MAC and Bindings definitions */
419 #define MAX_MACS_IN_BINDING (3)
420 #define MAX_BINDINGS (4)
421 #define AUX_BINDING_INDEX (3)
424 /* Used to extract ID and color from the context dword */
425 #define FW_CTXT_ID_POS (0)
426 #define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
427 #define FW_CTXT_COLOR_POS (8)
428 #define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
429 #define FW_CTXT_INVALID (0xffffffff)
431 #define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
432 (_color << FW_CTXT_COLOR_POS))
434 /* Possible actions on PHYs, MACs and Bindings */
436 FW_CTXT_ACTION_STUB = 0,
438 FW_CTXT_ACTION_MODIFY,
439 FW_CTXT_ACTION_REMOVE,
441 }; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
445 /* Time Event types, according to MAC type */
446 enum iwl_time_event_type {
447 /* BSS Station Events */
448 TE_BSS_STA_AGGRESSIVE_ASSOC,
450 TE_BSS_EAP_DHCP_PROT,
453 /* P2P Device Events */
454 TE_P2P_DEVICE_DISCOVERABLE,
455 TE_P2P_DEVICE_LISTEN,
456 TE_P2P_DEVICE_ACTION_SCAN,
457 TE_P2P_DEVICE_FULL_SCAN,
459 /* P2P Client Events */
460 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
462 TE_P2P_CLIENT_QUIET_PERIOD,
465 TE_P2P_GO_ASSOC_PROT,
466 TE_P2P_GO_REPETITIVE_NOA,
469 /* WiDi Sync Events */
473 }; /* MAC_EVENT_TYPE_API_E_VER_1 */
475 /* Time Event dependencies: none, on another TE, or in a specific time */
480 TE_EVENT_SOCIOPATHIC = 4,
481 }; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
483 /* When to send Time Event notifications and to whom (internal = FW) */
486 TE_NOTIF_HOST_START = 0x1,
487 TE_NOTIF_HOST_END = 0x2,
488 TE_NOTIF_INTERNAL_START = 0x4,
489 TE_NOTIF_INTERNAL_END = 0x8
490 }; /* MAC_EVENT_ACTION_API_E_VER_1 */
493 * @TE_FRAG_NONE: fragmentation of the time event is NOT allowed.
494 * @TE_FRAG_SINGLE: fragmentation of the time event is allowed, but only
495 * the first fragment is scheduled.
496 * @TE_FRAG_DUAL: fragmentation of the time event is allowed, but only
497 * the first 2 fragments are scheduled.
498 * @TE_FRAG_ENDLESS: fragmentation of the time event is allowed, and any number
499 * of fragments are valid.
501 * Other than the constant defined above, specifying a fragmentation value 'x'
502 * means that the event can be fragmented but only the first 'x' will be
509 TE_FRAG_ENDLESS = 0xffffffff
512 /* Repeat the time event endlessly (until removed) */
513 #define TE_REPEAT_ENDLESS (0xffffffff)
514 /* If a Time Event has bounded repetitions, this is the maximal value */
515 #define TE_REPEAT_MAX_MSK (0x0fffffff)
516 /* If a Time Event can be fragmented, this is the max number of fragments */
517 #define TE_FRAG_MAX_MSK (0x0fffffff)
520 * struct iwl_time_event_cmd - configuring Time Events
521 * ( TIME_EVENT_CMD = 0x29 )
522 * @id_and_color: ID and color of the relevant MAC
523 * @action: action to perform, one of FW_CTXT_ACTION_*
524 * @id: this field has two meanings, depending on the action:
525 * If the action is ADD, then it means the type of event to add.
526 * For all other actions it is the unique event ID assigned when the
527 * event was added by the FW.
528 * @apply_time: When to start the Time Event (in GP2)
529 * @max_delay: maximum delay to event's start (apply time), in TU
530 * @depends_on: the unique ID of the event we depend on (if any)
531 * @interval: interval between repetitions, in TU
532 * @interval_reciprocal: 2^32 / interval
533 * @duration: duration of event in TU
534 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
535 * @dep_policy: one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
536 * @is_present: 0 or 1, are we present or absent during the Time Event
537 * @max_frags: maximal number of fragments the Time Event can be divided to
538 * @notify: notifications using TE_NOTIF_* (whom to notify when)
540 struct iwl_time_event_cmd {
541 /* COMMON_INDEX_HDR_API_S_VER_1 */
545 /* MAC_TIME_EVENT_DATA_API_S_VER_1 */
553 __le32 interval_reciprocal;
557 } __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_1 */
560 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
561 * @status: bit 0 indicates success, all others specify errors
562 * @id: the Time Event type
563 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
564 * @id_and_color: ID and color of the relevant MAC
566 struct iwl_time_event_resp {
571 } __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
574 * struct iwl_time_event_notif - notifications of time event start/stop
575 * ( TIME_EVENT_NOTIFICATION = 0x2a )
576 * @timestamp: action timestamp in GP2
577 * @session_id: session's unique id
578 * @unique_id: unique id of the Time Event itself
579 * @id_and_color: ID and color of the relevant MAC
580 * @action: one of TE_NOTIF_START or TE_NOTIF_END
581 * @status: true if scheduled, false otherwise (not executed)
583 struct iwl_time_event_notif {
590 } __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
593 /* Bindings and Time Quota */
596 * struct iwl_binding_cmd - configuring bindings
597 * ( BINDING_CONTEXT_CMD = 0x2b )
598 * @id_and_color: ID and color of the relevant Binding
599 * @action: action to perform, one of FW_CTXT_ACTION_*
600 * @macs: array of MAC id and colors which belong to the binding
601 * @phy: PHY id and color which belongs to the binding
603 struct iwl_binding_cmd {
604 /* COMMON_INDEX_HDR_API_S_VER_1 */
607 /* BINDING_DATA_API_S_VER_1 */
608 __le32 macs[MAX_MACS_IN_BINDING];
610 } __packed; /* BINDING_CMD_API_S_VER_1 */
612 /* The maximal number of fragments in the FW's schedule session */
613 #define IWL_MVM_MAX_QUOTA 128
616 * struct iwl_time_quota_data - configuration of time quota per binding
617 * @id_and_color: ID and color of the relevant Binding
618 * @quota: absolute time quota in TU. The scheduler will try to divide the
619 * remainig quota (after Time Events) according to this quota.
620 * @max_duration: max uninterrupted context duration in TU
622 struct iwl_time_quota_data {
626 } __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
629 * struct iwl_time_quota_cmd - configuration of time quota between bindings
630 * ( TIME_QUOTA_CMD = 0x2c )
631 * @quotas: allocations per binding
633 struct iwl_time_quota_cmd {
634 struct iwl_time_quota_data quotas[MAX_BINDINGS];
635 } __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
640 /* Supported bands */
641 #define PHY_BAND_5 (0)
642 #define PHY_BAND_24 (1)
644 /* Supported channel width, vary if there is VHT support */
645 #define PHY_VHT_CHANNEL_MODE20 (0x0)
646 #define PHY_VHT_CHANNEL_MODE40 (0x1)
647 #define PHY_VHT_CHANNEL_MODE80 (0x2)
648 #define PHY_VHT_CHANNEL_MODE160 (0x3)
651 * Control channel position:
652 * For legacy set bit means upper channel, otherwise lower.
653 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
654 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
657 * 40Mhz |_______|_______|
658 * 80Mhz |_______|_______|_______|_______|
659 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
660 * code 011 010 001 000 | 100 101 110 111
662 #define PHY_VHT_CTRL_POS_1_BELOW (0x0)
663 #define PHY_VHT_CTRL_POS_2_BELOW (0x1)
664 #define PHY_VHT_CTRL_POS_3_BELOW (0x2)
665 #define PHY_VHT_CTRL_POS_4_BELOW (0x3)
666 #define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
667 #define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
668 #define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
669 #define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
673 * @channel: channel number
674 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
675 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
677 struct iwl_fw_channel_info {
684 #define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
685 #define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
686 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
687 #define PHY_RX_CHAIN_VALID_POS (1)
688 #define PHY_RX_CHAIN_VALID_MSK \
689 (0x7 << PHY_RX_CHAIN_VALID_POS)
690 #define PHY_RX_CHAIN_FORCE_SEL_POS (4)
691 #define PHY_RX_CHAIN_FORCE_SEL_MSK \
692 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
693 #define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
694 #define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
695 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
696 #define PHY_RX_CHAIN_CNT_POS (10)
697 #define PHY_RX_CHAIN_CNT_MSK \
698 (0x3 << PHY_RX_CHAIN_CNT_POS)
699 #define PHY_RX_CHAIN_MIMO_CNT_POS (12)
700 #define PHY_RX_CHAIN_MIMO_CNT_MSK \
701 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
702 #define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
703 #define PHY_RX_CHAIN_MIMO_FORCE_MSK \
704 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
706 /* TODO: fix the value, make it depend on firmware at runtime? */
707 #define NUM_PHY_CTX 3
709 /* TODO: complete missing documentation */
711 * struct iwl_phy_context_cmd - config of the PHY context
712 * ( PHY_CONTEXT_CMD = 0x8 )
713 * @id_and_color: ID and color of the relevant Binding
714 * @action: action to perform, one of FW_CTXT_ACTION_*
715 * @apply_time: 0 means immediate apply and context switch.
716 * other value means apply new params after X usecs
717 * @tx_param_color: ???
721 * @acquisition_data: ???
722 * @dsp_cfg_flags: set to 0
724 struct iwl_phy_context_cmd {
725 /* COMMON_INDEX_HDR_API_S_VER_1 */
728 /* PHY_CONTEXT_DATA_API_S_VER_1 */
730 __le32 tx_param_color;
731 struct iwl_fw_channel_info ci;
734 __le32 acquisition_data;
735 __le32 dsp_cfg_flags;
736 } __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
738 #define IWL_RX_INFO_PHY_CNT 8
739 #define IWL_RX_INFO_AGC_IDX 1
740 #define IWL_RX_INFO_RSSI_AB_IDX 2
741 #define IWL_OFDM_AGC_A_MSK 0x0000007f
742 #define IWL_OFDM_AGC_A_POS 0
743 #define IWL_OFDM_AGC_B_MSK 0x00003f80
744 #define IWL_OFDM_AGC_B_POS 7
745 #define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
746 #define IWL_OFDM_AGC_CODE_POS 20
747 #define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
748 #define IWL_OFDM_RSSI_A_POS 0
749 #define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
750 #define IWL_OFDM_RSSI_ALLBAND_A_POS 8
751 #define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
752 #define IWL_OFDM_RSSI_B_POS 16
753 #define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
754 #define IWL_OFDM_RSSI_ALLBAND_B_POS 24
757 * struct iwl_rx_phy_info - phy info
758 * (REPLY_RX_PHY_CMD = 0xc0)
759 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
760 * @cfg_phy_cnt: configurable DSP phy data byte count
761 * @stat_id: configurable DSP phy data set ID
763 * @system_timestamp: GP2 at on air rise
764 * @timestamp: TSF at on air rise
765 * @beacon_time_stamp: beacon at on-air rise
766 * @phy_flags: general phy flags: band, modulation, ...
767 * @channel: channel number
768 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
769 * @rate_n_flags: RATE_MCS_*
770 * @byte_count: frame's byte-count
771 * @frame_time: frame's time on the air, based on byte count and frame rate
773 * @mac_active_msk: what MACs were active when the frame was received
775 * Before each Rx, the device sends this data. It contains PHY information
776 * about the reception of the packet.
778 struct iwl_rx_phy_info {
783 __le32 system_timestamp;
785 __le32 beacon_time_stamp;
788 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
791 __le16 mac_active_msk;
795 struct iwl_rx_mpdu_res_start {
801 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
802 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
803 * @RX_RES_PHY_FLAGS_MOD_CCK:
804 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
805 * @RX_RES_PHY_FLAGS_NARROW_BAND:
806 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
807 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
808 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
809 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
810 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
812 enum iwl_rx_phy_flags {
813 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
814 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
815 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
816 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
817 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
818 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
819 RX_RES_PHY_FLAGS_AGG = BIT(7),
820 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
821 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
822 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
826 * enum iwl_mvm_rx_status - written by fw for each Rx packet
827 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
828 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
829 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
830 * @RX_MPDU_RES_STATUS_KEY_VALID:
831 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
832 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
833 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
835 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
836 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
837 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
838 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
839 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
840 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
841 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
842 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
843 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
844 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
845 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
846 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
847 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
848 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
849 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
850 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
851 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
852 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
853 * @RX_MPDU_RES_STATUS_RRF_KILL:
854 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
855 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
857 enum iwl_mvm_rx_status {
858 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
859 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
860 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
861 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
862 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
863 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
864 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
865 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
866 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
867 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
868 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
869 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
870 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
871 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
872 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
873 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
874 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
875 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
876 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
877 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
878 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
879 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
880 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
881 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
882 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
883 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
887 * struct iwl_radio_version_notif - information on the radio version
888 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
893 struct iwl_radio_version_notif {
897 } __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
899 enum iwl_card_state_flags {
901 HW_CARD_DISABLED = 0x01,
902 SW_CARD_DISABLED = 0x02,
903 CT_KILL_CARD_DISABLED = 0x04,
904 HALT_CARD_DISABLED = 0x08,
905 CARD_DISABLED_MSK = 0x0f,
906 CARD_IS_RX_ON = 0x10,
910 * struct iwl_radio_version_notif - information on the radio version
911 * ( CARD_STATE_NOTIFICATION = 0xa1 )
912 * @flags: %iwl_card_state_flags
914 struct iwl_card_state_notif {
916 } __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
919 * struct iwl_set_calib_default_cmd - set default value for calibration.
920 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
921 * @calib_index: the calibration to set value for
923 * @data: the value to set for the calibration result
925 struct iwl_set_calib_default_cmd {
929 } __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
931 #endif /* __fw_api_h__ */