drivers/net/wireless/p54pci.c

   1
   2 /*
   3  * Linux device driver for PCI based Prism54
   4  *
   5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
   6  *
   7  * Based on the islsm (softmac prism54) driver, which is:
   8  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/init.h>
  16 #include <linux/pci.h>
  17 #include <linux/firmware.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/delay.h>
  20 #include <linux/completion.h>
  21 #include <net/mac80211.h>
  22
  23 #include "p54.h"
  24 #include "p54pci.h"
  25
  26 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  27 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
  28 MODULE_LICENSE("GPL");
  29 MODULE_ALIAS("prism54pci");
  30
  31 static struct pci_device_id p54p_table[] __devinitdata = {
  32         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
  33         { PCI_DEVICE(0x1260, 0x3890) },
  34         /* 3COM 3CRWE154G72 Wireless LAN adapter */
  35         { PCI_DEVICE(0x10b7, 0x6001) },
  36         /* Intersil PRISM Indigo Wireless LAN adapter */
  37         { PCI_DEVICE(0x1260, 0x3877) },
  38         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
  39         { PCI_DEVICE(0x1260, 0x3886) },
  40 };
  41
  42 MODULE_DEVICE_TABLE(pci, p54p_table);
  43
  44 static int p54p_upload_firmware(struct ieee80211_hw *dev)
  45 {
  46         struct p54p_priv *priv = dev->priv;
  47         const struct firmware *fw_entry = NULL;
  48         __le32 reg;
  49         int err;
  50         u32 *data;
  51         u32 remains, left, device_addr;
  52
  53         P54P_WRITE(int_enable, 0);
  54         P54P_READ(int_enable);
  55         udelay(10);
  56
  57         reg = P54P_READ(ctrl_stat);
  58         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  59         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
  60         P54P_WRITE(ctrl_stat, reg);
  61         P54P_READ(ctrl_stat);
  62         udelay(10);
  63
  64         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
  65         P54P_WRITE(ctrl_stat, reg);
  66         wmb();
  67         udelay(10);
  68
  69         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  70         P54P_WRITE(ctrl_stat, reg);
  71         wmb();
  72
  73         mdelay(50);
  74
  75         err = request_firmware(&fw_entry, "isl3886", &priv->pdev->dev);
  76         if (err) {
  77                 printk(KERN_ERR "%s (prism54pci): cannot find firmware "
  78                        "(isl3886)\n", pci_name(priv->pdev));
  79                 return err;
  80         }
  81
  82         p54_parse_firmware(dev, fw_entry);
  83
  84         data = (u32 *) fw_entry->data;
  85         remains = fw_entry->size;
  86         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
  87         while (remains) {
  88                 u32 i = 0;
  89                 left = min((u32)0x1000, remains);
  90                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
  91                 P54P_READ(int_enable);
  92
  93                 device_addr += 0x1000;
  94                 while (i < left) {
  95                         P54P_WRITE(direct_mem_win[i], *data++);
  96                         i += sizeof(u32);
  97                 }
  98
  99                 remains -= left;
 100                 P54P_READ(int_enable);
 101         }
 102
 103         release_firmware(fw_entry);
 104
 105         reg = P54P_READ(ctrl_stat);
 106         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
 107         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 108         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
 109         P54P_WRITE(ctrl_stat, reg);
 110         P54P_READ(ctrl_stat);
 111         udelay(10);
 112
 113         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
 114         P54P_WRITE(ctrl_stat, reg);
 115         wmb();
 116         udelay(10);
 117
 118         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 119         P54P_WRITE(ctrl_stat, reg);
 120         wmb();
 121         udelay(10);
 122
 123         return 0;
 124 }
 125
 126 static irqreturn_t p54p_simple_interrupt(int irq, void *dev_id)
 127 {
 128         struct p54p_priv *priv = (struct p54p_priv *) dev_id;
 129         __le32 reg;
 130
 131         reg = P54P_READ(int_ident);
 132         P54P_WRITE(int_ack, reg);
 133
 134         if (reg & P54P_READ(int_enable))
 135                 complete(&priv->boot_comp);
 136
 137         return IRQ_HANDLED;
 138 }
 139
 140 static int p54p_read_eeprom(struct ieee80211_hw *dev)
 141 {
 142         struct p54p_priv *priv = dev->priv;
 143         int err;
 144         struct p54_control_hdr *hdr;
 145         void *eeprom;
 146         dma_addr_t rx_mapping, tx_mapping;
 147         u16 alen;
 148
 149         init_completion(&priv->boot_comp);
 150         err = request_irq(priv->pdev->irq, &p54p_simple_interrupt,
 151                           IRQF_SHARED, "prism54pci", priv);
 152         if (err) {
 153                 printk(KERN_ERR "%s (prism54pci): failed to register IRQ handler\n",
 154                        pci_name(priv->pdev));
 155                 return err;
 156         }
 157
 158         eeprom = kmalloc(0x2010 + EEPROM_READBACK_LEN, GFP_KERNEL);
 159         if (!eeprom) {
 160                 printk(KERN_ERR "%s (prism54pci): no memory for eeprom!\n",
 161                        pci_name(priv->pdev));
 162                 err = -ENOMEM;
 163                 goto out;
 164         }
 165
 166         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 167         P54P_WRITE(ring_control_base, priv->ring_control_dma);
 168         P54P_READ(ring_control_base);
 169         udelay(10);
 170
 171         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 172         P54P_READ(int_enable);
 173         udelay(10);
 174
 175         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 176
 177         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 178                 printk(KERN_ERR "%s (prism54pci): Cannot boot firmware!\n",
 179                        pci_name(priv->pdev));
 180                 err = -EINVAL;
 181                 goto out;
 182         }
 183
 184         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 185         P54P_READ(int_enable);
 186
 187         hdr = eeprom + 0x2010;
 188         p54_fill_eeprom_readback(hdr);
 189         hdr->req_id = cpu_to_le32(priv->common.rx_start);
 190
 191         rx_mapping = pci_map_single(priv->pdev, eeprom,
 192                                     0x2010, PCI_DMA_FROMDEVICE);
 193         tx_mapping = pci_map_single(priv->pdev, (void *)hdr,
 194                                     EEPROM_READBACK_LEN, PCI_DMA_TODEVICE);
 195
 196         priv->ring_control->rx_mgmt[0].host_addr = cpu_to_le32(rx_mapping);
 197         priv->ring_control->rx_mgmt[0].len = cpu_to_le16(0x2010);
 198         priv->ring_control->tx_data[0].host_addr = cpu_to_le32(tx_mapping);
 199         priv->ring_control->tx_data[0].device_addr = hdr->req_id;
 200         priv->ring_control->tx_data[0].len = cpu_to_le16(EEPROM_READBACK_LEN);
 201
 202         priv->ring_control->host_idx[2] = cpu_to_le32(1);
 203         priv->ring_control->host_idx[1] = cpu_to_le32(1);
 204
 205         wmb();
 206         mdelay(100);
 207         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 208
 209         wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ);
 210         wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ);
 211
 212         pci_unmap_single(priv->pdev, tx_mapping,
 213                          EEPROM_READBACK_LEN, PCI_DMA_TODEVICE);
 214         pci_unmap_single(priv->pdev, rx_mapping,
 215                          0x2010, PCI_DMA_FROMDEVICE);
 216
 217         alen = le16_to_cpu(priv->ring_control->rx_mgmt[0].len);
 218         if (le32_to_cpu(priv->ring_control->device_idx[2]) != 1 ||
 219             alen < 0x10) {
 220                 printk(KERN_ERR "%s (prism54pci): Cannot read eeprom!\n",
 221                        pci_name(priv->pdev));
 222                 err = -EINVAL;
 223                 goto out;
 224         }
 225
 226         p54_parse_eeprom(dev, (u8 *)eeprom + 0x10, alen - 0x10);
 227
 228  out:
 229         kfree(eeprom);
 230         P54P_WRITE(int_enable, 0);
 231         P54P_READ(int_enable);
 232         udelay(10);
 233         free_irq(priv->pdev->irq, priv);
 234         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 235         return err;
 236 }
 237
 238 static void p54p_refill_rx_ring(struct ieee80211_hw *dev)
 239 {
 240         struct p54p_priv *priv = dev->priv;
 241         u32 limit, host_idx, idx;
 242
 243         host_idx = le32_to_cpu(priv->ring_control->host_idx[0]);
 244         limit = host_idx;
 245         limit -= le32_to_cpu(priv->ring_control->device_idx[0]);
 246         limit = ARRAY_SIZE(priv->ring_control->rx_data) - limit;
 247
 248         idx = host_idx % ARRAY_SIZE(priv->ring_control->rx_data);
 249         while (limit-- > 1) {
 250                 struct p54p_desc *desc = &priv->ring_control->rx_data[idx];
 251
 252                 if (!desc->host_addr) {
 253                         struct sk_buff *skb;
 254                         dma_addr_t mapping;
 255                         skb = dev_alloc_skb(MAX_RX_SIZE);
 256                         if (!skb)
 257                                 break;
 258
 259                         mapping = pci_map_single(priv->pdev,
 260                                                  skb_tail_pointer(skb),
 261                                                  MAX_RX_SIZE,
 262                                                  PCI_DMA_FROMDEVICE);
 263                         desc->host_addr = cpu_to_le32(mapping);
 264                         desc->device_addr = 0;  // FIXME: necessary?
 265                         desc->len = cpu_to_le16(MAX_RX_SIZE);
 266                         desc->flags = 0;
 267                         priv->rx_buf[idx] = skb;
 268                 }
 269
 270                 idx++;
 271                 host_idx++;
 272                 idx %= ARRAY_SIZE(priv->ring_control->rx_data);
 273         }
 274
 275         wmb();
 276         priv->ring_control->host_idx[0] = cpu_to_le32(host_idx);
 277 }
 278
 279 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
 280 {
 281         struct ieee80211_hw *dev = dev_id;
 282         struct p54p_priv *priv = dev->priv;
 283         __le32 reg;
 284
 285         spin_lock(&priv->lock);
 286         reg = P54P_READ(int_ident);
 287         if (unlikely(reg == 0xFFFFFFFF)) {
 288                 spin_unlock(&priv->lock);
 289                 return IRQ_HANDLED;
 290         }
 291
 292         P54P_WRITE(int_ack, reg);
 293
 294         reg &= P54P_READ(int_enable);
 295
 296         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
 297                 struct p54p_desc *desc;
 298                 u32 idx, i;
 299                 i = priv->tx_idx;
 300                 i %= ARRAY_SIZE(priv->ring_control->tx_data);
 301                 priv->tx_idx = idx = le32_to_cpu(priv->ring_control->device_idx[1]);
 302                 idx %= ARRAY_SIZE(priv->ring_control->tx_data);
 303
 304                 while (i != idx) {
 305                         desc = &priv->ring_control->tx_data[i];
 306                         if (priv->tx_buf[i]) {
 307                                 kfree(priv->tx_buf[i]);
 308                                 priv->tx_buf[i] = NULL;
 309                         }
 310
 311                         pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 312                                          le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
 313
 314                         desc->host_addr = 0;
 315                         desc->device_addr = 0;
 316                         desc->len = 0;
 317                         desc->flags = 0;
 318
 319                         i++;
 320                         i %= ARRAY_SIZE(priv->ring_control->tx_data);
 321                 }
 322
 323                 i = priv->rx_idx;
 324                 i %= ARRAY_SIZE(priv->ring_control->rx_data);
 325                 priv->rx_idx = idx = le32_to_cpu(priv->ring_control->device_idx[0]);
 326                 idx %= ARRAY_SIZE(priv->ring_control->rx_data);
 327                 while (i != idx) {
 328                         u16 len;
 329                         struct sk_buff *skb;
 330                         desc = &priv->ring_control->rx_data[i];
 331                         len = le16_to_cpu(desc->len);
 332                         skb = priv->rx_buf[i];
 333
 334                         skb_put(skb, len);
 335
 336                         if (p54_rx(dev, skb)) {
 337                                 pci_unmap_single(priv->pdev,
 338                                                  le32_to_cpu(desc->host_addr),
 339                                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 340
 341                                 priv->rx_buf[i] = NULL;
 342                                 desc->host_addr = 0;
 343                         } else {
 344                                 skb_trim(skb, 0);
 345                                 desc->len = cpu_to_le16(MAX_RX_SIZE);
 346                         }
 347
 348                         i++;
 349                         i %= ARRAY_SIZE(priv->ring_control->rx_data);
 350                 }
 351
 352                 p54p_refill_rx_ring(dev);
 353
 354                 wmb();
 355                 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 356         } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
 357                 complete(&priv->boot_comp);
 358
 359         spin_unlock(&priv->lock);
 360
 361         return reg ? IRQ_HANDLED : IRQ_NONE;
 362 }
 363
 364 static void p54p_tx(struct ieee80211_hw *dev, struct p54_control_hdr *data,
 365                     size_t len, int free_on_tx)
 366 {
 367         struct p54p_priv *priv = dev->priv;
 368         unsigned long flags;
 369         struct p54p_desc *desc;
 370         dma_addr_t mapping;
 371         u32 device_idx, idx, i;
 372
 373         spin_lock_irqsave(&priv->lock, flags);
 374
 375         device_idx = le32_to_cpu(priv->ring_control->device_idx[1]);
 376         idx = le32_to_cpu(priv->ring_control->host_idx[1]);
 377         i = idx % ARRAY_SIZE(priv->ring_control->tx_data);
 378
 379         mapping = pci_map_single(priv->pdev, data, len, PCI_DMA_TODEVICE);
 380         desc = &priv->ring_control->tx_data[i];
 381         desc->host_addr = cpu_to_le32(mapping);
 382         desc->device_addr = data->req_id;
 383         desc->len = cpu_to_le16(len);
 384         desc->flags = 0;
 385
 386         wmb();
 387         priv->ring_control->host_idx[1] = cpu_to_le32(idx + 1);
 388
 389         if (free_on_tx)
 390                 priv->tx_buf[i] = data;
 391
 392         spin_unlock_irqrestore(&priv->lock, flags);
 393
 394         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 395         P54P_READ(dev_int);
 396
 397         /* FIXME: unlikely to happen because the device usually runs out of
 398            memory before we fill the ring up, but we can make it impossible */
 399         if (idx - device_idx > ARRAY_SIZE(priv->ring_control->tx_data) - 2)
 400                 printk(KERN_INFO "%s: tx overflow.\n", wiphy_name(dev->wiphy));
 401 }
 402
 403 static int p54p_open(struct ieee80211_hw *dev)
 404 {
 405         struct p54p_priv *priv = dev->priv;
 406         int err;
 407
 408         init_completion(&priv->boot_comp);
 409         err = request_irq(priv->pdev->irq, &p54p_interrupt,
 410                           IRQF_SHARED, "prism54pci", dev);
 411         if (err) {
 412                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 413                        wiphy_name(dev->wiphy));
 414                 return err;
 415         }
 416
 417         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 418         priv->rx_idx = priv->tx_idx = 0;
 419         p54p_refill_rx_ring(dev);
 420
 421         p54p_upload_firmware(dev);
 422
 423         P54P_WRITE(ring_control_base, priv->ring_control_dma);
 424         P54P_READ(ring_control_base);
 425         wmb();
 426         udelay(10);
 427
 428         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 429         P54P_READ(int_enable);
 430         wmb();
 431         udelay(10);
 432
 433         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 434         P54P_READ(dev_int);
 435
 436         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 437                 printk(KERN_ERR "%s: Cannot boot firmware!\n",
 438                        wiphy_name(dev->wiphy));
 439                 free_irq(priv->pdev->irq, dev);
 440                 return -ETIMEDOUT;
 441         }
 442
 443         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 444         P54P_READ(int_enable);
 445         wmb();
 446         udelay(10);
 447
 448         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 449         P54P_READ(dev_int);
 450         wmb();
 451         udelay(10);
 452
 453         return 0;
 454 }
 455
 456 static void p54p_stop(struct ieee80211_hw *dev)
 457 {
 458         struct p54p_priv *priv = dev->priv;
 459         unsigned int i;
 460         struct p54p_desc *desc;
 461
 462         P54P_WRITE(int_enable, 0);
 463         P54P_READ(int_enable);
 464         udelay(10);
 465
 466         free_irq(priv->pdev->irq, dev);
 467
 468         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 469
 470         for (i = 0; i < ARRAY_SIZE(priv->rx_buf); i++) {
 471                 desc = &priv->ring_control->rx_data[i];
 472                 if (desc->host_addr)
 473                         pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 474                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 475                 kfree_skb(priv->rx_buf[i]);
 476                 priv->rx_buf[i] = NULL;
 477         }
 478
 479         for (i = 0; i < ARRAY_SIZE(priv->tx_buf); i++) {
 480                 desc = &priv->ring_control->tx_data[i];
 481                 if (desc->host_addr)
 482                         pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 483                                          le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
 484
 485                 kfree(priv->tx_buf[i]);
 486                 priv->tx_buf[i] = NULL;
 487         }
 488
 489         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 490 }
 491
 492 static int __devinit p54p_probe(struct pci_dev *pdev,
 493                                 const struct pci_device_id *id)
 494 {
 495         struct p54p_priv *priv;
 496         struct ieee80211_hw *dev;
 497         unsigned long mem_addr, mem_len;
 498         int err;
 499         DECLARE_MAC_BUF(mac);
 500
 501         err = pci_enable_device(pdev);
 502         if (err) {
 503                 printk(KERN_ERR "%s (prism54pci): Cannot enable new PCI device\n",
 504                        pci_name(pdev));
 505                 return err;
 506         }
 507
 508         mem_addr = pci_resource_start(pdev, 0);
 509         mem_len = pci_resource_len(pdev, 0);
 510         if (mem_len < sizeof(struct p54p_csr)) {
 511                 printk(KERN_ERR "%s (prism54pci): Too short PCI resources\n",
 512                        pci_name(pdev));
 513                 pci_disable_device(pdev);
 514                 return err;
 515         }
 516
 517         err = pci_request_regions(pdev, "prism54pci");
 518         if (err) {
 519                 printk(KERN_ERR "%s (prism54pci): Cannot obtain PCI resources\n",
 520                        pci_name(pdev));
 521                 return err;
 522         }
 523
 524         if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
 525             pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
 526                 printk(KERN_ERR "%s (prism54pci): No suitable DMA available\n",
 527                        pci_name(pdev));
 528                 goto err_free_reg;
 529         }
 530
 531         pci_set_master(pdev);
 532         pci_try_set_mwi(pdev);
 533
 534         pci_write_config_byte(pdev, 0x40, 0);
 535         pci_write_config_byte(pdev, 0x41, 0);
 536
 537         dev = p54_init_common(sizeof(*priv));
 538         if (!dev) {
 539                 printk(KERN_ERR "%s (prism54pci): ieee80211 alloc failed\n",
 540                        pci_name(pdev));
 541                 err = -ENOMEM;
 542                 goto err_free_reg;
 543         }
 544
 545         priv = dev->priv;
 546         priv->pdev = pdev;
 547
 548         SET_IEEE80211_DEV(dev, &pdev->dev);
 549         pci_set_drvdata(pdev, dev);
 550
 551         priv->map = ioremap(mem_addr, mem_len);
 552         if (!priv->map) {
 553                 printk(KERN_ERR "%s (prism54pci): Cannot map device memory\n",
 554                        pci_name(pdev));
 555                 err = -EINVAL;  // TODO: use a better error code?
 556                 goto err_free_dev;
 557         }
 558
 559         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
 560                                                   &priv->ring_control_dma);
 561         if (!priv->ring_control) {
 562                 printk(KERN_ERR "%s (prism54pci): Cannot allocate rings\n",
 563                        pci_name(pdev));
 564                 err = -ENOMEM;
 565                 goto err_iounmap;
 566         }
 567         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 568
 569         err = p54p_upload_firmware(dev);
 570         if (err)
 571                 goto err_free_desc;
 572
 573         err = p54p_read_eeprom(dev);
 574         if (err)
 575                 goto err_free_desc;
 576
 577         priv->common.open = p54p_open;
 578         priv->common.stop = p54p_stop;
 579         priv->common.tx = p54p_tx;
 580
 581         spin_lock_init(&priv->lock);
 582
 583         err = ieee80211_register_hw(dev);
 584         if (err) {
 585                 printk(KERN_ERR "%s (prism54pci): Cannot register netdevice\n",
 586                        pci_name(pdev));
 587                 goto err_free_common;
 588         }
 589
 590         printk(KERN_INFO "%s: hwaddr %s, isl38%02x\n",
 591                wiphy_name(dev->wiphy),
 592                print_mac(mac, dev->wiphy->perm_addr),
 593                priv->common.version);
 594
 595         return 0;
 596
 597  err_free_common:
 598         p54_free_common(dev);
 599
 600  err_free_desc:
 601         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 602                             priv->ring_control, priv->ring_control_dma);
 603
 604  err_iounmap:
 605         iounmap(priv->map);
 606
 607  err_free_dev:
 608         pci_set_drvdata(pdev, NULL);
 609         ieee80211_free_hw(dev);
 610
 611  err_free_reg:
 612         pci_release_regions(pdev);
 613         pci_disable_device(pdev);
 614         return err;
 615 }
 616
 617 static void __devexit p54p_remove(struct pci_dev *pdev)
 618 {
 619         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 620         struct p54p_priv *priv;
 621
 622         if (!dev)
 623                 return;
 624
 625         ieee80211_unregister_hw(dev);
 626         priv = dev->priv;
 627         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 628                             priv->ring_control, priv->ring_control_dma);
 629         p54_free_common(dev);
 630         iounmap(priv->map);
 631         pci_release_regions(pdev);
 632         pci_disable_device(pdev);
 633         ieee80211_free_hw(dev);
 634 }
 635
 636 #ifdef CONFIG_PM
 637 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
 638 {
 639         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 640         struct p54p_priv *priv = dev->priv;
 641
 642         if (priv->common.mode != IEEE80211_IF_TYPE_MGMT) {
 643                 ieee80211_stop_queues(dev);
 644                 p54p_stop(dev);
 645         }
 646
 647         pci_save_state(pdev);
 648         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 649         return 0;
 650 }
 651
 652 static int p54p_resume(struct pci_dev *pdev)
 653 {
 654         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 655         struct p54p_priv *priv = dev->priv;
 656
 657         pci_set_power_state(pdev, PCI_D0);
 658         pci_restore_state(pdev);
 659
 660         if (priv->common.mode != IEEE80211_IF_TYPE_MGMT) {
 661                 p54p_open(dev);
 662                 ieee80211_start_queues(dev);
 663         }
 664
 665         return 0;
 666 }
 667 #endif /* CONFIG_PM */
 668
 669 static struct pci_driver p54p_driver = {
 670         .name           = "prism54pci",
 671         .id_table       = p54p_table,
 672         .probe          = p54p_probe,
 673         .remove         = __devexit_p(p54p_remove),
 674 #ifdef CONFIG_PM
 675         .suspend        = p54p_suspend,
 676         .resume         = p54p_resume,
 677 #endif /* CONFIG_PM */
 678 };
 679
 680 static int __init p54p_init(void)
 681 {
 682         return pci_register_driver(&p54p_driver);
 683 }
 684
 685 static void __exit p54p_exit(void)
 686 {
 687         pci_unregister_driver(&p54p_driver);
 688 }
 689
 690 module_init(p54p_init);
 691 module_exit(p54p_exit);