drivers/net/wireless/rockchip_wlan/rtl8723au/hal/rtl8723a/sdio/sdio_halinit.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #define _SDIO_HALINIT_C_
  21
  22 #include <drv_conf.h>
  23 #include <osdep_service.h>
  24 #include <drv_types.h>
  25
  26 #ifndef CONFIG_SDIO_HCI
  27 #error "CONFIG_SDIO_HCI shall be on!\n"
  28 #endif
  29
  30 #include <rtw_efuse.h>
  31 #include <HalPwrSeqCmd.h>
  32 #include <Hal8723PwrSeq.h>
  33 #include <rtl8723a_hal.h>
  34 #include <rtl8723a_led.h>
  35 #include <sdio_ops.h>
  36
  37 #ifdef CONFIG_EFUSE_CONFIG_FILE
  38 #include <linux/fs.h>
  39 #include <asm/uaccess.h>
  40 #endif
  41
  42 /*
  43  * Description:
  44  *      Call this function to make sure power on successfully
  45  *
  46  * Return:
  47  *      _SUCCESS        enable success
  48  *      _FAIL   enable fail
  49  */
  50
  51 static int PowerOnCheck(PADAPTER padapter)
  52 {
  53         u32     val_offset0, val_offset1, val_offset2, val_offset3;
  54         u32 val_mix = 0;
  55         u32 res = 0;
  56         u8      ret = _FAIL;
  57         int index = 0;
  58
  59         val_offset0 = rtw_read8(padapter, REG_CR);
  60         val_offset1 = rtw_read8(padapter, REG_CR+1);
  61         val_offset2 = rtw_read8(padapter, REG_CR+2);
  62         val_offset3 = rtw_read8(padapter, REG_CR+3);
  63
  64         if (val_offset0 == 0xEA || val_offset1 == 0xEA ||
  65                         val_offset2 == 0xEA || val_offset3 ==0xEA) {
  66                 DBG_871X("%s: power on fail, do Power on again\n", __func__);
  67                 return ret;
  68         }
  69
  70         val_mix = val_offset3 << 24 | val_mix;
  71         val_mix = val_offset2 << 16 | val_mix;
  72         val_mix = val_offset1 << 8 | val_mix;
  73         val_mix = val_offset0 | val_mix;
  74
  75         res = rtw_read32(padapter, REG_CR);
  76
  77         DBG_871X("%s: val_mix:0x%08x, res:0x%08x\n", __func__, val_mix, res);
  78
  79         while(index < 100) {
  80                 if (res == val_mix) {
  81                         DBG_871X("%s: 0x100 the result of cmd52 and cmd53 is the same.\n", __func__);
  82                         ret = _SUCCESS;
  83                         break;
  84                 } else {
  85                         DBG_871X("%s: 0x100 cmd52 and cmd53 is not the same(index:%d).\n", __func__, index);
  86                         res = rtw_read32(padapter, REG_CR);
  87                         index ++;
  88                         ret = _FAIL;
  89                 }
  90         }
  91
  92         if (ret) {
  93                 index = 0;
  94                 while(index < 100) {
  95                         rtw_write32(padapter, 0x1B8, 0x12345678);
  96                         res = rtw_read32(padapter, 0x1B8);
  97                         if (res == 0x12345678) {
  98                                 DBG_871X("%s: 0x1B8 test Pass.\n", __func__);
  99                                 ret = _SUCCESS;
 100                                 break;
 101                         } else {
 102                                 index ++;
 103                                 DBG_871X("%s: 0x1B8 test Fail(index: %d).\n", __func__, index);
 104                                 ret = _FAIL;
 105                         }
 106                 }
 107         } else {
 108                 DBG_871X("%s: fail at cmd52, cmd53.\n", __func__);
 109         }
 110         return ret;
 111 }
 112
 113
 114 /*
 115  * Description:
 116  *      Call power on sequence to enable card
 117  *
 118  * Return:
 119  *      _SUCCESS        enable success
 120  *      _FAIL           enable fail
 121  */
 122 static u8 CardEnable(PADAPTER padapter)
 123 {
 124         u8 bMacPwrCtrlOn;
 125         u8 ret;
 126
 127
 128         rtw_hal_get_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
 129         if (bMacPwrCtrlOn == _FALSE)
 130         {
 131                 // RSV_CTRL 0x1C[7:0] = 0x00
 132                 // unlock ISO/CLK/Power control register
 133                 rtw_write8(padapter, REG_RSV_CTRL, 0x0);
 134
 135                 ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8723A_card_enable_flow);
 136                 if (ret == _SUCCESS) {
 137                         u8 bMacPwrCtrlOn = _TRUE;
 138                         rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
 139                 }
 140         } else
 141                 ret = _SUCCESS;
 142
 143         return ret;
 144 }
 145
 146 //static
 147 u8 _InitPowerOn(PADAPTER padapter)
 148 {
 149         u8 value8;
 150         u16 value16;
 151         u32 value32;
 152         u8 ret;
 153 //      u8 bMacPwrCtrlOn;
 154
 155
 156         ret = CardEnable(padapter);
 157         if (ret == _FALSE) {
 158                 RT_TRACE(_module_hci_hal_init_c_, _drv_emerg_,
 159                                 ("%s: run power on flow fail\n", __FUNCTION__));
 160                 return _FAIL;
 161         }
 162
 163         // Radio-Off Pin Trigger
 164         value8 = rtw_read8(padapter, REG_GPIO_INTM+1);
 165         value8 |= BIT(1); // Enable falling edge triggering interrupt
 166         rtw_write8(padapter, REG_GPIO_INTM+1, value8);
 167         value8 = rtw_read8(padapter, REG_GPIO_IO_SEL_2+1);
 168         value8 |= BIT(1);
 169         rtw_write8(padapter, REG_GPIO_IO_SEL_2+1, value8);
 170
 171         // Enable power down and GPIO interrupt
 172         value16 = rtw_read16(padapter, REG_APS_FSMCO);
 173         value16 |= EnPDN; // Enable HW power down and RF on
 174         rtw_write16(padapter, REG_APS_FSMCO, value16);
 175
 176         // Enable CMD53 R/W Operation
 177 //      bMacPwrCtrlOn = _TRUE;
 178 //      rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
 179
 180         // Enable MAC DMA/WMAC/SCHEDULE/SEC block
 181         value16 = rtw_read16(padapter, REG_CR);
 182         value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
 183                                 | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
 184         rtw_write16(padapter, REG_CR, value16);
 185
 186         return _SUCCESS;
 187 }
 188
 189 static void _InitQueueReservedPage(PADAPTER padapter)
 190 {
 191         HAL_DATA_TYPE           *pHalData = GET_HAL_DATA(padapter);
 192         struct registry_priv    *pregistrypriv = &padapter->registrypriv;
 193         u32                     outEPNum        = (u32)pHalData->OutEpNumber;
 194         u32                     numHQ           = 0;
 195         u32                     numLQ           = 0;
 196         u32                     numNQ           = 0;
 197         u32                     numPubQ;
 198         u32                     value32;
 199         u8                      value8;
 200         BOOLEAN                 bWiFiConfig     = pregistrypriv->wifi_spec;
 201         //u32                   txQPageNum, txQPageUnit,txQRemainPage;
 202
 203
 204         { //for WMM
 205
 206                 numPubQ = bWiFiConfig ? WMM_NORMAL_PAGE_NUM_PUBQ : NORMAL_PAGE_NUM_PUBQ;
 207
 208                 if (pHalData->OutEpQueueSel & TX_SELE_HQ)
 209                 {
 210                         numHQ = bWiFiConfig ? WMM_NORMAL_PAGE_NUM_HPQ : NORMAL_PAGE_NUM_HPQ;
 211                 }
 212
 213                 if (pHalData->OutEpQueueSel & TX_SELE_LQ)
 214                 {
 215                         numLQ = bWiFiConfig ? WMM_NORMAL_PAGE_NUM_LPQ : NORMAL_PAGE_NUM_LPQ;
 216                 }
 217
 218                 // NOTE: This step shall be proceed before writting REG_RQPN.
 219                 if (pHalData->OutEpQueueSel & TX_SELE_NQ) {
 220                                 numNQ = bWiFiConfig ? WMM_NORMAL_PAGE_NUM_NPQ : NORMAL_PAGE_NUM_NPQ;
 221                 }
 222                 value8 = (u8)_NPQ(numNQ);
 223                 rtw_write8(padapter, REG_RQPN_NPQ, value8);
 224         }
 225
 226         // TX DMA
 227         value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
 228         rtw_write32(padapter, REG_RQPN, value32);
 229 }
 230
 231 static void _InitTxBufferBoundary(PADAPTER padapter)
 232 {
 233         struct registry_priv *pregistrypriv = &padapter->registrypriv;
 234         //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
 235
 236         //u16   txdmactrl;
 237         u8      txpktbuf_bndy;
 238
 239         if (!pregistrypriv->wifi_spec) {
 240                 txpktbuf_bndy = TX_PAGE_BOUNDARY;
 241         } else {
 242                 //for WMM
 243                 txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY;
 244         }
 245
 246         rtw_write8(padapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
 247         rtw_write8(padapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
 248         rtw_write8(padapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
 249         rtw_write8(padapter, REG_TRXFF_BNDY, txpktbuf_bndy);
 250         rtw_write8(padapter, REG_TDECTRL+1, txpktbuf_bndy);
 251 }
 252
 253 static VOID
 254 _InitNormalChipRegPriority(
 255         IN      PADAPTER        Adapter,
 256         IN      u16             beQ,
 257         IN      u16             bkQ,
 258         IN      u16             viQ,
 259         IN      u16             voQ,
 260         IN      u16             mgtQ,
 261         IN      u16             hiQ
 262         )
 263 {
 264         u16 value16             = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
 265
 266         value16 |=      _TXDMA_BEQ_MAP(beQ)     | _TXDMA_BKQ_MAP(bkQ) |
 267                                 _TXDMA_VIQ_MAP(viQ)     | _TXDMA_VOQ_MAP(voQ) |
 268                                 _TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ);
 269
 270         rtw_write16(Adapter, REG_TRXDMA_CTRL, value16);
 271 }
 272
 273 static VOID
 274 _InitNormalChipOneOutEpPriority(
 275         IN      PADAPTER Adapter
 276         )
 277 {
 278         HAL_DATA_TYPE   *pHalData       = GET_HAL_DATA(Adapter);
 279
 280         u16     value = 0;
 281         switch(pHalData->OutEpQueueSel)
 282         {
 283                 case TX_SELE_HQ:
 284                         value = QUEUE_HIGH;
 285                         break;
 286                 case TX_SELE_LQ:
 287                         value = QUEUE_LOW;
 288                         break;
 289                 case TX_SELE_NQ:
 290                         value = QUEUE_NORMAL;
 291                         break;
 292                 default:
 293                         //RT_ASSERT(FALSE,("Shall not reach here!\n"));
 294                         break;
 295         }
 296
 297         _InitNormalChipRegPriority(Adapter,
 298                                                                 value,
 299                                                                 value,
 300                                                                 value,
 301                                                                 value,
 302                                                                 value,
 303                                                                 value
 304                                                                 );
 305
 306 }
 307
 308 static VOID
 309 _InitNormalChipTwoOutEpPriority(
 310         IN      PADAPTER Adapter
 311         )
 312 {
 313         HAL_DATA_TYPE   *pHalData       = GET_HAL_DATA(Adapter);
 314         struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 315         u16                     beQ,bkQ,viQ,voQ,mgtQ,hiQ;
 316
 317
 318         u16     valueHi = 0;
 319         u16     valueLow = 0;
 320
 321         switch(pHalData->OutEpQueueSel)
 322         {
 323                 case (TX_SELE_HQ | TX_SELE_LQ):
 324                         valueHi = QUEUE_HIGH;
 325                         valueLow = QUEUE_LOW;
 326                         break;
 327                 case (TX_SELE_NQ | TX_SELE_LQ):
 328                         valueHi = QUEUE_NORMAL;
 329                         valueLow = QUEUE_LOW;
 330                         break;
 331                 case (TX_SELE_HQ | TX_SELE_NQ):
 332                         valueHi = QUEUE_HIGH;
 333                         valueLow = QUEUE_NORMAL;
 334                         break;
 335                 default:
 336                         //RT_ASSERT(FALSE,("Shall not reach here!\n"));
 337                         break;
 338         }
 339
 340         if(!pregistrypriv->wifi_spec ){
 341                 beQ             = valueLow;
 342                 bkQ             = valueLow;
 343                 viQ             = valueHi;
 344                 voQ             = valueHi;
 345                 mgtQ    = valueHi;
 346                 hiQ             = valueHi;
 347         }
 348         else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE
 349                 beQ             = valueLow;
 350                 bkQ             = valueHi;
 351                 viQ             = valueHi;
 352                 voQ             = valueLow;
 353                 mgtQ    = valueHi;
 354                 hiQ             = valueHi;
 355         }
 356
 357         _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ);
 358
 359 }
 360
 361 static VOID
 362 _InitNormalChipThreeOutEpPriority(
 363         IN      PADAPTER padapter
 364         )
 365 {
 366         struct registry_priv *pregistrypriv = &padapter->registrypriv;
 367         u16                     beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 368
 369         if (!pregistrypriv->wifi_spec){// typical setting
 370                 beQ             = QUEUE_LOW;
 371                 bkQ             = QUEUE_LOW;
 372                 viQ             = QUEUE_NORMAL;
 373                 voQ             = QUEUE_HIGH;
 374                 mgtQ    = QUEUE_HIGH;
 375                 hiQ             = QUEUE_HIGH;
 376         }
 377         else {// for WMM
 378                 beQ             = QUEUE_LOW;
 379                 bkQ             = QUEUE_NORMAL;
 380                 viQ             = QUEUE_NORMAL;
 381                 voQ             = QUEUE_HIGH;
 382                 mgtQ    = QUEUE_HIGH;
 383                 hiQ             = QUEUE_HIGH;
 384         }
 385         _InitNormalChipRegPriority(padapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ);
 386 }
 387
 388 static VOID
 389 _InitNormalChipQueuePriority(
 390         IN      PADAPTER Adapter
 391         )
 392 {
 393         HAL_DATA_TYPE   *pHalData       = GET_HAL_DATA(Adapter);
 394
 395         switch(pHalData->OutEpNumber)
 396         {
 397                 case 1:
 398                         _InitNormalChipOneOutEpPriority(Adapter);
 399                         break;
 400                 case 2:
 401                         _InitNormalChipTwoOutEpPriority(Adapter);
 402                         break;
 403                 case 3:
 404                         _InitNormalChipThreeOutEpPriority(Adapter);
 405                         break;
 406                 default:
 407                         //RT_ASSERT(FALSE,("Shall not reach here!\n"));
 408                         break;
 409         }
 410
 411
 412 }
 413
 414 static void _InitQueuePriority(PADAPTER padapter)
 415 {
 416         _InitNormalChipQueuePriority(padapter);
 417 }
 418
 419 static void _InitPageBoundary(PADAPTER padapter)
 420 {
 421         // RX Page Boundary
 422         //srand(static_cast<unsigned int>(time(NULL)) );
 423         u16 rxff_bndy = 0x27FF;//(rand() % 1) ? 0x27FF : 0x23FF;
 424
 425         rtw_write16(padapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
 426
 427         // TODO: ?? shall we set tx boundary?
 428 }
 429
 430 static void _InitTransferPageSize(PADAPTER padapter)
 431 {
 432         // Tx page size is always 128.
 433
 434         u8 value8;
 435         value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
 436         rtw_write8(padapter, REG_PBP, value8);
 437 }
 438
 439 void _InitDriverInfoSize(PADAPTER padapter, u8 drvInfoSize)
 440 {
 441         rtw_write8(padapter, REG_RX_DRVINFO_SZ, drvInfoSize);
 442 }
 443
 444 void _InitNetworkType(PADAPTER padapter)
 445 {
 446         u32 value32;
 447
 448         value32 = rtw_read32(padapter, REG_CR);
 449
 450         // TODO: use the other function to set network type
 451 //      value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AD_HOC);
 452         value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
 453
 454         rtw_write32(padapter, REG_CR, value32);
 455 }
 456
 457 void _InitWMACSetting(PADAPTER padapter)
 458 {
 459         u16 value16;
 460         HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
 461
 462
 463         //pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_PHYSTS | RCR_APP_ICV | RCR_APP_MIC;
 464         // don't turn on AAP, it will allow all packets to driver
 465         pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | RCR_CBSSID_BCN | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_PHYST_RXFF | RCR_APP_ICV | RCR_APP_MIC;
 466 #ifdef CONFIG_MAC_LOOPBACK_DRIVER
 467         pHalData->ReceiveConfig |= RCR_ADD3 | RCR_APWRMGT | RCR_ACRC32 | RCR_ADF;
 468 #endif
 469
 470         // some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile()
 471         rtw_write32(padapter, REG_RCR, pHalData->ReceiveConfig);
 472
 473         // Accept all multicast address
 474         rtw_write32(padapter, REG_MAR, 0xFFFFFFFF);
 475         rtw_write32(padapter, REG_MAR + 4, 0xFFFFFFFF);
 476
 477         // Accept all data frames
 478         value16 = 0xFFFF;
 479         rtw_write16(padapter, REG_RXFLTMAP2, value16);
 480
 481         // 2010.09.08 hpfan
 482         // Since ADF is removed from RCR, ps-poll will not be indicate to driver,
 483         // RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll.
 484         value16 = 0x400;
 485         rtw_write16(padapter, REG_RXFLTMAP1, value16);
 486
 487         // Accept all management frames
 488         value16 = 0xFFFF;
 489         rtw_write16(padapter, REG_RXFLTMAP0, value16);
 490 }
 491
 492 void _InitAdaptiveCtrl(PADAPTER padapter)
 493 {
 494         u16     value16;
 495         u32     value32;
 496
 497         // Response Rate Set
 498         value32 = rtw_read32(padapter, REG_RRSR);
 499         value32 &= ~RATE_BITMAP_ALL;
 500         value32 |= RATE_RRSR_CCK_ONLY_1M;
 501         rtw_write32(padapter, REG_RRSR, value32);
 502
 503         // CF-END Threshold
 504         //m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1);
 505
 506         // SIFS (used in NAV)
 507         value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
 508         rtw_write16(padapter, REG_SPEC_SIFS, value16);
 509
 510         // Retry Limit
 511         value16 = _LRL(0x30) | _SRL(0x30);
 512         rtw_write16(padapter, REG_RL, value16);
 513 }
 514
 515 void _InitEDCA(PADAPTER padapter)
 516 {
 517         // Set Spec SIFS (used in NAV)
 518         rtw_write16(padapter, REG_SPEC_SIFS, 0x100a);
 519         rtw_write16(padapter, REG_MAC_SPEC_SIFS, 0x100a);
 520
 521         // Set SIFS for CCK
 522         rtw_write16(padapter, REG_SIFS_CTX, 0x100a);
 523
 524         // Set SIFS for OFDM
 525         rtw_write16(padapter, REG_SIFS_TRX, 0x100a);
 526
 527         // TXOP
 528         rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x005EA42B);
 529         rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A44F);
 530         rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005EA324);
 531         rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002FA226);
 532 }
 533
 534 void _InitRateFallback(PADAPTER padapter)
 535 {
 536         // Set Data Auto Rate Fallback Retry Count register.
 537         rtw_write32(padapter, REG_DARFRC, 0x00000000);
 538         rtw_write32(padapter, REG_DARFRC+4, 0x10080404);
 539         rtw_write32(padapter, REG_RARFRC, 0x04030201);
 540         rtw_write32(padapter, REG_RARFRC+4, 0x08070605);
 541
 542 }
 543
 544 void _InitRetryFunction(PADAPTER padapter)
 545 {
 546         u8      value8;
 547
 548         value8 = rtw_read8(padapter, REG_FWHW_TXQ_CTRL);
 549         value8 |= EN_AMPDU_RTY_NEW;
 550         rtw_write8(padapter, REG_FWHW_TXQ_CTRL, value8);
 551
 552         // Set ACK timeout
 553         rtw_write8(padapter, REG_ACKTO, 0x40);
 554 }
 555
 556 static void HalRxAggr8723ASdio(PADAPTER padapter)
 557 {
 558 #if 1
 559         struct registry_priv *pregistrypriv;
 560         u8      valueDMATimeout;
 561         u8      valueDMAPageCount;
 562
 563
 564         pregistrypriv = &padapter->registrypriv;
 565
 566         if (pregistrypriv->wifi_spec)
 567         {
 568                 // 2010.04.27 hpfan
 569                 // Adjust RxAggrTimeout to close to zero disable RxAggr, suggested by designer
 570                 // Timeout value is calculated by 34 / (2^n)
 571                 valueDMATimeout = 0x0f;
 572                 valueDMAPageCount = 0x01;
 573         }
 574         else
 575         {
 576                 valueDMATimeout = 0x06;
 577                 //valueDMAPageCount = 0x0F;
 578                 valueDMAPageCount = 0x24;
 579
 580         }
 581
 582         rtw_write8(padapter, REG_RXDMA_AGG_PG_TH+1, valueDMATimeout);
 583         rtw_write8(padapter, REG_RXDMA_AGG_PG_TH, valueDMAPageCount);
 584 #endif
 585 }
 586
 587 void sdio_AggSettingRxUpdate(PADAPTER padapter)
 588 {
 589 #if 1
 590         HAL_DATA_TYPE *pHalData;
 591         u8 valueDMA;
 592
 593
 594         pHalData = GET_HAL_DATA(padapter);
 595
 596         valueDMA = rtw_read8(padapter, REG_TRXDMA_CTRL);
 597         valueDMA |= RXDMA_AGG_EN;
 598         rtw_write8(padapter, REG_TRXDMA_CTRL, valueDMA);
 599
 600 #if 0
 601         switch (RX_PAGE_SIZE_REG_VALUE)
 602         {
 603                 case PBP_64:
 604                         pHalData->HwRxPageSize = 64;
 605                         break;
 606                 case PBP_128:
 607                         pHalData->HwRxPageSize = 128;
 608                         break;
 609                 case PBP_256:
 610                         pHalData->HwRxPageSize = 256;
 611                         break;
 612                 case PBP_512:
 613                         pHalData->HwRxPageSize = 512;
 614                         break;
 615                 case PBP_1024:
 616                         pHalData->HwRxPageSize = 1024;
 617                         break;
 618                 default:
 619                         RT_TRACE(_module_hci_hal_init_c_, _drv_err_,
 620                                 ("%s: RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n", __FUNCTION__));
 621                         break;
 622         }
 623 #endif
 624 #endif
 625 }
 626
 627 void _initSdioAggregationSetting(PADAPTER padapter)
 628 {
 629         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
 630
 631         // Tx aggregation setting
 632 //      sdio_AggSettingTxUpdate(padapter);
 633
 634         // Rx aggregation setting
 635         HalRxAggr8723ASdio(padapter);
 636         sdio_AggSettingRxUpdate(padapter);
 637
 638         // 201/12/10 MH Add for USB agg mode dynamic switch.
 639         pHalData->UsbRxHighSpeedMode = _FALSE;
 640 }
 641
 642
 643 void _InitOperationMode(PADAPTER padapter)
 644 {
 645         PHAL_DATA_TYPE pHalData;
 646         struct mlme_ext_priv *pmlmeext;
 647         u8                              regBwOpMode = 0;
 648         u32                             regRATR = 0, regRRSR = 0;
 649         u8                              MinSpaceCfg;
 650
 651
 652         pHalData = GET_HAL_DATA(padapter);
 653         pmlmeext = &padapter->mlmeextpriv;
 654
 655         //1 This part need to modified according to the rate set we filtered!!
 656         //
 657         // Set RRSR, RATR, and REG_BWOPMODE registers
 658         //
 659         switch(pmlmeext->cur_wireless_mode)
 660         {
 661                 case WIRELESS_MODE_B:
 662                         regBwOpMode = BW_OPMODE_20MHZ;
 663                         regRATR = RATE_ALL_CCK;
 664                         regRRSR = RATE_ALL_CCK;
 665                         break;
 666                 case WIRELESS_MODE_A:
 667 //                      RT_ASSERT(FALSE,("Error wireless a mode\n"));
 668 #if 0
 669                         regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ;
 670                         regRATR = RATE_ALL_OFDM_AG;
 671                         regRRSR = RATE_ALL_OFDM_AG;
 672 #endif
 673                         break;
 674                 case WIRELESS_MODE_G:
 675                         regBwOpMode = BW_OPMODE_20MHZ;
 676                         regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 677                         regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 678                         break;
 679                 case WIRELESS_MODE_AUTO:
 680 #if 0
 681                         if (padapter->bInHctTest)
 682                         {
 683                                 regBwOpMode = BW_OPMODE_20MHZ;
 684                                 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 685                                 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 686                         }
 687                         else
 688 #endif
 689                         {
 690                                 regBwOpMode = BW_OPMODE_20MHZ;
 691                                 regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
 692                                 regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 693                         }
 694                         break;
 695                 case WIRELESS_MODE_N_24G:
 696                         // It support CCK rate by default.
 697                         // CCK rate will be filtered out only when associated AP does not support it.
 698                         regBwOpMode = BW_OPMODE_20MHZ;
 699                         regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
 700                         regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG;
 701                         break;
 702                 case WIRELESS_MODE_N_5G:
 703 //                      RT_ASSERT(FALSE,("Error wireless mode"));
 704 #if 0
 705                         regBwOpMode = BW_OPMODE_5G;
 706                         regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS;
 707                         regRRSR = RATE_ALL_OFDM_AG;
 708 #endif
 709                         break;
 710
 711                 default: //for MacOSX compiler warning.
 712                         break;
 713         }
 714
 715         rtw_write8(padapter, REG_BWOPMODE, regBwOpMode);
 716
 717         // For Min Spacing configuration.
 718         switch(pHalData->rf_type)
 719         {
 720                 case RF_1T2R:
 721                 case RF_1T1R:
 722                         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializepadapter: RF_Type%s\n", (pHalData->rf_type==RF_1T1R? "(1T1R)":"(1T2R)")));
 723 //                      padapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3);
 724                         MinSpaceCfg = (MAX_MSS_DENSITY_1T << 3);
 725                         break;
 726                 case RF_2T2R:
 727                 case RF_2T2R_GREEN:
 728                         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializepadapter:RF_Type(2T2R)\n"));
 729 //                      padapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3);
 730                         MinSpaceCfg = (MAX_MSS_DENSITY_2T << 3);
 731                         break;
 732         }
 733
 734 //      rtw_write8(padapter, REG_AMPDU_MIN_SPACE, padapter->MgntInfo.MinSpaceCfg);
 735         rtw_write8(padapter, REG_AMPDU_MIN_SPACE, MinSpaceCfg);
 736 }
 737
 738 void _InitInterrupt(PADAPTER padapter)
 739 {
 740         // HISR - turn all off
 741         rtw_write32(padapter, REG_HISR, 0);
 742
 743         // HIMR - turn all off
 744         rtw_write32(padapter, REG_HIMR, 0);
 745
 746         //
 747         // Initialize and enable SDIO Host Interrupt.
 748         //
 749         InitInterrupt8723ASdio(padapter);
 750
 751         //
 752         // Initialize and enable system Host Interrupt.
 753         //
 754         InitSysInterrupt8723ASdio(padapter);
 755
 756         EnableInterrupt8723ASdio(padapter);
 757 }
 758
 759 void _InitRDGSetting(PADAPTER padapter)
 760 {
 761         rtw_write8(padapter, REG_RD_CTRL, 0xFF);
 762         rtw_write16(padapter, REG_RD_NAV_NXT, 0x200);
 763         rtw_write8(padapter, REG_RD_RESP_PKT_TH, 0x05);
 764 }
 765
 766 #if (MP_DRIVER == 1  )
 767 static void _InitRxSetting(PADAPTER padapter)
 768 {
 769         rtw_write32(padapter, REG_MACID, 0x87654321);
 770         rtw_write32(padapter, 0x0700, 0x87654321);
 771 }
 772 #endif
 773
 774 static void _InitRFType(PADAPTER padapter)
 775 {
 776         struct registry_priv *pregpriv = &padapter->registrypriv;
 777         HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
 778         BOOLEAN is92CU = IS_92C_SERIAL(pHalData->VersionID);
 779
 780
 781 #if     DISABLE_BB_RF
 782         pHalData->rf_chip       = RF_PSEUDO_11N;
 783         return;
 784 #endif
 785
 786         pHalData->rf_chip       = RF_6052;
 787
 788         if (_FALSE == is92CU) {
 789                 pHalData->rf_type = RF_1T1R;
 790                 DBG_8192C("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n");
 791                 return;
 792         }
 793
 794         // TODO: Consider that EEPROM set 92CU to 1T1R later.
 795         // Force to overwrite setting according to chip version. Ignore EEPROM setting.
 796         //pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R;
 797         MSG_8192C("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type);
 798 }
 799
 800 // Set CCK and OFDM Block "ON"
 801 static void _BBTurnOnBlock(PADAPTER padapter)
 802 {
 803 #if (DISABLE_BB_RF)
 804         return;
 805 #endif
 806
 807         PHY_SetBBReg(padapter, rFPGA0_RFMOD, bCCKEn, 0x1);
 808         PHY_SetBBReg(padapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
 809 }
 810
 811 static void _RfPowerSave(PADAPTER padapter)
 812 {
 813         PHAL_DATA_TYPE  pHalData;
 814 //      PMGNT_INFO              pMgntInfo;
 815         struct pwrctrl_priv *pwrctrlpriv;
 816         u8                              u1bTmp;
 817         rt_rf_power_state       eRfPowerStateToSet;
 818
 819
 820 #if (DISABLE_BB_RF)
 821         return;
 822 #endif
 823
 824         pHalData = GET_HAL_DATA(padapter);
 825 //      pMgntInfo = &padapter->MgntInfo;
 826         pwrctrlpriv = adapter_to_pwrctl(padapter);
 827
 828         //
 829         // 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status
 830         // and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not
 831         // call init_adapter. May cause some problem??
 832         //
 833         // Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed
 834         // in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState
 835         // is the same as eRfOff, we should change it to eRfOn after we config RF parameters.
 836         // Added by tynli. 2010.03.30.
 837         pwrctrlpriv->rf_pwrstate = rf_on;
 838         RT_CLEAR_PS_LEVEL(pwrctrlpriv, RT_RF_OFF_LEVL_HALT_NIC);
 839         //Added by chiyokolin, 2011.10.12 for Tx
 840         rtw_write8(padapter, REG_TXPAUSE, 0x00);
 841
 842         // 20100326 Joseph: Copy from GPIOChangeRFWorkItemCallBack() function to check HW radio on/off.
 843         // 20100329 Joseph: Revise and integrate the HW/SW radio off code in initialization.
 844 #if 1
 845         pwrctrlpriv->b_hw_radio_off = _FALSE;
 846         eRfPowerStateToSet = rf_on;
 847 #else
 848         eRfPowerStateToSet = (rt_rf_power_state)RfOnOffDetect(padapter);
 849         pMgntInfo->RfOffReason |= eRfPowerStateToSet==rf_on ? RF_CHANGE_BY_INIT : RF_CHANGE_BY_HW;
 850         pMgntInfo->RfOffReason |= (pMgntInfo->RegRfOff) ? RF_CHANGE_BY_SW : 0;
 851
 852         if (pMgntInfo->RfOffReason & RF_CHANGE_BY_HW)
 853                 pHalData->bHwRadioOff = _TRUE;
 854
 855         if (pMgntInfo->RegRfOff == _TRUE)
 856         { // User disable RF via registry.
 857                 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("%s: Turn off RF for RegRfOff\n", __FUNCTION__));
 858                 MgntActSet_RF_State(padapter, rf_off, RF_CHANGE_BY_SW, _TRUE);
 859
 860                 if (padapter->bSlaveOfDMSP)
 861                         return;
 862
 863                 // Those action will be discard in MgntActSet_RF_State because off the same state
 864 //              for (eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
 865 //                      PHY_SetRFReg(padapter, (RF_RADIO_PATH_E)eRFPath, RF_BS_PA_APSET_G5_G8, 0xC00, 0x0);
 866         }
 867         else if (pMgntInfo->RfOffReason > RF_CHANGE_BY_PS)
 868         { // H/W or S/W RF OFF before sleep.
 869                 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("%s: Turn off RF for RfOffReason(%x)\n", __FUNCTION__, pMgntInfo->RfOffReason));
 870
 871                 // Selective suspend mode Resume from S3/S4 CU need to enable RF and turn off again.
 872                 //MgntActSet_RF_State(padapter, rf_on, pMgntInfo->RfOffReason, _TRUE);
 873                 pHalData->eRFPowerState = rf_on;
 874                 MgntActSet_RF_State(padapter, rf_off, pMgntInfo->RfOffReason, _TRUE);
 875
 876                 // Those action will be discard in MgntActSet_RF_State because off the same state
 877 //              for (eRFPath = 0; eRFPath <pHalData->NumTotalRFPath; eRFPath++)
 878 //                      PHY_SetRFReg(padapter, (RF_RADIO_PATH_E)eRFPath, RF_BS_PA_APSET_G5_G8, 0xC00, 0x0);
 879         }
 880         else
 881         {
 882                 // Perform GPIO polling to find out current RF state. added by Roger, 2010.04.09.
 883                 if( RT_GetInterfaceSelection(padapter)==INTF_SEL2_MINICARD &&
 884                         (padapter->MgntInfo.PowerSaveControl.bGpioRfSw))
 885                 {
 886                         RT_TRACE(_module_hci_hal_init_c_, _drv_notice_ ("%s: RF=%d \n", __FUNCTION__, eRfPowerStateToSet));
 887                         if (eRfPowerStateToSet == rf_off)
 888                         {
 889                                 MgntActSet_RF_State(padapter, rf_off, RF_CHANGE_BY_HW, _TRUE);
 890                                 pHalData->bHwRadioOff = _TRUE;
 891                         }
 892                         else
 893                         {
 894                                 pHalData->eRFPowerState = rf_off;
 895                                 pMgntInfo->RfOffReason = RF_CHANGE_BY_INIT;
 896                                 pHalData->bHwRadioOff = _FALSE;
 897                                 MgntActSet_RF_State(padapter, rf_on, pMgntInfo->RfOffReason, _TRUE);
 898                                 //DrvIFIndicateCurrentPhyStatus(padapter);
 899                         }
 900                 }
 901                 else
 902                 {
 903                         pHalData->eRFPowerState = rf_off;
 904                         pMgntInfo->RfOffReason = RF_CHANGE_BY_INIT;
 905                         MgntActSet_RF_State(padapter, rf_on, pMgntInfo->RfOffReason, _TRUE);
 906                         //DrvIFIndicateCurrentPhyStatus(padapter);
 907                 }
 908
 909                 pMgntInfo->RfOffReason = 0;
 910                 pHalData->bHwRadioOff = _FALSE;
 911                 pHalData->eRFPowerState = rf_on;
 912                 padapter->HalFunc.LedControlHandler(padapter, LED_CTL_POWER_ON);
 913         }
 914 #endif
 915         // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c.
 916         // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1.
 917         if (pHalData->pwrdown && eRfPowerStateToSet == rf_off)
 918         {
 919                 // Enable register area 0x0-0xc.
 920                 rtw_write8(padapter, REG_RSV_CTRL, 0x0);
 921
 922                 //
 923                 // <Roger_Notes> We should configure HW PDn source for WiFi ONLY, and then
 924                 // our HW will be set in power-down mode if PDn source from all  functions are configured.
 925                 // 2010.10.06.
 926                 //
 927                 if (IS_HARDWARE_TYPE_8723AS(padapter))
 928                 {
 929                         u1bTmp = rtw_read8(padapter, REG_MULTI_FUNC_CTRL);
 930                         u1bTmp |= WL_HWPDN_EN;
 931                         rtw_write8(padapter, REG_MULTI_FUNC_CTRL, u1bTmp);
 932                 }
 933                 else
 934                 {
 935                         rtw_write16(padapter, REG_APS_FSMCO, 0x8812);
 936                 }
 937         }
 938         //DrvIFIndicateCurrentPhyStatus(padapter);
 939 }
 940
 941 static void _InitAntenna_Selection(PADAPTER padapter)
 942 {
 943         rtw_write8(padapter, REG_LEDCFG2, 0x82);
 944 }
 945
 946 static void _InitPABias(PADAPTER padapter)
 947 {
 948         HAL_DATA_TYPE           *pHalData = GET_HAL_DATA(padapter);
 949         u8                      pa_setting;
 950         BOOLEAN         is92C = IS_92C_SERIAL(pHalData->VersionID);
 951
 952         //FIXED PA current issue
 953         //efuse_one_byte_read(padapter, 0x1FA, &pa_setting);
 954         pa_setting = EFUSE_Read1Byte(padapter, 0x1FA);
 955
 956         //RT_TRACE(COMP_INIT, DBG_LOUD, ("_InitPABias 0x1FA 0x%x \n",pa_setting));
 957
 958         if(!(pa_setting & BIT0))
 959         {
 960                 PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x0F406);
 961                 PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x4F406);
 962                 PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0x8F406);
 963                 PHY_SetRFReg(padapter, RF_PATH_A, 0x15, 0x0FFFFF, 0xCF406);
 964                 //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path A\n"));
 965         }
 966
 967         if(!(pa_setting & BIT1) && is92C)
 968         {
 969                 PHY_SetRFReg(padapter, RF_PATH_B, 0x15, 0x0FFFFF, 0x0F406);
 970                 PHY_SetRFReg(padapter, RF_PATH_B, 0x15, 0x0FFFFF, 0x4F406);
 971                 PHY_SetRFReg(padapter, RF_PATH_B, 0x15, 0x0FFFFF, 0x8F406);
 972                 PHY_SetRFReg(padapter, RF_PATH_B, 0x15, 0x0FFFFF, 0xCF406);
 973                 //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path B\n"));
 974         }
 975
 976         if(!(pa_setting & BIT4))
 977         {
 978                 pa_setting = rtw_read8(padapter, 0x16);
 979                 pa_setting &= 0x0F;
 980                 rtw_write8(padapter, 0x16, pa_setting | 0x80);
 981                 rtw_write8(padapter, 0x16, pa_setting | 0x90);
 982         }
 983 }
 984
 985 //
 986 // 2010/08/09 MH Add for power down check.
 987 //
 988 static BOOLEAN HalDetectPwrDownMode(PADAPTER Adapter)
 989 {
 990         u8 tmpvalue;
 991         HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
 992         struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter);
 993
 994
 995         EFUSE_ShadowRead(Adapter, 1, 0x7B/*EEPROM_RF_OPT3_92C*/, (u32 *)&tmpvalue);
 996
 997         // 2010/08/25 MH INF priority > PDN Efuse value.
 998         if(tmpvalue & BIT4 && pwrctrlpriv->reg_pdnmode)
 999         {
1000                 pHalData->pwrdown = _TRUE;
1001         }
1002         else
1003         {
1004                 pHalData->pwrdown = _FALSE;
1005         }
1006
1007         DBG_8192C("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown);
1008
1009         return pHalData->pwrdown;
1010 }       // HalDetectPwrDownMode
1011
1012 static u32 rtl8723as_hal_init(PADAPTER padapter)
1013 {
1014         s32 ret;
1015         u32 boundary;
1016         PHAL_DATA_TYPE pHalData;
1017         struct pwrctrl_priv *pwrctrlpriv;
1018         struct registry_priv *pregistrypriv;
1019         u8 is92C;
1020         rt_rf_power_state eRfPowerStateToSet;
1021         u32 NavUpper = WiFiNavUpperUs;
1022         u8 u1bTmp;
1023         u16 value16;
1024
1025
1026         pHalData = GET_HAL_DATA(padapter);
1027         pwrctrlpriv = adapter_to_pwrctl(padapter);
1028         pregistrypriv = &padapter->registrypriv;
1029         is92C = IS_92C_SERIAL(pHalData->VersionID);
1030
1031         // Disable Interrupt first.
1032 //      rtw_hal_disable_interrupt(padapter);
1033
1034         ret = _InitPowerOn(padapter);
1035         if (_FAIL == ret) {
1036                 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init Power On!\n"));
1037                 return _FAIL;
1038         }
1039
1040         ret = PowerOnCheck(padapter);
1041         if (_FAIL == ret ) {
1042                 DBG_871X("Power on Fail! do it again\n");
1043                 ret = _InitPowerOn(padapter);
1044                 if (_FAIL == ret) {
1045                         DBG_871X("Failed to init Power On!\n");
1046                         return _FAIL;
1047                 }
1048         }
1049         DBG_871X("Power on ok!\n");
1050
1051
1052 //      padapter->HalFunc.HalRxAggrHandler(padapter, _TRUE);
1053
1054 #ifdef CONFIG_BT_COEXIST
1055         //
1056         // 2010/09/23 MH Accordgin to Alfred's siggestion. we need to enable SIC to prevent HW
1057         // to enter suspend mode automatically. If host does not send SOF every 3ms. Or under DTM
1058         // test with rtl8188cu selective suspend enabler filter driver, WIN host will trigger the device to
1059         // enter suspend mode after some test (unknow reason now). We need to prevent the case otherwise
1060         // the register will be 0xea and all TX/RX path stop accidently.
1061         //
1062         //
1063         // 2010/10/01 MH If the OS is XP, host will trigger USB device to enter D3 mode. In CU HW design
1064         // it will enter suspend mode automatically. In slim combo card, the BT clock will be cut off if HW
1065         // enter suspend mode. We need to seperate differet case.
1066         //
1067         if (HALBT_IsBTExist(padapter))
1068         {
1069 #if 0
1070 #if OS_WIN_FROM_VISTA(OS_VERSION)
1071                 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("Slim_combo win7/vista need not enable SIC\n"));
1072 #else
1073                 RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, ("Slim_combo XP enable SIC\n"));
1074                 // 2010/10/15 MH According to Alfre's description, e need to enable bit14 at first an then enable bit12.
1075                 // Otherwise, HW will enter debug mode and 8051 can not work. We need to stay at test mode to enable SIC.
1076                 rtw_write16(padapter, REG_GPIO_MUXCFG, rtw_read16(padapter, REG_GPIO_MUXCFG)|BIT14);
1077                 rtw_write16(padapter, REG_GPIO_MUXCFG, rtw_read16(padapter, REG_GPIO_MUXCFG)|BIT12);
1078 #endif
1079 #endif
1080         }
1081 #endif
1082
1083         if (!pregistrypriv->wifi_spec) {
1084                 boundary = TX_PAGE_BOUNDARY;
1085         } else {
1086                 boundary = WMM_NORMAL_TX_PAGE_BOUNDARY; // for WMM
1087         }
1088         ret = InitLLTTable(padapter, boundary);
1089         if (_SUCCESS != ret) {
1090                 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT Table!\n"));
1091                 return _FAIL;
1092         }
1093
1094 #if 0
1095         if(pHTInfo->bRDGEnable){
1096                 _InitRDGSetting(Adapter);
1097         }
1098
1099         if (pHalData->bEarlyModeEnable)
1100         {
1101                 RT_TRACE(_module_hci_hal_init_c_, _drv_info_,("EarlyMode Enabled!!!\n"));
1102
1103                 u1bTmp = rtw_read8(padapter, REG_EARLY_MODE_CONTROL);
1104                 u1bTmp |= 0xf;
1105                 rtw_write8(padapter, REG_EARLY_MODE_CONTROL, u1bTmp);
1106
1107                 rtw_write8(padapter, REG_EARLY_MODE_CONTROL+3, 0x80);
1108
1109                 u1bTmp = rtw_read8(padapter, REG_TCR+1);
1110                 u1bTmp |= 0x40;
1111                 rtw_write8(padapter,REG_TCR+1, u1bTmp);
1112         }
1113         else
1114 #endif
1115                 //rtw_write8(padapter, REG_EARLY_MODE_CONTROL, 0);
1116
1117 #if (MP_DRIVER == 1)
1118         if (padapter->registrypriv.mp_mode == 1)
1119         {
1120                 _InitRxSetting(padapter);
1121         //RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("%s: Don't Download Firmware!!\n", __FUNCTION__));
1122         //padapter->bFWReady = _FALSE;
1123         }
1124 //      else
1125 #endif
1126         {
1127         ret = rtl8723a_FirmwareDownload(padapter);
1128         if (ret != _SUCCESS) {
1129                 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("%s: Download Firmware failed!!\n", __FUNCTION__));
1130                 padapter->bFWReady = _FALSE;
1131                 pHalData->fw_ractrl = _FALSE;
1132                 return ret;
1133         } else {
1134                 RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializepadapter8192CSdio(): Download Firmware Success!!\n"));
1135                 padapter->bFWReady = _TRUE;
1136                 pHalData->fw_ractrl = _TRUE;
1137         }
1138         }
1139
1140         rtl8723a_InitializeFirmwareVars(padapter);
1141
1142 //      SIC_Init(padapter);
1143
1144         if (pwrctrlpriv->reg_rfoff == _TRUE) {
1145                 pwrctrlpriv->rf_pwrstate = rf_off;
1146         }
1147
1148         // 2010/08/09 MH We need to check if we need to turnon or off RF after detecting
1149         // HW GPIO pin. Before PHY_RFConfig8192C.
1150         HalDetectPwrDownMode(padapter);
1151
1152
1153         // Set RF type for BB/RF configuration
1154         _InitRFType(padapter);
1155
1156         // Save target channel
1157         // <Roger_Notes> Current Channel will be updated again later.
1158         pHalData->CurrentChannel = 6;
1159
1160 #if (HAL_MAC_ENABLE == 1)
1161         ret = PHY_MACConfig8723A(padapter);
1162         if(ret != _SUCCESS){
1163 //              RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializepadapter8192CSdio(): Fail to configure MAC!!\n"));
1164                 return ret;
1165         }
1166 #endif
1167         //
1168         //d. Initialize BB related configurations.
1169         //
1170 #if (HAL_BB_ENABLE == 1)
1171         ret = PHY_BBConfig8723A(padapter);
1172         if(ret != _SUCCESS){
1173 //              RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Initializepadapter8192CSdio(): Fail to configure BB!!\n"));
1174                 return ret;
1175         }
1176 #endif
1177         // If RF is on, we need to init RF. Otherwise, skip the procedure.
1178         // We need to follow SU method to change the RF cfg.txt. Default disable RF TX/RX mode.
1179         //if(pHalData->eRFPowerState == eRfOn)
1180         {
1181 #if (HAL_RF_ENABLE == 1)
1182                 ret = PHY_RFConfig8723A(padapter);
1183
1184                 if(ret != _SUCCESS){
1185 //                      RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializepadapter8192CSdio(): Fail to configure RF!!\n"));
1186                         return ret;
1187                 }
1188
1189         if (IS_81xxC_VENDOR_UMC_A_CUT(pHalData->VersionID) && !IS_92C_SERIAL(pHalData->VersionID))
1190         {
1191                 PHY_SetRFReg(padapter, RF_PATH_A, RF_RX_G1, bMaskDWord, 0x30255);
1192                 PHY_SetRFReg(padapter, RF_PATH_A, RF_RX_G2, bMaskDWord, 0x50a00);
1193         }
1194
1195 #endif
1196         }
1197         //
1198         // Joseph Note: Keep RfRegChnlVal for later use.
1199         //
1200         pHalData->RfRegChnlVal[0] = PHY_QueryRFReg(padapter, (RF_RADIO_PATH_E)0, RF_CHNLBW, bRFRegOffsetMask);
1201         pHalData->RfRegChnlVal[1] = PHY_QueryRFReg(padapter, (RF_RADIO_PATH_E)1, RF_CHNLBW, bRFRegOffsetMask);
1202
1203         if (!pHalData->bMACFuncEnable) {
1204                 _InitQueueReservedPage(padapter);
1205                 _InitTxBufferBoundary(padapter);
1206         }
1207         _InitQueuePriority(padapter);
1208         _InitPageBoundary(padapter);
1209         _InitTransferPageSize(padapter);
1210
1211         // Get Rx PHY status in order to report RSSI and others.
1212         _InitDriverInfoSize(padapter, DRVINFO_SZ);
1213         hal_init_macaddr(padapter);
1214         _InitNetworkType(padapter);
1215         _InitWMACSetting(padapter);
1216         _InitAdaptiveCtrl(padapter);
1217         _InitEDCA(padapter);
1218         _InitRateFallback(padapter);
1219         _InitRetryFunction(padapter);
1220         _initSdioAggregationSetting(padapter);
1221         _InitOperationMode(padapter);
1222         rtl8723a_InitBeaconParameters(padapter);
1223         rtl8723a_InitBeaconMaxError(padapter, _TRUE);
1224         _InitInterrupt(padapter);
1225
1226 #if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI)
1227
1228 #ifdef CONFIG_CHECK_AC_LIFETIME
1229         // Enable lifetime check for the four ACs
1230         rtw_write8(padapter, REG_LIFETIME_EN, 0x0F);
1231 #endif  // CONFIG_CHECK_AC_LIFETIME
1232
1233 #ifdef CONFIG_TX_MCAST2UNI
1234         rtw_write16(padapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); // unit: 256us. 256ms
1235         rtw_write16(padapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); // unit: 256us. 256ms
1236 #else   // CONFIG_TX_MCAST2UNI
1237         rtw_write16(padapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000); // unit: 256us. 3s
1238         rtw_write16(padapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000); // unit: 256us. 3s
1239 #endif  // CONFIG_TX_MCAST2UNI
1240 #endif  // CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI
1241
1242
1243
1244         // The FW command register update must after MAC and FW init ready.
1245 #if 0
1246         if (padapter->bFWReady == TRUE)
1247         {
1248                 if(pDevice->RegUsbSS)
1249                 {
1250                         H2C_SS_RFOFF_PARAM param;
1251                         param.gpio_period = 500;
1252                         param.ROFOn = 1;
1253                         FillH2CCmd92C(padapter, H2C_SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (pu8)(&param));
1254                         RT_TRACE(COMP_INIT, DBG_LOUD,
1255                         ("SS Set H2C_CMD for FW detect GPIO time=%d\n", param.gpio_period));
1256                 }
1257                 else
1258                         RT_TRACE(COMP_INIT, DBG_LOUD, ("Non-SS Driver detect GPIO by itself\n"));
1259         }
1260         else
1261         {
1262                 RT_TRACE(COMP_INIT, DBG_LOUD, ("padapter->bFWReady == FALSE\n"));
1263         }
1264 #endif
1265
1266         _BBTurnOnBlock(padapter);
1267 #if 0
1268 #if RT_PLATFORM == PLATFORM_WINDOWS
1269         if(PlatformIsOverrideAddress(padapter))
1270                 NicIFSetMacAddress(padapter, PlatformGetOverrideAddress(padapter));
1271         else
1272 #endif
1273                 NicIFSetMacAddress(padapter, padapter->PermanentAddress);
1274
1275         if(padapter->ResetProgress == RESET_TYPE_NORESET){
1276                 RT_TRACE(COMP_MLME, DBG_LOUD, ("Initializepadapter8192CSdio():RegWirelessMode(%#x) \n", padapter->RegWirelessMode));
1277                 padapter->HalFunc.SetWirelessModeHandler(padapter, padapter->RegWirelessMode);
1278         }
1279 #endif
1280
1281 #if 1
1282         invalidate_cam_all(padapter);
1283 #else
1284         CamResetAllEntry(padapter);
1285         padapter->HalFunc.EnableHWSecCfgHandler(padapter);
1286 #endif
1287
1288         // 2010/12/17 MH We need to set TX power according to EFUSE content at first.
1289         PHY_SetTxPowerLevel8192C(padapter, pHalData->CurrentChannel);
1290         // Record original value for template. This is arough data, we can only use the data
1291         // for power adjust. The value can not be adjustde according to different power!!!
1292 //      pHalData->OriginalCckTxPwrIdx = pHalData->CurrentCckTxPwrIdx;
1293 //      pHalData->OriginalOfdm24GTxPwrIdx = pHalData->CurrentOfdm24GTxPwrIdx;
1294
1295 // Move by Neo for USB SS to below setp
1296 //_RfPowerSave(padapter);
1297
1298         rtl8723a_InitAntenna_Selection(padapter);
1299
1300         //
1301         // Disable BAR, suggested by Scott
1302         // 2010.04.09 add by hpfan
1303         //
1304         rtw_write32(padapter, REG_BAR_MODE_CTRL, 0x0201ffff);
1305
1306         // HW SEQ CTRL
1307         // set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM.
1308         rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF);
1309
1310
1311 #ifdef CONFIG_MAC_LOOPBACK_DRIVER
1312         u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN);
1313         u1bTmp &= ~(FEN_BBRSTB|FEN_BB_GLB_RSTn);
1314         rtw_write8(padapter, REG_SYS_FUNC_EN,u1bTmp);
1315
1316         rtw_write8(padapter, REG_RD_CTRL, 0x0F);
1317         rtw_write8(padapter, REG_RD_CTRL+1, 0xCF);
1318         rtw_write8(padapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, 0x80);
1319         rtw_write32(padapter, REG_CR, 0x0b0202ff);
1320 #endif
1321
1322         //
1323         // Configure SDIO TxRx Control to enable Rx DMA timer masking.
1324         // 2010.02.24.
1325         //
1326         SdioLocalCmd52Write1Byte(padapter, SDIO_REG_TX_CTRL, 0);
1327
1328         _RfPowerSave(padapter);
1329
1330 //      RT_TRACE(COMP_INIT|COMP_MLME, DBG_LOUD, ("HighestOperaRate = %x\n", padapter->MgntInfo.HighestOperaRate));
1331 #if 0
1332 #if (0 == RTL8192SU_FPGA_UNSPECIFIED_NETWORK)
1333         PlatformStartWorkItem( &(pHalData->RtUsbCheckForHangWorkItem) );
1334 #endif
1335
1336 #if SILENT_RESET
1337         PlatformStartWorkItem( &(pHalData->RtUsbCheckResetWorkItem) );
1338 #endif
1339 #endif
1340 #if (MP_DRIVER == 1)
1341         if (padapter->registrypriv.mp_mode == 1)
1342         {
1343                 padapter->mppriv.channel = pHalData->CurrentChannel;
1344                 MPT_InitializeAdapter(padapter, padapter->mppriv.channel);
1345         }
1346 //      else
1347 #endif //#if (MP_DRIVER == 1)
1348         {
1349         // 2010/08/26 MH Merge from 8192CE.
1350         if (pwrctrlpriv->rf_pwrstate == rf_on)
1351         {
1352                 if (pHalData->bIQKInitialized)
1353 //                      PHY_IQCalibrate(padapter, _TRUE);
1354                         rtl8192c_PHY_IQCalibrate(padapter,_TRUE);
1355                 else
1356                 {
1357 //                      PHY_IQCalibrate(padapter, _FALSE);
1358                         rtl8192c_PHY_IQCalibrate(padapter,_FALSE);
1359                         pHalData->bIQKInitialized = _TRUE;
1360                 }
1361
1362 //              dm_CheckTXPowerTracking(padapter);
1363 //              PHY_LCCalibrate(padapter);
1364                 rtl8192c_odm_CheckTXPowerTracking(padapter);
1365                 rtl8192c_PHY_LCCalibrate(padapter);
1366
1367 #ifdef CONFIG_BT_COEXIST
1368                 rtl8723a_SingleDualAntennaDetection(padapter);
1369 #endif
1370         }
1371         }
1372
1373 #if 0
1374         //if(pHalData->eRFPowerState == eRfOn)
1375         {
1376                 _InitPABias(padapter);
1377         }
1378 #endif
1379
1380 #ifdef CONFIG_BT_COEXIST
1381         // Init BT hw config.
1382         HALBT_InitHwConfig(padapter);
1383 #endif
1384
1385 //      InitHalDm(padapter);
1386         rtl8723a_InitHalDm(padapter);
1387
1388         // 2010/05/20 MH We need to init timer after update setting. Otherwise, we can not get correct inf setting.
1389         // 2010/05/18 MH For SE series only now. Init GPIO detect time
1390 #if 0
1391         if (pDevice->RegUsbSS)
1392         {
1393                 RT_TRACE(COMP_INIT, DBG_LOUD, (" call GpioDetectTimerStart\n"));
1394                 GpioDetectTimerStart(padapter); // Disable temporarily
1395         }
1396 #endif
1397
1398         //DbgPrint("pHalData->DefaultTxPwrDbm = %d\n", pHalData->DefaultTxPwrDbm);
1399
1400 //      if(pHalData->SwBeaconType < HAL92CSDIO_DEFAULT_BEACON_TYPE) // The lowest Beacon Type that HW can support
1401 //              pHalData->SwBeaconType = HAL92CSDIO_DEFAULT_BEACON_TYPE;
1402
1403         //
1404         // Update current Tx FIFO page status.
1405         //
1406         HalQueryTxBufferStatus8723ASdio(padapter);
1407
1408         // Enable MACTXEN/MACRXEN block
1409         u1bTmp = rtw_read8(padapter, REG_CR);
1410         u1bTmp |= (MACTXEN | MACRXEN);
1411         rtw_write8(padapter, REG_CR, u1bTmp);
1412
1413         rtw_hal_set_hwreg(padapter, HW_VAR_NAV_UPPER, (u8*)&NavUpper);
1414
1415 //      pHalData->PreRpwmVal = SdioLocalCmd52Read1Byte(padapter, SDIO_REG_HRPWM1) & 0x80;
1416
1417 #ifdef CONFIG_XMIT_ACK
1418         //ack for xmit mgmt frames.
1419         rtw_write32(padapter, REG_FWHW_TXQ_CTRL, rtw_read32(padapter, REG_FWHW_TXQ_CTRL)|BIT(12));
1420 #endif //CONFIG_XMIT_ACK
1421
1422
1423         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("-%s\n", __FUNCTION__));
1424
1425         return _SUCCESS;
1426 }
1427 #if 0
1428 static void rtl8723as_hw_power_down(PADAPTER padapter)
1429 {
1430         // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c.
1431         // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1.
1432
1433         // Enable register area 0x0-0xc.
1434         rtw_write8(padapter,REG_RSV_CTRL, 0x0);
1435         rtw_write16(padapter, REG_APS_FSMCO, 0x8812);
1436 }
1437
1438 //
1439 // Description: RTL8723e card disable power sequence v003 which suggested by Scott.
1440 // First created by tynli. 2011.01.28.
1441 //
1442 static void PowerDownRTL8723ASdio(PADAPTER padapter)
1443 {
1444         u8 v8;
1445         u32 retry;
1446
1447         rtw_write8(padapter, REG_RF_CTRL, 0);
1448
1449         v8 = rtw_read8(padapter, REG_LEDCFG2);
1450         v8 &= ~BIT(7);
1451         rtw_write8(padapter, REG_LEDCFG2, v8);
1452
1453         v8 = rtw_read8(padapter, REG_APS_FSMCO+1);
1454         v8 |= BIT(1);
1455         rtw_write8(padapter, REG_APS_FSMCO+1, v8);
1456
1457         retry = 0;
1458         do {
1459                 v8 = rtw_read8(padapter, REG_APS_FSMCO+1);
1460                 if (!(v8 & BIT(1))) break;
1461                 retry++;
1462                 if (retry == 1000) break;
1463         } while (1);
1464         if (retry == 1000)
1465                 DBG_8192C(KERN_ERR "%s: can't wait REG_APS_FSMCO BIT9 to 0! (0x%02x)\n", __func__, v8);
1466
1467         v8 = rtw_read8(padapter, REG_APS_FSMCO+2);
1468         v8 &= ~BIT(0);
1469         rtw_write8(padapter, REG_APS_FSMCO+2, v8);
1470
1471         v8 = rtw_read8(padapter, REG_APS_FSMCO+1);
1472         v8 |= BIT(7);
1473         rtw_write8(padapter, REG_APS_FSMCO+1, v8);
1474 }
1475
1476 //
1477 // Description: RTL8723e card disable power sequence v003 which suggested by Scott.
1478 // First created by tynli. 2011.01.28.
1479 //
1480 static void LPSRadioOffRTL8723ASdio(PADAPTER padapter)
1481 {
1482         u8      u1bTmp;
1483         u32 v32;
1484         u32 retry;
1485
1486         // 1. 0x522[7:0] = 0xFF // TX pause
1487         rtw_write8(padapter, REG_TXPAUSE, 0x7F);
1488
1489         retry = 0;
1490         v32 = 0;
1491         do {
1492                 v32 = rtw_read32(padapter, 0x5F8);
1493                 if (v32 == 0) break;
1494                 retry++;
1495                 if (retry == 1000) break;
1496         } while (1);
1497         if (retry == 1000)
1498                 DBG_8192C(KERN_ERR "%s: polling 0x5F8 to 0 fail! (0x%08x)\n", __func__, v32);
1499
1500         // 2. 0x02[1:0] = 2b'10 // Reset BB TRX
1501         u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN);
1502         u1bTmp &= ~BIT0;
1503         rtw_write8(padapter, REG_SYS_FUNC_EN, u1bTmp);
1504
1505         rtw_udelay_os(2);
1506
1507         u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN);
1508         u1bTmp &= ~BIT1;
1509         rtw_write8(padapter, REG_SYS_FUNC_EN, u1bTmp);
1510
1511         // 3. 0x100[7:0] = 0x3F // Reset MAC TRX
1512         rtw_write8(padapter, REG_CR, 0x3F);
1513
1514         // 4. 0x101[1] = 0              // check if removed later
1515         u1bTmp = rtw_read8(padapter, REG_CR+1);
1516         rtw_write8(padapter, REG_CR+1, u1bTmp&(~BIT1));
1517
1518         // 5. 0x553[5] = 1              // respond TX ok to scheduler
1519         u1bTmp = rtw_read8(padapter,  REG_DUAL_TSF_RST);
1520         rtw_write8(padapter, REG_DUAL_TSF_RST, (u1bTmp|BIT5));
1521 }
1522 #endif
1523 //
1524 // Description:
1525 //      RTL8723e card disable power sequence v003 which suggested by Scott.
1526 //
1527 // First created by tynli. 2011.01.28.
1528 //
1529 static void CardDisableRTL8723ASdio(PADAPTER padapter)
1530 {
1531         u8              u1bTmp;
1532         u16             u2bTmp;
1533         u32             u4bTmp;
1534         u8              bMacPwrCtrlOn;
1535         u8              ret;
1536
1537
1538         // Run LPS WL RFOFF flow
1539         ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8723A_enter_lps_flow);
1540         if (ret == _FALSE) {
1541                 DBG_8192C(KERN_ERR "%s: run RF OFF flow fail!\n", __func__);
1542         }
1543
1544         //      ==== Reset digital sequence   ======
1545
1546         u1bTmp = rtw_read8(padapter, REG_MCUFWDL);
1547         if ((u1bTmp & RAM_DL_SEL) && padapter->bFWReady) //8051 RAM code
1548                 rtl8723a_FirmwareSelfReset(padapter);
1549
1550         // Reset MCU 0x2[10]=0. Suggested by Filen. 2011.01.26. by tynli.
1551         u1bTmp = rtw_read8(padapter, REG_SYS_FUNC_EN+1);
1552         u1bTmp &= ~BIT(2);      // 0x2[10], FEN_CPUEN
1553         rtw_write8(padapter, REG_SYS_FUNC_EN+1, u1bTmp);
1554
1555         // MCUFWDL 0x80[1:0]=0
1556         // reset MCU ready status
1557         rtw_write8(padapter, REG_MCUFWDL, 0);
1558
1559         //      ==== Reset digital sequence end ======
1560
1561         // Power down.
1562         bMacPwrCtrlOn = _FALSE; // Disable CMD53 R/W
1563         rtw_hal_set_hwreg(padapter, HW_VAR_APFM_ON_MAC, &bMacPwrCtrlOn);
1564         ret = HalPwrSeqCmdParsing(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, rtl8723A_card_disable_flow);
1565         if (ret == _FALSE) {
1566                 DBG_8192C(KERN_ERR "%s: run CARD DISABLE flow fail!\n", __func__);
1567         }
1568
1569         // Reset MCU IO Wrapper, added by Roger, 2011.08.30
1570         u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1);
1571         u1bTmp &= ~BIT(0);
1572         rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp);
1573         u1bTmp = rtw_read8(padapter, REG_RSV_CTRL+1);
1574         u1bTmp |= BIT(0);
1575         rtw_write8(padapter, REG_RSV_CTRL+1, u1bTmp);
1576
1577         // RSV_CTRL 0x1C[7:0]=0x0E
1578         // lock ISO/CLK/Power control register
1579         rtw_write8(padapter, REG_RSV_CTRL, 0x0E);
1580 }
1581
1582 static u32 rtl8723as_hal_deinit(PADAPTER padapter)
1583 {
1584 #ifdef CONFIG_MP_INCLUDED
1585         if (padapter->registrypriv.mp_mode == 1)
1586                 MPT_DeInitAdapter(padapter);
1587 #endif
1588
1589 #ifdef CONFIG_BT_COEXIST
1590         BT_HaltProcess(padapter);
1591 #endif
1592
1593         if (padapter->hw_init_completed == _TRUE)
1594                 CardDisableRTL8723ASdio(padapter);
1595
1596         return _SUCCESS;
1597 }
1598
1599 static u32 rtl8723as_inirp_init(PADAPTER padapter)
1600 {
1601         u32 status;
1602
1603 _func_enter_;
1604
1605         status = _SUCCESS;
1606
1607 _func_exit_;
1608
1609         return status;
1610 }
1611
1612 static u32 rtl8723as_inirp_deinit(PADAPTER padapter)
1613 {
1614         RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("+rtl8723as_inirp_deinit\n"));
1615
1616         RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("-rtl8723as_inirp_deinit\n"));
1617
1618         return _SUCCESS;
1619 }
1620
1621 static void rtl8723as_init_default_value(PADAPTER padapter)
1622 {
1623         PHAL_DATA_TYPE pHalData;
1624
1625
1626         pHalData = GET_HAL_DATA(padapter);
1627
1628         rtl8723a_init_default_value(padapter);
1629
1630         // interface related variable
1631         pHalData->SdioRxFIFOCnt = 0;
1632 }
1633
1634 static void rtl8723as_interface_configure(PADAPTER padapter)
1635 {
1636         HAL_DATA_TYPE           *pHalData = GET_HAL_DATA(padapter);
1637         struct dvobj_priv               *pdvobjpriv = adapter_to_dvobj(padapter);
1638         struct registry_priv    *pregistrypriv = &padapter->registrypriv;
1639         BOOLEAN         bWiFiConfig     = pregistrypriv->wifi_spec;
1640
1641
1642         pdvobjpriv->RtOutPipe[0] = WLAN_TX_HIQ_DEVICE_ID;
1643         pdvobjpriv->RtOutPipe[1] = WLAN_TX_MIQ_DEVICE_ID;
1644         pdvobjpriv->RtOutPipe[2] = WLAN_TX_LOQ_DEVICE_ID;
1645
1646         pHalData->OutEpNumber = SDIO_MAX_TX_QUEUE;
1647
1648         switch(pHalData->OutEpNumber){
1649                 case 3:
1650                         pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_LQ|TX_SELE_NQ;
1651                         break;
1652                 case 2:
1653                         pHalData->OutEpQueueSel=TX_SELE_HQ| TX_SELE_NQ;
1654                         break;
1655                 case 1:
1656                         pHalData->OutEpQueueSel=TX_SELE_HQ;
1657                         break;
1658                 default:
1659                         break;
1660         }
1661
1662         Hal_MappingOutPipe(padapter, pHalData->OutEpNumber);
1663 }
1664
1665 //
1666 //      Description:
1667 //              We should set Efuse cell selection to WiFi cell in default.
1668 //
1669 //      Assumption:
1670 //              PASSIVE_LEVEL
1671 //
1672 //      Added by Roger, 2010.11.23.
1673 //
1674 static void
1675 _EfuseCellSel(
1676         IN      PADAPTER        padapter
1677         )
1678 {
1679         //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
1680
1681         u32                     value32;
1682
1683         //if(INCLUDE_MULTI_FUNC_BT(padapter))
1684         {
1685                 value32 = rtw_read32(padapter, EFUSE_TEST);
1686                 value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
1687                 rtw_write32(padapter, EFUSE_TEST, value32);
1688         }
1689 }
1690
1691 static VOID
1692 _ReadRFType(
1693         IN      PADAPTER        Adapter
1694         )
1695 {
1696         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
1697
1698 #if DISABLE_BB_RF
1699         pHalData->rf_chip = RF_PSEUDO_11N;
1700 #else
1701         pHalData->rf_chip = RF_6052;
1702 #endif
1703 }
1704
1705 static void
1706 Hal_EfuseParsePIDVID_8723AS(
1707         IN      PADAPTER                pAdapter,
1708         IN      u8*                     hwinfo,
1709         IN      BOOLEAN                 AutoLoadFail
1710         )
1711 {
1712 //      HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
1713
1714         //
1715         // <Roger_Notes> The PID/VID info was parsed from CISTPL_MANFID Tuple in CIS area before.
1716         // VID is parsed from Manufacture code field and PID is parsed from Manufacture information field.
1717         // 2011.04.01.
1718         //
1719
1720 //      RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM VID = 0x%4x\n", pHalData->EEPROMVID));
1721 //      RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM PID = 0x%4x\n", pHalData->EEPROMPID));
1722 }
1723
1724 static void
1725 Hal_EfuseParseMACAddr_8723AS(
1726         IN      PADAPTER                padapter,
1727         IN      u8*                     hwinfo,
1728         IN      BOOLEAN                 AutoLoadFail
1729         )
1730 {
1731         u16                     i, usValue;
1732         u8                      sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x87, 0x23, 0x00};
1733         EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
1734
1735         if (AutoLoadFail)
1736         {
1737 //              sMacAddr[5] = (u1Byte)GetRandomNumber(1, 254);
1738                 for (i=0; i<6; i++)
1739                         pEEPROM->mac_addr[i] = sMacAddr[i];
1740         }
1741         else
1742         {
1743                 //Read Permanent MAC address
1744 #if 1
1745                 _rtw_memcpy(pEEPROM->mac_addr, &hwinfo[EEPROM_MAC_ADDR_8723AS], ETH_ALEN);
1746 #else
1747                 for(i=0; i<6; i+=2)
1748                 {
1749                         usValue = *(u16*)&hwinfo[EEPROM_MAC_ADDR_8723S+i];
1750                         *((u16*)(&pEEPROM->mac_addr[i])) = usValue;
1751                 }
1752 #endif
1753         }
1754 //      NicIFSetMacAddress(pAdapter, pAdapter->PermanentAddress);
1755
1756         RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
1757                  ("Hal_EfuseParseMACAddr_8723AS: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
1758                   pEEPROM->mac_addr[0], pEEPROM->mac_addr[1],
1759                   pEEPROM->mac_addr[2], pEEPROM->mac_addr[3],
1760                   pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]));
1761 }
1762
1763 static void
1764 Hal_EfuseParseBoardType_8723AS(
1765         IN      PADAPTER                pAdapter,
1766         IN      u8*                     hwinfo,
1767         IN      BOOLEAN                 AutoLoadFail
1768         )
1769 {
1770         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
1771
1772         if (!AutoLoadFail)
1773                 pHalData->BoardType = (hwinfo[RF_OPTION1_8723A] & 0xE0) >> 5;
1774         else
1775                 pHalData->BoardType = 0;
1776         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Board Type: 0x%2x\n", pHalData->BoardType));
1777 }
1778
1779 static void
1780 Hal_CustomizeByCustomerID_8723AS(
1781         IN      PADAPTER                padapter
1782         )
1783 {
1784 #if 0
1785         PMGNT_INFO              pMgntInfo = &(padapter->MgntInfo);
1786         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
1787
1788         // For customized behavior.
1789         if((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMVID == 0x1629))// HP Lite-On for RTL8188CUS Slim Combo.
1790                 pMgntInfo->CustomerID = RT_CID_819x_HP;
1791
1792         // Decide CustomerID according to VID/DID or EEPROM
1793         switch(pHalData->EEPROMCustomerID)
1794         {
1795                 case EEPROM_CID_DEFAULT:
1796                         if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308))
1797                                 pMgntInfo->CustomerID = RT_CID_DLINK;
1798                         else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309))
1799                                 pMgntInfo->CustomerID = RT_CID_DLINK;
1800                         else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a))
1801                                 pMgntInfo->CustomerID = RT_CID_DLINK;
1802                         break;
1803                 case EEPROM_CID_WHQL:
1804                         padapter->bInHctTest = TRUE;
1805
1806                         pMgntInfo->bSupportTurboMode = FALSE;
1807                         pMgntInfo->bAutoTurboBy8186 = FALSE;
1808
1809                         pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
1810                         pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
1811                         pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
1812                         pMgntInfo->PowerSaveControl.bLeisurePsModeBackup =FALSE;
1813                         pMgntInfo->keepAliveLevel = 0;
1814
1815                         padapter->bUnloadDriverwhenS3S4 = FALSE;
1816                         break;
1817                 default:
1818                         pMgntInfo->CustomerID = RT_CID_DEFAULT;
1819                         break;
1820
1821         }
1822
1823         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Mgnt Customer ID: 0x%02x\n", pMgntInfo->CustomerID));
1824
1825         hal_CustomizedBehavior_8723U(padapter);
1826 #endif
1827 }
1828
1829 #ifdef CONFIG_EFUSE_CONFIG_FILE
1830 static void
1831 Hal_ReadMACAddrFromFile_8723AS(
1832         PADAPTER                padapter
1833         )
1834 {
1835         u32 i;
1836         struct file *fp;
1837         mm_segment_t fs;
1838         u8 source_addr[18];
1839         loff_t pos = 0;
1840         u32     curtime = rtw_get_current_time();
1841         EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
1842         u8 *head, *end;
1843
1844         u8 null_mac_addr[ETH_ALEN] = {0, 0, 0,0, 0, 0};
1845         u8 multi_mac_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1846
1847         _rtw_memset(source_addr, 0, 18);
1848         _rtw_memset(pEEPROM->mac_addr, 0, ETH_ALEN);
1849
1850         fp = filp_open("/data/wifimac.txt", O_RDWR,  0644);
1851         if (IS_ERR(fp)) {
1852                 pEEPROM->bloadmac_fail_flag = _TRUE;
1853                 DBG_871X("Error, wifi mac address file doesn't exist.\n");
1854         } else {
1855                 fs = get_fs();
1856                 set_fs(KERNEL_DS);
1857
1858                 DBG_871X("wifi mac address:\n");
1859                 vfs_read(fp, source_addr, 18, &pos);
1860                 source_addr[17] = ':';
1861
1862                 head = end = source_addr;
1863                 for (i=0; i<ETH_ALEN; i++) {
1864                         while (end && (*end != ':') )
1865                                 end++;
1866
1867                         if (end && (*end == ':') )
1868                                 *end = '\0';
1869
1870                         pEEPROM->mac_addr[i] = simple_strtoul(head, NULL, 16 );
1871
1872                         if (end) {
1873                                 end++;
1874                                 head = end;
1875                         }
1876                         DBG_871X("%02x \n", pEEPROM->mac_addr[i]);
1877                 }
1878                 DBG_871X("\n");
1879                 set_fs(fs);
1880                 pEEPROM->bloadmac_fail_flag = _FALSE;
1881                 filp_close(fp, NULL);
1882         }
1883
1884         if ( (_rtw_memcmp(pEEPROM->mac_addr, null_mac_addr, ETH_ALEN)) ||
1885                 (_rtw_memcmp(pEEPROM->mac_addr, multi_mac_addr, ETH_ALEN)) ) {
1886                 pEEPROM->mac_addr[0] = 0x00;
1887                 pEEPROM->mac_addr[1] = 0xe0;
1888                 pEEPROM->mac_addr[2] = 0x4c;
1889                 pEEPROM->mac_addr[3] = (u8)(curtime & 0xff) ;
1890                 pEEPROM->mac_addr[4] = (u8)((curtime>>8) & 0xff) ;
1891                 pEEPROM->mac_addr[5] = (u8)((curtime>>16) & 0xff) ;
1892         }
1893
1894         DBG_871X("Hal_ReadMACAddrFromFile_8723AS: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
1895                   pEEPROM->mac_addr[0], pEEPROM->mac_addr[1],
1896                   pEEPROM->mac_addr[2], pEEPROM->mac_addr[3],
1897                   pEEPROM->mac_addr[4], pEEPROM->mac_addr[5]);
1898 }
1899 #endif
1900
1901
1902 static VOID
1903 readAdapterInfo(
1904         IN PADAPTER                     padapter
1905         )
1906 {
1907         EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
1908 //      HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
1909         u8*                     hwinfo = NULL;
1910 #ifdef CONFIG_EFUSE_CONFIG_FILE
1911         struct file *fp = NULL;
1912 #endif
1913
1914         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("====> readpadapterInfo_8723S()\n"));
1915
1916         if (sizeof(pEEPROM->efuse_eeprom_data) < HWSET_MAX_SIZE)
1917                 DBG_871X("[WARNING] size of efuse_eeprom_data is less than HWSET_MAX_SIZE!\n");
1918
1919         hwinfo = pEEPROM->efuse_eeprom_data;
1920
1921         //
1922         // This part read and parse the eeprom/efuse content
1923         //
1924         Hal_InitPGData(padapter, hwinfo);
1925
1926         /* Check Tx power index info in phy efuse first to decide whether we need to read PG data from external config file or not */
1927 #ifdef CONFIG_EFUSE_CONFIG_FILE
1928         if (check_phy_efuse_tx_power_info_valid(padapter) == _FALSE) {
1929                 fp = filp_open(EFUSE_MAP_PATH, O_RDONLY, 0);
1930                 if (fp == NULL || IS_ERR(fp)) {
1931                         DBG_871X("[WARNING] invalid phy efuse and no efuse file, use driver default!!\n");
1932                 } else {
1933                         Hal_readPGDataFromConfigFile(padapter, fp);
1934                         filp_close(fp, NULL);
1935                 }
1936         }
1937 #endif //CONFIG_EFUSE_CONFIG_FILE
1938
1939         Hal_EfuseParseIDCode(padapter, hwinfo);
1940         Hal_EfuseParsePIDVID_8723AS(padapter, hwinfo, pEEPROM->bautoload_fail_flag);
1941
1942         /* Check macaddr info in phy efuse to decide whether we need to get macaddr from external file or not */
1943 #ifdef CONFIG_EFUSE_CONFIG_FILE
1944         if (check_phy_efuse_macaddr_info_valid(padapter) == _TRUE) {
1945                 DBG_871X("using phy efuse mac\n");
1946                 Hal_GetPhyEfuseMACAddr(padapter, pEEPROM->mac_addr);
1947         } else {
1948                 fp = filp_open(WIFIMAC_PATH, O_RDONLY, 0);
1949                 if (fp == NULL || IS_ERR(fp)) {
1950                         DBG_871X("wifimac does not exist!!\n");
1951                         Hal_GetPhyEfuseMACAddr(padapter, pEEPROM->mac_addr);
1952                 } else {
1953                         Hal_ReadMACAddrFromFile(padapter, fp);
1954                         filp_close(fp, NULL);
1955                 }
1956         }
1957 #else //CONFIG_EFUSE_CONFIG_FILE
1958         Hal_EfuseParseMACAddr_8723AS(padapter, hwinfo, pEEPROM->bautoload_fail_flag);
1959 #endif //CONFIG_EFUSE_CONFIG_FILE
1960
1961         Hal_EfuseParseTxPowerInfo_8723A(padapter, hwinfo, pEEPROM->bautoload_fail_flag);
1962         Hal_EfuseParseBTCoexistInfo_8723A(padapter, hwinfo, pEEPROM->bautoload_fail_flag);
1963         Hal_EfuseParseEEPROMVer(padapter, hwinfo, pEEPROM->bautoload_fail_flag);
1964         rtl8723a_EfuseParseChnlPlan(padapter, hwinfo, pEEPROM->bautoload_fail_flag);
1965         Hal_EfuseParseCustomerID(padapter, hwinfo, pEEPROM->bautoload_fail_flag);
1966         Hal_EfuseParseAntennaDiversity(padapter, hwinfo, pEEPROM->bautoload_fail_flag);
1967         Hal_EfuseParseRateIndicationOption(padapter, hwinfo, pEEPROM->bautoload_fail_flag);
1968         Hal_EfuseParseBoardType_8723AS(padapter, hwinfo, pEEPROM->bautoload_fail_flag);
1969         Hal_EfuseParseXtal_8723A(padapter, hwinfo, pEEPROM->bautoload_fail_flag);
1970         Hal_EfuseParseThermalMeter_8723A(padapter, hwinfo, pEEPROM->bautoload_fail_flag);
1971
1972         //
1973         // The following part initialize some vars by PG info.
1974         //
1975         Hal_InitChannelPlan(padapter);
1976         Hal_CustomizeByCustomerID_8723AS(padapter);
1977
1978 #ifdef CONFIG_RF_GAIN_OFFSET
1979         Hal_ReadRFGainOffset(padapter, hwinfo, pEEPROM->bautoload_fail_flag);
1980 #endif  //CONFIG_RF_GAIN_OFFSET
1981
1982
1983         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("<==== readpadapterInfo_8723S()\n"));
1984 }
1985
1986 static void _ReadPROMContent(
1987         IN PADAPTER             padapter
1988         )
1989 {
1990         EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter);
1991 //      HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
1992         u8                      eeValue;
1993
1994
1995         eeValue = rtw_read8(padapter, REG_9346CR);
1996         // To check system boot selection.
1997         pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE;
1998         pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE;
1999
2000         RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
2001                  ("%s: 9346CR=0x%02X, Boot from %s, Autoload %s\n",
2002                   __FUNCTION__, eeValue,
2003                   (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"),
2004                   (pEEPROM->bautoload_fail_flag ? "Fail" : "OK")));
2005
2006 //      pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE;
2007
2008         readAdapterInfo(padapter);
2009 }
2010
2011 static VOID
2012 _InitOtherVariable(
2013         IN PADAPTER             Adapter
2014         )
2015 {
2016         //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
2017
2018
2019         //if(Adapter->bInHctTest){
2020         //      pMgntInfo->PowerSaveControl.bInactivePs = FALSE;
2021         //      pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE;
2022         //      pMgntInfo->PowerSaveControl.bLeisurePs = FALSE;
2023         //      pMgntInfo->keepAliveLevel = 0;
2024         //}
2025
2026
2027
2028 }
2029
2030 //
2031 //      Description:
2032 //              Read HW adapter information by E-Fuse or EEPROM according CR9346 reported.
2033 //
2034 //      Assumption:
2035 //              PASSIVE_LEVEL (SDIO interface)
2036 //
2037 //
2038 static s32 _ReadAdapterInfo8723AS(PADAPTER padapter)
2039 {
2040         u32 start;
2041
2042
2043         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("+ReadAdapterInfo8723AS\n"));
2044
2045         // before access eFuse, make sure card enable has been called
2046         CardEnable(padapter);
2047
2048         start = rtw_get_current_time();
2049
2050         _EfuseCellSel(padapter);
2051         _ReadRFType(padapter);
2052         _ReadPROMContent(padapter);
2053         _InitOtherVariable(padapter);
2054
2055         MSG_8192C("<==== ReadAdapterInfo8723AS in %d ms\n", rtw_get_passing_time_ms(start));
2056
2057         return _SUCCESS;
2058 }
2059
2060 static void ReadAdapterInfo8723AS(PADAPTER padapter)
2061 {
2062         // Read EEPROM size before call any EEPROM function
2063         padapter->EepromAddressSize = GetEEPROMSize8723A(padapter);
2064
2065         _ReadAdapterInfo8723AS(padapter);
2066 }
2067
2068 /*
2069  * If variable not handled here,
2070  * some variables will be processed in SetHwReg8723A()
2071  */
2072 void SetHwReg8723AS(PADAPTER padapter, u8 variable, u8 *val)
2073 {
2074         //PHAL_DATA_TYPE        pHalData = GET_HAL_DATA(padapter);
2075
2076 _func_enter_;
2077
2078         switch (variable)
2079         {
2080                 case HW_VAR_SET_RPWM:
2081                         rtw_write8(padapter, SDIO_LOCAL_BASE|SDIO_REG_HRPWM1, *val);
2082                         break;
2083
2084                 default:
2085                         SetHwReg8723A(padapter, variable, val);
2086                         break;
2087         }
2088
2089 _func_exit_;
2090 }
2091
2092 /*
2093  * If variable not handled here,
2094  * some variables will be processed in GetHwReg8723A()
2095  */
2096 void GetHwReg8723AS(PADAPTER padapter, u8 variable, u8 *val)
2097 {
2098         //PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
2099
2100 _func_enter_;
2101
2102         switch (variable)
2103         {
2104                 case HW_VAR_GET_CPWM:
2105                         *val =  rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HCPWM1);
2106                         break;
2107                 case HW_VAR_SYS_CLKR:
2108                         *val = rtw_read8(padapter, REG_SYS_CLKR);
2109                         break;
2110                 default:
2111                         GetHwReg8723A(padapter, variable, val);
2112                         break;
2113         }
2114
2115 _func_exit_;
2116 }
2117
2118 //
2119 //      Description:
2120 //              Query setting of specified variable.
2121 //
2122 u8
2123 GetHalDefVar8723ASDIO(
2124         IN      PADAPTER                                Adapter,
2125         IN      HAL_DEF_VARIABLE                eVariable,
2126         IN      PVOID                                   pValue
2127         )
2128 {
2129         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
2130         u8                      bResult = _SUCCESS;
2131
2132         switch(eVariable)
2133         {
2134                 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
2135                         *((int *)pValue) = pHalData->dmpriv.UndecoratedSmoothedPWDB;
2136                         break;
2137                 case HAL_DEF_IS_SUPPORT_ANT_DIV:
2138 #ifdef CONFIG_ANTENNA_DIVERSITY
2139                         *((u8 *)pValue) = (IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))?_FALSE:_TRUE;
2140 #endif
2141                         break;
2142                 case HAL_DEF_CURRENT_ANTENNA:
2143 #ifdef CONFIG_ANTENNA_DIVERSITY
2144                         *(( u8*)pValue) = pHalData->CurAntenna;
2145 #endif
2146                         break;
2147                 case HAL_DEF_DBG_DUMP_RXPKT:
2148                         *(( u8*)pValue) = pHalData->bDumpRxPkt;
2149                         break;
2150                 case HW_VAR_MAX_RX_AMPDU_FACTOR:
2151                         *(( u32*)pValue) = MAX_AMPDU_FACTOR_64K;
2152                         break;
2153                 default:
2154                         bResult = GetHalDefVar8723A(Adapter, eVariable, pValue);
2155                         break;
2156         }
2157
2158         return bResult;
2159 }
2160
2161 //
2162 //      Description:
2163 //              Change default setting of specified variable.
2164 //
2165 u8
2166 SetHalDefVar8723ASDIO(
2167         IN      PADAPTER                                Adapter,
2168         IN      HAL_DEF_VARIABLE                eVariable,
2169         IN      PVOID                                   pValue
2170         )
2171 {
2172         PHAL_DATA_TYPE  pHalData = GET_HAL_DATA(Adapter);
2173         u8                      bResult = _SUCCESS;
2174
2175         switch(eVariable)
2176         {
2177                 case HAL_DEF_DBG_DUMP_RXPKT:
2178                         pHalData->bDumpRxPkt = *(( u8*)pValue);
2179                         break;
2180                 case HAL_DEF_DBG_DM_FUNC:
2181                         {
2182                                 u8 dm_func = *(( u8*)pValue);
2183                                 struct dm_priv  *pdmpriv = &pHalData->dmpriv;
2184                                 DM_ODM_T                *podmpriv = &pHalData->odmpriv;
2185
2186                                 if(dm_func == 0){ //disable all dynamic func
2187                                         podmpriv->SupportAbility = DYNAMIC_FUNC_DISABLE;
2188                                         DBG_8192C("==> Disable all dynamic function...\n");
2189                                 }
2190                                 else if(dm_func == 1){//disable DIG
2191                                         podmpriv->SupportAbility  &= (~DYNAMIC_BB_DIG);
2192                                         DBG_8192C("==> Disable DIG...\n");
2193                                 }
2194                                 else if(dm_func == 2){//disable High power
2195                                         podmpriv->SupportAbility  &= (~DYNAMIC_BB_DYNAMIC_TXPWR);
2196                                 }
2197                                 else if(dm_func == 3){//disable tx power tracking
2198                                         podmpriv->SupportAbility  &= (~DYNAMIC_RF_CALIBRATION);
2199                                         DBG_8192C("==> Disable tx power tracking...\n");
2200                                 }
2201                                 else if(dm_func == 4){//disable BT coexistence
2202                                         pdmpriv->DMFlag &= (~DYNAMIC_FUNC_BT);
2203                                 }
2204                                 else if(dm_func == 5){//disable antenna diversity
2205                                         podmpriv->SupportAbility  &= (~DYNAMIC_BB_ANT_DIV);
2206                                 }
2207                                 else if(dm_func == 6){//turn on all dynamic func
2208                                         if(!(podmpriv->SupportAbility  & DYNAMIC_BB_DIG))
2209                                         {
2210                                                 DIG_T   *pDigTable = &podmpriv->DM_DigTable;
2211                                                 pDigTable->CurIGValue= rtw_read8(Adapter,0xc50);
2212                                         }
2213                                         pdmpriv->DMFlag |= DYNAMIC_FUNC_BT;
2214                                         podmpriv->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE;
2215                                         DBG_8192C("==> Turn on all dynamic function...\n");
2216                                 }
2217                         }
2218                         break;
2219                 default:
2220                         bResult = SetHalDefVar(Adapter, eVariable, pValue);
2221                         break;
2222         }
2223
2224         return bResult;
2225 }
2226
2227 void UpdateHalRAMask8192CUsb(PADAPTER padapter, u32 mac_id, u8 rssi_level)
2228 {
2229         //volatile unsigned int result;
2230         u8      init_rate=0;
2231         u8      networkType, raid;
2232         u32     mask,rate_bitmap;
2233         u8      shortGIrate = _FALSE;
2234         int     supportRateNum = 0;
2235         struct sta_info *psta;
2236         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
2237         struct dm_priv  *pdmpriv = &pHalData->dmpriv;
2238         struct mlme_ext_priv    *pmlmeext = &padapter->mlmeextpriv;
2239         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
2240         WLAN_BSSID_EX           *cur_network = &(pmlmeinfo->network);
2241
2242
2243         if (mac_id >= NUM_STA) //CAM_SIZE
2244         {
2245                 return;
2246         }
2247
2248         psta = pmlmeinfo->FW_sta_info[mac_id].psta;
2249         if(psta == NULL)
2250         {
2251                 return;
2252         }
2253
2254         switch (mac_id)
2255         {
2256                 case 0:// for infra mode
2257 #ifdef CONFIG_CONCURRENT_MODE
2258                 case 2:// first station uses macid=0, second station uses macid=2
2259 #endif
2260                         supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
2261                         networkType = judge_network_type(padapter, cur_network->SupportedRates, supportRateNum) & 0xf;
2262                         //pmlmeext->cur_wireless_mode = networkType;
2263                         raid = networktype_to_raid(networkType);
2264
2265                         mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
2266                         mask |= (pmlmeinfo->HT_enable)? update_MSC_rate(&(pmlmeinfo->HT_caps)): 0;
2267
2268                         if (support_short_GI(padapter, &(pmlmeinfo->HT_caps)))
2269                         {
2270                                 shortGIrate = _TRUE;
2271                         }
2272
2273                         break;
2274
2275                 case 1://for broadcast/multicast
2276                         supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
2277                         if(pmlmeext->cur_wireless_mode & WIRELESS_11B)
2278                                 networkType = WIRELESS_11B;
2279                         else
2280                                 networkType = WIRELESS_11G;
2281                         raid = networktype_to_raid(networkType);
2282
2283                         mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
2284
2285                         break;
2286
2287                 default: //for each sta in IBSS
2288                         supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
2289                         networkType = judge_network_type(padapter, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf;
2290                         //pmlmeext->cur_wireless_mode = networkType;
2291                         raid = networktype_to_raid(networkType);
2292
2293                         mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
2294
2295                         //todo: support HT in IBSS
2296
2297                         break;
2298         }
2299         //mask &=0x0fffffff;
2300         rate_bitmap = 0x0fffffff;
2301 #ifdef  CONFIG_ODM_REFRESH_RAMASK
2302         {
2303                 rate_bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv,mac_id,mask,rssi_level);
2304                 DBG_8192C("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
2305                         __FUNCTION__,mac_id,networkType,mask,rssi_level,rate_bitmap);
2306         }
2307 #endif
2308         mask &= rate_bitmap;
2309         mask |= ((raid<<28)&0xf0000000);
2310
2311         init_rate = get_highest_rate_idx(mask)&0x3f;
2312
2313         if(pHalData->fw_ractrl == _TRUE)
2314         {
2315                 u8 arg = 0;
2316
2317                 //arg = (cam_idx-4)&0x1f;//MACID
2318                 arg = mac_id&0x1f;//MACID
2319
2320                 arg |= BIT(7);
2321
2322                 if (shortGIrate==_TRUE)
2323                         arg |= BIT(5);
2324
2325                 DBG_871X("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg);
2326
2327                 rtl8192c_set_raid_cmd(padapter, mask, arg);
2328
2329         }
2330         else
2331         {
2332                 if (shortGIrate==_TRUE)
2333                         init_rate |= BIT(6);
2334
2335                 rtw_write8(padapter, (REG_INIDATA_RATE_SEL+mac_id), init_rate);
2336         }
2337
2338
2339         //set ra_id
2340         psta->raid = raid;
2341         psta->init_rate = init_rate;
2342
2343         //set correct initial date rate for each mac_id
2344         pdmpriv->INIDATA_RATE[mac_id] = init_rate;
2345 }
2346
2347 void rtl8723as_set_hal_ops(PADAPTER padapter)
2348 {
2349         struct hal_ops *pHalFunc = &padapter->HalFunc;
2350
2351 _func_enter_;
2352
2353
2354 #ifdef CONFIG_CONCURRENT_MODE
2355         if(padapter->isprimary)
2356 #endif //CONFIG_CONCURRENT_MODE
2357         {
2358                 //set hardware operation functions
2359                 padapter->HalData = rtw_zvmalloc(sizeof(HAL_DATA_TYPE));
2360                 if(padapter->HalData == NULL){
2361                         DBG_8192C("cant not alloc memory for HAL DATA \n");
2362                 }
2363         }
2364
2365         //_rtw_memset(padapter->HalData, 0, sizeof(HAL_DATA_TYPE));
2366         padapter->hal_data_sz = sizeof(HAL_DATA_TYPE);
2367
2368
2369         rtl8723a_set_hal_ops(pHalFunc);
2370
2371         pHalFunc->hal_init = &rtl8723as_hal_init;
2372         pHalFunc->hal_deinit = &rtl8723as_hal_deinit;
2373
2374         pHalFunc->inirp_init = &rtl8723as_inirp_init;
2375         pHalFunc->inirp_deinit = &rtl8723as_inirp_deinit;
2376
2377         pHalFunc->init_xmit_priv = &rtl8723as_init_xmit_priv;
2378         pHalFunc->free_xmit_priv = &rtl8723as_free_xmit_priv;
2379
2380         pHalFunc->init_recv_priv = &rtl8723as_init_recv_priv;
2381         pHalFunc->free_recv_priv = &rtl8723as_free_recv_priv;
2382
2383         pHalFunc->InitSwLeds = &rtl8723as_InitSwLeds;
2384         pHalFunc->DeInitSwLeds = &rtl8723as_DeInitSwLeds;
2385
2386         pHalFunc->init_default_value = &rtl8723as_init_default_value;
2387         pHalFunc->intf_chip_configure = &rtl8723as_interface_configure;
2388         pHalFunc->read_adapter_info = &ReadAdapterInfo8723AS;
2389
2390         pHalFunc->enable_interrupt = &EnableInterrupt8723ASdio;
2391         pHalFunc->disable_interrupt = &DisableInterrupt8723ASdio;
2392
2393         pHalFunc->SetHwRegHandler = &SetHwReg8723AS;
2394         pHalFunc->GetHwRegHandler = &GetHwReg8723AS;
2395         pHalFunc->GetHalDefVarHandler = &GetHalDefVar8723ASDIO;
2396         pHalFunc->SetHalDefVarHandler = &SetHalDefVar8723ASDIO;
2397
2398 //      pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8723ASdio;
2399         pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8192CUsb;
2400
2401         pHalFunc->hal_xmit = &rtl8723as_hal_xmit;
2402         pHalFunc->mgnt_xmit = &rtl8723as_mgnt_xmit;
2403         pHalFunc->hal_xmitframe_enqueue = &rtl8723as_hal_xmitframe_enqueue;
2404
2405 #ifdef CONFIG_HOSTAPD_MLME
2406         pHalFunc->hostap_mgnt_xmit_entry = NULL;
2407 //      pHalFunc->hostap_mgnt_xmit_entry = &rtl8192cu_hostap_mgnt_xmit_entry;
2408 #endif
2409
2410
2411 _func_exit_;
2412 }
2413
2414