drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/OUTSRC/phydm_EdcaTurboCheck.c

   1 /******************************************************************************\r
   2  *\r
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
   4  *                                        \r
   5  * This program is free software; you can redistribute it and/or modify it\r
   6  * under the terms of version 2 of the GNU General Public License as\r
   7  * published by the Free Software Foundation.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
  12  * more details.\r
  13  *\r
  14  * You should have received a copy of the GNU General Public License along with\r
  15  * this program; if not, write to the Free Software Foundation, Inc.,\r
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
  17  *\r
  18  *\r
  19  ******************************************************************************/\r
  20 \r
  21 //============================================================\r
  22 // include files\r
  23 //============================================================\r
  24 #include "Mp_Precomp.h"\r
  25 #include "phydm_precomp.h"\r
  26 \r
  27 VOID\r
  28 ODM_EdcaTurboInit(\r
  29         IN      PVOID           pDM_VOID)\r
  30 {\r
  31         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
  32 #if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL))\r
  33         odm_EdcaParaInit(pDM_Odm);\r
  34 #elif (DM_ODM_SUPPORT_TYPE==ODM_WIN)\r
  35         PADAPTER        Adapter = NULL;\r
  36         HAL_DATA_TYPE   *pHalData = NULL;\r
  37 \r
  38         if(pDM_Odm->Adapter==NULL)      {\r
  39                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EdcaTurboInit fail!!!\n"));\r
  40                 return;\r
  41         }\r
  42 \r
  43         Adapter=pDM_Odm->Adapter;\r
  44         pHalData=GET_HAL_DATA(Adapter);\r
  45 \r
  46         pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE;       \r
  47         pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE;\r
  48         pHalData->bIsAnyNonBEPkts = FALSE;\r
  49         \r
  50 #elif(DM_ODM_SUPPORT_TYPE==ODM_CE)\r
  51         PADAPTER        Adapter = pDM_Odm->Adapter;     \r
  52         pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE;       \r
  53         pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE;\r
  54         Adapter->recvpriv.bIsAnyNonBEPkts =FALSE;\r
  55 \r
  56 #endif  \r
  57         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VO PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VO_PARAM)));\r
  58         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VI PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VI_PARAM)));\r
  59         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM)));\r
  60         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BK PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BK_PARAM)));\r
  61 \r
  62         \r
  63 }       // ODM_InitEdcaTurbo\r
  64 \r
  65 VOID\r
  66 odm_EdcaTurboCheck(\r
  67         IN      PVOID           pDM_VOID\r
  68         )\r
  69 {\r
  70         // \r
  71         // For AP/ADSL use prtl8192cd_priv\r
  72         // For CE/NIC use PADAPTER\r
  73         //\r
  74 \r
  75         //\r
  76         // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate\r
  77         // at the same time. In the stage2/3, we need to prive universal interface and merge all\r
  78         // HW dynamic mechanism.\r
  79         //\r
  80         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
  81         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheck========================>\n"));\r
  82         \r
  83         if(!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))\r
  84                 return;\r
  85 \r
  86         switch  (pDM_Odm->SupportPlatform)\r
  87         {\r
  88                 case    ODM_WIN:\r
  89 \r
  90 #if(DM_ODM_SUPPORT_TYPE==ODM_WIN)\r
  91                         odm_EdcaTurboCheckMP(pDM_Odm);\r
  92 #endif\r
  93                         break;\r
  94 \r
  95                 case    ODM_CE:\r
  96 #if(DM_ODM_SUPPORT_TYPE==ODM_CE)\r
  97                         odm_EdcaTurboCheckCE(pDM_Odm);\r
  98 #endif\r
  99                         break;\r
 100 \r
 101                 case    ODM_AP:\r
 102                 case    ODM_ADSL:\r
 103 \r
 104 #if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL))\r
 105                 odm_IotEngine(pDM_Odm);\r
 106 #endif\r
 107                         break;  \r
 108         }\r
 109         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n"));\r
 110 \r
 111 }       // odm_CheckEdcaTurbo\r
 112 \r
 113 #if(DM_ODM_SUPPORT_TYPE==ODM_CE)\r
 114 \r
 115 \r
 116 VOID\r
 117 odm_EdcaTurboCheckCE(\r
 118         IN      PVOID           pDM_VOID\r
 119         )\r
 120 {\r
 121         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 122         PADAPTER                       Adapter = pDM_Odm->Adapter;\r
 123         u32     EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott  //edca_setting_UL[pMgntInfo->IOTPeer];\r
 124         u32     EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott  //edca_setting_DL[pMgntInfo->IOTPeer];\r
 125         u32     ICType=pDM_Odm->SupportICType;\r
 126         u32     IOTPeer=0;\r
 127         u8      WirelessMode=0xFF;                   //invalid value\r
 128         u32     trafficIndex;\r
 129         u32     edca_param;\r
 130         u64     cur_tx_bytes = 0;\r
 131         u64     cur_rx_bytes = 0;\r
 132         u8      bbtchange = _FALSE;\r
 133         u8      bBiasOnRx = _FALSE;\r
 134         HAL_DATA_TYPE           *pHalData = GET_HAL_DATA(Adapter);\r
 135         struct dvobj_priv               *pdvobjpriv = adapter_to_dvobj(Adapter);\r
 136         struct xmit_priv                *pxmitpriv = &(Adapter->xmitpriv);\r
 137         struct recv_priv                *precvpriv = &(Adapter->recvpriv);\r
 138         struct registry_priv    *pregpriv = &Adapter->registrypriv;\r
 139         struct mlme_ext_priv    *pmlmeext = &(Adapter->mlmeextpriv);\r
 140         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);\r
 141 \r
 142         if(pDM_Odm->bLinked != _TRUE)\r
 143         {\r
 144                 precvpriv->bIsAnyNonBEPkts = _FALSE;\r
 145                 return;\r
 146         }\r
 147 \r
 148         if ((pregpriv->wifi_spec == 1) )//|| (pmlmeinfo->HT_enable == 0))\r
 149         {\r
 150                 precvpriv->bIsAnyNonBEPkts = _FALSE;\r
 151                 return;\r
 152         }\r
 153 \r
 154         if(pDM_Odm->pWirelessMode!=NULL)\r
 155                 WirelessMode=*(pDM_Odm->pWirelessMode);\r
 156 \r
 157         IOTPeer = pmlmeinfo->assoc_AP_vendor;\r
 158 \r
 159         if (IOTPeer >=  HT_IOT_PEER_MAX)\r
 160         {\r
 161                 precvpriv->bIsAnyNonBEPkts = _FALSE;\r
 162                 return;\r
 163         }\r
 164 \r
 165         if(     (pDM_Odm->SupportICType == ODM_RTL8192C) ||\r
 166                 (pDM_Odm->SupportICType == ODM_RTL8723A) ||\r
 167                 (pDM_Odm->SupportICType == ODM_RTL8188E))\r
 168         {\r
 169                 if((IOTPeer == HT_IOT_PEER_RALINK)||(IOTPeer == HT_IOT_PEER_ATHEROS))\r
 170                         bBiasOnRx = _TRUE;\r
 171         }\r
 172 \r
 173         // Check if the status needs to be changed.\r
 174         if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) )\r
 175         {\r
 176                 cur_tx_bytes = pdvobjpriv->traffic_stat.cur_tx_bytes;\r
 177                 cur_rx_bytes = pdvobjpriv->traffic_stat.cur_rx_bytes;\r
 178 \r
 179                 //traffic, TX or RX\r
 180                 if(bBiasOnRx)\r
 181                 {\r
 182                         if (cur_tx_bytes > (cur_rx_bytes << 2))\r
 183                         { // Uplink TP is present.\r
 184                                 trafficIndex = UP_LINK; \r
 185                         }\r
 186                         else\r
 187                         { // Balance TP is present.\r
 188                                 trafficIndex = DOWN_LINK;\r
 189                         }\r
 190                 }\r
 191                 else\r
 192                 {\r
 193                         if (cur_rx_bytes > (cur_tx_bytes << 2))\r
 194                         { // Downlink TP is present.\r
 195                                 trafficIndex = DOWN_LINK;\r
 196                         }\r
 197                         else\r
 198                         { // Balance TP is present.\r
 199                                 trafficIndex = UP_LINK;\r
 200                         }\r
 201                 }\r
 202 \r
 203                 //if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA))\r
 204                 {\r
 205                         if(ICType==ODM_RTL8192D)\r
 206                         {      \r
 207                                 // Single PHY\r
 208                                 if(pDM_Odm->RFType==ODM_2T2R)\r
 209                                 {\r
 210                                         EDCA_BE_UL = 0x60a42b;    //0x5ea42b;\r
 211                                         EDCA_BE_DL = 0x60a42b;    //0x5ea42b;\r
 212                                 }\r
 213                                 else\r
 214                                 {\r
 215                                         EDCA_BE_UL = 0x6ea42b;\r
 216                                         EDCA_BE_DL = 0x6ea42b;\r
 217                                 }\r
 218                         }\r
 219                         else\r
 220                         {\r
 221                                 if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) {\r
 222                                         if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) {\r
 223                                                 EDCA_BE_UL = 0x60a42b;\r
 224                                                 EDCA_BE_DL = 0x60a42b;\r
 225                                         }\r
 226                                         else\r
 227                                         {\r
 228                                                 EDCA_BE_UL = 0x6ea42b;\r
 229                                                 EDCA_BE_DL = 0x6ea42b;\r
 230                                         }\r
 231                                 }\r
 232                         }\r
 233                 \r
 234                         //92D txop can't be set to 0x3e for cisco1250\r
 235                         if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G))\r
 236                         {\r
 237                                 EDCA_BE_DL = edca_setting_DL[IOTPeer];\r
 238                                 EDCA_BE_UL = edca_setting_UL[IOTPeer];\r
 239                         }\r
 240                         //merge from 92s_92c_merge temp brunch v2445    20120215 \r
 241                         else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B)))\r
 242                         {\r
 243                                 EDCA_BE_DL = edca_setting_DL_GMode[IOTPeer];\r
 244                         }\r
 245                         else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A)))\r
 246                         {\r
 247                                 EDCA_BE_DL = 0xa630;\r
 248                         }\r
 249                         else if(IOTPeer == HT_IOT_PEER_MARVELL)\r
 250                         {\r
 251                                 EDCA_BE_DL = edca_setting_DL[IOTPeer];\r
 252                                 EDCA_BE_UL = edca_setting_UL[IOTPeer];\r
 253                         }\r
 254                         else if(IOTPeer == HT_IOT_PEER_ATHEROS)\r
 255                         {\r
 256                                 // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. \r
 257                                 EDCA_BE_DL = edca_setting_DL[IOTPeer];\r
 258                         }\r
 259 \r
 260                         if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8821)||(ICType==ODM_RTL8192E))           //add 8812AU/8812AE\r
 261                         {\r
 262                                 EDCA_BE_UL = 0x5ea42b;\r
 263                                 EDCA_BE_DL = 0x5ea42b;\r
 264 \r
 265                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x",EDCA_BE_UL,EDCA_BE_DL));\r
 266                         }\r
 267 \r
 268                         if (trafficIndex == DOWN_LINK)\r
 269                                 edca_param = EDCA_BE_DL;\r
 270                         else\r
 271                                 edca_param = EDCA_BE_UL;\r
 272 \r
 273                         rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);\r
 274 \r
 275                         pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex;\r
 276                 }\r
 277                 \r
 278                 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _TRUE;\r
 279         }\r
 280         else\r
 281         {\r
 282                 //\r
 283                 // Turn Off EDCA turbo here.\r
 284                 // Restore original EDCA according to the declaration of AP.\r
 285                 //\r
 286                  if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)\r
 287                 {\r
 288                         rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE);\r
 289                         pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _FALSE;\r
 290                 }\r
 291         }\r
 292 \r
 293 }\r
 294 \r
 295 \r
 296 #elif(DM_ODM_SUPPORT_TYPE==ODM_WIN)\r
 297 VOID\r
 298 odm_EdcaTurboCheckMP(\r
 299         IN      PVOID           pDM_VOID\r
 300         )\r
 301 {\r
 302 \r
 303         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 304         PADAPTER                       Adapter = pDM_Odm->Adapter;\r
 305         HAL_DATA_TYPE           *pHalData = GET_HAL_DATA(Adapter);\r
 306 \r
 307         PADAPTER                        pDefaultAdapter = GetDefaultAdapter(Adapter);\r
 308         PADAPTER                        pExtAdapter = GetFirstExtAdapter(Adapter);//NULL;\r
 309         PMGNT_INFO                      pMgntInfo = &Adapter->MgntInfo;\r
 310         PSTA_QOS                        pStaQos = Adapter->MgntInfo.pStaQos;\r
 311         //[Win7 Count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's Adapter is always Default. 2009.08.20, by Bohn\r
 312         u8Byte                          Ext_curTxOkCnt = 0;\r
 313         u8Byte                          Ext_curRxOkCnt = 0;     \r
 314         //For future Win7  Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn.      \r
 315         u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE;\r
 316 \r
 317         // Keep past Tx/Rx packet count for RT-to-RT EDCA turbo.\r
 318         u8Byte                          curTxOkCnt = 0;\r
 319         u8Byte                          curRxOkCnt = 0; \r
 320         u4Byte                          EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott  //edca_setting_UL[pMgntInfo->IOTPeer];\r
 321         u4Byte                          EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott  //edca_setting_DL[pMgntInfo->IOTPeer];\r
 322         u4Byte                         EDCA_BE = 0x5ea42b;\r
 323         u1Byte                         IOTPeer=0;\r
 324         BOOLEAN                      *pbIsCurRDLState=NULL;\r
 325         BOOLEAN                      bLastIsCurRDLState=FALSE;\r
 326         BOOLEAN                          bBiasOnRx=FALSE;\r
 327         BOOLEAN                         bEdcaTurboOn=FALSE;\r
 328         u1Byte                          TxRate = 0xFF;\r
 329         u8Byte                          value64;        \r
 330 \r
 331         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheckMP========================>"));\r
 332         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM)));\r
 333 \r
 334 ////===============================\r
 335 ////list paramter for different platform\r
 336 ////===============================\r
 337         bLastIsCurRDLState=pDM_Odm->DM_EDCA_Table.bIsCurRDLState;\r
 338         pbIsCurRDLState=&(pDM_Odm->DM_EDCA_Table.bIsCurRDLState);       \r
 339 \r
 340         //2012/09/14 MH Add \r
 341         if (pMgntInfo->NumNonBePkt > pMgntInfo->RegEdcaThresh && !Adapter->MgntInfo.bWiFiConfg)\r
 342                 pHalData->bIsAnyNonBEPkts = TRUE;\r
 343 \r
 344         pMgntInfo->NumNonBePkt = 0;\r
 345 \r
 346        // Caculate TX/RX TP:\r
 347         //curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt;\r
 348         //curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt;\r
 349         curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pDM_Odm->lastTxOkCnt;\r
 350         curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pDM_Odm->lastRxOkCnt;\r
 351         pDM_Odm->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast;\r
 352         pDM_Odm->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast;\r
 353 \r
 354         if(pExtAdapter == NULL) \r
 355                 pExtAdapter = pDefaultAdapter;\r
 356 \r
 357         Ext_curTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->Ext_lastTxOkCnt;\r
 358         Ext_curRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->Ext_lastRxOkCnt;\r
 359         GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus);\r
 360         //For future Win7  Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn.\r
 361         if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY)\r
 362         {\r
 363                 curTxOkCnt = Ext_curTxOkCnt ;\r
 364                 curRxOkCnt = Ext_curRxOkCnt ;\r
 365         }\r
 366         //\r
 367         IOTPeer=pMgntInfo->IOTPeer;\r
 368         bBiasOnRx=(pMgntInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)?TRUE:FALSE;\r
 369         bEdcaTurboOn=((!pHalData->bIsAnyNonBEPkts))?TRUE:FALSE;\r
 370         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bIsAnyNonBEPkts : 0x%lx  \n",pHalData->bIsAnyNonBEPkts));\r
 371 \r
 372 \r
 373 ////===============================\r
 374 ////check if edca turbo is disabled\r
 375 ////===============================\r
 376         if(odm_IsEdcaTurboDisable(pDM_Odm))\r
 377         {\r
 378                 pHalData->bIsAnyNonBEPkts = FALSE;\r
 379                 pMgntInfo->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast;\r
 380                 pMgntInfo->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast;\r
 381                 pMgntInfo->Ext_lastTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast;\r
 382                 pMgntInfo->Ext_lastRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast;\r
 383 \r
 384         }\r
 385 \r
 386 ////===============================\r
 387 ////remove iot case out\r
 388 ////===============================\r
 389         ODM_EdcaParaSelByIot(pDM_Odm, &EDCA_BE_UL, &EDCA_BE_DL);\r
 390 \r
 391 \r
 392 ////===============================\r
 393 ////Check if the status needs to be changed.\r
 394 ////===============================\r
 395         if(bEdcaTurboOn)\r
 396         {\r
 397                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",bEdcaTurboOn,bBiasOnRx));\r
 398                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curTxOkCnt : 0x%lx \n",curTxOkCnt));\r
 399                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curRxOkCnt : 0x%lx \n",curRxOkCnt));\r
 400                 if(bBiasOnRx)\r
 401                         odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt,   TRUE,  pbIsCurRDLState);\r
 402                 else\r
 403                         odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt,   FALSE,  pbIsCurRDLState);\r
 404 \r
 405 //modify by Guo.Mingzhi 2011-12-29\r
 406                         EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL;\r
 407                         if(IS_HARDWARE_TYPE_8821U(Adapter))\r
 408                         {\r
 409                                 if(pMgntInfo->RegTxDutyEnable)\r
 410                                 {\r
 411                                         //2013.01.23 LukeLee: debug for 8811AU thermal issue (reduce Tx duty cycle)\r
 412                                         if(!pMgntInfo->ForcedDataRate) //auto rate\r
 413                                         {\r
 414                                                 if(pDM_Odm->TxRate != 0xFF)\r
 415                                                         TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); \r
 416                                         }\r
 417                                         else //force rate\r
 418                                         {\r
 419                                                 TxRate = (u1Byte) pMgntInfo->ForcedDataRate;\r
 420                                         }\r
 421 \r
 422                                         value64 = (curRxOkCnt<<2);\r
 423                                         if(curTxOkCnt < value64) //Downlink\r
 424                                                 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);\r
 425                                         else //Uplink\r
 426                                         {\r
 427                                                 //DbgPrint("pDM_Odm->RFCalibrateInfo.ThermalValue = 0x%X\n", pDM_Odm->RFCalibrateInfo.ThermalValue);\r
 428                                                 //if(pDM_Odm->RFCalibrateInfo.ThermalValue < pHalData->EEPROMThermalMeter)\r
 429                                                 if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G))\r
 430                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);\r
 431                                                 else\r
 432                                                 {\r
 433                                                         switch (TxRate)\r
 434                                                         {\r
 435                                                                 case MGN_VHT1SS_MCS6:\r
 436                                                                 case MGN_VHT1SS_MCS5:\r
 437                                                                 case MGN_MCS6:\r
 438                                                                 case MGN_MCS5:\r
 439                                                                 case MGN_48M:\r
 440                                                                 case MGN_54M:\r
 441                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea42b);\r
 442                                                                 break;\r
 443                                                                 case MGN_VHT1SS_MCS4:\r
 444                                                                 case MGN_MCS4:\r
 445                                                                 case MGN_36M:\r
 446                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa42b);\r
 447                                                                 break;\r
 448                                                                 case MGN_VHT1SS_MCS3:\r
 449                                                                 case MGN_MCS3:\r
 450                                                                 case MGN_24M:\r
 451                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa47f);\r
 452                                                                 break;\r
 453                                                                 case MGN_VHT1SS_MCS2:\r
 454                                                                 case MGN_MCS2:\r
 455                                                                 case MGN_18M:\r
 456                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa57f);\r
 457                                                                 break;\r
 458                                                                 case MGN_VHT1SS_MCS1:\r
 459                                                                 case MGN_MCS1:\r
 460                                                                 case MGN_9M:\r
 461                                                                 case MGN_12M:\r
 462                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa77f);\r
 463                                                                 break;\r
 464                                                                 case MGN_VHT1SS_MCS0:\r
 465                                                                 case MGN_MCS0:\r
 466                                                                 case MGN_6M:\r
 467                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f);\r
 468                                                                 break;\r
 469                                                                 default:\r
 470                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);\r
 471                                                                 break;\r
 472                                                         }\r
 473                                                 }\r
 474                                         }                               \r
 475                                 }\r
 476                                 else\r
 477                                 {\r
 478                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);\r
 479                                 }\r
 480 \r
 481                         }\r
 482                         else if (IS_HARDWARE_TYPE_8812AU(Adapter)){\r
 483                                 if(pMgntInfo->RegTxDutyEnable)\r
 484                                 {\r
 485                                         //2013.07.26 Wilson: debug for 8812AU thermal issue (reduce Tx duty cycle)\r
 486                                         // it;s the same issue as 8811AU\r
 487                                         if(!pMgntInfo->ForcedDataRate) //auto rate\r
 488                                         {\r
 489                                                 if(pDM_Odm->TxRate != 0xFF)\r
 490                                                         TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); \r
 491                                         }\r
 492                                         else //force rate\r
 493                                         {\r
 494                                                 TxRate = (u1Byte) pMgntInfo->ForcedDataRate;\r
 495                                         }\r
 496 \r
 497                                         value64 = (curRxOkCnt<<2);\r
 498                                         if(curTxOkCnt < value64) //Downlink\r
 499                                                 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);\r
 500                                         else //Uplink\r
 501                                         {\r
 502                                                 //DbgPrint("pDM_Odm->RFCalibrateInfo.ThermalValue = 0x%X\n", pDM_Odm->RFCalibrateInfo.ThermalValue);\r
 503                                                 //if(pDM_Odm->RFCalibrateInfo.ThermalValue < pHalData->EEPROMThermalMeter)\r
 504                                                 if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G))\r
 505                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);\r
 506                                                 else\r
 507                                                 {\r
 508                                                         switch (TxRate)\r
 509                                                         {\r
 510                                                                 case MGN_VHT2SS_MCS9:\r
 511                                                                 case MGN_VHT1SS_MCS9:                                                                   \r
 512                                                                 case MGN_VHT1SS_MCS8:\r
 513                                                                 case MGN_MCS15:\r
 514                                                                 case MGN_MCS7:                                                                  \r
 515                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea44f);                                                     \r
 516                                                                 case MGN_VHT2SS_MCS8:\r
 517                                                                 case MGN_VHT1SS_MCS7:\r
 518                                                                 case MGN_MCS14:\r
 519                                                                 case MGN_MCS6:\r
 520                                                                 case MGN_54M:                                                                   \r
 521                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa44f);\r
 522                                                                 case MGN_VHT2SS_MCS7:\r
 523                                                                 case MGN_VHT2SS_MCS6:\r
 524                                                                 case MGN_VHT1SS_MCS6:\r
 525                                                                 case MGN_VHT1SS_MCS5:\r
 526                                                                 case MGN_MCS13:\r
 527                                                                 case MGN_MCS5:\r
 528                                                                 case MGN_48M:\r
 529                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa630);\r
 530                                                                 break;\r
 531                                                                 case MGN_VHT2SS_MCS5:\r
 532                                                                 case MGN_VHT2SS_MCS4:\r
 533                                                                 case MGN_VHT1SS_MCS4:\r
 534                                                                 case MGN_VHT1SS_MCS3:   \r
 535                                                                 case MGN_MCS12:\r
 536                                                                 case MGN_MCS4:  \r
 537                                                                 case MGN_MCS3:  \r
 538                                                                 case MGN_36M:\r
 539                                                                 case MGN_24M:   \r
 540                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa730);\r
 541                                                                 break;\r
 542                                                                 case MGN_VHT2SS_MCS3:\r
 543                                                                 case MGN_VHT2SS_MCS2:\r
 544                                                                 case MGN_VHT2SS_MCS1:\r
 545                                                                 case MGN_VHT1SS_MCS2:\r
 546                                                                 case MGN_VHT1SS_MCS1:   \r
 547                                                                 case MGN_MCS11: \r
 548                                                                 case MGN_MCS10: \r
 549                                                                 case MGN_MCS9:          \r
 550                                                                 case MGN_MCS2:  \r
 551                                                                 case MGN_MCS1:\r
 552                                                                 case MGN_18M:   \r
 553                                                                 case MGN_12M:\r
 554                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa830);\r
 555                                                                 break;\r
 556                                                                 case MGN_VHT2SS_MCS0:\r
 557                                                                 case MGN_VHT1SS_MCS0:\r
 558                                                                 case MGN_MCS0:  \r
 559                                                                 case MGN_MCS8:\r
 560                                                                 case MGN_9M:    \r
 561                                                                 case MGN_6M:\r
 562                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f);\r
 563                                                                 break;\r
 564                                                                 default:\r
 565                                                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);\r
 566                                                                 break;\r
 567                                                         }\r
 568                                                 }\r
 569                                         }                               \r
 570                                 }\r
 571                                 else\r
 572                                 {\r
 573                                         ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);\r
 574                                 }\r
 575                         }\r
 576                         else\r
 577                                 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);\r
 578 \r
 579                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA Turbo on: EDCA_BE:0x%lx\n",EDCA_BE));\r
 580 \r
 581                 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = TRUE;\r
 582                 \r
 583                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA_BE_DL : 0x%lx  EDCA_BE_UL : 0x%lx  EDCA_BE : 0x%lx  \n",EDCA_BE_DL,EDCA_BE_UL,EDCA_BE));\r
 584 \r
 585         }\r
 586         else\r
 587         {\r
 588                 // Turn Off EDCA turbo here.\r
 589                 // Restore original EDCA according to the declaration of AP.\r
 590                  if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)\r
 591                 {\r
 592                         Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, AC0_BE) );\r
 593 \r
 594                         pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE;\r
 595                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Restore EDCA BE: 0x%lx  \n",pDM_Odm->WMMEDCA_BE));\r
 596 \r
 597                 }\r
 598         }\r
 599 \r
 600 }\r
 601 \r
 602 \r
 603 //check if edca turbo is disabled\r
 604 BOOLEAN\r
 605 odm_IsEdcaTurboDisable(\r
 606         IN      PVOID           pDM_VOID\r
 607 )\r
 608 {\r
 609         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 610         PADAPTER                       Adapter = pDM_Odm->Adapter;\r
 611         PMGNT_INFO                      pMgntInfo = &Adapter->MgntInfo;\r
 612         u4Byte                          IOTPeer=pMgntInfo->IOTPeer;\r
 613 \r
 614         if(pDM_Odm->bBtDisableEdcaTurbo)\r
 615         {\r
 616                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n"));\r
 617                 return TRUE;\r
 618         }\r
 619 \r
 620         if((!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))||\r
 621                 (pDM_Odm->bWIFITest)||\r
 622                 (IOTPeer>= HT_IOT_PEER_MAX))\r
 623         {\r
 624                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable\n"));\r
 625                 return TRUE;\r
 626         }\r
 627 \r
 628 \r
 629         // 1. We do not turn on EDCA turbo mode for some AP that has IOT issue\r
 630         // 2. User may disable EDCA Turbo mode with OID settings.\r
 631         if(pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO){\r
 632                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("IOTAction:EdcaTurboDisable\n"));\r
 633                 return  TRUE;\r
 634                 }\r
 635                 \r
 636         return  FALSE;\r
 637         \r
 638 \r
 639 }\r
 640 \r
 641 //add iot case here: for MP/CE\r
 642 VOID \r
 643 ODM_EdcaParaSelByIot(\r
 644         IN      PVOID           pDM_VOID,\r
 645         OUT     u4Byte          *EDCA_BE_UL,\r
 646         OUT u4Byte              *EDCA_BE_DL\r
 647         )\r
 648 {\r
 649         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 650         PADAPTER                       Adapter = pDM_Odm->Adapter;\r
 651         HAL_DATA_TYPE           *pHalData = GET_HAL_DATA(Adapter);\r
 652         u4Byte                         IOTPeer=0;\r
 653         u4Byte                         ICType=pDM_Odm->SupportICType;\r
 654         u1Byte                         WirelessMode=0xFF;                   //invalid value\r
 655         u4Byte                          RFType=pDM_Odm->RFType;\r
 656           u4Byte                         IOTPeerSubType=0;\r
 657 \r
 658         PMGNT_INFO                      pMgntInfo = &Adapter->MgntInfo;\r
 659         u1Byte                          TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE;\r
 660 \r
 661         if(pDM_Odm->pWirelessMode!=NULL)\r
 662                 WirelessMode=*(pDM_Odm->pWirelessMode);\r
 663                 \r
 664 ///////////////////////////////////////////////////////////\r
 665 ////list paramter for different platform\r
 666 \r
 667         IOTPeer=pMgntInfo->IOTPeer;\r
 668         IOTPeerSubType=pMgntInfo->IOTPeerSubtype;\r
 669         GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus);\r
 670 \r
 671 \r
 672         if(ICType==ODM_RTL8192D)\r
 673         {      \r
 674                 // Single PHY\r
 675                 if(pDM_Odm->RFType==ODM_2T2R)\r
 676                 {\r
 677                         (*EDCA_BE_UL) = 0x60a42b;    //0x5ea42b;\r
 678                         (*EDCA_BE_DL) = 0x60a42b;    //0x5ea42b;\r
 679 \r
 680                 }\r
 681                 else\r
 682                 {\r
 683                         (*EDCA_BE_UL) = 0x6ea42b;\r
 684                         (*EDCA_BE_DL) = 0x6ea42b;\r
 685                 }\r
 686 \r
 687         }\r
 688 ////============================\r
 689 /// IOT case for MP\r
 690 ////============================        \r
 691 \r
 692         else\r
 693         {\r
 694 \r
 695                 if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){\r
 696                         if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R))                 {\r
 697                                 (*EDCA_BE_UL) = 0x60a42b;\r
 698                                 (*EDCA_BE_DL) = 0x60a42b;\r
 699                         }\r
 700                         else\r
 701                         {\r
 702                                 (*EDCA_BE_UL) = 0x6ea42b;\r
 703                                 (*EDCA_BE_DL) = 0x6ea42b;\r
 704                         }\r
 705                 }\r
 706         }\r
 707  \r
 708         if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY)\r
 709         {\r
 710                 (*EDCA_BE_UL) = 0x5ea42b;//Parameter suggested by Scott  //edca_setting_UL[ExtAdapter->MgntInfo.IOTPeer];\r
 711                 (*EDCA_BE_DL) = 0x5ea42b;//Parameter suggested by Scott  //edca_setting_DL[ExtAdapter->MgntInfo.IOTPeer];\r
 712         }\r
 713      \r
 714         #if (INTEL_PROXIMITY_SUPPORT == 1)\r
 715         if(pMgntInfo->IntelClassModeInfo.bEnableCA == TRUE)\r
 716         {\r
 717                 (*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f;\r
 718         }\r
 719         else\r
 720         #endif          \r
 721         {\r
 722                 if((pMgntInfo->IOTAction & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP|HT_IOT_ACT_AMSDU_ENABLE)))\r
 723                 {// To check whether we shall force turn on TXOP configuration.\r
 724                         if(!((*EDCA_BE_UL) & 0xffff0000))\r
 725                                 (*EDCA_BE_UL) |= 0x005e0000; // Force TxOP limit to 0x005e for UL.\r
 726                         if(!((*EDCA_BE_DL) & 0xffff0000))\r
 727                                 (*EDCA_BE_DL) |= 0x005e0000; // Force TxOP limit to 0x005e for DL.\r
 728                 }\r
 729                 \r
 730                 //92D txop can't be set to 0x3e for cisco1250\r
 731                 if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G))\r
 732                 {\r
 733                         (*EDCA_BE_DL) = edca_setting_DL[IOTPeer];\r
 734                         (*EDCA_BE_UL) = edca_setting_UL[IOTPeer];\r
 735                 }\r
 736                 //merge from 92s_92c_merge temp brunch v2445    20120215 \r
 737                 else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B)))\r
 738                 {\r
 739                         (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer];\r
 740                 }\r
 741                 else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A)))\r
 742                 {\r
 743                         (*EDCA_BE_DL) = 0xa630;\r
 744                 }\r
 745 \r
 746                 else if(IOTPeer == HT_IOT_PEER_MARVELL)\r
 747                 {\r
 748                         (*EDCA_BE_DL) = edca_setting_DL[IOTPeer];\r
 749                         (*EDCA_BE_UL) = edca_setting_UL[IOTPeer];\r
 750                 }\r
 751                 else if(IOTPeer == HT_IOT_PEER_ATHEROS)\r
 752                 {\r
 753                         // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue. \r
 754                         if(WirelessMode==ODM_WM_G)\r
 755                                 (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer];\r
 756                         else\r
 757                         (*EDCA_BE_DL) = edca_setting_DL[IOTPeer];\r
 758                         \r
 759                         if(ICType == ODM_RTL8821)\r
 760                                  (*EDCA_BE_DL) = 0x5ea630;\r
 761                         \r
 762                 }\r
 763         }\r
 764 \r
 765         if((ICType == ODM_RTL8192D)&&(IOTPeerSubType == HT_IOT_PEER_LINKSYS_E4200_V1)&&((WirelessMode==ODM_WM_N5G)))\r
 766         {\r
 767                 (*EDCA_BE_DL) = 0x432b;\r
 768                 (*EDCA_BE_UL) = 0x432b;\r
 769         }               \r
 770 \r
 771 \r
 772 \r
 773         if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8192E))           //add 8812AU/8812AE\r
 774         {\r
 775                 (*EDCA_BE_UL) = 0x5ea42b;\r
 776                 (*EDCA_BE_DL) = 0x5ea42b;\r
 777 \r
 778                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx",(*EDCA_BE_UL),(*EDCA_BE_DL)));\r
 779         }\r
 780 \r
 781         // Revised for Atheros DIR-655 IOT issue to improve down link TP, added by Roger, 2013.03.22.\r
 782         if((ICType == ODM_RTL8723A) && (IOTPeerSubType== HT_IOT_PEER_ATHEROS_DIR655) && \r
 783                 (pMgntInfo->dot11CurrentChannelNumber == 6))\r
 784         {\r
 785                 (*EDCA_BE_DL) = 0xa92b;\r
 786         }\r
 787 \r
 788         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx",(*EDCA_BE_UL),(*EDCA_BE_DL)));\r
 789 \r
 790 }\r
 791 \r
 792 \r
 793 VOID\r
 794 odm_EdcaChooseTrafficIdx( \r
 795         IN      PVOID           pDM_VOID,\r
 796         IN      u8Byte                          cur_tx_bytes,  \r
 797         IN      u8Byte                          cur_rx_bytes, \r
 798         IN      BOOLEAN                 bBiasOnRx,\r
 799         OUT BOOLEAN             *pbIsCurRDLState\r
 800         )\r
 801 {       \r
 802         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 803         \r
 804         if(bBiasOnRx)\r
 805         {\r
 806           \r
 807                 if(cur_tx_bytes>(cur_rx_bytes*4))\r
 808                 {\r
 809                         *pbIsCurRDLState=FALSE;\r
 810                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Uplink Traffic\n "));\r
 811 \r
 812                 }\r
 813                 else\r
 814                 {\r
 815                         *pbIsCurRDLState=TRUE;\r
 816                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n"));\r
 817 \r
 818                 }\r
 819         }\r
 820         else\r
 821         {\r
 822                 if(cur_rx_bytes>(cur_tx_bytes*4))\r
 823                 {\r
 824                         *pbIsCurRDLState=TRUE;\r
 825                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Downlink        Traffic\n"));\r
 826 \r
 827                 }\r
 828                 else\r
 829                 {\r
 830                         *pbIsCurRDLState=FALSE;\r
 831                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n"));\r
 832                 }\r
 833         }\r
 834 \r
 835         return ;\r
 836 }\r
 837 \r
 838 #endif\r
 839 \r
 840 #if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL))\r
 841 \r
 842 void odm_EdcaParaInit(\r
 843         IN      PVOID           pDM_VOID\r
 844         )\r
 845 {\r
 846         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 847         prtl8192cd_priv priv            = pDM_Odm->priv;\r
 848         int   mode=priv->pmib->dot11BssType.net_work_type;\r
 849         \r
 850         static unsigned int slot_time, sifs_time;\r
 851         struct ParaRecord EDCA[4];\r
 852 \r
 853          memset(EDCA, 0, 4*sizeof(struct ParaRecord));\r
 854 \r
 855         sifs_time = 10;\r
 856         slot_time = 20;\r
 857 \r
 858         if (mode & (ODM_WM_N24G|ODM_WM_N5G))\r
 859                 sifs_time = 16;\r
 860 \r
 861         if (mode & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G|ODM_WM_A))\r
 862                 slot_time = 9;\r
 863 \r
 864 \r
 865 #ifdef RTK_AC_SUPPORT //for 11ac logo,  edit aifs time for cca test cases\r
 866         if(AC_SIGMA_MODE != AC_SIGMA_NONE)\r
 867                 sifs_time = 10; \r
 868 #endif\r
 869 \r
 870 \r
 871 #if((defined(RTL_MANUAL_EDCA))&&(DM_ODM_SUPPORT_TYPE==ODM_AP))\r
 872          if( priv->pmib->dot11QosEntry.ManualEDCA ) {\r
 873                  if( OPMODE & WIFI_AP_STATE )\r
 874                          memcpy(EDCA, priv->pmib->dot11QosEntry.AP_manualEDCA, 4*sizeof(struct ParaRecord));\r
 875                  else\r
 876                          memcpy(EDCA, priv->pmib->dot11QosEntry.STA_manualEDCA, 4*sizeof(struct ParaRecord));\r
 877 \r
 878                 #ifdef WIFI_WMM\r
 879                 if (QOS_ENABLE)\r
 880                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time));\r
 881                 else\r
 882                 #endif\r
 883                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time));\r
 884 \r
 885         }else\r
 886         #endif //RTL_MANUAL_EDCA\r
 887         {\r
 888 \r
 889                  if(OPMODE & WIFI_AP_STATE)\r
 890                  {\r
 891                         memcpy(EDCA, rtl_ap_EDCA, 2*sizeof(struct ParaRecord));\r
 892 \r
 893                         if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G))\r
 894                                 memcpy(&EDCA[VI], &rtl_ap_EDCA[VI_AG], 2*sizeof(struct ParaRecord));\r
 895                         else\r
 896                                 memcpy(&EDCA[VI], &rtl_ap_EDCA[VI], 2*sizeof(struct ParaRecord));\r
 897                  }\r
 898                  else\r
 899                  {\r
 900                         memcpy(EDCA, rtl_sta_EDCA, 2*sizeof(struct ParaRecord));\r
 901 \r
 902                         if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G))\r
 903                                 memcpy(&EDCA[VI], &rtl_sta_EDCA[VI_AG], 2*sizeof(struct ParaRecord));\r
 904                         else\r
 905                                 memcpy(&EDCA[VI], &rtl_sta_EDCA[VI], 2*sizeof(struct ParaRecord));\r
 906                  }\r
 907                  \r
 908         #ifdef WIFI_WMM\r
 909                 if (QOS_ENABLE)\r
 910                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time));\r
 911                 else\r
 912         #endif\r
 913 \r
 914 #if (DM_ODM_SUPPORT_TYPE==ODM_AP)\r
 915                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM,  (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time));\r
 916 #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL)\r
 917                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM,  (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + 2* slot_time));\r
 918 #endif\r
 919                         \r
 920 \r
 921         }\r
 922 \r
 923         ODM_Write4Byte(pDM_Odm, ODM_EDCA_VO_PARAM, (EDCA[VO].TXOPlimit<< 16) | (EDCA[VO].ECWmax<< 12) | (EDCA[VO].ECWmin<< 8) | (sifs_time + EDCA[VO].AIFSN* slot_time));\r
 924         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM,  (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[BE].AIFSN* slot_time));\r
 925         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (EDCA[BK].TXOPlimit<< 16) | (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[BK].AIFSN* slot_time));\r
 926 \r
 927 #if defined(RTK_AC_SUPPORT) && defined(RTL_MANUAL_EDCA) //for 11ac logo,  make BK worse to seperate with BE.\r
 928         if((AC_SIGMA_MODE != AC_SIGMA_NONE) && (priv->pmib->dot11QosEntry.ManualEDCA))\r
 929         {\r
 930                 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (EDCA[BK].TXOPlimit<< 16) | (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | 0xa4 );\r
 931         }\r
 932 #endif\r
 933 \r
 934 //      ODM_Write1Byte(pDM_Odm,ACMHWCTRL, 0x00);\r
 935 \r
 936         priv->pshare->iot_mode_enable = 0;\r
 937 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)\r
 938         if (priv->pshare->rf_ft_var.wifi_beq_iot)\r
 939                 priv->pshare->iot_mode_VI_exist = 0;\r
 940         \r
 941         #ifdef WMM_VIBE_PRI\r
 942         priv->pshare->iot_mode_BE_exist = 0;\r
 943         #endif\r
 944         \r
 945 #ifdef WMM_BEBK_PRI\r
 946         priv->pshare->iot_mode_BK_exist = 0;\r
 947 #endif\r
 948         \r
 949         #ifdef LOW_TP_TXOP\r
 950         priv->pshare->BE_cwmax_enhance = 0;\r
 951         #endif\r
 952 \r
 953 #elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL)\r
 954       priv->pshare->iot_mode_BE_exist = 0;   \r
 955 #endif\r
 956         priv->pshare->iot_mode_VO_exist = 0;\r
 957 }\r
 958 \r
 959 BOOLEAN\r
 960 ODM_ChooseIotMainSTA(\r
 961         IN      PVOID           pDM_VOID,\r
 962         IN      PSTA_INFO_T             pstat\r
 963         )\r
 964 {\r
 965         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 966         prtl8192cd_priv priv = pDM_Odm->priv;\r
 967         BOOLEAN         bhighTP_found_pstat=FALSE;\r
 968         \r
 969         if ((GET_ROOT(priv)->up_time % 2) == 0) {\r
 970                 unsigned int tx_2s_avg = 0;\r
 971                 unsigned int rx_2s_avg = 0;\r
 972                 int i=0, aggReady=0;\r
 973                 unsigned long total_sum = (priv->pshare->current_tx_bytes+priv->pshare->current_rx_bytes);\r
 974                 int assoc_num = GET_ROOT(priv)->assoc_num;\r
 975 #ifdef MBSSID\r
 976                 if (GET_ROOT(priv)->pmib->miscEntry.vap_enable){\r
 977                         for (i=0; i<RTL8192CD_NUM_VWLAN; ++i)\r
 978                                 assoc_num += GET_ROOT(priv)->pvap_priv[i]-> assoc_num;\r
 979                 }\r
 980 #endif  \r
 981 #ifdef UNIVERSAL_REPEATER\r
 982                 if (IS_DRV_OPEN(GET_VXD_PRIV(GET_ROOT(priv))))\r
 983                         assoc_num += GET_VXD_PRIV(GET_ROOT(priv))-> assoc_num;\r
 984 #endif\r
 985 #ifdef WDS\r
 986                  if(GET_ROOT(priv)->pmib->dot11WdsInfo.wdsEnabled)\r
 987                         assoc_num ++;\r
 988 #endif\r
 989 \r
 990 \r
 991                 pstat->current_tx_bytes += pstat->tx_byte_cnt;\r
 992                 pstat->current_rx_bytes += pstat->rx_byte_cnt;\r
 993 \r
 994                 if (total_sum != 0) {\r
 995                         if (total_sum <= 1000000) {\r
 996                         tx_2s_avg = (unsigned int)((pstat->current_tx_bytes*100) / total_sum);\r
 997                         rx_2s_avg = (unsigned int)((pstat->current_rx_bytes*100) / total_sum);\r
 998                         } else {\r
 999                                 tx_2s_avg = (unsigned int)(pstat->current_tx_bytes / (total_sum / 100));\r
1000                                 rx_2s_avg = (unsigned int)(pstat->current_rx_bytes / (total_sum / 100));\r
1001                         }\r
1002 \r
1003                 }\r
1004 \r
1005 #if(DM_ODM_SUPPORT_TYPE==ODM_ADSL)\r
1006                 if (pstat->ht_cap_len) {\r
1007                         if ((tx_2s_avg + rx_2s_avg) >=25 ) {//50//\r
1008 \r
1009                                         priv->pshare->highTP_found_pstat = pstat;\r
1010                                         bhighTP_found_pstat=TRUE;\r
1011                                 }\r
1012                         }\r
1013 #elif(DM_ODM_SUPPORT_TYPE==ODM_AP)\r
1014                 for(i=0; i<8; i++)\r
1015                         aggReady += (pstat->ADDBA_ready[i]);\r
1016 \r
1017                 if ((pstat->ht_cap_len && (\r
1018 #ifdef  SUPPORT_TX_AMSDU                        \r
1019                         AMSDU_ENABLE || \r
1020 #endif                  \r
1021                         aggReady)) || (pstat->IOTPeer==HT_IOT_PEER_INTEL))\r
1022                 {\r
1023                         if ((assoc_num==1) || (tx_2s_avg + rx_2s_avg >= 25)) {\r
1024                                 priv->pshare->highTP_found_pstat = pstat;\r
1025                         }\r
1026                         \r
1027                 #ifdef CLIENT_MODE\r
1028                         if (OPMODE & WIFI_STATION_STATE) {\r
1029                                 if ((tx_2s_avg + rx_2s_avg) >= 20)\r
1030                                         priv->pshare->highTP_found_pstat = pstat;\r
1031                 }\r
1032                 #endif                          \r
1033         }\r
1034 #endif\r
1035         } \r
1036         else {\r
1037                 pstat->current_tx_bytes = pstat->tx_byte_cnt;\r
1038                 pstat->current_rx_bytes = pstat->rx_byte_cnt;\r
1039         }\r
1040 \r
1041         return bhighTP_found_pstat;\r
1042 }\r
1043 \r
1044 \r
1045 #ifdef WIFI_WMM\r
1046 VOID\r
1047 ODM_IotEdcaSwitch(\r
1048         IN      PVOID           pDM_VOID,\r
1049         IN      unsigned char           enable\r
1050         )\r
1051 {\r
1052         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
1053         prtl8192cd_priv priv    = pDM_Odm->priv;\r
1054         int   mode=priv->pmib->dot11BssType.net_work_type;\r
1055         unsigned int slot_time = 20, sifs_time = 10, BE_TXOP = 47, VI_TXOP = 94;\r
1056         unsigned int vi_cw_max = 4, vi_cw_min = 3, vi_aifs;\r
1057 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1058         u32 be_edca, vi_edca;\r
1059         u16 disable_cfe;\r
1060 #endif\r
1061 \r
1062 #if (DM_ODM_SUPPORT_TYPE==ODM_AP)\r
1063         if (!(!priv->pmib->dot11OperationEntry.wifi_specific ||\r
1064                 ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific))\r
1065         #ifdef CLIENT_MODE\r
1066                 || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific))\r
1067         #endif\r
1068                 ))\r
1069                 return;\r
1070 #endif\r
1071 \r
1072 #ifdef RTK_AC_SUPPORT //for 11ac logo, do not dynamic switch edca \r
1073         if(AC_SIGMA_MODE != AC_SIGMA_NONE)\r
1074                 return;\r
1075 #endif\r
1076 \r
1077         if ((mode & (ODM_WM_N24G|ODM_WM_N5G)) && (priv->pshare->ht_sta_num\r
1078         #ifdef WDS\r
1079                 || ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum)\r
1080         #endif\r
1081                 ))\r
1082                 sifs_time = 16;\r
1083 \r
1084         if (mode & (ODM_WM_N24G|ODM_WM_N5G|ODM_WM_G|ODM_WM_A)) {\r
1085                 slot_time = 9;\r
1086         } \r
1087         else\r
1088         {\r
1089                 BE_TXOP = 94;\r
1090                 VI_TXOP = 188;\r
1091         }\r
1092 \r
1093 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1094         vi_edca = -1;\r
1095         disable_cfe = -1;\r
1096 #endif\r
1097 \r
1098 #if (DM_ODM_SUPPORT_TYPE==ODM_ADSL)\r
1099         if (priv->pshare->iot_mode_VO_exist) {\r
1100                 // to separate AC_VI and AC_BE to avoid using the same EDCA settings\r
1101                 if (priv->pshare->iot_mode_BE_exist) {\r
1102                         vi_cw_max = 5;\r
1103                         vi_cw_min = 3;\r
1104                 } else {\r
1105                         vi_cw_max = 6;\r
1106                         vi_cw_min = 4;\r
1107                 }\r
1108         }\r
1109         vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time);\r
1110 \r
1111 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1112         vi_edca = ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)| (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs;\r
1113 #else\r
1114         ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)| (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs);\r
1115 #endif\r
1116         \r
1117 #elif (DM_ODM_SUPPORT_TYPE==ODM_AP)\r
1118         if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) {\r
1119                 if (priv->pshare->iot_mode_VO_exist) {\r
1120         #ifdef WMM_VIBE_PRI\r
1121                         if (priv->pshare->iot_mode_BE_exist) \r
1122                         {\r
1123                                 vi_cw_max = 5;\r
1124                                 vi_cw_min = 3;\r
1125                                 vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time);\r
1126                         }\r
1127                         else \r
1128         #endif\r
1129                         {\r
1130                         vi_cw_max = 6;\r
1131                         vi_cw_min = 4;\r
1132                         vi_aifs = 0x2b;\r
1133                         }\r
1134                 } \r
1135                 else {\r
1136                         vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time);\r
1137                 }\r
1138 \r
1139 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1140                 vi_edca = ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)\r
1141                         | (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs;\r
1142 #else\r
1143                 ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)\r
1144                         | (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs);\r
1145 #endif\r
1146 \r
1147         #ifdef WMM_BEBK_PRI\r
1148         #ifdef CONFIG_RTL_88E_SUPPORT\r
1149                 if ((GET_CHIP_VER(priv) == VERSION_8188E) && priv->pshare->iot_mode_BK_exist) {\r
1150 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1151                         be_edca = (10 << 12) | (6 << 8) | 0x4f;\r
1152 #else\r
1153                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (10 << 12) | (6 << 8) | 0x4f);\r
1154 #endif\r
1155                 }\r
1156         #endif          \r
1157         #endif\r
1158 #if defined(CONFIG_WLAN_HAL_8881A) \r
1159                 if (GET_CHIP_VER(priv) == VERSION_8881A) \r
1160                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM,  0xa64f);\r
1161 #endif          \r
1162         }\r
1163 #endif\r
1164 \r
1165 \r
1166 \r
1167 #if (DM_ODM_SUPPORT_TYPE==ODM_AP)\r
1168         if (priv->pshare->rf_ft_var.wifi_beq_iot && priv->pshare->iot_mode_VI_exist) {\r
1169 #if defined(CONFIG_RTL_88E_SUPPORT) || defined(CONFIG_RTL_8812_SUPPORT)\r
1170                 if (GET_CHIP_VER(priv) == VERSION_8188E || GET_CHIP_VER(priv) == VERSION_8812E) {\r
1171 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1172                         be_edca = (10 << 12) | (6 << 8) | 0x4f;\r
1173 #else\r
1174                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (10 << 12) | (6 << 8) | 0x4f);\r
1175 #endif\r
1176                 }\r
1177                 else\r
1178 #endif\r
1179                 {\r
1180 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1181                         be_edca = (10 << 12) | (4 << 8) | 0x4f;\r
1182 #else\r
1183                 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (10 << 12) | (4 << 8) | 0x4f);\r
1184 #endif\r
1185                 }\r
1186         } else if(!enable)\r
1187 #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL)      \r
1188         if(!enable)                                 //if iot is disable ,maintain original BEQ PARAM\r
1189 #endif\r
1190         {\r
1191 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1192                 be_edca = (((OPMODE & WIFI_AP_STATE)?6:10) << 12) | (4 << 8)\r
1193                         | (sifs_time + 3 * slot_time);\r
1194                 disable_cfe = 1;\r
1195 #else\r
1196                 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (((OPMODE & WIFI_AP_STATE)?6:10) << 12) | (4 << 8)\r
1197                         | (sifs_time + 3 * slot_time));\r
1198 #endif\r
1199 #ifdef CONFIG_PCI_HCI\r
1200 //              ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) | (DIS_TXOP_CFE));\r
1201 #endif\r
1202         }\r
1203         else\r
1204         {\r
1205                 int txop;\r
1206                 unsigned int cw_max;\r
1207 #ifdef LOW_TP_TXOP\r
1208                 unsigned int txop_close;\r
1209 #endif\r
1210                 \r
1211         #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP))\r
1212                         cw_max = ((priv->pshare->BE_cwmax_enhance) ? 10 : 6);\r
1213                         txop_close = ((priv->pshare->rf_ft_var.low_tp_txop && priv->pshare->rf_ft_var.low_tp_txop_close) ? 1 : 0);\r
1214 \r
1215                         if(priv->pshare->txop_enlarge == 0xe)   //if intel case\r
1216                                 txop = (txop_close ? 0 : (BE_TXOP*2));\r
1217                         else                                                        //if other case\r
1218                                 txop = (txop_close ? 0: (BE_TXOP*priv->pshare->txop_enlarge));\r
1219         #else\r
1220                         cw_max=6;\r
1221                         if((priv->pshare->txop_enlarge==0xe)||(priv->pshare->txop_enlarge==0xd))\r
1222                                 txop=BE_TXOP*2;\r
1223                         else\r
1224                                 txop=BE_TXOP*priv->pshare->txop_enlarge;\r
1225 \r
1226         #endif\r
1227                            \r
1228                 if (priv->pshare->ht_sta_num\r
1229         #ifdef WDS\r
1230                         || ((OPMODE & WIFI_AP_STATE) && (mode & (ODM_WM_N24G|ODM_WM_N5G)) &&\r
1231                         priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum)\r
1232         #endif\r
1233                         ) \r
1234                         {\r
1235 \r
1236                         if (priv->pshare->txop_enlarge == 0xe) {\r
1237                                 // is intel client, use a different edca value\r
1238                                 //ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop<< 16) | (cw_max<< 12) | (4 << 8) | 0x1f);\r
1239                                 if (pDM_Odm->RFType==ODM_1T1R) {\r
1240 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1241                                         be_edca = (txop << 16) | (5 << 12) | (3 << 8) | 0x1f;\r
1242 #else\r
1243                                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (5 << 12) | (3 << 8) | 0x1f);\r
1244 #endif\r
1245                                 }\r
1246                                 else {\r
1247 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1248                                         be_edca = (txop << 16) | (8 << 12) | (5 << 8) | 0x1f;\r
1249 #else\r
1250                                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (8 << 12) | (5 << 8) | 0x1f);\r
1251 #endif\r
1252                                 }\r
1253                                 \r
1254 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1255                                 disable_cfe = 0;\r
1256 #endif\r
1257 #ifdef CONFIG_PCI_HCI\r
1258 //                              ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) & ~(DIS_TXOP_CFE));\r
1259 #endif\r
1260                                 priv->pshare->txop_enlarge = 2;\r
1261                         } \r
1262 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)\r
1263         #ifndef LOW_TP_TXOP\r
1264                          else if (priv->pshare->txop_enlarge == 0xd) {\r
1265                                 // is intel ralink, use a different edca value\r
1266 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1267                                 be_edca = (txop << 16) | (6 << 12) | (5 << 8) | 0x2b;\r
1268 #else\r
1269                                 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (6 << 12) | (5 << 8) | 0x2b);\r
1270 #endif\r
1271                                 priv->pshare->txop_enlarge = 2;\r
1272                         } \r
1273         #endif\r
1274 #endif\r
1275                         else \r
1276                         {\r
1277 //                              if (txop == 0) {\r
1278 //#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1279 //                                      disable_cfe = 1;\r
1280 //#endif\r
1281 //#ifdef CONFIG_PCI_HCI\r
1282 //                                      ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) | (DIS_TXOP_CFE));\r
1283 //#endif\r
1284 //                              }\r
1285                                         \r
1286                                 if (pDM_Odm->RFType==ODM_2T2R) {\r
1287 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1288                                         be_edca = (txop << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time);\r
1289 #else\r
1290                                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) |\r
1291                                                 (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time));\r
1292 #endif\r
1293                                 }\r
1294                                 else\r
1295                                 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)\r
1296                                 {\r
1297 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1298                                         be_edca = (txop << 16) |\r
1299                                                 (((priv->pshare->BE_cwmax_enhance) ? 10 : 5) << 12) | (3 << 8) | (sifs_time + 2 * slot_time);\r
1300 #else\r
1301                                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) |\r
1302                                                 (((priv->pshare->BE_cwmax_enhance) ? 10 : 5) << 12) | (3 << 8) | (sifs_time + 2 * slot_time));\r
1303 #endif\r
1304                                 }\r
1305                                 #else\r
1306                                 {\r
1307                                         PSTA_INFO_T             pstat = priv->pshare->highTP_found_pstat;\r
1308                                         if ((GET_CHIP_VER(priv)==VERSION_8881A) && pstat && (pstat->IOTPeer == HT_IOT_PEER_HTC))\r
1309                                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, 0x642b);\r
1310                                         else {\r
1311 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1312                                         be_edca = (txop << 16) | (5 << 12) | (3 << 8) | (sifs_time + 2 * slot_time);\r
1313                                 #else\r
1314                                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) |\r
1315                                                 (5 << 12) | (3 << 8) | (sifs_time + 2 * slot_time));\r
1316 #endif\r
1317                                         }\r
1318                                 }\r
1319                                 #endif\r
1320                         }\r
1321                 }\r
1322               else \r
1323               {\r
1324  #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP))\r
1325 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1326                          be_edca = (BE_TXOP << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time);\r
1327 #else\r
1328                          ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time));\r
1329 #endif\r
1330  #else\r
1331                 #if defined(CONFIG_RTL_8196D) || defined(CONFIG_RTL_8197DL) || defined(CONFIG_RTL_8196E) || (defined(CONFIG_RTL_8197D) && !defined(CONFIG_PORT0_EXT_GIGA))\r
1332 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1333                         be_edca = (BE_TXOP*2 << 16) | (cw_max << 12) | (5 << 8) | (sifs_time + 3 * slot_time);\r
1334  #else\r
1335                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM,  (BE_TXOP*2 << 16) | (cw_max << 12) | (5 << 8) | (sifs_time + 3 * slot_time));\r
1336 #endif\r
1337                 #else\r
1338 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1339                         be_edca = (BE_TXOP*2 << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time);\r
1340                 #else\r
1341                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM,  (BE_TXOP*2 << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time));\r
1342                 #endif\r
1343                 #endif\r
1344 /*              \r
1345                 if (priv->pshare->txop_enlarge == 0xe) {\r
1346 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1347                         disable_cfe = 0;\r
1348 #endif\r
1349         #ifdef CONFIG_PCI_HCI\r
1350                         ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) & ~(DIS_TXOP_CFE));\r
1351         #endif\r
1352                 } else {\r
1353 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1354                         disable_cfe = 1;\r
1355 #endif\r
1356         #ifdef CONFIG_PCI_HCI\r
1357                         ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) | (DIS_TXOP_CFE));\r
1358         #endif\r
1359                 }\r
1360 */                      \r
1361  #endif\r
1362               }\r
1363 \r
1364         }\r
1365         \r
1366 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)\r
1367         notify_IOT_EDCA_switch(priv, be_edca, vi_edca, disable_cfe);\r
1368 #endif\r
1369 }\r
1370 #endif\r
1371 \r
1372 VOID \r
1373 odm_IotEngine(\r
1374         IN      PVOID           pDM_VOID\r
1375         )\r
1376 {\r
1377         PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
1378         struct rtl8192cd_priv *priv=pDM_Odm->priv;\r
1379         PSTA_INFO_T pstat = NULL;\r
1380         u4Byte i;\r
1381         \r
1382 #ifdef WIFI_WMM\r
1383         unsigned int switch_turbo = 0, avg_tp;\r
1384 #endif  \r
1385 ////////////////////////////////////////////////////////\r
1386 //  if EDCA Turbo function is not supported or Manual EDCA Setting\r
1387 //  then return\r
1388 ////////////////////////////////////////////////////////\r
1389         if(!(pDM_Odm->SupportAbility&ODM_MAC_EDCA_TURBO)){\r
1390                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO NOT SUPPORTED\n"));\r
1391                 return;\r
1392         }\r
1393         \r
1394 #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined(RTL_MANUAL_EDCA) && defined(WIFI_WMM))\r
1395         if(priv->pmib->dot11QosEntry.ManualEDCA){\r
1396                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: MANUAL SETTING\n"));\r
1397                 return ;\r
1398         }\r
1399 #endif \r
1400 \r
1401 #if !(DM_ODM_SUPPORT_TYPE &ODM_AP)\r
1402  //////////////////////////////////////////////////////\r
1403  //find high TP STA every 2s\r
1404 //////////////////////////////////////////////////////\r
1405         if ((GET_ROOT(priv)->up_time % 2) == 0) \r
1406                 priv->pshare->highTP_found_pstat==NULL;\r
1407 \r
1408 #if 0\r
1409         phead = &priv->asoc_list;\r
1410         plist = phead->next;\r
1411         while(plist != phead)   {\r
1412                 pstat = list_entry(plist, struct stat_info, asoc_list);\r
1413 \r
1414                 if(ODM_ChooseIotMainSTA(pDM_Odm, pstat));              //find the correct station\r
1415                         break;\r
1416                 if (plist == plist->next)                                          //the last plist \r
1417                         break;\r
1418                 plist = plist->next;\r
1419         };\r
1420 #endif\r
1421 \r
1422         //find highTP STA\r
1423         for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++) {\r
1424                 pstat = pDM_Odm->pODM_StaInfo[i];\r
1425                 if(IS_STA_VALID(pstat) && (ODM_ChooseIotMainSTA(pDM_Odm, pstat)))        //find the correct station\r
1426                                 break;\r
1427         }\r
1428 \r
1429  //////////////////////////////////////////////////////\r
1430  //if highTP STA is not found, then return\r
1431  //////////////////////////////////////////////////////\r
1432         if(priv->pshare->highTP_found_pstat==NULL)      {\r
1433                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: NO HT STA FOUND\n"));\r
1434                 return;\r
1435         }\r
1436 #endif\r
1437 \r
1438         pstat=priv->pshare->highTP_found_pstat;\r
1439         if(pstat) {\r
1440                 if((pstat->tx_avarage + pstat->rx_avarage) < (1<<17))   // 1M bps\r
1441                         pstat = NULL;\r
1442         }\r
1443 \r
1444 #ifdef WIFI_WMM\r
1445         if (QOS_ENABLE) {\r
1446                 if (!priv->pmib->dot11OperationEntry.wifi_specific \r
1447                 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)\r
1448                         ||((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific))\r
1449                 #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL)\r
1450                         || (priv->pmib->dot11OperationEntry.wifi_specific == 2)\r
1451                 #endif\r
1452                         ) {\r
1453                         if (priv->pshare->iot_mode_enable &&\r
1454                                 ((priv->pshare->phw->VO_pkt_count > 50) ||\r
1455                                  (priv->pshare->phw->VI_pkt_count > 50) ||\r
1456                                  (priv->pshare->phw->BK_pkt_count > 50))) {\r
1457                                 priv->pshare->iot_mode_enable = 0;\r
1458                                 switch_turbo++;\r
1459 #ifdef CONFIG_WLAN_HAL_8881A\r
1460                                 if (GET_CHIP_VER(priv) == VERSION_8881A) {\r
1461                                         RTL_W32(0x460, 0x03086666);\r
1462                                 }\r
1463 #endif //CONFIG_WLAN_HAL_8881A\r
1464                         } else if ((!priv->pshare->iot_mode_enable) &&\r
1465                                 ((priv->pshare->phw->VO_pkt_count < 50) &&\r
1466                                  (priv->pshare->phw->VI_pkt_count < 50) &&\r
1467                                  (priv->pshare->phw->BK_pkt_count < 50))) {\r
1468                                 priv->pshare->iot_mode_enable++;\r
1469                                 switch_turbo++;\r
1470 //#ifdef CONFIG_WLAN_HAL_8881A\r
1471 #if 0\r
1472                                 if (GET_CHIP_VER(priv) == VERSION_8881A) {\r
1473                                         if (get_bonding_type_8881A()==BOND_8881AB) {\r
1474                                                 RTL_W32(0x460, 0x03086666);\r
1475                                         }\r
1476                                         else {\r
1477                                                 RTL_W32(0x460, 0x0320ffff);\r
1478                                         }\r
1479                                 }\r
1480 #endif //CONFIG_WLAN_HAL_8881A\r
1481                         }\r
1482                 }\r
1483 \r
1484 \r
1485                 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)\r
1486                 if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific)\r
1487                 #elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL)\r
1488                 if (priv->pmib->dot11OperationEntry.wifi_specific) \r
1489                 #endif\r
1490                 {\r
1491                         if (!priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count > 50)) {\r
1492                                 priv->pshare->iot_mode_VO_exist++;\r
1493                                 switch_turbo++;\r
1494                         } else if (priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count < 50)) {\r
1495                                 priv->pshare->iot_mode_VO_exist = 0;\r
1496                                 switch_turbo++;\r
1497                         }\r
1498 #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI)))\r
1499                         if (priv->pshare->iot_mode_VO_exist) {\r
1500                                 //printk("[%s %d] BE_pkt_count=%d\n", __FUNCTION__, __LINE__, priv->pshare->phw->BE_pkt_count);\r
1501                                 if (!priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count > 250)) {\r
1502                                         priv->pshare->iot_mode_BE_exist++;\r
1503                                         switch_turbo++;\r
1504                                 } else if (priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count < 250)) {\r
1505                                         priv->pshare->iot_mode_BE_exist = 0;\r
1506                                         switch_turbo++;\r
1507                                 }\r
1508                         }\r
1509 #endif\r
1510 \r
1511 #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_BEBK_PRI)))\r
1512                         if (priv->pshare->phw->BE_pkt_count) {\r
1513                                 //printk("[%s %d] BK_pkt_count=%d\n", __FUNCTION__, __LINE__, priv->pshare->phw->BK_pkt_count);\r
1514                                 if (!priv->pshare->iot_mode_BK_exist && (priv->pshare->phw->BK_pkt_count > 250)) {\r
1515                                         priv->pshare->iot_mode_BK_exist++;\r
1516                                         switch_turbo++;\r
1517                                 } else if (priv->pshare->iot_mode_BK_exist && (priv->pshare->phw->BK_pkt_count < 250)) {\r
1518                                         priv->pshare->iot_mode_BK_exist = 0;\r
1519                                         switch_turbo++;\r
1520                                 }\r
1521                         }\r
1522 #endif\r
1523 \r
1524 #if (DM_ODM_SUPPORT_TYPE==ODM_AP)\r
1525                         if (priv->pshare->rf_ft_var.wifi_beq_iot) \r
1526                         {\r
1527                                 if (!priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count > 50)) {\r
1528                                         priv->pshare->iot_mode_VI_exist++;\r
1529                                         switch_turbo++;\r
1530                                 } else if (priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count < 50)) {\r
1531                                         priv->pshare->iot_mode_VI_exist = 0;\r
1532                                         switch_turbo++;\r
1533                                 }\r
1534                         }\r
1535 #endif\r
1536 \r
1537                 }\r
1538                 else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) {\r
1539                    if (priv->pshare->txop_enlarge) {\r
1540                            priv->pshare->txop_enlarge = 0;\r
1541                            if (priv->pshare->iot_mode_enable)\r
1542                                         switch_turbo++;\r
1543                                 }\r
1544                 }\r
1545 \r
1546 #if(defined(CLIENT_MODE) && (DM_ODM_SUPPORT_TYPE==ODM_AP))\r
1547         if ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific))\r
1548         {\r
1549             if (priv->pshare->iot_mode_enable &&\r
1550                 (((priv->pshare->phw->VO_pkt_count > 50) ||\r
1551                  (priv->pshare->phw->VI_pkt_count > 50) ||\r
1552                  (priv->pshare->phw->BK_pkt_count > 50)) ||\r
1553                  (pstat && (!pstat->ADDBA_ready[0]) & (!pstat->ADDBA_ready[3]))))\r
1554             {\r
1555                 priv->pshare->iot_mode_enable = 0;\r
1556                 switch_turbo++;\r
1557             }\r
1558             else if ((!priv->pshare->iot_mode_enable) &&\r
1559                 (((priv->pshare->phw->VO_pkt_count < 50) &&\r
1560                  (priv->pshare->phw->VI_pkt_count < 50) &&\r
1561                  (priv->pshare->phw->BK_pkt_count < 50)) &&\r
1562                  (pstat && (pstat->ADDBA_ready[0] | pstat->ADDBA_ready[3]))))\r
1563             {\r
1564                 priv->pshare->iot_mode_enable++;\r
1565                 switch_turbo++;\r
1566             }\r
1567         }\r
1568 #endif\r
1569 \r
1570                 priv->pshare->phw->VO_pkt_count = 0;\r
1571                 priv->pshare->phw->VI_pkt_count = 0;\r
1572                 priv->pshare->phw->BK_pkt_count = 0;\r
1573 \r
1574         #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI)))\r
1575                 priv->pshare->phw->BE_pkt_count = 0;\r
1576         #endif\r
1577                 \r
1578         #if(DM_ODM_SUPPORT_TYPE==ODM_AP)\r
1579                 if (priv->pshare->rf_ft_var.wifi_beq_iot)\r
1580                         priv->pshare->phw->VI_rx_pkt_count = 0;\r
1581                 #endif\r
1582 \r
1583         }\r
1584 #endif\r
1585 \r
1586         if ((priv->up_time % 2) == 0) {\r
1587                 /*\r
1588                  * decide EDCA content for different chip vendor\r
1589                  */\r
1590 #ifdef WIFI_WMM\r
1591         #if(DM_ODM_SUPPORT_TYPE==ODM_ADSL)\r
1592                 if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2)\r
1593         \r
1594         #elif(DM_ODM_SUPPORT_TYPE==ODM_AP)\r
1595                 if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || \r
1596                         ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2))\r
1597                 #ifdef CLIENT_MODE\r
1598             || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2))\r
1599                 #endif\r
1600         #endif\r
1601                 ))\r
1602         \r
1603                 {\r
1604 \r
1605                         if (pstat && pstat->rssi >= priv->pshare->rf_ft_var.txop_enlarge_upper) {\r
1606 #ifdef LOW_TP_TXOP\r
1607                                 if (pstat->IOTPeer==HT_IOT_PEER_INTEL)\r
1608                                 {\r
1609                                         if (priv->pshare->txop_enlarge != 0xe)\r
1610                                         {\r
1611                                                 priv->pshare->txop_enlarge = 0xe;\r
1612 \r
1613                                                 if (priv->pshare->iot_mode_enable)\r
1614                                                         switch_turbo++;\r
1615                                         }\r
1616                                 } \r
1617                                 else if (priv->pshare->txop_enlarge != 2) \r
1618                                 {\r
1619                                         priv->pshare->txop_enlarge = 2;\r
1620                                         if (priv->pshare->iot_mode_enable)\r
1621                                                 switch_turbo++;\r
1622                                 }\r
1623 #else\r
1624                                 if (priv->pshare->txop_enlarge != 2)\r
1625                                 {\r
1626                                         if (pstat->IOTPeer==HT_IOT_PEER_INTEL)\r
1627                                                 priv->pshare->txop_enlarge = 0xe;                                               \r
1628                                         else if (pstat->IOTPeer==HT_IOT_PEER_RALINK)\r
1629                                                 priv->pshare->txop_enlarge = 0xd;                                               \r
1630                                         else if (pstat->IOTPeer==HT_IOT_PEER_HTC)\r
1631                                                 priv->pshare->txop_enlarge = 0;         \r
1632                                         else\r
1633                                                 priv->pshare->txop_enlarge = 2;\r
1634 \r
1635                                         if (priv->pshare->iot_mode_enable)\r
1636                                                 switch_turbo++;\r
1637                                 }\r
1638 #endif\r
1639                         }\r
1640                         else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) \r
1641                         {\r
1642                                 if (priv->pshare->txop_enlarge) {\r
1643                                         priv->pshare->txop_enlarge = 0;\r
1644                                         if (priv->pshare->iot_mode_enable)\r
1645                                                 switch_turbo++;\r
1646                                 }\r
1647                         }\r
1648 \r
1649 #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&( defined LOW_TP_TXOP))\r
1650                         // for Intel IOT, need to enlarge CW MAX from 6 to 10\r
1651                         if (pstat && pstat->IOTPeer==HT_IOT_PEER_INTEL && (((pstat->tx_avarage+pstat->rx_avarage)>>10) < \r
1652                                         priv->pshare->rf_ft_var.cwmax_enhance_thd)) \r
1653                         {\r
1654                                 if (!priv->pshare->BE_cwmax_enhance && priv->pshare->iot_mode_enable)\r
1655                                 {\r
1656                                         priv->pshare->BE_cwmax_enhance = 1;\r
1657                                         switch_turbo++;\r
1658                                 }\r
1659                         } else {\r
1660                                 if (priv->pshare->BE_cwmax_enhance) {\r
1661                                         priv->pshare->BE_cwmax_enhance = 0;\r
1662                                         switch_turbo++;\r
1663                                 }\r
1664                         }\r
1665 #endif\r
1666                 }\r
1667 #endif\r
1668                 priv->pshare->current_tx_bytes = 0;\r
1669                 priv->pshare->current_rx_bytes = 0;\r
1670         }else {\r
1671                 if ((GET_CHIP_VER(priv) == VERSION_8881A)||(GET_CHIP_VER(priv) == VERSION_8192E)|| (GET_CHIP_VER(priv) == VERSION_8188E) ){\r
1672                         unsigned int uldl_tp = (priv->pshare->current_tx_bytes+priv->pshare->current_rx_bytes)>>17;\r
1673                         if((uldl_tp > 40) && (priv->pshare->agg_to!= 1)) {\r
1674                                 RTL_W8(0x462, 0x08);\r
1675                                 priv->pshare->agg_to = 1;\r
1676                         } else if((uldl_tp < 35) && (priv->pshare->agg_to !=0)) {\r
1677                                 RTL_W8(0x462, 0x02);\r
1678                                 priv->pshare->agg_to = 0;\r
1679                         } \r
1680                 }\r
1681         }\r
1682         \r
1683 #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined( SW_TX_QUEUE))\r
1684         if(AMPDU_ENABLE) {\r
1685 #ifdef TX_EARLY_MODE\r
1686                 if (GET_TX_EARLY_MODE) {\r
1687                         if (!GET_EM_SWQ_ENABLE &&\r
1688                                 ((priv->assoc_num > 1) ||\r
1689                                 (pstat && pstat->IOTPeer != HT_IOT_PEER_UNKNOWN))) {\r
1690                                 if ((priv->pshare->em_tx_byte_cnt >> 17) > EM_TP_UP_BOUND) \r
1691                                         priv->pshare->reach_tx_limit_cnt++;                             \r
1692                                 else                                    \r
1693                                         priv->pshare->reach_tx_limit_cnt = 0;   \r
1694 \r
1695                                 if (priv->pshare->txop_enlarge && priv->pshare->reach_tx_limit_cnt) { //>= WAIT_TP_TIME//\r
1696                                         GET_EM_SWQ_ENABLE = 1;                  \r
1697                                         priv->pshare->reach_tx_limit_cnt = 0;\r
1698 \r
1699                                         if (pstat->IOTPeer == HT_IOT_PEER_INTEL)\r
1700                                                 MAX_EM_QUE_NUM = 12;\r
1701                                         else if (pstat->IOTPeer == HT_IOT_PEER_RALINK)\r
1702                                                 MAX_EM_QUE_NUM = 10;\r
1703                                         \r
1704                                         enable_em(priv);                        \r
1705                                 }\r
1706                         }\r
1707                         else if (GET_EM_SWQ_ENABLE) {\r
1708                                 if ((priv->pshare->em_tx_byte_cnt >> 17) < EM_TP_LOW_BOUND)\r
1709                                         priv->pshare->reach_tx_limit_cnt++;                             \r
1710                                 else                                    \r
1711                                         priv->pshare->reach_tx_limit_cnt = 0;   \r
1712 \r
1713                                 if (!priv->pshare->txop_enlarge || priv->pshare->reach_tx_limit_cnt >= WAIT_TP_TIME) {\r
1714                                         GET_EM_SWQ_ENABLE = 0;\r
1715                                         priv->pshare->reach_tx_limit_cnt = 0;\r
1716                                         disable_em(priv);\r
1717                                 }\r
1718                         }\r
1719                 }\r
1720 #endif\r
1721 \r
1722 #if defined(CONFIG_WLAN_HAL_8881A) || defined(CONFIG_WLAN_HAL_8192EE) || defined(CONFIG_RTL_8812_SUPPORT) || defined(CONFIG_WLAN_HAL_8814AE)\r
1723         if (pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8814A) {      \r
1724                 if (priv->assoc_num > 9)\r
1725         {\r
1726         if (priv->swq_txmac_chg >= priv->pshare->rf_ft_var.swq_en_highthd){\r
1727                                 if ((priv->swq_decision == 0)){\r
1728                                 switch_turbo++;\r
1729                                 if (priv->pshare->txop_enlarge == 0)\r
1730                                         priv->pshare->txop_enlarge = 2;\r
1731                                         priv->swq_decision = 1;\r
1732                                 }\r
1733                         else\r
1734                         {\r
1735                                 if ((switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0))\r
1736                                 {\r
1737                                         priv->pshare->txop_enlarge = 2;\r
1738                                         switch_turbo--;\r
1739                                 }\r
1740                         }\r
1741                 }\r
1742                 else if(priv->swq_txmac_chg <= priv->pshare->rf_ft_var.swq_dis_lowthd){\r
1743                                 priv->swq_decision = 0;\r
1744                 }\r
1745                         else if ((priv->swq_decision == 1) && (switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0))        {\r
1746                         priv->pshare->txop_enlarge = 2;\r
1747                         switch_turbo--;\r
1748                 }\r
1749                 } else {\r
1750                         priv->swq_decision = 0;\r
1751     }\r
1752         } else if(CONFIG_WLAN_NOT_HAL_EXIST)\r
1753 #endif\r
1754                 {       \r
1755                 if (priv->assoc_num > 1)\r
1756         {\r
1757         if (priv->swq_txmac_chg >= priv->pshare->rf_ft_var.swq_en_highthd){\r
1758                                 if ((priv->swq_decision == 0)){\r
1759                                 switch_turbo++;\r
1760                                 if (priv->pshare->txop_enlarge == 0)\r
1761                                         priv->pshare->txop_enlarge = 2;\r
1762                                         priv->swq_decision = 1;\r
1763                                 }\r
1764                         else\r
1765                         {\r
1766                                 if ((switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0))\r
1767                                 {\r
1768                                         priv->pshare->txop_enlarge = 2;\r
1769                                         switch_turbo--;\r
1770                                 }\r
1771                         }\r
1772                 }\r
1773                 else if(priv->swq_txmac_chg <= priv->pshare->rf_ft_var.swq_dis_lowthd){\r
1774                                 priv->swq_decision = 0;\r
1775                 }\r
1776                         else if ((priv->swq_decision == 1) && (switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0))        {\r
1777                         priv->pshare->txop_enlarge = 2;\r
1778                         switch_turbo--;\r
1779                 }\r
1780     }\r
1781         //#if (defined CONFIG_RTL_819XD))\r
1782                 else if (priv->assoc_num == 1 && (priv->up_time % 2 == 0)\r
1783 #if (DM_ODM_SUPPORT_TYPE==ODM_AP) && defined(TX_EARLY_MODE)\r
1784                         && (!GET_TX_EARLY_MODE || !GET_EM_SWQ_ENABLE) \r
1785 #endif\r
1786                 ) {\r
1787                         if ((pstat) && (pstat->ADDBA_ready[0] | pstat->ADDBA_ready[3])) {\r
1788                                 //int en_thd = 14417920>>(priv->up_time % 2);\r
1789                                 avg_tp = (pstat->current_tx_bytes >> 17);\r
1790 \r
1791                                 //if ((priv->swq_decision == 0) && (pstat->current_tx_bytes > en_thd) && (pstat->current_rx_bytes > en_thd) )  { //50Mbps\r
1792                                 if ((priv->swq_decision == 0) && (avg_tp  > TP_HIGH_WATER_MARK)) { //55Mbps\r
1793                                         //printk("[%s:%d] swq_decision=1 current_tp: %d Mbps\n", __FUNCTION__, __LINE__, avg_tp);\r
1794                                         priv->swq_decision = 1;\r
1795                                 }\r
1796                                 //else if ((priv->swq_decision == 1) && ((pstat->tx_avarage < 4587520) || (pstat->rx_avarage < 4587520))) { //35Mbps\r
1797                                 else if ((priv->swq_decision == 1) && (avg_tp < TP_LOW_WATER_MARK)) { //35Mbps\r
1798                                         //printk("[%s:%d] swq_decision=0 current_tp: %d Mbps\n", __FUNCTION__, __LINE__, avg_tp);\r
1799                                         priv->swq_decision = 0;\r
1800                                 }\r
1801                         } else {\r
1802                                 priv->swq_decision = 0;\r
1803             }\r
1804             }\r
1805         }\r
1806                 if( (priv->swq_decision == 1) \r
1807 #if (DM_ODM_SUPPORT_TYPE==ODM_AP) && defined(TX_EARLY_MODE)             \r
1808                 || (GET_EM_SWQ_ENABLE == 1) \r
1809 #endif          \r
1810                 ) {\r
1811                         priv->swq_en = 1;\r
1812                         priv->swqen_keeptime = priv->up_time;\r
1813                 } else {\r
1814             priv->swq_en = 0;\r
1815                         priv->swqen_keeptime = 0;\r
1816         }\r
1817     }\r
1818 #endif\r
1819 \r
1820 #ifdef WIFI_WMM\r
1821 #ifdef LOW_TP_TXOP\r
1822         if ((!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2))\r
1823                 && QOS_ENABLE) {\r
1824                 if (switch_turbo || priv->pshare->rf_ft_var.low_tp_txop) {\r
1825                         unsigned int thd_tp;\r
1826                         unsigned char under_thd;\r
1827                         unsigned int curr_tp;\r
1828 \r
1829                         if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G))\r
1830                         {\r
1831                                 // Determine the upper bound throughput threshold.\r
1832                                 if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G)) {\r
1833                                         if (priv->assoc_num && priv->assoc_num != priv->pshare->ht_sta_num)\r
1834                                                 thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g;\r
1835                                         else\r
1836                                                 thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_n;\r
1837                                 }\r
1838                                 else\r
1839                                         thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g;\r
1840 \r
1841                                 // Determine to close txop.\r
1842 #if defined(UNIVERSAL_REPEATER) || defined(MBSSID)\r
1843                                 if(IS_STA_VALID(pstat)) \r
1844                                 {       \r
1845                                         struct rtl8192cd_priv *tmppriv;\r
1846                                         struct aid_obj *aidarray;       \r
1847                                         aidarray = container_of(pstat, struct aid_obj, station);\r
1848                                         tmppriv = aidarray->priv;\r
1849 \r
1850                                         curr_tp = (unsigned int)(tmppriv->ext_stats.tx_avarage>>17) + (unsigned int)(tmppriv->ext_stats.rx_avarage>>17);\r
1851                                 } \r
1852                                 else \r
1853 #endif\r
1854                                 curr_tp = (unsigned int)(priv->ext_stats.tx_avarage>>17) + (unsigned int)(priv->ext_stats.rx_avarage>>17);\r
1855                                 if (curr_tp <= thd_tp && curr_tp >= priv->pshare->rf_ft_var.low_tp_txop_thd_low)\r
1856                                         under_thd = 1;\r
1857                                 else\r
1858                                         under_thd = 0;\r
1859                         }\r
1860                         else\r
1861                         {\r
1862                                 under_thd = 0;\r
1863                         }\r
1864 \r
1865                         if (switch_turbo) \r
1866                         {\r
1867                                 priv->pshare->rf_ft_var.low_tp_txop_close = under_thd;\r
1868                                 priv->pshare->rf_ft_var.low_tp_txop_count = 0;\r
1869                         }\r
1870                         else if (priv->pshare->iot_mode_enable && (priv->pshare->rf_ft_var.low_tp_txop_close != under_thd)) {\r
1871                                 priv->pshare->rf_ft_var.low_tp_txop_count++;\r
1872                                 if (priv->pshare->rf_ft_var.low_tp_txop_close) {\r
1873                                         priv->pshare->rf_ft_var.low_tp_txop_count = priv->pshare->rf_ft_var.low_tp_txop_delay;\r
1874                                 }\r
1875                                 if (priv->pshare->rf_ft_var.low_tp_txop_count ==priv->pshare->rf_ft_var.low_tp_txop_delay) \r
1876 \r
1877                                 {                                       \r
1878                                         priv->pshare->rf_ft_var.low_tp_txop_count = 0;\r
1879                                         priv->pshare->rf_ft_var.low_tp_txop_close = under_thd;\r
1880                                         switch_turbo++;\r
1881                                 }\r
1882                         } \r
1883                         else \r
1884                         {\r
1885                                 priv->pshare->rf_ft_var.low_tp_txop_count = 0;\r
1886                         }\r
1887                 }\r
1888         }\r
1889 #endif          \r
1890 \r
1891 #ifdef WMM_DSCP_C42\r
1892         if (switch_turbo) {\r
1893                 if (!priv->pshare->iot_mode_enable && !priv->pshare->aggrmax_change) {\r
1894                         RTL_W16(0x4ca, 0x0404);\r
1895                         priv->pshare->aggrmax_change = 1;\r
1896                 }\r
1897                 else if (priv->pshare->iot_mode_enable && priv->pshare->aggrmax_change) {\r
1898                         RTL_W16(0x4ca, priv->pshare->aggrmax_bak);\r
1899                         priv->pshare->aggrmax_change = 0;\r
1900                 }\r
1901         } \r
1902 #endif\r
1903 #ifdef TX_EARLY_MODE\r
1904                 unsigned int em_tp = ((priv->ext_stats.tx_avarage>>17) + (priv->ext_stats.rx_avarage>>17));\r
1905                 if (em_tp > 80)\r
1906                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (0x5e << 16) | (4 << 12) | (3 << 8) | 0x19);\r
1907                 else //if (em_tp < 75)\r
1908                         ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (0x5e << 16) | (6 << 12) | (5 << 8) | 0x2b);\r
1909 #endif\r
1910         if (switch_turbo)\r
1911                 ODM_IotEdcaSwitch( pDM_Odm, priv->pshare->iot_mode_enable );\r
1912 #endif\r
1913 }\r
1914 #endif\r
1915 \r