1 //============================================================
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4 // This file is for RTL8192E Co-exist mechanism
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7 // 2012/11/15 Cosa first check in.
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9 //============================================================
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11 //============================================================
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13 //============================================================
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14 #include "Mp_Precomp.h"
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15 #if(BT_30_SUPPORT == 1)
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16 //============================================================
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17 // Global variables, these are static variables
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18 //============================================================
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19 static COEX_DM_8192E_2ANT GLCoexDm8192e2Ant;
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20 static PCOEX_DM_8192E_2ANT pCoexDm=&GLCoexDm8192e2Ant;
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21 static COEX_STA_8192E_2ANT GLCoexSta8192e2Ant;
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22 static PCOEX_STA_8192E_2ANT pCoexSta=&GLCoexSta8192e2Ant;
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24 const char *const GLBtInfoSrc8192e2Ant[]={
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27 "BT Info[bt auto report]",
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30 u4Byte GLCoexVerDate8192e2Ant=20130912;
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31 u4Byte GLCoexVer8192e2Ant=0x35;
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33 //============================================================
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34 // local function proto type if needed
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35 //============================================================
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36 //============================================================
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37 // local function start with halbtc8192e2ant_
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38 //============================================================
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40 halbtc8192e2ant_BtRssiState(
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47 u1Byte btRssiState=pCoexSta->preBtRssiState;
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49 btRssi = pCoexSta->btRssi;
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53 if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
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54 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW))
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56 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi pre state=LOW\n"));
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57 if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
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59 btRssiState = BTC_RSSI_STATE_HIGH;
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60 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to High\n"));
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64 btRssiState = BTC_RSSI_STATE_STAY_LOW;
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65 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Low\n"));
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70 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi pre state=HIGH\n"));
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71 if(btRssi < rssiThresh)
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73 btRssiState = BTC_RSSI_STATE_LOW;
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74 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Low\n"));
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78 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
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79 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at High\n"));
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83 else if(levelNum == 3)
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85 if(rssiThresh > rssiThresh1)
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87 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi thresh error!!\n"));
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88 return pCoexSta->preBtRssiState;
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91 if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
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92 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW))
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94 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi pre state=LOW\n"));
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95 if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
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97 btRssiState = BTC_RSSI_STATE_MEDIUM;
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98 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Medium\n"));
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102 btRssiState = BTC_RSSI_STATE_STAY_LOW;
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103 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Low\n"));
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106 else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) ||
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107 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM))
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109 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi pre state=MEDIUM\n"));
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110 if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
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112 btRssiState = BTC_RSSI_STATE_HIGH;
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113 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to High\n"));
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115 else if(btRssi < rssiThresh)
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117 btRssiState = BTC_RSSI_STATE_LOW;
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118 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Low\n"));
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122 btRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
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123 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Medium\n"));
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128 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi pre state=HIGH\n"));
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129 if(btRssi < rssiThresh1)
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131 btRssiState = BTC_RSSI_STATE_MEDIUM;
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132 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Medium\n"));
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136 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
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137 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at High\n"));
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142 pCoexSta->preBtRssiState = btRssiState;
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144 return btRssiState;
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148 halbtc8192e2ant_WifiRssiState(
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149 IN PBTC_COEXIST pBtCoexist,
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151 IN u1Byte levelNum,
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152 IN u1Byte rssiThresh,
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153 IN u1Byte rssiThresh1
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157 u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index];
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159 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
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163 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
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164 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
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166 if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
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168 wifiRssiState = BTC_RSSI_STATE_HIGH;
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169 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n"));
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173 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
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174 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n"));
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179 if(wifiRssi < rssiThresh)
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181 wifiRssiState = BTC_RSSI_STATE_LOW;
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182 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n"));
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186 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
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187 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n"));
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191 else if(levelNum == 3)
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193 if(rssiThresh > rssiThresh1)
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195 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI thresh error!!\n"));
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196 return pCoexSta->preWifiRssiState[index];
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199 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
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200 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
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202 if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
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204 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
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205 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n"));
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209 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
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210 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n"));
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213 else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) ||
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214 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM))
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216 if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
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218 wifiRssiState = BTC_RSSI_STATE_HIGH;
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219 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n"));
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221 else if(wifiRssi < rssiThresh)
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223 wifiRssiState = BTC_RSSI_STATE_LOW;
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224 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n"));
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228 wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
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229 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Medium\n"));
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234 if(wifiRssi < rssiThresh1)
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236 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
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237 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n"));
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241 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
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242 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n"));
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247 pCoexSta->preWifiRssiState[index] = wifiRssiState;
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249 return wifiRssiState;
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253 halbtc8192e2ant_MonitorBtEnableDisable(
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254 IN PBTC_COEXIST pBtCoexist
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257 static BOOLEAN bPreBtDisabled=FALSE;
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258 static u4Byte btDisableCnt=0;
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259 BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE;
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261 // This function check if bt is disabled
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263 if( pCoexSta->highPriorityTx == 0 &&
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264 pCoexSta->highPriorityRx == 0 &&
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265 pCoexSta->lowPriorityTx == 0 &&
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266 pCoexSta->lowPriorityRx == 0)
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270 if( pCoexSta->highPriorityTx == 0xffff &&
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271 pCoexSta->highPriorityRx == 0xffff &&
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272 pCoexSta->lowPriorityTx == 0xffff &&
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273 pCoexSta->lowPriorityRx == 0xffff)
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280 bBtDisabled = FALSE;
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281 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
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282 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is enabled !!\n"));
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287 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], bt all counters=0, %d times!!\n",
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289 if(btDisableCnt >= 2)
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291 bBtDisabled = TRUE;
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292 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
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293 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is disabled !!\n"));
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296 if(bPreBtDisabled != bBtDisabled)
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298 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is from %s to %s!!\n",
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299 (bPreBtDisabled ? "disabled":"enabled"),
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300 (bBtDisabled ? "disabled":"enabled")));
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301 bPreBtDisabled = bBtDisabled;
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312 halbtc8192e2ant_DecideRaMask(
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313 IN PBTC_COEXIST pBtCoexist,
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315 IN u4Byte raMaskType
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318 u4Byte disRaMask=0x0;
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322 case 0: // normal mode
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324 disRaMask = 0x0; // enable 2ss
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326 disRaMask = 0xfff00000; // disable 2ss
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328 case 1: // disable cck 1/2
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330 disRaMask = 0x00000003; // enable 2ss
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332 disRaMask = 0xfff00003; // disable 2ss
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334 case 2: // disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4
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336 disRaMask = 0x0001f1f7; // enable 2ss
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338 disRaMask = 0xfff1f1f7; // disable 2ss
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348 halbtc8192e2ant_UpdateRaMask(
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349 IN PBTC_COEXIST pBtCoexist,
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350 IN BOOLEAN bForceExec,
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351 IN u4Byte disRateMask
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354 pCoexDm->curRaMask = disRateMask;
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356 if( bForceExec || (pCoexDm->preRaMask != pCoexDm->curRaMask))
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358 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_UPDATE_RAMASK, &pCoexDm->curRaMask);
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360 pCoexDm->preRaMask = pCoexDm->curRaMask;
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364 halbtc8192e2ant_AutoRateFallbackRetry(
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365 IN PBTC_COEXIST pBtCoexist,
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366 IN BOOLEAN bForceExec,
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370 BOOLEAN bWifiUnderBMode=FALSE;
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372 pCoexDm->curArfrType = type;
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374 if( bForceExec || (pCoexDm->preArfrType != pCoexDm->curArfrType))
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376 switch(pCoexDm->curArfrType)
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378 case 0: // normal mode
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379 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, pCoexDm->backupArfrCnt1);
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380 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, pCoexDm->backupArfrCnt2);
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383 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_UNDER_B_MODE, &bWifiUnderBMode);
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384 if(bWifiUnderBMode)
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386 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0);
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387 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x01010101);
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391 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x430, 0x0);
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392 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x434, 0x04030201);
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400 pCoexDm->preArfrType = pCoexDm->curArfrType;
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404 halbtc8192e2ant_RetryLimit(
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405 IN PBTC_COEXIST pBtCoexist,
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406 IN BOOLEAN bForceExec,
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410 pCoexDm->curRetryLimitType = type;
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412 if( bForceExec || (pCoexDm->preRetryLimitType != pCoexDm->curRetryLimitType))
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414 switch(pCoexDm->curRetryLimitType)
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416 case 0: // normal mode
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417 pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, pCoexDm->backupRetryLimit);
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419 case 1: // retry limit=8
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420 pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x42a, 0x0808);
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427 pCoexDm->preRetryLimitType = pCoexDm->curRetryLimitType;
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431 halbtc8192e2ant_AmpduMaxTime(
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432 IN PBTC_COEXIST pBtCoexist,
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433 IN BOOLEAN bForceExec,
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437 pCoexDm->curAmpduTimeType = type;
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439 if( bForceExec || (pCoexDm->preAmpduTimeType != pCoexDm->curAmpduTimeType))
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441 switch(pCoexDm->curAmpduTimeType)
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443 case 0: // normal mode
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444 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, pCoexDm->backupAmpduMaxTime);
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446 case 1: // AMPDU timw = 0x38 * 32us
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447 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x456, 0x38);
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454 pCoexDm->preAmpduTimeType = pCoexDm->curAmpduTimeType;
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458 halbtc8192e2ant_LimitedTx(
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459 IN PBTC_COEXIST pBtCoexist,
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460 IN BOOLEAN bForceExec,
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461 IN u1Byte raMaskType,
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462 IN u1Byte arfrType,
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463 IN u1Byte retryLimitType,
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464 IN u1Byte ampduTimeType
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467 u4Byte disRaMask=0x0;
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469 pCoexDm->curRaMaskType = raMaskType;
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470 disRaMask = halbtc8192e2ant_DecideRaMask(pBtCoexist, pCoexDm->curSsType, raMaskType);
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471 halbtc8192e2ant_UpdateRaMask(pBtCoexist, bForceExec, disRaMask);
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473 halbtc8192e2ant_AutoRateFallbackRetry(pBtCoexist, bForceExec, arfrType);
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474 halbtc8192e2ant_RetryLimit(pBtCoexist, bForceExec, retryLimitType);
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475 halbtc8192e2ant_AmpduMaxTime(pBtCoexist, bForceExec, ampduTimeType);
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479 halbtc8192e2ant_LimitedRx(
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480 IN PBTC_COEXIST pBtCoexist,
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481 IN BOOLEAN bForceExec,
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482 IN BOOLEAN bRejApAggPkt,
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483 IN BOOLEAN bBtCtrlAggBufSize,
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484 IN u1Byte aggBufSize
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487 BOOLEAN bRejectRxAgg=bRejApAggPkt;
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488 BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize;
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489 u1Byte rxAggSize=aggBufSize;
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491 //============================================
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492 // Rx Aggregation related setting
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493 //============================================
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494 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg);
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495 // decide BT control aggregation buf size or not
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496 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize);
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497 // aggregation buf size, only work when BT control Rx aggregation size.
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498 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize);
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499 // real update aggregation setting
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500 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
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506 halbtc8192e2ant_MonitorBtCtr(
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507 IN PBTC_COEXIST pBtCoexist
\r
510 u4Byte regHPTxRx, regLPTxRx, u4Tmp;
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511 u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0;
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517 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx);
\r
518 regHPTx = u4Tmp & bMaskLWord;
\r
519 regHPRx = (u4Tmp & bMaskHWord)>>16;
\r
521 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx);
\r
522 regLPTx = u4Tmp & bMaskLWord;
\r
523 regLPRx = (u4Tmp & bMaskHWord)>>16;
\r
525 pCoexSta->highPriorityTx = regHPTx;
\r
526 pCoexSta->highPriorityRx = regHPRx;
\r
527 pCoexSta->lowPriorityTx = regLPTx;
\r
528 pCoexSta->lowPriorityRx = regLPRx;
\r
530 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
\r
531 regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx));
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532 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
\r
533 regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx));
\r
536 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc);
\r
540 halbtc8192e2ant_QueryBtInfo(
\r
541 IN PBTC_COEXIST pBtCoexist
\r
544 u1Byte H2C_Parameter[1] ={0};
\r
546 pCoexSta->bC2hBtInfoReqSent = TRUE;
\r
548 H2C_Parameter[0] |= BIT0; // trigger
\r
550 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n",
\r
551 H2C_Parameter[0]));
\r
553 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter);
\r
557 halbtc8192e2ant_IsWifiStatusChanged(
\r
558 IN PBTC_COEXIST pBtCoexist
\r
561 static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE;
\r
562 BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE;
\r
563 BOOLEAN bWifiConnected=FALSE;
\r
565 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
\r
566 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
\r
567 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
\r
568 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way);
\r
572 if(bWifiBusy != bPreWifiBusy)
\r
574 bPreWifiBusy = bWifiBusy;
\r
577 if(bUnder4way != bPreUnder4way)
\r
579 bPreUnder4way = bUnder4way;
\r
582 if(bBtHsOn != bPreBtHsOn)
\r
584 bPreBtHsOn = bBtHsOn;
\r
593 halbtc8192e2ant_UpdateBtLinkInfo(
\r
594 IN PBTC_COEXIST pBtCoexist
\r
597 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
\r
598 BOOLEAN bBtHsOn=FALSE;
\r
600 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
\r
602 pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist;
\r
603 pBtLinkInfo->bScoExist = pCoexSta->bScoExist;
\r
604 pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist;
\r
605 pBtLinkInfo->bPanExist = pCoexSta->bPanExist;
\r
606 pBtLinkInfo->bHidExist = pCoexSta->bHidExist;
\r
608 // work around for HS mode.
\r
611 pBtLinkInfo->bPanExist = TRUE;
\r
612 pBtLinkInfo->bBtLinkExist = TRUE;
\r
615 // check if Sco only
\r
616 if( pBtLinkInfo->bScoExist &&
\r
617 !pBtLinkInfo->bA2dpExist &&
\r
618 !pBtLinkInfo->bPanExist &&
\r
619 !pBtLinkInfo->bHidExist )
\r
620 pBtLinkInfo->bScoOnly = TRUE;
\r
622 pBtLinkInfo->bScoOnly = FALSE;
\r
624 // check if A2dp only
\r
625 if( !pBtLinkInfo->bScoExist &&
\r
626 pBtLinkInfo->bA2dpExist &&
\r
627 !pBtLinkInfo->bPanExist &&
\r
628 !pBtLinkInfo->bHidExist )
\r
629 pBtLinkInfo->bA2dpOnly = TRUE;
\r
631 pBtLinkInfo->bA2dpOnly = FALSE;
\r
633 // check if Pan only
\r
634 if( !pBtLinkInfo->bScoExist &&
\r
635 !pBtLinkInfo->bA2dpExist &&
\r
636 pBtLinkInfo->bPanExist &&
\r
637 !pBtLinkInfo->bHidExist )
\r
638 pBtLinkInfo->bPanOnly = TRUE;
\r
640 pBtLinkInfo->bPanOnly = FALSE;
\r
642 // check if Hid only
\r
643 if( !pBtLinkInfo->bScoExist &&
\r
644 !pBtLinkInfo->bA2dpExist &&
\r
645 !pBtLinkInfo->bPanExist &&
\r
646 pBtLinkInfo->bHidExist )
\r
647 pBtLinkInfo->bHidOnly = TRUE;
\r
649 pBtLinkInfo->bHidOnly = FALSE;
\r
653 halbtc8192e2ant_ActionAlgorithm(
\r
654 IN PBTC_COEXIST pBtCoexist
\r
657 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
\r
658 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
\r
659 BOOLEAN bBtHsOn=FALSE;
\r
660 u1Byte algorithm=BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
\r
661 u1Byte numOfDiffProfile=0;
\r
663 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
\r
665 if(!pBtLinkInfo->bBtLinkExist)
\r
667 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], No BT link exists!!!\n"));
\r
671 if(pBtLinkInfo->bScoExist)
\r
672 numOfDiffProfile++;
\r
673 if(pBtLinkInfo->bHidExist)
\r
674 numOfDiffProfile++;
\r
675 if(pBtLinkInfo->bPanExist)
\r
676 numOfDiffProfile++;
\r
677 if(pBtLinkInfo->bA2dpExist)
\r
678 numOfDiffProfile++;
\r
680 if(numOfDiffProfile == 1)
\r
682 if(pBtLinkInfo->bScoExist)
\r
684 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO only\n"));
\r
685 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
\r
689 if(pBtLinkInfo->bHidExist)
\r
691 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID only\n"));
\r
692 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
\r
694 else if(pBtLinkInfo->bA2dpExist)
\r
696 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP only\n"));
\r
697 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
\r
699 else if(pBtLinkInfo->bPanExist)
\r
703 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN(HS) only\n"));
\r
704 algorithm = BT_8192E_2ANT_COEX_ALGO_PANHS;
\r
708 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN(EDR) only\n"));
\r
709 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR;
\r
714 else if(numOfDiffProfile == 2)
\r
716 if(pBtLinkInfo->bScoExist)
\r
718 if(pBtLinkInfo->bHidExist)
\r
720 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID\n"));
\r
721 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
\r
723 else if(pBtLinkInfo->bA2dpExist)
\r
725 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP ==> SCO\n"));
\r
726 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
\r
728 else if(pBtLinkInfo->bPanExist)
\r
732 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + PAN(HS)\n"));
\r
733 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
\r
737 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + PAN(EDR)\n"));
\r
738 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
\r
744 if( pBtLinkInfo->bHidExist &&
\r
745 pBtLinkInfo->bA2dpExist )
\r
747 if(pStackInfo->numOfHid >= 2)
\r
749 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID*2 + A2DP\n"));
\r
750 algorithm = BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
\r
754 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP\n"));
\r
755 algorithm = BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
\r
758 else if( pBtLinkInfo->bHidExist &&
\r
759 pBtLinkInfo->bPanExist )
\r
763 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + PAN(HS)\n"));
\r
764 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
\r
768 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + PAN(EDR)\n"));
\r
769 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
\r
772 else if( pBtLinkInfo->bPanExist &&
\r
773 pBtLinkInfo->bA2dpExist )
\r
777 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP + PAN(HS)\n"));
\r
778 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
\r
782 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP + PAN(EDR)\n"));
\r
783 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
\r
788 else if(numOfDiffProfile == 3)
\r
790 if(pBtLinkInfo->bScoExist)
\r
792 if( pBtLinkInfo->bHidExist &&
\r
793 pBtLinkInfo->bA2dpExist )
\r
795 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + A2DP ==> HID\n"));
\r
796 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
\r
798 else if( pBtLinkInfo->bHidExist &&
\r
799 pBtLinkInfo->bPanExist )
\r
803 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + PAN(HS)\n"));
\r
804 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
\r
808 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + PAN(EDR)\n"));
\r
809 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
\r
812 else if( pBtLinkInfo->bPanExist &&
\r
813 pBtLinkInfo->bA2dpExist )
\r
817 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP + PAN(HS)\n"));
\r
818 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
\r
822 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n"));
\r
823 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
\r
829 if( pBtLinkInfo->bHidExist &&
\r
830 pBtLinkInfo->bPanExist &&
\r
831 pBtLinkInfo->bA2dpExist )
\r
835 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP + PAN(HS)\n"));
\r
836 algorithm = BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
\r
840 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP + PAN(EDR)\n"));
\r
841 algorithm = BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
\r
846 else if(numOfDiffProfile >= 3)
\r
848 if(pBtLinkInfo->bScoExist)
\r
850 if( pBtLinkInfo->bHidExist &&
\r
851 pBtLinkInfo->bPanExist &&
\r
852 pBtLinkInfo->bA2dpExist )
\r
856 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n"));
\r
861 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"));
\r
862 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
\r
872 halbtc8192e2ant_SetFwDacSwingLevel(
\r
873 IN PBTC_COEXIST pBtCoexist,
\r
874 IN u1Byte dacSwingLvl
\r
877 u1Byte H2C_Parameter[1] ={0};
\r
879 // There are several type of dacswing
\r
880 // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6
\r
881 H2C_Parameter[0] = dacSwingLvl;
\r
883 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl));
\r
884 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0]));
\r
886 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter);
\r
890 halbtc8192e2ant_SetFwDecBtPwr(
\r
891 IN PBTC_COEXIST pBtCoexist,
\r
892 IN u1Byte decBtPwrLvl
\r
895 u1Byte H2C_Parameter[1] ={0};
\r
897 H2C_Parameter[0] = decBtPwrLvl;
\r
899 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n",
\r
900 decBtPwrLvl, H2C_Parameter[0]));
\r
902 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter);
\r
906 halbtc8192e2ant_DecBtPwr(
\r
907 IN PBTC_COEXIST pBtCoexist,
\r
908 IN BOOLEAN bForceExec,
\r
909 IN u1Byte decBtPwrLvl
\r
912 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s Dec BT power level = %d\n",
\r
913 (bForceExec? "force to":""), decBtPwrLvl));
\r
914 pCoexDm->curBtDecPwrLvl = decBtPwrLvl;
\r
918 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n",
\r
919 pCoexDm->preBtDecPwrLvl, pCoexDm->curBtDecPwrLvl));
\r
920 #if 0 // work around, avoid h2c command fail.
\r
921 if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl)
\r
925 halbtc8192e2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl);
\r
927 pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl;
\r
931 halbtc8192e2ant_SetBtAutoReport(
\r
932 IN PBTC_COEXIST pBtCoexist,
\r
933 IN BOOLEAN bEnableAutoReport
\r
936 u1Byte H2C_Parameter[1] ={0};
\r
938 H2C_Parameter[0] = 0;
\r
940 if(bEnableAutoReport)
\r
942 H2C_Parameter[0] |= BIT0;
\r
945 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n",
\r
946 (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0]));
\r
948 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter);
\r
952 halbtc8192e2ant_BtAutoReport(
\r
953 IN PBTC_COEXIST pBtCoexist,
\r
954 IN BOOLEAN bForceExec,
\r
955 IN BOOLEAN bEnableAutoReport
\r
958 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s BT Auto report = %s\n",
\r
959 (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled")));
\r
960 pCoexDm->bCurBtAutoReport = bEnableAutoReport;
\r
964 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreBtAutoReport=%d, bCurBtAutoReport=%d\n",
\r
965 pCoexDm->bPreBtAutoReport, pCoexDm->bCurBtAutoReport));
\r
967 if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport)
\r
970 halbtc8192e2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport);
\r
972 pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport;
\r
976 halbtc8192e2ant_FwDacSwingLvl(
\r
977 IN PBTC_COEXIST pBtCoexist,
\r
978 IN BOOLEAN bForceExec,
\r
979 IN u1Byte fwDacSwingLvl
\r
982 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s set FW Dac Swing level = %d\n",
\r
983 (bForceExec? "force to":""), fwDacSwingLvl));
\r
984 pCoexDm->curFwDacSwingLvl = fwDacSwingLvl;
\r
988 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n",
\r
989 pCoexDm->preFwDacSwingLvl, pCoexDm->curFwDacSwingLvl));
\r
991 if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl)
\r
995 halbtc8192e2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl);
\r
997 pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl;
\r
1001 halbtc8192e2ant_SetSwRfRxLpfCorner(
\r
1002 IN PBTC_COEXIST pBtCoexist,
\r
1003 IN BOOLEAN bRxRfShrinkOn
\r
1008 //Shrink RF Rx LPF corner
\r
1009 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Shrink RF Rx LPF corner!!\n"));
\r
1010 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc);
\r
1014 //Resume RF Rx LPF corner
\r
1015 // After initialized, we can use pCoexDm->btRf0x1eBackup
\r
1016 if(pBtCoexist->bInitilized)
\r
1018 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Resume RF Rx LPF corner!!\n"));
\r
1019 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup);
\r
1025 halbtc8192e2ant_RfShrink(
\r
1026 IN PBTC_COEXIST pBtCoexist,
\r
1027 IN BOOLEAN bForceExec,
\r
1028 IN BOOLEAN bRxRfShrinkOn
\r
1031 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn Rx RF Shrink = %s\n",
\r
1032 (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF")));
\r
1033 pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn;
\r
1037 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreRfRxLpfShrink=%d, bCurRfRxLpfShrink=%d\n",
\r
1038 pCoexDm->bPreRfRxLpfShrink, pCoexDm->bCurRfRxLpfShrink));
\r
1040 if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink)
\r
1043 halbtc8192e2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink);
\r
1045 pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink;
\r
1049 halbtc8192e2ant_SetSwPenaltyTxRateAdaptive(
\r
1050 IN PBTC_COEXIST pBtCoexist,
\r
1051 IN BOOLEAN bLowPenaltyRa
\r
1054 u1Byte H2C_Parameter[6] ={0};
\r
1056 H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty
\r
1060 H2C_Parameter[1] |= BIT0;
\r
1061 H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36
\r
1062 H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54
\r
1063 H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48
\r
1064 H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36
\r
1067 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], set WiFi Low-Penalty Retry: %s",
\r
1068 (bLowPenaltyRa? "ON!!":"OFF!!")) );
\r
1070 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter);
\r
1074 halbtc8192e2ant_LowPenaltyRa(
\r
1075 IN PBTC_COEXIST pBtCoexist,
\r
1076 IN BOOLEAN bForceExec,
\r
1077 IN BOOLEAN bLowPenaltyRa
\r
1081 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn LowPenaltyRA = %s\n",
\r
1082 (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF")));
\r
1083 pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa;
\r
1087 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreLowPenaltyRa=%d, bCurLowPenaltyRa=%d\n",
\r
1088 pCoexDm->bPreLowPenaltyRa, pCoexDm->bCurLowPenaltyRa));
\r
1090 if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa)
\r
1093 halbtc8192e2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa);
\r
1095 pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa;
\r
1099 halbtc8192e2ant_SetDacSwingReg(
\r
1100 IN PBTC_COEXIST pBtCoexist,
\r
1104 u1Byte val=(u1Byte)level;
\r
1106 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Write SwDacSwing = 0x%x\n", level));
\r
1107 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val);
\r
1111 halbtc8192e2ant_SetSwFullTimeDacSwing(
\r
1112 IN PBTC_COEXIST pBtCoexist,
\r
1113 IN BOOLEAN bSwDacSwingOn,
\r
1114 IN u4Byte swDacSwingLvl
\r
1119 halbtc8192e2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl);
\r
1123 halbtc8192e2ant_SetDacSwingReg(pBtCoexist, 0x18);
\r
1129 halbtc8192e2ant_DacSwing(
\r
1130 IN PBTC_COEXIST pBtCoexist,
\r
1131 IN BOOLEAN bForceExec,
\r
1132 IN BOOLEAN bDacSwingOn,
\r
1133 IN u4Byte dacSwingLvl
\r
1136 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n",
\r
1137 (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl));
\r
1138 pCoexDm->bCurDacSwingOn = bDacSwingOn;
\r
1139 pCoexDm->curDacSwingLvl = dacSwingLvl;
\r
1143 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl=0x%x, bCurDacSwingOn=%d, curDacSwingLvl=0x%x\n",
\r
1144 pCoexDm->bPreDacSwingOn, pCoexDm->preDacSwingLvl,
\r
1145 pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl));
\r
1147 if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) &&
\r
1148 (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) )
\r
1152 halbtc8192e2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl);
\r
1154 pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn;
\r
1155 pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl;
\r
1159 halbtc8192e2ant_SetAdcBackOff(
\r
1160 IN PBTC_COEXIST pBtCoexist,
\r
1161 IN BOOLEAN bAdcBackOff
\r
1166 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB BackOff Level On!\n"));
\r
1167 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x3);
\r
1171 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB BackOff Level Off!\n"));
\r
1172 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x1);
\r
1177 halbtc8192e2ant_AdcBackOff(
\r
1178 IN PBTC_COEXIST pBtCoexist,
\r
1179 IN BOOLEAN bForceExec,
\r
1180 IN BOOLEAN bAdcBackOff
\r
1183 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn AdcBackOff = %s\n",
\r
1184 (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF")));
\r
1185 pCoexDm->bCurAdcBackOff = bAdcBackOff;
\r
1189 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreAdcBackOff=%d, bCurAdcBackOff=%d\n",
\r
1190 pCoexDm->bPreAdcBackOff, pCoexDm->bCurAdcBackOff));
\r
1192 if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff)
\r
1195 halbtc8192e2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff);
\r
1197 pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff;
\r
1201 halbtc8192e2ant_SetAgcTable(
\r
1202 IN PBTC_COEXIST pBtCoexist,
\r
1203 IN BOOLEAN bAgcTableEn
\r
1206 u1Byte rssiAdjustVal=0;
\r
1208 //=================BB AGC Gain Table
\r
1211 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB Agc Table On!\n"));
\r
1212 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x0a1A0001);
\r
1213 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x091B0001);
\r
1214 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x081C0001);
\r
1215 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x071D0001);
\r
1216 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x061E0001);
\r
1217 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x051F0001);
\r
1221 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB Agc Table Off!\n"));
\r
1222 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001);
\r
1223 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001);
\r
1224 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001);
\r
1225 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001);
\r
1226 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001);
\r
1227 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001);
\r
1231 //=================RF Gain
\r
1232 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
\r
1235 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table On!\n"));
\r
1236 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff);
\r
1237 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe);
\r
1241 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table Off!\n"));
\r
1242 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3);
\r
1243 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6);
\r
1245 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
\r
1247 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1);
\r
1250 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table On!\n"));
\r
1251 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff);
\r
1252 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe);
\r
1256 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table Off!\n"));
\r
1257 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3);
\r
1258 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6);
\r
1260 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0);
\r
1262 // set rssiAdjustVal for wifi module.
\r
1265 rssiAdjustVal = 8;
\r
1267 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal);
\r
1273 halbtc8192e2ant_AgcTable(
\r
1274 IN PBTC_COEXIST pBtCoexist,
\r
1275 IN BOOLEAN bForceExec,
\r
1276 IN BOOLEAN bAgcTableEn
\r
1279 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s %s Agc Table\n",
\r
1280 (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable")));
\r
1281 pCoexDm->bCurAgcTableEn = bAgcTableEn;
\r
1285 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n",
\r
1286 pCoexDm->bPreAgcTableEn, pCoexDm->bCurAgcTableEn));
\r
1288 if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn)
\r
1291 halbtc8192e2ant_SetAgcTable(pBtCoexist, bAgcTableEn);
\r
1293 pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn;
\r
1297 halbtc8192e2ant_SetCoexTable(
\r
1298 IN PBTC_COEXIST pBtCoexist,
\r
1299 IN u4Byte val0x6c0,
\r
1300 IN u4Byte val0x6c4,
\r
1301 IN u4Byte val0x6c8,
\r
1302 IN u1Byte val0x6cc
\r
1305 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0));
\r
1306 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0);
\r
1308 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4));
\r
1309 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4);
\r
1311 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8));
\r
1312 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8);
\r
1314 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc));
\r
1315 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc);
\r
1319 halbtc8192e2ant_CoexTable(
\r
1320 IN PBTC_COEXIST pBtCoexist,
\r
1321 IN BOOLEAN bForceExec,
\r
1322 IN u4Byte val0x6c0,
\r
1323 IN u4Byte val0x6c4,
\r
1324 IN u4Byte val0x6c8,
\r
1325 IN u1Byte val0x6cc
\r
1328 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n",
\r
1329 (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc));
\r
1330 pCoexDm->curVal0x6c0 = val0x6c0;
\r
1331 pCoexDm->curVal0x6c4 = val0x6c4;
\r
1332 pCoexDm->curVal0x6c8 = val0x6c8;
\r
1333 pCoexDm->curVal0x6cc = val0x6cc;
\r
1337 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], preVal0x6c0=0x%x, preVal0x6c4=0x%x, preVal0x6c8=0x%x, preVal0x6cc=0x%x !!\n",
\r
1338 pCoexDm->preVal0x6c0, pCoexDm->preVal0x6c4, pCoexDm->preVal0x6c8, pCoexDm->preVal0x6cc));
\r
1339 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], curVal0x6c0=0x%x, curVal0x6c4=0x%x, curVal0x6c8=0x%x, curVal0x6cc=0x%x !!\n",
\r
1340 pCoexDm->curVal0x6c0, pCoexDm->curVal0x6c4, pCoexDm->curVal0x6c8, pCoexDm->curVal0x6cc));
\r
1342 if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) &&
\r
1343 (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) &&
\r
1344 (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) &&
\r
1345 (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) )
\r
1348 halbtc8192e2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc);
\r
1350 pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0;
\r
1351 pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4;
\r
1352 pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8;
\r
1353 pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc;
\r
1357 halbtc8192e2ant_CoexTableWithType(
\r
1358 IN PBTC_COEXIST pBtCoexist,
\r
1359 IN BOOLEAN bForceExec,
\r
1366 halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3);
\r
1369 halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3);
\r
1372 halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5ffb5ffb, 0xffffff, 0x3);
\r
1375 halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0x5fdf5fdf, 0x5fdb5fdb, 0xffffff, 0x3);
\r
1378 halbtc8192e2ant_CoexTable(pBtCoexist, bForceExec, 0xdfffdfff, 0x5ffb5ffb, 0xffffff, 0x3);
\r
1387 halbtc8192e2ant_SetFwIgnoreWlanAct(
\r
1388 IN PBTC_COEXIST pBtCoexist,
\r
1389 IN BOOLEAN bEnable
\r
1392 u1Byte H2C_Parameter[1] ={0};
\r
1396 H2C_Parameter[0] |= BIT0; // function enable
\r
1399 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n",
\r
1400 H2C_Parameter[0]));
\r
1402 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter);
\r
1406 halbtc8192e2ant_IgnoreWlanAct(
\r
1407 IN PBTC_COEXIST pBtCoexist,
\r
1408 IN BOOLEAN bForceExec,
\r
1409 IN BOOLEAN bEnable
\r
1412 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s turn Ignore WlanAct %s\n",
\r
1413 (bForceExec? "force to":""), (bEnable? "ON":"OFF")));
\r
1414 pCoexDm->bCurIgnoreWlanAct = bEnable;
\r
1418 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreIgnoreWlanAct = %d, bCurIgnoreWlanAct = %d!!\n",
\r
1419 pCoexDm->bPreIgnoreWlanAct, pCoexDm->bCurIgnoreWlanAct));
\r
1421 if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct)
\r
1424 halbtc8192e2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable);
\r
1426 pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct;
\r
1430 halbtc8192e2ant_SetFwPstdma(
\r
1431 IN PBTC_COEXIST pBtCoexist,
\r
1439 u1Byte H2C_Parameter[5] ={0};
\r
1441 H2C_Parameter[0] = byte1;
\r
1442 H2C_Parameter[1] = byte2;
\r
1443 H2C_Parameter[2] = byte3;
\r
1444 H2C_Parameter[3] = byte4;
\r
1445 H2C_Parameter[4] = byte5;
\r
1447 pCoexDm->psTdmaPara[0] = byte1;
\r
1448 pCoexDm->psTdmaPara[1] = byte2;
\r
1449 pCoexDm->psTdmaPara[2] = byte3;
\r
1450 pCoexDm->psTdmaPara[3] = byte4;
\r
1451 pCoexDm->psTdmaPara[4] = byte5;
\r
1453 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n",
\r
1454 H2C_Parameter[0],
\r
1455 H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4]));
\r
1457 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter);
\r
1461 halbtc8192e2ant_SwMechanism1(
\r
1462 IN PBTC_COEXIST pBtCoexist,
\r
1463 IN BOOLEAN bShrinkRxLPF,
\r
1464 IN BOOLEAN bLowPenaltyRA,
\r
1465 IN BOOLEAN bLimitedDIG,
\r
1466 IN BOOLEAN bBTLNAConstrain
\r
1472 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
1474 if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40
\r
1477 bShrinkRxLPF = FALSE;
\r
1481 halbtc8192e2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF);
\r
1482 //halbtc8192e2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA);
\r
1486 halbtc8192e2ant_SwMechanism2(
\r
1487 IN PBTC_COEXIST pBtCoexist,
\r
1488 IN BOOLEAN bAGCTableShift,
\r
1489 IN BOOLEAN bADCBackOff,
\r
1490 IN BOOLEAN bSWDACSwing,
\r
1491 IN u4Byte dacSwingLvl
\r
1494 halbtc8192e2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift);
\r
1495 //halbtc8192e2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff);
\r
1496 halbtc8192e2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl);
\r
1500 halbtc8192e2ant_SetAntPath(
\r
1501 IN PBTC_COEXIST pBtCoexist,
\r
1502 IN u1Byte antPosType,
\r
1503 IN BOOLEAN bInitHwCfg,
\r
1504 IN BOOLEAN bWifiOff
\r
1511 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x944, 0x24);
\r
1512 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x930, 0x700700);
\r
1513 if(pBtCoexist->chipInterface == BTC_INTF_USB)
\r
1514 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30430004);
\r
1516 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30030004);
\r
1518 // 0x4c[27][24]='00', Set Antenna to BB
\r
1519 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
\r
1522 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
\r
1526 if(pBtCoexist->chipInterface == BTC_INTF_USB)
\r
1527 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30430004);
\r
1529 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x64, 0x30030004);
\r
1531 // 0x4c[27][24]='11', Set Antenna to BT, 0x64[8:7]=0, 0x64[2]=1
\r
1532 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
\r
1535 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
\r
1538 // ext switch setting
\r
1539 switch(antPosType)
\r
1541 case BTC_ANT_PATH_WIFI:
\r
1542 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x4);
\r
1544 case BTC_ANT_PATH_BT:
\r
1545 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x20);
\r
1548 case BTC_ANT_PATH_PTA:
\r
1549 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x92c, 0x4);
\r
1555 halbtc8192e2ant_PsTdma(
\r
1556 IN PBTC_COEXIST pBtCoexist,
\r
1557 IN BOOLEAN bForceExec,
\r
1558 IN BOOLEAN bTurnOn,
\r
1562 BOOLEAN bTurnOnByCnt=FALSE;
\r
1563 u1Byte psTdmaTypeByCnt=0;
\r
1565 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s turn %s PS TDMA, type=%d\n",
\r
1566 (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type));
\r
1567 pCoexDm->bCurPsTdmaOn = bTurnOn;
\r
1568 pCoexDm->curPsTdma = type;
\r
1572 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
\r
1573 pCoexDm->bPrePsTdmaOn, pCoexDm->bCurPsTdmaOn));
\r
1574 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
\r
1575 pCoexDm->prePsTdma, pCoexDm->curPsTdma));
\r
1577 if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) &&
\r
1578 (pCoexDm->prePsTdma == pCoexDm->curPsTdma) )
\r
1587 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
\r
1590 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90);
\r
1593 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90);
\r
1596 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0xf1, 0x90);
\r
1599 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90);
\r
1602 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90);
\r
1605 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90);
\r
1608 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90);
\r
1611 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x10);
\r
1614 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x10);
\r
1617 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x10);
\r
1620 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0xf1, 0x10);
\r
1623 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe0, 0x10);
\r
1626 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe0, 0x10);
\r
1629 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf0, 0x10);
\r
1632 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x3, 0xf0, 0x10);
\r
1635 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x61, 0x20, 0x03, 0x10, 0x10);
\r
1638 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
\r
1641 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90);
\r
1644 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90);
\r
1647 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90);
\r
1650 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
\r
1656 // disable PS tdma
\r
1660 case 0: //ANT2PTA, 0x778=1
\r
1661 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x8, 0x0, 0x0, 0x0, 0x0);
\r
1662 halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_PTA, FALSE, FALSE);
\r
1664 case 1: //ANT2BT, 0x778=3
\r
1665 halbtc8192e2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x8, 0x0);
\r
1667 halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, FALSE);
\r
1673 // update pre state
\r
1674 pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn;
\r
1675 pCoexDm->prePsTdma = pCoexDm->curPsTdma;
\r
1679 halbtc8192e2ant_SetSwitchSsType(
\r
1680 IN PBTC_COEXIST pBtCoexist,
\r
1684 u1Byte mimoPs=BTC_MIMO_PS_DYNAMIC;
\r
1685 u4Byte disRaMask=0x0;
\r
1687 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], REAL set SS Type = %d\n", ssType));
\r
1689 disRaMask = halbtc8192e2ant_DecideRaMask(pBtCoexist, ssType, pCoexDm->curRaMaskType);
\r
1690 halbtc8192e2ant_UpdateRaMask(pBtCoexist, FORCE_EXEC, disRaMask);
\r
1694 halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1);
\r
1695 // switch ofdm path
\r
1696 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xc04, 0x11);
\r
1697 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xd04, 0x1);
\r
1698 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x90c, 0x81111111);
\r
1699 // switch cck patch
\r
1700 //Jenyu suggest to remove 0xe77 this line for tx issue
\r
1701 //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x1);
\r
1702 //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xa07, 0x81);
\r
1703 mimoPs=BTC_MIMO_PS_STATIC;
\r
1705 else if(ssType == 2)
\r
1707 halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 0);
\r
1708 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xc04, 0x33);
\r
1709 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xd04, 0x3);
\r
1710 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x90c, 0x81121313);
\r
1711 //Jenyu suggest to remove 0xe77 this line for tx issue
\r
1712 //pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xe77, 0x4, 0x0);
\r
1713 //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0xa07, 0x41);
\r
1714 mimoPs=BTC_MIMO_PS_DYNAMIC;
\r
1717 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimoPs); // set rx 1ss or 2ss
\r
1721 halbtc8192e2ant_SwitchSsType(
\r
1722 IN PBTC_COEXIST pBtCoexist,
\r
1723 IN BOOLEAN bForceExec,
\r
1724 IN u1Byte newSsType
\r
1727 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], %s Switch SS Type = %d\n",
\r
1728 (bForceExec? "force to":""), newSsType));
\r
1729 pCoexDm->curSsType = newSsType;
\r
1733 if(pCoexDm->preSsType == pCoexDm->curSsType)
\r
1736 halbtc8192e2ant_SetSwitchSsType(pBtCoexist, pCoexDm->curSsType);
\r
1738 pCoexDm->preSsType = pCoexDm->curSsType;
\r
1742 halbtc8192e2ant_CoexAllOff(
\r
1743 IN PBTC_COEXIST pBtCoexist
\r
1747 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
1748 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
1749 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
1752 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
1753 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
1756 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
\r
1760 halbtc8192e2ant_InitCoexDm(
\r
1761 IN PBTC_COEXIST pBtCoexist
\r
1764 // force to reset coex mechanism
\r
1766 halbtc8192e2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1);
\r
1767 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
\r
1768 halbtc8192e2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0);
\r
1770 halbtc8192e2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0);
\r
1771 halbtc8192e2ant_SwitchSsType(pBtCoexist, FORCE_EXEC, 2);
\r
1773 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
1774 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
1778 halbtc8192e2ant_ActionBtInquiry(
\r
1779 IN PBTC_COEXIST pBtCoexist
\r
1782 BOOLEAN bLowPwrDisable=TRUE;
\r
1784 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
\r
1786 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
1788 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2);
\r
1789 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
1790 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
1791 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
1793 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
1794 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
1798 halbtc8192e2ant_IsCommonAction(
\r
1799 IN PBTC_COEXIST pBtCoexist
\r
1802 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
\r
1803 BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE;
\r
1804 BOOLEAN bBtHsOn=FALSE, bLowPwrDisable=FALSE;
\r
1806 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
\r
1807 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
\r
1808 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
\r
1810 if(pBtLinkInfo->bScoExist || pBtLinkInfo->bHidExist)
\r
1812 halbtc8192e2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 1, 0, 0, 0);
\r
1816 halbtc8192e2ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0);
\r
1819 if(!bWifiConnected)
\r
1821 bLowPwrDisable = FALSE;
\r
1822 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
\r
1824 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi non-connected idle!!\n"));
\r
1826 if( (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus) ||
\r
1827 (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus) )
\r
1829 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 2);
\r
1830 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1);
\r
1831 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0);
\r
1835 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
1836 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
\r
1837 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
1840 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
1841 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
1843 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
1844 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
1850 if(BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)
\r
1852 bLowPwrDisable = FALSE;
\r
1853 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
\r
1855 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi connected + BT non connected-idle!!\n"));
\r
1857 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 2);
\r
1858 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1);
\r
1859 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0);
\r
1860 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
1861 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
1863 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
1864 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
1868 else if(BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)
\r
1870 bLowPwrDisable = TRUE;
\r
1871 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
\r
1875 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi connected + BT connected-idle!!\n"));
\r
1877 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 2);
\r
1878 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 1);
\r
1879 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0);
\r
1880 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
1881 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
1883 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
1884 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
1890 bLowPwrDisable = TRUE;
\r
1891 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
\r
1895 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n"));
\r
1900 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n"));
\r
1902 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
1903 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2);
\r
1904 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 21);
\r
1905 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
1906 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
1907 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
1908 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
1917 halbtc8192e2ant_TdmaDurationAdjust(
\r
1918 IN PBTC_COEXIST pBtCoexist,
\r
1919 IN BOOLEAN bScoHid,
\r
1920 IN BOOLEAN bTxPause,
\r
1921 IN u1Byte maxInterval
\r
1924 static s4Byte up,dn,m,n,WaitCount;
\r
1925 s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration
\r
1926 u1Byte retryCount=0;
\r
1928 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], TdmaDurationAdjust()\n"));
\r
1930 if(!pCoexDm->bAutoTdmaAdjust)
\r
1932 pCoexDm->bAutoTdmaAdjust = TRUE;
\r
1933 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], first run TdmaDurationAdjust()!!\n"));
\r
1939 if(maxInterval == 1)
\r
1941 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
\r
1942 pCoexDm->psTdmaDuAdjType = 13;
\r
1944 else if(maxInterval == 2)
\r
1946 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
1947 pCoexDm->psTdmaDuAdjType = 14;
\r
1949 else if(maxInterval == 3)
\r
1951 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
1952 pCoexDm->psTdmaDuAdjType = 15;
\r
1956 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
1957 pCoexDm->psTdmaDuAdjType = 15;
\r
1962 if(maxInterval == 1)
\r
1964 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
\r
1965 pCoexDm->psTdmaDuAdjType = 9;
\r
1967 else if(maxInterval == 2)
\r
1969 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
1970 pCoexDm->psTdmaDuAdjType = 10;
\r
1972 else if(maxInterval == 3)
\r
1974 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
1975 pCoexDm->psTdmaDuAdjType = 11;
\r
1979 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
1980 pCoexDm->psTdmaDuAdjType = 11;
\r
1988 if(maxInterval == 1)
\r
1990 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
\r
1991 pCoexDm->psTdmaDuAdjType = 5;
\r
1993 else if(maxInterval == 2)
\r
1995 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
1996 pCoexDm->psTdmaDuAdjType = 6;
\r
1998 else if(maxInterval == 3)
\r
2000 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2001 pCoexDm->psTdmaDuAdjType = 7;
\r
2005 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2006 pCoexDm->psTdmaDuAdjType = 7;
\r
2011 if(maxInterval == 1)
\r
2013 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
\r
2014 pCoexDm->psTdmaDuAdjType = 1;
\r
2016 else if(maxInterval == 2)
\r
2018 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2019 pCoexDm->psTdmaDuAdjType = 2;
\r
2021 else if(maxInterval == 3)
\r
2023 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2024 pCoexDm->psTdmaDuAdjType = 3;
\r
2028 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2029 pCoexDm->psTdmaDuAdjType = 3;
\r
2044 //accquire the BT TRx retry count from BT_Info byte2
\r
2045 retryCount = pCoexSta->btRetryCnt;
\r
2046 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], retryCount = %d\n", retryCount));
\r
2047 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n",
\r
2048 up, dn, m, n, WaitCount));
\r
2052 if(retryCount == 0) // no retry in the last 2-second duration
\r
2060 if(up >= n) // if ³sÄò n Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration
\r
2067 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Increase wifi duration!!\n"));
\r
2070 else if (retryCount <= 3) // <=3 retry in the last 2-second duration
\r
2078 if (dn == 2) // if ³sÄò 2 Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration
\r
2080 if (WaitCount <= 2)
\r
2081 m++; // ÁקK¤@ª½¦b¨âÓlevel¤¤¨Ó¦^
\r
2085 if ( m >= 20) //m ³Ì¤jÈ = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration.
\r
2093 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n"));
\r
2096 else //retry count > 3, ¥un1¦¸ retry count > 3, «h½Õ¯¶WiFi duration
\r
2098 if (WaitCount == 1)
\r
2099 m++; // ÁקK¤@ª½¦b¨âÓlevel¤¤¨Ó¦^
\r
2103 if ( m >= 20) //m ³Ì¤jÈ = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration.
\r
2111 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n"));
\r
2114 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], max Interval = %d\n", maxInterval));
\r
2115 if(maxInterval == 1)
\r
2119 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n"));
\r
2121 if(pCoexDm->curPsTdma == 71)
\r
2123 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
\r
2124 pCoexDm->psTdmaDuAdjType = 5;
\r
2126 else if(pCoexDm->curPsTdma == 1)
\r
2128 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
\r
2129 pCoexDm->psTdmaDuAdjType = 5;
\r
2131 else if(pCoexDm->curPsTdma == 2)
\r
2133 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2134 pCoexDm->psTdmaDuAdjType = 6;
\r
2136 else if(pCoexDm->curPsTdma == 3)
\r
2138 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2139 pCoexDm->psTdmaDuAdjType = 7;
\r
2141 else if(pCoexDm->curPsTdma == 4)
\r
2143 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
\r
2144 pCoexDm->psTdmaDuAdjType = 8;
\r
2146 if(pCoexDm->curPsTdma == 9)
\r
2148 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
\r
2149 pCoexDm->psTdmaDuAdjType = 13;
\r
2151 else if(pCoexDm->curPsTdma == 10)
\r
2153 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2154 pCoexDm->psTdmaDuAdjType = 14;
\r
2156 else if(pCoexDm->curPsTdma == 11)
\r
2158 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2159 pCoexDm->psTdmaDuAdjType = 15;
\r
2161 else if(pCoexDm->curPsTdma == 12)
\r
2163 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
\r
2164 pCoexDm->psTdmaDuAdjType = 16;
\r
2169 if(pCoexDm->curPsTdma == 5)
\r
2171 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2172 pCoexDm->psTdmaDuAdjType = 6;
\r
2174 else if(pCoexDm->curPsTdma == 6)
\r
2176 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2177 pCoexDm->psTdmaDuAdjType = 7;
\r
2179 else if(pCoexDm->curPsTdma == 7)
\r
2181 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
\r
2182 pCoexDm->psTdmaDuAdjType = 8;
\r
2184 else if(pCoexDm->curPsTdma == 13)
\r
2186 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2187 pCoexDm->psTdmaDuAdjType = 14;
\r
2189 else if(pCoexDm->curPsTdma == 14)
\r
2191 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2192 pCoexDm->psTdmaDuAdjType = 15;
\r
2194 else if(pCoexDm->curPsTdma == 15)
\r
2196 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
\r
2197 pCoexDm->psTdmaDuAdjType = 16;
\r
2200 else if (result == 1)
\r
2202 if(pCoexDm->curPsTdma == 8)
\r
2204 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2205 pCoexDm->psTdmaDuAdjType = 7;
\r
2207 else if(pCoexDm->curPsTdma == 7)
\r
2209 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2210 pCoexDm->psTdmaDuAdjType = 6;
\r
2212 else if(pCoexDm->curPsTdma == 6)
\r
2214 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
\r
2215 pCoexDm->psTdmaDuAdjType = 5;
\r
2217 else if(pCoexDm->curPsTdma == 16)
\r
2219 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2220 pCoexDm->psTdmaDuAdjType = 15;
\r
2222 else if(pCoexDm->curPsTdma == 15)
\r
2224 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2225 pCoexDm->psTdmaDuAdjType = 14;
\r
2227 else if(pCoexDm->curPsTdma == 14)
\r
2229 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
\r
2230 pCoexDm->psTdmaDuAdjType = 13;
\r
2236 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n"));
\r
2237 if(pCoexDm->curPsTdma == 5)
\r
2239 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71);
\r
2240 pCoexDm->psTdmaDuAdjType = 71;
\r
2242 else if(pCoexDm->curPsTdma == 6)
\r
2244 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2245 pCoexDm->psTdmaDuAdjType = 2;
\r
2247 else if(pCoexDm->curPsTdma == 7)
\r
2249 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2250 pCoexDm->psTdmaDuAdjType = 3;
\r
2252 else if(pCoexDm->curPsTdma == 8)
\r
2254 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
\r
2255 pCoexDm->psTdmaDuAdjType = 4;
\r
2257 if(pCoexDm->curPsTdma == 13)
\r
2259 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
\r
2260 pCoexDm->psTdmaDuAdjType = 9;
\r
2262 else if(pCoexDm->curPsTdma == 14)
\r
2264 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2265 pCoexDm->psTdmaDuAdjType = 10;
\r
2267 else if(pCoexDm->curPsTdma == 15)
\r
2269 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2270 pCoexDm->psTdmaDuAdjType = 11;
\r
2272 else if(pCoexDm->curPsTdma == 16)
\r
2274 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
\r
2275 pCoexDm->psTdmaDuAdjType = 12;
\r
2280 if(pCoexDm->curPsTdma == 71)
\r
2282 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
\r
2283 pCoexDm->psTdmaDuAdjType = 1;
\r
2285 else if(pCoexDm->curPsTdma == 1)
\r
2287 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2288 pCoexDm->psTdmaDuAdjType = 2;
\r
2290 else if(pCoexDm->curPsTdma == 2)
\r
2292 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2293 pCoexDm->psTdmaDuAdjType = 3;
\r
2295 else if(pCoexDm->curPsTdma == 3)
\r
2297 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
\r
2298 pCoexDm->psTdmaDuAdjType = 4;
\r
2300 else if(pCoexDm->curPsTdma == 9)
\r
2302 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2303 pCoexDm->psTdmaDuAdjType = 10;
\r
2305 else if(pCoexDm->curPsTdma == 10)
\r
2307 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2308 pCoexDm->psTdmaDuAdjType = 11;
\r
2310 else if(pCoexDm->curPsTdma == 11)
\r
2312 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
\r
2313 pCoexDm->psTdmaDuAdjType = 12;
\r
2316 else if (result == 1)
\r
2318 if(pCoexDm->curPsTdma == 4)
\r
2320 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2321 pCoexDm->psTdmaDuAdjType = 3;
\r
2323 else if(pCoexDm->curPsTdma == 3)
\r
2325 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2326 pCoexDm->psTdmaDuAdjType = 2;
\r
2328 else if(pCoexDm->curPsTdma == 2)
\r
2330 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
\r
2331 pCoexDm->psTdmaDuAdjType = 1;
\r
2333 else if(pCoexDm->curPsTdma == 1)
\r
2335 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71);
\r
2336 pCoexDm->psTdmaDuAdjType = 71;
\r
2338 else if(pCoexDm->curPsTdma == 12)
\r
2340 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2341 pCoexDm->psTdmaDuAdjType = 11;
\r
2343 else if(pCoexDm->curPsTdma == 11)
\r
2345 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2346 pCoexDm->psTdmaDuAdjType = 10;
\r
2348 else if(pCoexDm->curPsTdma == 10)
\r
2350 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
\r
2351 pCoexDm->psTdmaDuAdjType = 9;
\r
2356 else if(maxInterval == 2)
\r
2360 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n"));
\r
2361 if(pCoexDm->curPsTdma == 1)
\r
2363 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2364 pCoexDm->psTdmaDuAdjType = 6;
\r
2366 else if(pCoexDm->curPsTdma == 2)
\r
2368 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2369 pCoexDm->psTdmaDuAdjType = 6;
\r
2371 else if(pCoexDm->curPsTdma == 3)
\r
2373 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2374 pCoexDm->psTdmaDuAdjType = 7;
\r
2376 else if(pCoexDm->curPsTdma == 4)
\r
2378 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
\r
2379 pCoexDm->psTdmaDuAdjType = 8;
\r
2381 if(pCoexDm->curPsTdma == 9)
\r
2383 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2384 pCoexDm->psTdmaDuAdjType = 14;
\r
2386 else if(pCoexDm->curPsTdma == 10)
\r
2388 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2389 pCoexDm->psTdmaDuAdjType = 14;
\r
2391 else if(pCoexDm->curPsTdma == 11)
\r
2393 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2394 pCoexDm->psTdmaDuAdjType = 15;
\r
2396 else if(pCoexDm->curPsTdma == 12)
\r
2398 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
\r
2399 pCoexDm->psTdmaDuAdjType = 16;
\r
2403 if(pCoexDm->curPsTdma == 5)
\r
2405 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2406 pCoexDm->psTdmaDuAdjType = 6;
\r
2408 else if(pCoexDm->curPsTdma == 6)
\r
2410 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2411 pCoexDm->psTdmaDuAdjType = 7;
\r
2413 else if(pCoexDm->curPsTdma == 7)
\r
2415 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
\r
2416 pCoexDm->psTdmaDuAdjType = 8;
\r
2418 else if(pCoexDm->curPsTdma == 13)
\r
2420 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2421 pCoexDm->psTdmaDuAdjType = 14;
\r
2423 else if(pCoexDm->curPsTdma == 14)
\r
2425 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2426 pCoexDm->psTdmaDuAdjType = 15;
\r
2428 else if(pCoexDm->curPsTdma == 15)
\r
2430 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
\r
2431 pCoexDm->psTdmaDuAdjType = 16;
\r
2434 else if (result == 1)
\r
2436 if(pCoexDm->curPsTdma == 8)
\r
2438 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2439 pCoexDm->psTdmaDuAdjType = 7;
\r
2441 else if(pCoexDm->curPsTdma == 7)
\r
2443 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2444 pCoexDm->psTdmaDuAdjType = 6;
\r
2446 else if(pCoexDm->curPsTdma == 6)
\r
2448 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2449 pCoexDm->psTdmaDuAdjType = 6;
\r
2451 else if(pCoexDm->curPsTdma == 16)
\r
2453 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2454 pCoexDm->psTdmaDuAdjType = 15;
\r
2456 else if(pCoexDm->curPsTdma == 15)
\r
2458 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2459 pCoexDm->psTdmaDuAdjType = 14;
\r
2461 else if(pCoexDm->curPsTdma == 14)
\r
2463 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2464 pCoexDm->psTdmaDuAdjType = 14;
\r
2470 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n"));
\r
2471 if(pCoexDm->curPsTdma == 5)
\r
2473 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2474 pCoexDm->psTdmaDuAdjType = 2;
\r
2476 else if(pCoexDm->curPsTdma == 6)
\r
2478 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2479 pCoexDm->psTdmaDuAdjType = 2;
\r
2481 else if(pCoexDm->curPsTdma == 7)
\r
2483 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2484 pCoexDm->psTdmaDuAdjType = 3;
\r
2486 else if(pCoexDm->curPsTdma == 8)
\r
2488 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
\r
2489 pCoexDm->psTdmaDuAdjType = 4;
\r
2491 if(pCoexDm->curPsTdma == 13)
\r
2493 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2494 pCoexDm->psTdmaDuAdjType = 10;
\r
2496 else if(pCoexDm->curPsTdma == 14)
\r
2498 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2499 pCoexDm->psTdmaDuAdjType = 10;
\r
2501 else if(pCoexDm->curPsTdma == 15)
\r
2503 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2504 pCoexDm->psTdmaDuAdjType = 11;
\r
2506 else if(pCoexDm->curPsTdma == 16)
\r
2508 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
\r
2509 pCoexDm->psTdmaDuAdjType = 12;
\r
2513 if(pCoexDm->curPsTdma == 1)
\r
2515 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2516 pCoexDm->psTdmaDuAdjType = 2;
\r
2518 else if(pCoexDm->curPsTdma == 2)
\r
2520 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2521 pCoexDm->psTdmaDuAdjType = 3;
\r
2523 else if(pCoexDm->curPsTdma == 3)
\r
2525 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
\r
2526 pCoexDm->psTdmaDuAdjType = 4;
\r
2528 else if(pCoexDm->curPsTdma == 9)
\r
2530 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2531 pCoexDm->psTdmaDuAdjType = 10;
\r
2533 else if(pCoexDm->curPsTdma == 10)
\r
2535 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2536 pCoexDm->psTdmaDuAdjType = 11;
\r
2538 else if(pCoexDm->curPsTdma == 11)
\r
2540 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
\r
2541 pCoexDm->psTdmaDuAdjType = 12;
\r
2544 else if (result == 1)
\r
2546 if(pCoexDm->curPsTdma == 4)
\r
2548 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2549 pCoexDm->psTdmaDuAdjType = 3;
\r
2551 else if(pCoexDm->curPsTdma == 3)
\r
2553 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2554 pCoexDm->psTdmaDuAdjType = 2;
\r
2556 else if(pCoexDm->curPsTdma == 2)
\r
2558 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2559 pCoexDm->psTdmaDuAdjType = 2;
\r
2561 else if(pCoexDm->curPsTdma == 12)
\r
2563 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2564 pCoexDm->psTdmaDuAdjType = 11;
\r
2566 else if(pCoexDm->curPsTdma == 11)
\r
2568 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2569 pCoexDm->psTdmaDuAdjType = 10;
\r
2571 else if(pCoexDm->curPsTdma == 10)
\r
2573 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2574 pCoexDm->psTdmaDuAdjType = 10;
\r
2579 else if(maxInterval == 3)
\r
2583 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n"));
\r
2584 if(pCoexDm->curPsTdma == 1)
\r
2586 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2587 pCoexDm->psTdmaDuAdjType = 7;
\r
2589 else if(pCoexDm->curPsTdma == 2)
\r
2591 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2592 pCoexDm->psTdmaDuAdjType = 7;
\r
2594 else if(pCoexDm->curPsTdma == 3)
\r
2596 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2597 pCoexDm->psTdmaDuAdjType = 7;
\r
2599 else if(pCoexDm->curPsTdma == 4)
\r
2601 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
\r
2602 pCoexDm->psTdmaDuAdjType = 8;
\r
2604 if(pCoexDm->curPsTdma == 9)
\r
2606 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2607 pCoexDm->psTdmaDuAdjType = 15;
\r
2609 else if(pCoexDm->curPsTdma == 10)
\r
2611 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2612 pCoexDm->psTdmaDuAdjType = 15;
\r
2614 else if(pCoexDm->curPsTdma == 11)
\r
2616 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2617 pCoexDm->psTdmaDuAdjType = 15;
\r
2619 else if(pCoexDm->curPsTdma == 12)
\r
2621 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
\r
2622 pCoexDm->psTdmaDuAdjType = 16;
\r
2626 if(pCoexDm->curPsTdma == 5)
\r
2628 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2629 pCoexDm->psTdmaDuAdjType = 7;
\r
2631 else if(pCoexDm->curPsTdma == 6)
\r
2633 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2634 pCoexDm->psTdmaDuAdjType = 7;
\r
2636 else if(pCoexDm->curPsTdma == 7)
\r
2638 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
\r
2639 pCoexDm->psTdmaDuAdjType = 8;
\r
2641 else if(pCoexDm->curPsTdma == 13)
\r
2643 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2644 pCoexDm->psTdmaDuAdjType = 15;
\r
2646 else if(pCoexDm->curPsTdma == 14)
\r
2648 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2649 pCoexDm->psTdmaDuAdjType = 15;
\r
2651 else if(pCoexDm->curPsTdma == 15)
\r
2653 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
\r
2654 pCoexDm->psTdmaDuAdjType = 16;
\r
2657 else if (result == 1)
\r
2659 if(pCoexDm->curPsTdma == 8)
\r
2661 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2662 pCoexDm->psTdmaDuAdjType = 7;
\r
2664 else if(pCoexDm->curPsTdma == 7)
\r
2666 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2667 pCoexDm->psTdmaDuAdjType = 7;
\r
2669 else if(pCoexDm->curPsTdma == 6)
\r
2671 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2672 pCoexDm->psTdmaDuAdjType = 7;
\r
2674 else if(pCoexDm->curPsTdma == 16)
\r
2676 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2677 pCoexDm->psTdmaDuAdjType = 15;
\r
2679 else if(pCoexDm->curPsTdma == 15)
\r
2681 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2682 pCoexDm->psTdmaDuAdjType = 15;
\r
2684 else if(pCoexDm->curPsTdma == 14)
\r
2686 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2687 pCoexDm->psTdmaDuAdjType = 15;
\r
2693 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n"));
\r
2694 if(pCoexDm->curPsTdma == 5)
\r
2696 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2697 pCoexDm->psTdmaDuAdjType = 3;
\r
2699 else if(pCoexDm->curPsTdma == 6)
\r
2701 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2702 pCoexDm->psTdmaDuAdjType = 3;
\r
2704 else if(pCoexDm->curPsTdma == 7)
\r
2706 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2707 pCoexDm->psTdmaDuAdjType = 3;
\r
2709 else if(pCoexDm->curPsTdma == 8)
\r
2711 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
\r
2712 pCoexDm->psTdmaDuAdjType = 4;
\r
2714 if(pCoexDm->curPsTdma == 13)
\r
2716 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2717 pCoexDm->psTdmaDuAdjType = 11;
\r
2719 else if(pCoexDm->curPsTdma == 14)
\r
2721 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2722 pCoexDm->psTdmaDuAdjType = 11;
\r
2724 else if(pCoexDm->curPsTdma == 15)
\r
2726 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2727 pCoexDm->psTdmaDuAdjType = 11;
\r
2729 else if(pCoexDm->curPsTdma == 16)
\r
2731 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
\r
2732 pCoexDm->psTdmaDuAdjType = 12;
\r
2736 if(pCoexDm->curPsTdma == 1)
\r
2738 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2739 pCoexDm->psTdmaDuAdjType = 3;
\r
2741 else if(pCoexDm->curPsTdma == 2)
\r
2743 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2744 pCoexDm->psTdmaDuAdjType = 3;
\r
2746 else if(pCoexDm->curPsTdma == 3)
\r
2748 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
\r
2749 pCoexDm->psTdmaDuAdjType = 4;
\r
2751 else if(pCoexDm->curPsTdma == 9)
\r
2753 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2754 pCoexDm->psTdmaDuAdjType = 11;
\r
2756 else if(pCoexDm->curPsTdma == 10)
\r
2758 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2759 pCoexDm->psTdmaDuAdjType = 11;
\r
2761 else if(pCoexDm->curPsTdma == 11)
\r
2763 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
\r
2764 pCoexDm->psTdmaDuAdjType = 12;
\r
2767 else if (result == 1)
\r
2769 if(pCoexDm->curPsTdma == 4)
\r
2771 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2772 pCoexDm->psTdmaDuAdjType = 3;
\r
2774 else if(pCoexDm->curPsTdma == 3)
\r
2776 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2777 pCoexDm->psTdmaDuAdjType = 3;
\r
2779 else if(pCoexDm->curPsTdma == 2)
\r
2781 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2782 pCoexDm->psTdmaDuAdjType = 3;
\r
2784 else if(pCoexDm->curPsTdma == 12)
\r
2786 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2787 pCoexDm->psTdmaDuAdjType = 11;
\r
2789 else if(pCoexDm->curPsTdma == 11)
\r
2791 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2792 pCoexDm->psTdmaDuAdjType = 11;
\r
2794 else if(pCoexDm->curPsTdma == 10)
\r
2796 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2797 pCoexDm->psTdmaDuAdjType = 11;
\r
2804 // if current PsTdma not match with the recorded one (when scan, dhcp...),
\r
2805 // then we have to adjust it back to the previous record one.
\r
2806 if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType)
\r
2808 BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE;
\r
2809 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n",
\r
2810 pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType));
\r
2812 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
\r
2813 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
\r
2814 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
\r
2816 if( !bScan && !bLink && !bRoam)
\r
2818 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType);
\r
2822 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"));
\r
2827 // SCO only or SCO+PAN(HS)
\r
2829 halbtc8192e2ant_ActionSco(
\r
2830 IN PBTC_COEXIST pBtCoexist
\r
2833 u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_STAY_LOW;
\r
2836 wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
2838 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
2839 halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
2841 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
2843 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4);
\r
2845 btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42);
\r
2847 if( (btRssiState == BTC_RSSI_STATE_LOW) ||
\r
2848 (btRssiState == BTC_RSSI_STATE_STAY_LOW) )
\r
2850 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
2851 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
\r
2853 else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) ||
\r
2854 (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )
\r
2856 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
2857 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
\r
2859 else if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
2860 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
2862 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
\r
2863 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
\r
2866 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
2869 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
2871 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
2872 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
2874 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
2875 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x6);
\r
2879 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
2880 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x6);
\r
2885 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
2886 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
2888 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
2889 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x6);
\r
2893 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
2894 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x6);
\r
2900 halbtc8192e2ant_ActionScoPan(
\r
2901 IN PBTC_COEXIST pBtCoexist
\r
2904 u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_STAY_LOW;
\r
2907 wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
2909 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
2910 halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
2912 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
2914 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 4);
\r
2916 btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42);
\r
2918 if( (btRssiState == BTC_RSSI_STATE_LOW) ||
\r
2919 (btRssiState == BTC_RSSI_STATE_STAY_LOW) )
\r
2921 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
2922 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2924 else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) ||
\r
2925 (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )
\r
2927 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
2928 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2930 else if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
2931 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
2933 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
\r
2934 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2937 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
2940 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
2942 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
2943 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
2945 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
2946 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x6);
\r
2950 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
2951 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x6);
\r
2956 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
2957 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
2959 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
2960 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x6);
\r
2964 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
2965 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x6);
\r
2971 halbtc8192e2ant_ActionHid(
\r
2972 IN PBTC_COEXIST pBtCoexist
\r
2975 u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_HIGH;
\r
2978 wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
2979 btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42);
\r
2981 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
2982 halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
2984 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
2986 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
2988 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3);
\r
2990 if( (btRssiState == BTC_RSSI_STATE_LOW) ||
\r
2991 (btRssiState == BTC_RSSI_STATE_STAY_LOW) )
\r
2993 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
2994 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
\r
2996 else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) ||
\r
2997 (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )
\r
2999 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3000 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
\r
3002 else if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3003 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3005 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
\r
3006 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
\r
3010 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3012 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3013 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3015 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3016 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3020 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3021 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3026 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3027 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3029 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3030 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3034 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3035 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3040 //A2DP only / PAN(EDR) only/ A2DP+PAN(HS)
\r
3042 halbtc8192e2ant_ActionA2dp(
\r
3043 IN PBTC_COEXIST pBtCoexist
\r
3046 u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_HIGH;
\r
3048 BOOLEAN bLongDist=FALSE;
\r
3050 wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3051 btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42);
\r
3053 if( (btRssiState == BTC_RSSI_STATE_LOW||btRssiState == BTC_RSSI_STATE_STAY_LOW) &&
\r
3054 (wifiRssiState == BTC_RSSI_STATE_LOW||wifiRssiState == BTC_RSSI_STATE_STAY_LOW) )
\r
3056 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2dp, wifi/bt rssi both LOW!!\n"));
\r
3061 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 2);
\r
3062 halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x4);
\r
3066 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
3067 halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3070 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3073 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
\r
3075 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2);
\r
3080 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 17);
\r
3081 pCoexDm->bAutoTdmaAdjust = FALSE;
\r
3082 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3086 if( (btRssiState == BTC_RSSI_STATE_LOW) ||
\r
3087 (btRssiState == BTC_RSSI_STATE_STAY_LOW) )
\r
3089 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1);
\r
3090 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3092 else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) ||
\r
3093 (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )
\r
3095 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1);
\r
3096 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3098 else if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3099 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3101 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1);
\r
3102 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
\r
3107 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3108 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3110 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3111 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3113 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3114 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3118 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3119 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3124 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3125 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3127 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3128 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3132 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3133 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3139 halbtc8192e2ant_ActionA2dpPanHs(
\r
3140 IN PBTC_COEXIST pBtCoexist
\r
3143 u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_HIGH;
\r
3146 wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3147 btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42);
\r
3149 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
3150 halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3152 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3153 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2);
\r
3155 if( (btRssiState == BTC_RSSI_STATE_LOW) ||
\r
3156 (btRssiState == BTC_RSSI_STATE_STAY_LOW) )
\r
3158 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2);
\r
3159 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3161 else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) ||
\r
3162 (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )
\r
3164 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 2);
\r
3165 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3167 else if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3168 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3170 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 2);
\r
3171 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
\r
3175 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3176 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3178 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3179 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3181 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3182 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6);
\r
3186 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3187 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x6);
\r
3192 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3193 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3195 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3196 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x6);
\r
3200 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3201 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x6);
\r
3207 halbtc8192e2ant_ActionPanEdr(
\r
3208 IN PBTC_COEXIST pBtCoexist
\r
3211 u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_HIGH;
\r
3214 wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3215 btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42);
\r
3217 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
3218 halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3220 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3222 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2);
\r
3224 if( (btRssiState == BTC_RSSI_STATE_LOW) ||
\r
3225 (btRssiState == BTC_RSSI_STATE_STAY_LOW) )
\r
3227 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3228 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
\r
3230 else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) ||
\r
3231 (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )
\r
3233 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3234 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
\r
3236 else if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3237 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3239 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
\r
3240 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
\r
3244 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3245 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3247 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3248 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3250 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3251 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3255 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3256 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3261 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3262 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3264 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3265 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3269 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3270 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3277 halbtc8192e2ant_ActionPanHs(
\r
3278 IN PBTC_COEXIST pBtCoexist
\r
3281 u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_HIGH;
\r
3284 wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3285 btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42);
\r
3287 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
3288 halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3290 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3292 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2);
\r
3294 if( (btRssiState == BTC_RSSI_STATE_LOW) ||
\r
3295 (btRssiState == BTC_RSSI_STATE_STAY_LOW) )
\r
3297 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3299 else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) ||
\r
3300 (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )
\r
3302 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3304 else if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3305 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3307 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
\r
3309 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
3311 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3312 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3314 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3315 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3317 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3318 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3322 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3323 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3328 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3329 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3331 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3332 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3336 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3337 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3344 halbtc8192e2ant_ActionPanEdrA2dp(
\r
3345 IN PBTC_COEXIST pBtCoexist
\r
3348 u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_HIGH;
\r
3351 wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3352 btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42);
\r
3354 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
3355 halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3357 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3359 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2);
\r
3361 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3363 if( (btRssiState == BTC_RSSI_STATE_LOW) ||
\r
3364 (btRssiState == BTC_RSSI_STATE_STAY_LOW) )
\r
3366 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3367 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3);
\r
3369 else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) ||
\r
3370 (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )
\r
3372 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3373 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3);
\r
3375 else if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3376 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3378 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
\r
3379 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3);
\r
3383 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3385 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3386 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3388 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3389 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3393 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3394 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3399 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3400 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3402 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3403 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3407 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3408 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3414 halbtc8192e2ant_ActionPanEdrHid(
\r
3415 IN PBTC_COEXIST pBtCoexist
\r
3418 u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_HIGH;
\r
3421 wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3422 btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42);
\r
3424 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3426 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
3427 halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3429 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3431 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3);
\r
3433 if( (btRssiState == BTC_RSSI_STATE_LOW) ||
\r
3434 (btRssiState == BTC_RSSI_STATE_STAY_LOW) )
\r
3436 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3437 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
3439 else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) ||
\r
3440 (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )
\r
3442 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3443 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
3445 else if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3446 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3448 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
\r
3449 halbtc8192e2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
3453 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3455 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3456 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3458 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3459 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3463 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3464 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3469 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3470 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3472 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3473 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3477 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3478 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3483 // HID+A2DP+PAN(EDR)
\r
3485 halbtc8192e2ant_ActionHidA2dpPanEdr(
\r
3486 IN PBTC_COEXIST pBtCoexist
\r
3489 u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_HIGH;
\r
3492 wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3493 btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42);
\r
3495 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
3496 halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3498 halbtc8192e2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3500 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3502 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3);
\r
3504 if( (btRssiState == BTC_RSSI_STATE_LOW) ||
\r
3505 (btRssiState == BTC_RSSI_STATE_STAY_LOW) )
\r
3507 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3508 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
\r
3510 else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) ||
\r
3511 (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )
\r
3513 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3514 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3);
\r
3516 else if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3517 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3519 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
\r
3520 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3);
\r
3524 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3526 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3527 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3529 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3530 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3534 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3535 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3540 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3541 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3543 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3544 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3548 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3549 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3555 halbtc8192e2ant_ActionHidA2dp(
\r
3556 IN PBTC_COEXIST pBtCoexist
\r
3559 u1Byte wifiRssiState, btRssiState=BTC_RSSI_STATE_HIGH;
\r
3562 wifiRssiState = halbtc8192e2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3563 btRssiState = halbtc8192e2ant_BtRssiState(3, 34, 42);
\r
3565 halbtc8192e2ant_SwitchSsType(pBtCoexist, NORMAL_EXEC, 1);
\r
3566 halbtc8192e2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3568 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3570 halbtc8192e2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 3);
\r
3572 if( (btRssiState == BTC_RSSI_STATE_LOW) ||
\r
3573 (btRssiState == BTC_RSSI_STATE_STAY_LOW) )
\r
3575 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3576 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2);
\r
3578 else if( (btRssiState == BTC_RSSI_STATE_MEDIUM) ||
\r
3579 (btRssiState == BTC_RSSI_STATE_STAY_MEDIUM) )
\r
3581 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3582 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2);
\r
3584 else if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3585 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3587 halbtc8192e2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
\r
3588 halbtc8192e2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2);
\r
3592 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3594 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3595 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3597 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3598 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3602 halbtc8192e2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3603 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3608 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3609 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3611 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3612 halbtc8192e2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3616 halbtc8192e2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3617 halbtc8192e2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3623 halbtc8192e2ant_RunCoexistMechanism(
\r
3624 IN PBTC_COEXIST pBtCoexist
\r
3627 BOOLEAN bWifiUnder5G=FALSE;
\r
3628 u1Byte btInfoOriginal=0, btRetryCnt=0;
\r
3629 u1Byte algorithm=0;
\r
3631 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism()===>\n"));
\r
3633 if(pBtCoexist->bManualControl)
\r
3635 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"));
\r
3639 if(pCoexSta->bUnderIps)
\r
3641 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], wifi is under IPS !!!\n"));
\r
3645 algorithm = halbtc8192e2ant_ActionAlgorithm(pBtCoexist);
\r
3646 if(pCoexSta->bC2hBtInquiryPage && (BT_8192E_2ANT_COEX_ALGO_PANHS!=algorithm))
\r
3648 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT is under inquiry/page scan !!\n"));
\r
3649 halbtc8192e2ant_ActionBtInquiry(pBtCoexist);
\r
3653 pCoexDm->curAlgorithm = algorithm;
\r
3654 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm));
\r
3656 if(halbtc8192e2ant_IsCommonAction(pBtCoexist))
\r
3658 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant common.\n"));
\r
3659 pCoexDm->bAutoTdmaAdjust = FALSE;
\r
3663 if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm)
\r
3665 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n",
\r
3666 pCoexDm->preAlgorithm, pCoexDm->curAlgorithm));
\r
3667 pCoexDm->bAutoTdmaAdjust = FALSE;
\r
3669 switch(pCoexDm->curAlgorithm)
\r
3671 case BT_8192E_2ANT_COEX_ALGO_SCO:
\r
3672 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n"));
\r
3673 halbtc8192e2ant_ActionSco(pBtCoexist);
\r
3675 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
\r
3676 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = SCO+PAN(EDR).\n"));
\r
3677 halbtc8192e2ant_ActionScoPan(pBtCoexist);
\r
3679 case BT_8192E_2ANT_COEX_ALGO_HID:
\r
3680 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID.\n"));
\r
3681 halbtc8192e2ant_ActionHid(pBtCoexist);
\r
3683 case BT_8192E_2ANT_COEX_ALGO_A2DP:
\r
3684 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n"));
\r
3685 halbtc8192e2ant_ActionA2dp(pBtCoexist);
\r
3687 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
\r
3688 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n"));
\r
3689 halbtc8192e2ant_ActionA2dpPanHs(pBtCoexist);
\r
3691 case BT_8192E_2ANT_COEX_ALGO_PANEDR:
\r
3692 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n"));
\r
3693 halbtc8192e2ant_ActionPanEdr(pBtCoexist);
\r
3695 case BT_8192E_2ANT_COEX_ALGO_PANHS:
\r
3696 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n"));
\r
3697 halbtc8192e2ant_ActionPanHs(pBtCoexist);
\r
3699 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
\r
3700 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n"));
\r
3701 halbtc8192e2ant_ActionPanEdrA2dp(pBtCoexist);
\r
3703 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
\r
3704 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n"));
\r
3705 halbtc8192e2ant_ActionPanEdrHid(pBtCoexist);
\r
3707 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
\r
3708 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n"));
\r
3709 halbtc8192e2ant_ActionHidA2dpPanEdr(pBtCoexist);
\r
3711 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
\r
3712 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n"));
\r
3713 halbtc8192e2ant_ActionHidA2dp(pBtCoexist);
\r
3716 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = unknown!!\n"));
\r
3717 //halbtc8192e2ant_CoexAllOff(pBtCoexist);
\r
3720 pCoexDm->preAlgorithm = pCoexDm->curAlgorithm;
\r
3725 halbtc8192e2ant_InitHwConfig(
\r
3726 IN PBTC_COEXIST pBtCoexist,
\r
3727 IN BOOLEAN bBackUp
\r
3734 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], 2Ant Init HW Config!!\n"));
\r
3738 // backup rf 0x1e value
\r
3739 pCoexDm->btRf0x1eBackup =
\r
3740 pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff);
\r
3742 pCoexDm->backupArfrCnt1 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430);
\r
3743 pCoexDm->backupArfrCnt2 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434);
\r
3744 pCoexDm->backupRetryLimit = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a);
\r
3745 pCoexDm->backupAmpduMaxTime = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456);
\r
3748 // antenna sw ctrl to bt
\r
3749 halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, TRUE, FALSE);
\r
3751 halbtc8192e2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0);
\r
3753 // antenna switch control parameter
\r
3754 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x858, 0x55555555);
\r
3756 // coex parameters
\r
3757 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3);
\r
3759 u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790);
\r
3762 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp);
\r
3764 // enable counter statistics
\r
3765 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4);
\r
3768 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20);
\r
3769 // enable mailbox interface
\r
3770 u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x40);
\r
3772 pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x40, u2Tmp);
\r
3774 // enable PTA I2C mailbox
\r
3775 u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x101);
\r
3777 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x101, u1Tmp);
\r
3779 // enable bt clock when wifi is disabled.
\r
3780 u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x93);
\r
3782 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x93, u1Tmp);
\r
3783 // enable bt clock when suspend.
\r
3784 u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7);
\r
3786 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x7, u1Tmp);
\r
3789 //============================================================
\r
3790 // work around function start with wa_halbtc8192e2ant_
\r
3791 //============================================================
\r
3792 //============================================================
\r
3793 // extern function start with EXhalbtc8192e2ant_
\r
3794 //============================================================
\r
3796 EXhalbtc8192e2ant_PowerOnSetting(
\r
3797 IN PBTC_COEXIST pBtCoexist
\r
3803 EXhalbtc8192e2ant_InitHwConfig(
\r
3804 IN PBTC_COEXIST pBtCoexist,
\r
3805 IN BOOLEAN bWifiOnly
\r
3808 halbtc8192e2ant_InitHwConfig(pBtCoexist, TRUE);
\r
3812 EXhalbtc8192e2ant_InitCoexDm(
\r
3813 IN PBTC_COEXIST pBtCoexist
\r
3816 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], Coex Mechanism Init!!\n"));
\r
3818 halbtc8192e2ant_InitCoexDm(pBtCoexist);
\r
3822 EXhalbtc8192e2ant_DisplayCoexInfo(
\r
3823 IN PBTC_COEXIST pBtCoexist
\r
3826 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
\r
3827 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
\r
3828 pu1Byte cliBuf=pBtCoexist->cliBuf;
\r
3829 u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
\r
3832 u4Byte faOfdm, faCck;
\r
3833 u4Byte fwVer=0, btPatchVer=0;
\r
3835 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
\r
3836 CL_PRINTF(cliBuf);
\r
3838 if(pBtCoexist->bManualControl)
\r
3840 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============");
\r
3841 CL_PRINTF(cliBuf);
\r
3842 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ==========================================");
\r
3843 CL_PRINTF(cliBuf);
\r
3846 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
\r
3847 pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
\r
3848 CL_PRINTF(cliBuf);
\r
3850 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \
\r
3851 ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion);
\r
3852 CL_PRINTF(cliBuf);
\r
3854 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
\r
3855 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
\r
3856 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \
\r
3857 GLCoexVerDate8192e2Ant, GLCoexVer8192e2Ant, fwVer, btPatchVer, btPatchVer);
\r
3858 CL_PRINTF(cliBuf);
\r
3860 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
\r
3861 pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
\r
3862 pCoexDm->wifiChnlInfo[2]);
\r
3863 CL_PRINTF(cliBuf);
\r
3866 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
\r
3867 CL_PRINTF(cliBuf);
\r
3868 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
\r
3870 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
\r
3871 CL_PRINTF(cliBuf);
\r
3873 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ", "BT [status/ rssi/ retryCnt]", \
\r
3874 ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle":
\r
3875 ( (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))),
\r
3876 pCoexSta->btRssi, pCoexSta->btRetryCnt);
\r
3877 CL_PRINTF(cliBuf);
\r
3879 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \
\r
3880 pStackInfo->bScoExist, pStackInfo->bHidExist, pStackInfo->bPanExist, pStackInfo->bA2dpExist);
\r
3881 CL_PRINTF(cliBuf);
\r
3882 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO);
\r
3884 btInfoExt = pCoexSta->btInfoExt;
\r
3885 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \
\r
3886 (btInfoExt&BIT0)? "Basic rate":"EDR rate");
\r
3887 CL_PRINTF(cliBuf);
\r
3889 for(i=0; i<BT_INFO_SRC_8192E_2ANT_MAX; i++)
\r
3891 if(pCoexSta->btInfoC2hCnt[i])
\r
3893 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8192e2Ant[i], \
\r
3894 pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1],
\r
3895 pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3],
\r
3896 pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5],
\r
3897 pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]);
\r
3898 CL_PRINTF(cliBuf);
\r
3902 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type", \
\r
3903 pCoexDm->curSsType);
\r
3904 CL_PRINTF(cliBuf);
\r
3907 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============");
\r
3908 CL_PRINTF(cliBuf);
\r
3909 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \
\r
3910 pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig);
\r
3911 CL_PRINTF(cliBuf);
\r
3912 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \
\r
3913 pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl);
\r
3914 CL_PRINTF(cliBuf);
\r
3916 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Rate Mask", \
\r
3917 pBtCoexist->btInfo.raMask);
\r
3918 CL_PRINTF(cliBuf);
\r
3921 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============");
\r
3922 CL_PRINTF(cliBuf);
\r
3924 psTdmaCase = pCoexDm->curPsTdma;
\r
3925 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", "PS TDMA", \
\r
3926 pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1],
\r
3927 pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3],
\r
3928 pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust);
\r
3929 CL_PRINTF(cliBuf);
\r
3931 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \
\r
3932 pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct);
\r
3933 CL_PRINTF(cliBuf);
\r
3936 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============");
\r
3937 CL_PRINTF(cliBuf);
\r
3939 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \
\r
3940 pCoexDm->btRf0x1eBackup);
\r
3941 CL_PRINTF(cliBuf);
\r
3943 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "backup ARFR1/ARFR2/RL/AMaxTime", \
\r
3944 pCoexDm->backupArfrCnt1, pCoexDm->backupArfrCnt2, pCoexDm->backupRetryLimit, pCoexDm->backupAmpduMaxTime);
\r
3945 CL_PRINTF(cliBuf);
\r
3947 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x430);
\r
3948 u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x434);
\r
3949 u2Tmp[0] = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x42a);
\r
3950 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x456);
\r
3951 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x", "0x430/0x434/0x42a/0x456", \
\r
3952 u4Tmp[0], u4Tmp[1], u2Tmp[0], u1Tmp[0]);
\r
3953 CL_PRINTF(cliBuf);
\r
3955 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc04);
\r
3956 u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xd04);
\r
3957 u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x90c);
\r
3958 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0xc04/ 0xd04/ 0x90c", \
\r
3959 u4Tmp[0], u4Tmp[1], u4Tmp[2]);
\r
3960 CL_PRINTF(cliBuf);
\r
3962 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778);
\r
3963 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778", \
\r
3965 CL_PRINTF(cliBuf);
\r
3967 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x92c);
\r
3968 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930);
\r
3969 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x92c/ 0x930", \
\r
3970 (u1Tmp[0]), u4Tmp[0]);
\r
3971 CL_PRINTF(cliBuf);
\r
3973 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40);
\r
3974 u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4f);
\r
3975 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x40/ 0x4f", \
\r
3976 u1Tmp[0], u1Tmp[1]);
\r
3977 CL_PRINTF(cliBuf);
\r
3979 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550);
\r
3980 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522);
\r
3981 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \
\r
3982 u4Tmp[0], u1Tmp[0]);
\r
3983 CL_PRINTF(cliBuf);
\r
3985 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50);
\r
3986 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)", \
\r
3988 CL_PRINTF(cliBuf);
\r
3990 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0);
\r
3991 u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4);
\r
3992 u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8);
\r
3993 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc);
\r
3994 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \
\r
3995 u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]);
\r
3996 CL_PRINTF(cliBuf);
\r
3998 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(hp rx[31:16]/tx[15:0])", \
\r
3999 pCoexSta->highPriorityRx, pCoexSta->highPriorityTx);
\r
4000 CL_PRINTF(cliBuf);
\r
4001 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(lp rx[31:16]/tx[15:0])", \
\r
4002 pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx);
\r
4003 CL_PRINTF(cliBuf);
\r
4004 #if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
\r
4005 halbtc8192e2ant_MonitorBtCtr(pBtCoexist);
\r
4007 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);
\r
4012 EXhalbtc8192e2ant_IpsNotify(
\r
4013 IN PBTC_COEXIST pBtCoexist,
\r
4017 if(BTC_IPS_ENTER == type)
\r
4019 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS ENTER notify\n"));
\r
4020 pCoexSta->bUnderIps = TRUE;
\r
4021 halbtc8192e2ant_CoexAllOff(pBtCoexist);
\r
4022 halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE);
\r
4024 else if(BTC_IPS_LEAVE == type)
\r
4026 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS LEAVE notify\n"));
\r
4027 pCoexSta->bUnderIps = FALSE;
\r
4032 EXhalbtc8192e2ant_LpsNotify(
\r
4033 IN PBTC_COEXIST pBtCoexist,
\r
4037 if(BTC_LPS_ENABLE == type)
\r
4039 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS ENABLE notify\n"));
\r
4040 pCoexSta->bUnderLps = TRUE;
\r
4042 else if(BTC_LPS_DISABLE == type)
\r
4044 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS DISABLE notify\n"));
\r
4045 pCoexSta->bUnderLps = FALSE;
\r
4050 EXhalbtc8192e2ant_ScanNotify(
\r
4051 IN PBTC_COEXIST pBtCoexist,
\r
4055 if(BTC_SCAN_START == type)
\r
4057 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN START notify\n"));
\r
4059 else if(BTC_SCAN_FINISH == type)
\r
4061 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN FINISH notify\n"));
\r
4066 EXhalbtc8192e2ant_ConnectNotify(
\r
4067 IN PBTC_COEXIST pBtCoexist,
\r
4071 if(BTC_ASSOCIATE_START == type)
\r
4073 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT START notify\n"));
\r
4075 else if(BTC_ASSOCIATE_FINISH == type)
\r
4077 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT FINISH notify\n"));
\r
4082 EXhalbtc8192e2ant_MediaStatusNotify(
\r
4083 IN PBTC_COEXIST pBtCoexist,
\r
4087 u1Byte H2C_Parameter[3] ={0};
\r
4089 u1Byte wifiCentralChnl;
\r
4091 if(pBtCoexist->bManualControl ||
\r
4092 pBtCoexist->bStopCoexDm ||
\r
4093 pBtCoexist->btInfo.bBtDisabled )
\r
4096 if(BTC_MEDIA_CONNECT == type)
\r
4098 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA connect notify\n"));
\r
4102 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA disconnect notify\n"));
\r
4105 // only 2.4G we need to inform bt the chnl mask
\r
4106 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl);
\r
4107 if( (BTC_MEDIA_CONNECT == type) &&
\r
4108 (wifiCentralChnl <= 14) )
\r
4110 H2C_Parameter[0] = 0x1;
\r
4111 H2C_Parameter[1] = wifiCentralChnl;
\r
4112 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
4113 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
4114 H2C_Parameter[2] = 0x30;
\r
4116 H2C_Parameter[2] = 0x20;
\r
4119 pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0];
\r
4120 pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1];
\r
4121 pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2];
\r
4123 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x66=0x%x\n",
\r
4124 H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]));
\r
4126 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter);
\r
4130 EXhalbtc8192e2ant_SpecialPacketNotify(
\r
4131 IN PBTC_COEXIST pBtCoexist,
\r
4135 if(type == BTC_PACKET_DHCP)
\r
4137 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], DHCP Packet notify\n"));
\r
4142 EXhalbtc8192e2ant_BtInfoNotify(
\r
4143 IN PBTC_COEXIST pBtCoexist,
\r
4144 IN pu1Byte tmpBuf,
\r
4148 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
\r
4150 u1Byte i, rspSource=0;
\r
4151 BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE;
\r
4152 BOOLEAN bWifiConnected=FALSE;
\r
4154 pCoexSta->bC2hBtInfoReqSent = FALSE;
\r
4156 rspSource = tmpBuf[0]&0xf;
\r
4157 if(rspSource >= BT_INFO_SRC_8192E_2ANT_MAX)
\r
4158 rspSource = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
\r
4159 pCoexSta->btInfoC2hCnt[rspSource]++;
\r
4161 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length));
\r
4162 for(i=0; i<length; i++)
\r
4164 pCoexSta->btInfoC2h[rspSource][i] = tmpBuf[i];
\r
4166 btInfo = tmpBuf[i];
\r
4169 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x]\n", tmpBuf[i]));
\r
4173 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x, ", tmpBuf[i]));
\r
4177 if(BT_INFO_SRC_8192E_2ANT_WIFI_FW != rspSource)
\r
4179 pCoexSta->btRetryCnt = // [3:0]
\r
4180 pCoexSta->btInfoC2h[rspSource][2]&0xf;
\r
4182 pCoexSta->btRssi =
\r
4183 pCoexSta->btInfoC2h[rspSource][3]*2+10;
\r
4185 pCoexSta->btInfoExt =
\r
4186 pCoexSta->btInfoC2h[rspSource][4];
\r
4188 // Here we need to resend some wifi info to BT
\r
4189 // because bt is reset and loss of the info.
\r
4190 if( (pCoexSta->btInfoExt & BIT1) )
\r
4192 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"));
\r
4193 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
\r
4194 if(bWifiConnected)
\r
4196 EXhalbtc8192e2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT);
\r
4200 EXhalbtc8192e2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
\r
4204 if( (pCoexSta->btInfoExt & BIT3) )
\r
4206 if(!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm)
\r
4208 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"));
\r
4209 halbtc8192e2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE);
\r
4214 // BT already NOT ignore Wlan active, do nothing here.
\r
4217 #if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
\r
4218 if( (pCoexSta->btInfoExt & BIT4) )
\r
4220 // BT auto report already enabled, do nothing
\r
4224 halbtc8192e2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE);
\r
4229 // check BIT2 first ==> check if bt is under inquiry or page scan
\r
4230 if(btInfo & BT_INFO_8192E_2ANT_B_INQ_PAGE)
\r
4231 pCoexSta->bC2hBtInquiryPage = TRUE;
\r
4233 pCoexSta->bC2hBtInquiryPage = FALSE;
\r
4235 // set link exist status
\r
4236 if(!(btInfo&BT_INFO_8192E_2ANT_B_CONNECTION))
\r
4238 pCoexSta->bBtLinkExist = FALSE;
\r
4239 pCoexSta->bPanExist = FALSE;
\r
4240 pCoexSta->bA2dpExist = FALSE;
\r
4241 pCoexSta->bHidExist = FALSE;
\r
4242 pCoexSta->bScoExist = FALSE;
\r
4244 else // connection exists
\r
4246 pCoexSta->bBtLinkExist = TRUE;
\r
4247 if(btInfo & BT_INFO_8192E_2ANT_B_FTP)
\r
4248 pCoexSta->bPanExist = TRUE;
\r
4250 pCoexSta->bPanExist = FALSE;
\r
4251 if(btInfo & BT_INFO_8192E_2ANT_B_A2DP)
\r
4252 pCoexSta->bA2dpExist = TRUE;
\r
4254 pCoexSta->bA2dpExist = FALSE;
\r
4255 if(btInfo & BT_INFO_8192E_2ANT_B_HID)
\r
4256 pCoexSta->bHidExist = TRUE;
\r
4258 pCoexSta->bHidExist = FALSE;
\r
4259 if(btInfo & BT_INFO_8192E_2ANT_B_SCO_ESCO)
\r
4260 pCoexSta->bScoExist = TRUE;
\r
4262 pCoexSta->bScoExist = FALSE;
\r
4265 halbtc8192e2ant_UpdateBtLinkInfo(pBtCoexist);
\r
4267 if(!(btInfo&BT_INFO_8192E_2ANT_B_CONNECTION))
\r
4269 pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
\r
4270 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"));
\r
4272 else if(btInfo == BT_INFO_8192E_2ANT_B_CONNECTION) // connection exists but no busy
\r
4274 pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
\r
4275 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"));
\r
4277 else if((btInfo&BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
\r
4278 (btInfo&BT_INFO_8192E_2ANT_B_SCO_BUSY))
\r
4280 pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
\r
4281 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"));
\r
4283 else if(btInfo&BT_INFO_8192E_2ANT_B_ACL_BUSY)
\r
4285 pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
\r
4286 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"));
\r
4290 pCoexDm->btStatus = BT_8192E_2ANT_BT_STATUS_MAX;
\r
4291 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"));
\r
4294 if( (BT_8192E_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ||
\r
4295 (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) ||
\r
4296 (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) )
\r
4299 bLimitedDig = TRUE;
\r
4304 bLimitedDig = FALSE;
\r
4307 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy);
\r
4309 pCoexDm->bLimitedDig = bLimitedDig;
\r
4310 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig);
\r
4312 halbtc8192e2ant_RunCoexistMechanism(pBtCoexist);
\r
4316 EXhalbtc8192e2ant_HaltNotify(
\r
4317 IN PBTC_COEXIST pBtCoexist
\r
4320 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Halt notify\n"));
\r
4322 halbtc8192e2ant_SetAntPath(pBtCoexist, BTC_ANT_PATH_BT, FALSE, TRUE);
\r
4323 halbtc8192e2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE);
\r
4324 EXhalbtc8192e2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
\r
4328 EXhalbtc8192e2ant_Periodical(
\r
4329 IN PBTC_COEXIST pBtCoexist
\r
4332 static u1Byte disVerInfoCnt=0;
\r
4333 u4Byte fwVer=0, btPatchVer=0;
\r
4334 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
\r
4335 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
\r
4337 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], ==========================Periodical===========================\n"));
\r
4339 if(disVerInfoCnt <= 5)
\r
4341 disVerInfoCnt += 1;
\r
4342 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ****************************************************************\n"));
\r
4343 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", \
\r
4344 pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos));
\r
4345 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", \
\r
4346 ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion));
\r
4347 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
\r
4348 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
\r
4349 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", \
\r
4350 GLCoexVerDate8192e2Ant, GLCoexVer8192e2Ant, fwVer, btPatchVer, btPatchVer));
\r
4351 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ****************************************************************\n"));
\r
4354 #if(BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
\r
4355 halbtc8192e2ant_QueryBtInfo(pBtCoexist);
\r
4356 halbtc8192e2ant_MonitorBtCtr(pBtCoexist);
\r
4357 halbtc8192e2ant_MonitorBtEnableDisable(pBtCoexist);
\r
4359 if( halbtc8192e2ant_IsWifiStatusChanged(pBtCoexist) ||
\r
4360 pCoexDm->bAutoTdmaAdjust)
\r
4362 halbtc8192e2ant_RunCoexistMechanism(pBtCoexist);
\r