1 //============================================================
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4 // This file is for RTL8723B Co-exist mechanism
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7 // 2012/11/15 Cosa first check in.
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9 //============================================================
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11 //============================================================
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13 //============================================================
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14 #include "Mp_Precomp.h"
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15 #if(BT_30_SUPPORT == 1)
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16 //============================================================
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17 // Global variables, these are static variables
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18 //============================================================
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19 static COEX_DM_8723B_2ANT GLCoexDm8723b2Ant;
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20 static PCOEX_DM_8723B_2ANT pCoexDm=&GLCoexDm8723b2Ant;
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21 static COEX_STA_8723B_2ANT GLCoexSta8723b2Ant;
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22 static PCOEX_STA_8723B_2ANT pCoexSta=&GLCoexSta8723b2Ant;
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24 const char *const GLBtInfoSrc8723b2Ant[]={
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27 "BT Info[bt auto report]",
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30 u4Byte GLCoexVerDate8723b2Ant=20140903;
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31 u4Byte GLCoexVer8723b2Ant=0x43;
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33 //============================================================
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34 // local function proto type if needed
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35 //============================================================
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36 //============================================================
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37 // local function start with halbtc8723b2ant_
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38 //============================================================
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40 halbtc8723b2ant_BtRssiState(
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47 u1Byte btRssiState=pCoexSta->preBtRssiState;
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49 btRssi = pCoexSta->btRssi;
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53 if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
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54 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW))
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56 if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
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58 btRssiState = BTC_RSSI_STATE_HIGH;
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59 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to High\n"));
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63 btRssiState = BTC_RSSI_STATE_STAY_LOW;
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64 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Low\n"));
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69 if(btRssi < rssiThresh)
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71 btRssiState = BTC_RSSI_STATE_LOW;
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72 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Low\n"));
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76 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
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77 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at High\n"));
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81 else if(levelNum == 3)
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83 if(rssiThresh > rssiThresh1)
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85 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi thresh error!!\n"));
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86 return pCoexSta->preBtRssiState;
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89 if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
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90 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW))
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92 if(btRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
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94 btRssiState = BTC_RSSI_STATE_MEDIUM;
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95 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Medium\n"));
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99 btRssiState = BTC_RSSI_STATE_STAY_LOW;
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100 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Low\n"));
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103 else if( (pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) ||
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104 (pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM))
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106 if(btRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
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108 btRssiState = BTC_RSSI_STATE_HIGH;
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109 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to High\n"));
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111 else if(btRssi < rssiThresh)
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113 btRssiState = BTC_RSSI_STATE_LOW;
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114 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Low\n"));
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118 btRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
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119 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at Medium\n"));
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124 if(btRssi < rssiThresh1)
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126 btRssiState = BTC_RSSI_STATE_MEDIUM;
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127 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state switch to Medium\n"));
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131 btRssiState = BTC_RSSI_STATE_STAY_HIGH;
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132 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE, ("[BTCoex], BT Rssi state stay at High\n"));
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137 pCoexSta->preBtRssiState = btRssiState;
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139 return btRssiState;
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143 halbtc8723b2ant_WifiRssiState(
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144 IN PBTC_COEXIST pBtCoexist,
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146 IN u1Byte levelNum,
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147 IN u1Byte rssiThresh,
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148 IN u1Byte rssiThresh1
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152 u1Byte wifiRssiState=pCoexSta->preWifiRssiState[index];
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154 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_S4_WIFI_RSSI, &wifiRssi);
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158 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
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159 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
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161 if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
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163 wifiRssiState = BTC_RSSI_STATE_HIGH;
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164 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n"));
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168 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
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169 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n"));
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174 if(wifiRssi < rssiThresh)
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176 wifiRssiState = BTC_RSSI_STATE_LOW;
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177 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n"));
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181 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
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182 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n"));
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186 else if(levelNum == 3)
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188 if(rssiThresh > rssiThresh1)
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190 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI thresh error!!\n"));
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191 return pCoexSta->preWifiRssiState[index];
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194 if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_LOW) ||
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195 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_LOW))
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197 if(wifiRssi >= (rssiThresh+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
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199 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
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200 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n"));
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204 wifiRssiState = BTC_RSSI_STATE_STAY_LOW;
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205 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Low\n"));
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208 else if( (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_MEDIUM) ||
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209 (pCoexSta->preWifiRssiState[index] == BTC_RSSI_STATE_STAY_MEDIUM))
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211 if(wifiRssi >= (rssiThresh1+BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
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213 wifiRssiState = BTC_RSSI_STATE_HIGH;
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214 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to High\n"));
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216 else if(wifiRssi < rssiThresh)
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218 wifiRssiState = BTC_RSSI_STATE_LOW;
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219 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Low\n"));
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223 wifiRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
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224 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at Medium\n"));
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229 if(wifiRssi < rssiThresh1)
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231 wifiRssiState = BTC_RSSI_STATE_MEDIUM;
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232 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state switch to Medium\n"));
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236 wifiRssiState = BTC_RSSI_STATE_STAY_HIGH;
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237 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE, ("[BTCoex], wifi RSSI state stay at High\n"));
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242 pCoexSta->preWifiRssiState[index] = wifiRssiState;
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244 return wifiRssiState;
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248 halbtc8723b2ant_MonitorBtEnableDisable(
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249 IN PBTC_COEXIST pBtCoexist
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252 static BOOLEAN bPreBtDisabled=FALSE;
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253 static u4Byte btDisableCnt=0;
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254 BOOLEAN bBtActive=TRUE, bBtDisabled=FALSE;
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256 // This function check if bt is disabled
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258 if( pCoexSta->highPriorityTx == 0 &&
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259 pCoexSta->highPriorityRx == 0 &&
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260 pCoexSta->lowPriorityTx == 0 &&
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261 pCoexSta->lowPriorityRx == 0)
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265 if( pCoexSta->highPriorityTx == 0xffff &&
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266 pCoexSta->highPriorityRx == 0xffff &&
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267 pCoexSta->lowPriorityTx == 0xffff &&
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268 pCoexSta->lowPriorityRx == 0xffff)
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275 bBtDisabled = FALSE;
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276 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
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277 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is enabled !!\n"));
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282 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], bt all counters=0, %d times!!\n",
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284 if(btDisableCnt >= 2)
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286 bBtDisabled = TRUE;
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287 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_DISABLE, &bBtDisabled);
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288 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is disabled !!\n"));
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291 if(bPreBtDisabled != bBtDisabled)
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293 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], BT is from %s to %s!!\n",
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294 (bPreBtDisabled ? "disabled":"enabled"),
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295 (bBtDisabled ? "disabled":"enabled")));
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296 bPreBtDisabled = bBtDisabled;
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307 halbtc8723b2ant_LimitedRx(
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308 IN PBTC_COEXIST pBtCoexist,
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309 IN BOOLEAN bForceExec,
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310 IN BOOLEAN bRejApAggPkt,
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311 IN BOOLEAN bBtCtrlAggBufSize,
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312 IN u1Byte aggBufSize
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315 BOOLEAN bRejectRxAgg=bRejApAggPkt;
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316 BOOLEAN bBtCtrlRxAggSize=bBtCtrlAggBufSize;
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317 u1Byte rxAggSize=aggBufSize;
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319 //============================================
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320 // Rx Aggregation related setting
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321 //============================================
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322 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT, &bRejectRxAgg);
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323 // decide BT control aggregation buf size or not
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324 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE, &bBtCtrlRxAggSize);
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325 // aggregation buf size, only work when BT control Rx aggregation size.
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326 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_AGG_BUF_SIZE, &rxAggSize);
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327 // real update aggregation setting
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328 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
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332 halbtc8723b2ant_MonitorBtCtr(
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333 IN PBTC_COEXIST pBtCoexist
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336 u4Byte regHPTxRx, regLPTxRx, u4Tmp;
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337 u4Byte regHPTx=0, regHPRx=0, regLPTx=0, regLPRx=0;
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340 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
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345 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regHPTxRx);
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346 regHPTx = u4Tmp & bMaskLWord;
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347 regHPRx = (u4Tmp & bMaskHWord)>>16;
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349 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, regLPTxRx);
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350 regLPTx = u4Tmp & bMaskLWord;
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351 regLPRx = (u4Tmp & bMaskHWord)>>16;
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353 pCoexSta->highPriorityTx = regHPTx;
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354 pCoexSta->highPriorityRx = regHPRx;
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355 pCoexSta->lowPriorityTx = regLPTx;
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356 pCoexSta->lowPriorityRx = regLPRx;
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358 if ( (pCoexSta->lowPriorityRx >= 950) && (pCoexSta->lowPriorityRx >= pCoexSta->lowPriorityTx) && (!pCoexSta->bUnderIps) )
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360 pBtLinkInfo->bSlaveRole = TRUE;
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364 pBtLinkInfo->bSlaveRole = FALSE;
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367 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
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368 regHPTxRx, regHPTx, regHPTx, regHPRx, regHPRx));
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369 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR, ("[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
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370 regLPTxRx, regLPTx, regLPTx, regLPRx, regLPRx));
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373 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc);
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377 halbtc8723b2ant_MonitorWiFiCtr(
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378 IN PBTC_COEXIST pBtCoexist
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384 BOOLEAN bWifiBusy = FALSE, bWifiUnderBMode = FALSE;
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385 static u1Byte nCCKLockCounter = 0;
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388 if (pCoexSta->bUnderIps)
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390 pCoexSta->nCRCOK_CCK = 0;
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391 pCoexSta->nCRCOK_11g = 0;
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392 pCoexSta->nCRCOK_11n = 0;
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393 pCoexSta->nCRCOK_11nAgg = 0;
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395 pCoexSta->nCRCErr_CCK = 0;
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396 pCoexSta->nCRCErr_11g = 0;
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397 pCoexSta->nCRCErr_11n = 0;
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398 pCoexSta->nCRCErr_11nAgg = 0;
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402 pCoexSta->nCRCOK_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf88);
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403 pCoexSta->nCRCOK_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf94);
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404 pCoexSta->nCRCOK_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf90);
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405 pCoexSta->nCRCOK_11nAgg= pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfb8);
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407 pCoexSta->nCRCErr_CCK = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xf84);
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408 pCoexSta->nCRCErr_11g = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf96);
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409 pCoexSta->nCRCErr_11n = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xf92);
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410 pCoexSta->nCRCErr_11nAgg = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0xfba);
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414 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x1);
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415 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xf16, 0x1, 0x0);
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419 halbtc8723b2ant_QueryBtInfo(
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420 IN PBTC_COEXIST pBtCoexist
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423 u1Byte H2C_Parameter[1] ={0};
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425 pCoexSta->bC2hBtInfoReqSent = TRUE;
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427 H2C_Parameter[0] |= BIT0; // trigger
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429 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Query Bt Info, FW write 0x61=0x%x\n",
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430 H2C_Parameter[0]));
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432 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x61, 1, H2C_Parameter);
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436 halbtc8723b2ant_IsWifiStatusChanged(
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437 IN PBTC_COEXIST pBtCoexist
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440 static BOOLEAN bPreWifiBusy=FALSE, bPreUnder4way=FALSE, bPreBtHsOn=FALSE;
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441 BOOLEAN bWifiBusy=FALSE, bUnder4way=FALSE, bBtHsOn=FALSE;
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442 BOOLEAN bWifiConnected=FALSE;
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443 u1Byte wifiRssiState=BTC_RSSI_STATE_HIGH;
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446 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
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447 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
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448 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
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449 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS, &bUnder4way);
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453 if(bWifiBusy != bPreWifiBusy)
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455 bPreWifiBusy = bWifiBusy;
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458 if(bUnder4way != bPreUnder4way)
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460 bPreUnder4way = bUnder4way;
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463 if(bBtHsOn != bPreBtHsOn)
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465 bPreBtHsOn = bBtHsOn;
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470 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist,3, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
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472 if ( (BTC_RSSI_STATE_HIGH ==wifiRssiState ) || (BTC_RSSI_STATE_LOW ==wifiRssiState ))
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483 halbtc8723b2ant_UpdateBtLinkInfo(
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484 IN PBTC_COEXIST pBtCoexist
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487 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
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488 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
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489 BOOLEAN bBtHsOn=FALSE;
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491 #if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 1) // profile from bt patch
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492 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
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494 pBtLinkInfo->bBtLinkExist = pCoexSta->bBtLinkExist;
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495 pBtLinkInfo->bScoExist = pCoexSta->bScoExist;
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496 pBtLinkInfo->bA2dpExist = pCoexSta->bA2dpExist;
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497 pBtLinkInfo->bPanExist = pCoexSta->bPanExist;
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498 pBtLinkInfo->bHidExist = pCoexSta->bHidExist;
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500 // work around for HS mode.
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503 pBtLinkInfo->bPanExist = TRUE;
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504 pBtLinkInfo->bBtLinkExist = TRUE;
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506 #else // profile from bt stack
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507 pBtLinkInfo->bBtLinkExist = pStackInfo->bBtLinkExist;
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508 pBtLinkInfo->bScoExist = pStackInfo->bScoExist;
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509 pBtLinkInfo->bA2dpExist = pStackInfo->bA2dpExist;
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510 pBtLinkInfo->bPanExist = pStackInfo->bPanExist;
\r
511 pBtLinkInfo->bHidExist = pStackInfo->bHidExist;
\r
513 //for win-8 stack HID report error
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514 if(!pStackInfo->bHidExist)
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515 pStackInfo->bHidExist = pCoexSta->bHidExist; //sync BTInfo with BT firmware and stack
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516 // when stack HID report error, here we use the info from bt fw.
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517 if(!pStackInfo->bBtLinkExist)
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518 pStackInfo->bBtLinkExist = pCoexSta->bBtLinkExist;
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520 // check if Sco only
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521 if( pBtLinkInfo->bScoExist &&
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522 !pBtLinkInfo->bA2dpExist &&
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523 !pBtLinkInfo->bPanExist &&
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524 !pBtLinkInfo->bHidExist )
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525 pBtLinkInfo->bScoOnly = TRUE;
\r
527 pBtLinkInfo->bScoOnly = FALSE;
\r
529 // check if A2dp only
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530 if( !pBtLinkInfo->bScoExist &&
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531 pBtLinkInfo->bA2dpExist &&
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532 !pBtLinkInfo->bPanExist &&
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533 !pBtLinkInfo->bHidExist )
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534 pBtLinkInfo->bA2dpOnly = TRUE;
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536 pBtLinkInfo->bA2dpOnly = FALSE;
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538 // check if Pan only
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539 if( !pBtLinkInfo->bScoExist &&
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540 !pBtLinkInfo->bA2dpExist &&
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541 pBtLinkInfo->bPanExist &&
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542 !pBtLinkInfo->bHidExist )
\r
543 pBtLinkInfo->bPanOnly = TRUE;
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545 pBtLinkInfo->bPanOnly = FALSE;
\r
547 // check if Hid only
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548 if( !pBtLinkInfo->bScoExist &&
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549 !pBtLinkInfo->bA2dpExist &&
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550 !pBtLinkInfo->bPanExist &&
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551 pBtLinkInfo->bHidExist )
\r
552 pBtLinkInfo->bHidOnly = TRUE;
\r
554 pBtLinkInfo->bHidOnly = FALSE;
\r
558 halbtc8723b2ant_ActionAlgorithm(
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559 IN PBTC_COEXIST pBtCoexist
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562 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
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563 BOOLEAN bBtHsOn=FALSE;
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564 u1Byte algorithm=BT_8723B_2ANT_COEX_ALGO_UNDEFINED;
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565 u1Byte numOfDiffProfile=0;
\r
567 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
\r
569 if(!pBtLinkInfo->bBtLinkExist)
\r
571 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], No BT link exists!!!\n"));
\r
575 if(pBtLinkInfo->bScoExist)
\r
576 numOfDiffProfile++;
\r
577 if(pBtLinkInfo->bHidExist)
\r
578 numOfDiffProfile++;
\r
579 if(pBtLinkInfo->bPanExist)
\r
580 numOfDiffProfile++;
\r
581 if(pBtLinkInfo->bA2dpExist)
\r
582 numOfDiffProfile++;
\r
584 if(numOfDiffProfile == 1)
\r
586 if(pBtLinkInfo->bScoExist)
\r
588 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO only\n"));
\r
589 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
\r
593 if(pBtLinkInfo->bHidExist)
\r
595 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID only\n"));
\r
596 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
\r
598 else if(pBtLinkInfo->bA2dpExist)
\r
600 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP only\n"));
\r
601 algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP;
\r
603 else if(pBtLinkInfo->bPanExist)
\r
607 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN(HS) only\n"));
\r
608 algorithm = BT_8723B_2ANT_COEX_ALGO_PANHS;
\r
612 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], PAN(EDR) only\n"));
\r
613 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR;
\r
618 else if(numOfDiffProfile == 2)
\r
620 if(pBtLinkInfo->bScoExist)
\r
622 if(pBtLinkInfo->bHidExist)
\r
624 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID\n"));
\r
625 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
627 else if(pBtLinkInfo->bA2dpExist)
\r
629 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP ==> SCO\n"));
\r
630 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
632 else if(pBtLinkInfo->bPanExist)
\r
636 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + PAN(HS)\n"));
\r
637 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
\r
641 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + PAN(EDR)\n"));
\r
642 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
648 if( pBtLinkInfo->bHidExist &&
\r
649 pBtLinkInfo->bA2dpExist )
\r
652 if(pStackInfo->numOfHid >= 2)
\r
654 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID*2 + A2DP\n"));
\r
655 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
\r
660 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP\n"));
\r
661 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
\r
664 else if( pBtLinkInfo->bHidExist &&
\r
665 pBtLinkInfo->bPanExist )
\r
669 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + PAN(HS)\n"));
\r
670 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
\r
674 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + PAN(EDR)\n"));
\r
675 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
678 else if( pBtLinkInfo->bPanExist &&
\r
679 pBtLinkInfo->bA2dpExist )
\r
683 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP + PAN(HS)\n"));
\r
684 algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS;
\r
688 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], A2DP + PAN(EDR)\n"));
\r
689 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP;
\r
694 else if(numOfDiffProfile == 3)
\r
696 if(pBtLinkInfo->bScoExist)
\r
698 if( pBtLinkInfo->bHidExist &&
\r
699 pBtLinkInfo->bA2dpExist )
\r
701 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + A2DP ==> HID\n"));
\r
702 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
704 else if( pBtLinkInfo->bHidExist &&
\r
705 pBtLinkInfo->bPanExist )
\r
709 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + PAN(HS)\n"));
\r
710 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
714 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + PAN(EDR)\n"));
\r
715 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
718 else if( pBtLinkInfo->bPanExist &&
\r
719 pBtLinkInfo->bA2dpExist )
\r
723 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP + PAN(HS)\n"));
\r
724 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
728 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n"));
\r
729 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
735 if( pBtLinkInfo->bHidExist &&
\r
736 pBtLinkInfo->bPanExist &&
\r
737 pBtLinkInfo->bA2dpExist )
\r
741 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP + PAN(HS)\n"));
\r
742 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
\r
746 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], HID + A2DP + PAN(EDR)\n"));
\r
747 algorithm = BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
\r
752 else if(numOfDiffProfile >= 3)
\r
754 if(pBtLinkInfo->bScoExist)
\r
756 if( pBtLinkInfo->bHidExist &&
\r
757 pBtLinkInfo->bPanExist &&
\r
758 pBtLinkInfo->bA2dpExist )
\r
762 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n"));
\r
767 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n"));
\r
768 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
778 halbtc8723b2ant_SetFwDacSwingLevel(
\r
779 IN PBTC_COEXIST pBtCoexist,
\r
780 IN u1Byte dacSwingLvl
\r
783 u1Byte H2C_Parameter[1] ={0};
\r
785 // There are several type of dacswing
\r
786 // 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6
\r
787 H2C_Parameter[0] = dacSwingLvl;
\r
789 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], Set Dac Swing Level=0x%x\n", dacSwingLvl));
\r
790 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x64=0x%x\n", H2C_Parameter[0]));
\r
792 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x64, 1, H2C_Parameter);
\r
796 halbtc8723b2ant_SetFwDecBtPwr(
\r
797 IN PBTC_COEXIST pBtCoexist,
\r
798 IN u1Byte decBtPwrLvl
\r
801 u1Byte H2C_Parameter[1] ={0};
\r
803 H2C_Parameter[0] = decBtPwrLvl;
\r
805 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], decrease Bt Power level = %d, FW write 0x62=0x%x\n",
\r
806 decBtPwrLvl, H2C_Parameter[0]));
\r
808 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x62, 1, H2C_Parameter);
\r
812 halbtc8723b2ant_DecBtPwr(
\r
813 IN PBTC_COEXIST pBtCoexist,
\r
814 IN BOOLEAN bForceExec,
\r
815 IN u1Byte decBtPwrLvl
\r
818 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s Dec BT power level = %d\n",
\r
819 (bForceExec? "force to":""), decBtPwrLvl));
\r
820 pCoexDm->curBtDecPwrLvl = decBtPwrLvl;
\r
824 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n",
\r
825 pCoexDm->preBtDecPwrLvl, pCoexDm->curBtDecPwrLvl));
\r
827 if(pCoexDm->preBtDecPwrLvl == pCoexDm->curBtDecPwrLvl)
\r
830 halbtc8723b2ant_SetFwDecBtPwr(pBtCoexist, pCoexDm->curBtDecPwrLvl);
\r
832 pCoexDm->preBtDecPwrLvl = pCoexDm->curBtDecPwrLvl;
\r
836 halbtc8723b2ant_SetBtAutoReport(
\r
837 IN PBTC_COEXIST pBtCoexist,
\r
838 IN BOOLEAN bEnableAutoReport
\r
841 u1Byte H2C_Parameter[1] ={0};
\r
843 H2C_Parameter[0] = 0;
\r
845 if(bEnableAutoReport)
\r
847 H2C_Parameter[0] |= BIT0;
\r
850 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], BT FW auto report : %s, FW write 0x68=0x%x\n",
\r
851 (bEnableAutoReport? "Enabled!!":"Disabled!!"), H2C_Parameter[0]));
\r
853 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x68, 1, H2C_Parameter);
\r
857 halbtc8723b2ant_BtAutoReport(
\r
858 IN PBTC_COEXIST pBtCoexist,
\r
859 IN BOOLEAN bForceExec,
\r
860 IN BOOLEAN bEnableAutoReport
\r
863 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s BT Auto report = %s\n",
\r
864 (bForceExec? "force to":""), ((bEnableAutoReport)? "Enabled":"Disabled")));
\r
865 pCoexDm->bCurBtAutoReport = bEnableAutoReport;
\r
869 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreBtAutoReport=%d, bCurBtAutoReport=%d\n",
\r
870 pCoexDm->bPreBtAutoReport, pCoexDm->bCurBtAutoReport));
\r
872 if(pCoexDm->bPreBtAutoReport == pCoexDm->bCurBtAutoReport)
\r
875 halbtc8723b2ant_SetBtAutoReport(pBtCoexist, pCoexDm->bCurBtAutoReport);
\r
877 pCoexDm->bPreBtAutoReport = pCoexDm->bCurBtAutoReport;
\r
881 halbtc8723b2ant_FwDacSwingLvl(
\r
882 IN PBTC_COEXIST pBtCoexist,
\r
883 IN BOOLEAN bForceExec,
\r
884 IN u1Byte fwDacSwingLvl
\r
887 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s set FW Dac Swing level = %d\n",
\r
888 (bForceExec? "force to":""), fwDacSwingLvl));
\r
889 pCoexDm->curFwDacSwingLvl = fwDacSwingLvl;
\r
893 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n",
\r
894 pCoexDm->preFwDacSwingLvl, pCoexDm->curFwDacSwingLvl));
\r
896 if(pCoexDm->preFwDacSwingLvl == pCoexDm->curFwDacSwingLvl)
\r
900 halbtc8723b2ant_SetFwDacSwingLevel(pBtCoexist, pCoexDm->curFwDacSwingLvl);
\r
902 pCoexDm->preFwDacSwingLvl = pCoexDm->curFwDacSwingLvl;
\r
906 halbtc8723b2ant_SetSwRfRxLpfCorner(
\r
907 IN PBTC_COEXIST pBtCoexist,
\r
908 IN BOOLEAN bRxRfShrinkOn
\r
913 //Shrink RF Rx LPF corner
\r
914 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Shrink RF Rx LPF corner!!\n"));
\r
915 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, 0xffffc);
\r
919 //Resume RF Rx LPF corner
\r
920 // After initialized, we can use pCoexDm->btRf0x1eBackup
\r
921 if(pBtCoexist->bInitilized)
\r
923 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Resume RF Rx LPF corner!!\n"));
\r
924 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff, pCoexDm->btRf0x1eBackup);
\r
930 halbtc8723b2ant_RfShrink(
\r
931 IN PBTC_COEXIST pBtCoexist,
\r
932 IN BOOLEAN bForceExec,
\r
933 IN BOOLEAN bRxRfShrinkOn
\r
936 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn Rx RF Shrink = %s\n",
\r
937 (bForceExec? "force to":""), ((bRxRfShrinkOn)? "ON":"OFF")));
\r
938 pCoexDm->bCurRfRxLpfShrink = bRxRfShrinkOn;
\r
942 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreRfRxLpfShrink=%d, bCurRfRxLpfShrink=%d\n",
\r
943 pCoexDm->bPreRfRxLpfShrink, pCoexDm->bCurRfRxLpfShrink));
\r
945 if(pCoexDm->bPreRfRxLpfShrink == pCoexDm->bCurRfRxLpfShrink)
\r
948 halbtc8723b2ant_SetSwRfRxLpfCorner(pBtCoexist, pCoexDm->bCurRfRxLpfShrink);
\r
950 pCoexDm->bPreRfRxLpfShrink = pCoexDm->bCurRfRxLpfShrink;
\r
954 halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(
\r
955 IN PBTC_COEXIST pBtCoexist,
\r
956 IN BOOLEAN bLowPenaltyRa
\r
959 u1Byte H2C_Parameter[6] ={0};
\r
961 H2C_Parameter[0] = 0x6; // opCode, 0x6= Retry_Penalty
\r
965 H2C_Parameter[1] |= BIT0;
\r
966 H2C_Parameter[2] = 0x00; //normal rate except MCS7/6/5, OFDM54/48/36
\r
967 H2C_Parameter[3] = 0xf7; //MCS7 or OFDM54
\r
968 H2C_Parameter[4] = 0xf8; //MCS6 or OFDM48
\r
969 H2C_Parameter[5] = 0xf9; //MCS5 or OFDM36
\r
972 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], set WiFi Low-Penalty Retry: %s",
\r
973 (bLowPenaltyRa? "ON!!":"OFF!!")) );
\r
975 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x69, 6, H2C_Parameter);
\r
979 halbtc8723b2ant_LowPenaltyRa(
\r
980 IN PBTC_COEXIST pBtCoexist,
\r
981 IN BOOLEAN bForceExec,
\r
982 IN BOOLEAN bLowPenaltyRa
\r
986 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn LowPenaltyRA = %s\n",
\r
987 (bForceExec? "force to":""), ((bLowPenaltyRa)? "ON":"OFF")));
\r
988 pCoexDm->bCurLowPenaltyRa = bLowPenaltyRa;
\r
992 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreLowPenaltyRa=%d, bCurLowPenaltyRa=%d\n",
\r
993 pCoexDm->bPreLowPenaltyRa, pCoexDm->bCurLowPenaltyRa));
\r
995 if(pCoexDm->bPreLowPenaltyRa == pCoexDm->bCurLowPenaltyRa)
\r
998 halbtc8723b2ant_SetSwPenaltyTxRateAdaptive(pBtCoexist, pCoexDm->bCurLowPenaltyRa);
\r
1000 pCoexDm->bPreLowPenaltyRa = pCoexDm->bCurLowPenaltyRa;
\r
1004 halbtc8723b2ant_SetDacSwingReg(
\r
1005 IN PBTC_COEXIST pBtCoexist,
\r
1009 u1Byte val=(u1Byte)level;
\r
1011 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Write SwDacSwing = 0x%x\n", level));
\r
1012 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x883, 0x3e, val);
\r
1016 halbtc8723b2ant_SetSwFullTimeDacSwing(
\r
1017 IN PBTC_COEXIST pBtCoexist,
\r
1018 IN BOOLEAN bSwDacSwingOn,
\r
1019 IN u4Byte swDacSwingLvl
\r
1024 halbtc8723b2ant_SetDacSwingReg(pBtCoexist, swDacSwingLvl);
\r
1028 halbtc8723b2ant_SetDacSwingReg(pBtCoexist, 0x18);
\r
1034 halbtc8723b2ant_DacSwing(
\r
1035 IN PBTC_COEXIST pBtCoexist,
\r
1036 IN BOOLEAN bForceExec,
\r
1037 IN BOOLEAN bDacSwingOn,
\r
1038 IN u4Byte dacSwingLvl
\r
1041 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn DacSwing=%s, dacSwingLvl=0x%x\n",
\r
1042 (bForceExec? "force to":""), ((bDacSwingOn)? "ON":"OFF"), dacSwingLvl));
\r
1043 pCoexDm->bCurDacSwingOn = bDacSwingOn;
\r
1044 pCoexDm->curDacSwingLvl = dacSwingLvl;
\r
1048 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl=0x%x, bCurDacSwingOn=%d, curDacSwingLvl=0x%x\n",
\r
1049 pCoexDm->bPreDacSwingOn, pCoexDm->preDacSwingLvl,
\r
1050 pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl));
\r
1052 if( (pCoexDm->bPreDacSwingOn == pCoexDm->bCurDacSwingOn) &&
\r
1053 (pCoexDm->preDacSwingLvl == pCoexDm->curDacSwingLvl) )
\r
1057 halbtc8723b2ant_SetSwFullTimeDacSwing(pBtCoexist, bDacSwingOn, dacSwingLvl);
\r
1059 pCoexDm->bPreDacSwingOn = pCoexDm->bCurDacSwingOn;
\r
1060 pCoexDm->preDacSwingLvl = pCoexDm->curDacSwingLvl;
\r
1064 halbtc8723b2ant_SetAdcBackOff(
\r
1065 IN PBTC_COEXIST pBtCoexist,
\r
1066 IN BOOLEAN bAdcBackOff
\r
1071 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB BackOff Level On!\n"));
\r
1072 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x3);
\r
1076 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB BackOff Level Off!\n"));
\r
1077 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0xc05, 0x30, 0x1);
\r
1082 halbtc8723b2ant_AdcBackOff(
\r
1083 IN PBTC_COEXIST pBtCoexist,
\r
1084 IN BOOLEAN bForceExec,
\r
1085 IN BOOLEAN bAdcBackOff
\r
1088 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s turn AdcBackOff = %s\n",
\r
1089 (bForceExec? "force to":""), ((bAdcBackOff)? "ON":"OFF")));
\r
1090 pCoexDm->bCurAdcBackOff = bAdcBackOff;
\r
1094 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreAdcBackOff=%d, bCurAdcBackOff=%d\n",
\r
1095 pCoexDm->bPreAdcBackOff, pCoexDm->bCurAdcBackOff));
\r
1097 if(pCoexDm->bPreAdcBackOff == pCoexDm->bCurAdcBackOff)
\r
1100 halbtc8723b2ant_SetAdcBackOff(pBtCoexist, pCoexDm->bCurAdcBackOff);
\r
1102 pCoexDm->bPreAdcBackOff = pCoexDm->bCurAdcBackOff;
\r
1106 halbtc8723b2ant_SetAgcTable(
\r
1107 IN PBTC_COEXIST pBtCoexist,
\r
1108 IN BOOLEAN bAgcTableEn
\r
1111 u1Byte rssiAdjustVal=0;
\r
1113 //=================BB AGC Gain Table
\r
1116 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB Agc Table On!\n"));
\r
1117 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6e1A0001);
\r
1118 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6d1B0001);
\r
1119 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6c1C0001);
\r
1120 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6b1D0001);
\r
1121 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x6a1E0001);
\r
1122 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x691F0001);
\r
1123 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0x68200001);
\r
1127 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], BB Agc Table Off!\n"));
\r
1128 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xaa1A0001);
\r
1129 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa91B0001);
\r
1130 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa81C0001);
\r
1131 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa71D0001);
\r
1132 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa61E0001);
\r
1133 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa51F0001);
\r
1134 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0xc78, 0xa4200001);
\r
1138 //=================RF Gain
\r
1139 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
\r
1142 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table On!\n"));
\r
1143 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38fff);
\r
1144 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x38ffe);
\r
1148 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table Off!\n"));
\r
1149 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x380c3);
\r
1150 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x3b, 0xfffff, 0x28ce6);
\r
1152 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
\r
1154 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x1);
\r
1157 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table On!\n"));
\r
1158 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38fff);
\r
1159 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x38ffe);
\r
1163 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], Agc Table Off!\n"));
\r
1164 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x380c3);
\r
1165 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x40, 0xfffff, 0x28ce6);
\r
1167 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0xed, 0xfffff, 0x0);
\r
1169 // set rssiAdjustVal for wifi module.
\r
1172 rssiAdjustVal = 8;
\r
1174 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON, &rssiAdjustVal);
\r
1178 halbtc8723b2ant_AgcTable(
\r
1179 IN PBTC_COEXIST pBtCoexist,
\r
1180 IN BOOLEAN bForceExec,
\r
1181 IN BOOLEAN bAgcTableEn
\r
1184 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s %s Agc Table\n",
\r
1185 (bForceExec? "force to":""), ((bAgcTableEn)? "Enable":"Disable")));
\r
1186 pCoexDm->bCurAgcTableEn = bAgcTableEn;
\r
1190 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n",
\r
1191 pCoexDm->bPreAgcTableEn, pCoexDm->bCurAgcTableEn));
\r
1193 if(pCoexDm->bPreAgcTableEn == pCoexDm->bCurAgcTableEn)
\r
1196 halbtc8723b2ant_SetAgcTable(pBtCoexist, bAgcTableEn);
\r
1198 pCoexDm->bPreAgcTableEn = pCoexDm->bCurAgcTableEn;
\r
1202 halbtc8723b2ant_SetCoexTable(
\r
1203 IN PBTC_COEXIST pBtCoexist,
\r
1204 IN u4Byte val0x6c0,
\r
1205 IN u4Byte val0x6c4,
\r
1206 IN u4Byte val0x6c8,
\r
1207 IN u1Byte val0x6cc
\r
1210 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c0=0x%x\n", val0x6c0));
\r
1211 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, val0x6c0);
\r
1213 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c4=0x%x\n", val0x6c4));
\r
1214 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, val0x6c4);
\r
1216 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6c8=0x%x\n", val0x6c8));
\r
1217 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, val0x6c8);
\r
1219 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC, ("[BTCoex], set coex table, set 0x6cc=0x%x\n", val0x6cc));
\r
1220 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, val0x6cc);
\r
1224 halbtc8723b2ant_CoexTable(
\r
1225 IN PBTC_COEXIST pBtCoexist,
\r
1226 IN BOOLEAN bForceExec,
\r
1227 IN u4Byte val0x6c0,
\r
1228 IN u4Byte val0x6c4,
\r
1229 IN u4Byte val0x6c8,
\r
1230 IN u1Byte val0x6cc
\r
1233 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW, ("[BTCoex], %s write Coex Table 0x6c0=0x%x, 0x6c4=0x%x, 0x6c8=0x%x, 0x6cc=0x%x\n",
\r
1234 (bForceExec? "force to":""), val0x6c0, val0x6c4, val0x6c8, val0x6cc));
\r
1235 pCoexDm->curVal0x6c0 = val0x6c0;
\r
1236 pCoexDm->curVal0x6c4 = val0x6c4;
\r
1237 pCoexDm->curVal0x6c8 = val0x6c8;
\r
1238 pCoexDm->curVal0x6cc = val0x6cc;
\r
1242 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], preVal0x6c0=0x%x, preVal0x6c4=0x%x, preVal0x6c8=0x%x, preVal0x6cc=0x%x !!\n",
\r
1243 pCoexDm->preVal0x6c0, pCoexDm->preVal0x6c4, pCoexDm->preVal0x6c8, pCoexDm->preVal0x6cc));
\r
1244 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL, ("[BTCoex], curVal0x6c0=0x%x, curVal0x6c4=0x%x, curVal0x6c8=0x%x, curVal0x6cc=0x%x !!\n",
\r
1245 pCoexDm->curVal0x6c0, pCoexDm->curVal0x6c4, pCoexDm->curVal0x6c8, pCoexDm->curVal0x6cc));
\r
1247 if( (pCoexDm->preVal0x6c0 == pCoexDm->curVal0x6c0) &&
\r
1248 (pCoexDm->preVal0x6c4 == pCoexDm->curVal0x6c4) &&
\r
1249 (pCoexDm->preVal0x6c8 == pCoexDm->curVal0x6c8) &&
\r
1250 (pCoexDm->preVal0x6cc == pCoexDm->curVal0x6cc) )
\r
1253 halbtc8723b2ant_SetCoexTable(pBtCoexist, val0x6c0, val0x6c4, val0x6c8, val0x6cc);
\r
1255 pCoexDm->preVal0x6c0 = pCoexDm->curVal0x6c0;
\r
1256 pCoexDm->preVal0x6c4 = pCoexDm->curVal0x6c4;
\r
1257 pCoexDm->preVal0x6c8 = pCoexDm->curVal0x6c8;
\r
1258 pCoexDm->preVal0x6cc = pCoexDm->curVal0x6cc;
\r
1262 halbtc8723b2ant_CoexTableWithType(
\r
1263 IN PBTC_COEXIST pBtCoexist,
\r
1264 IN BOOLEAN bForceExec,
\r
1268 pCoexSta->nCoexTableType = type;
\r
1273 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x55555555, 0xffffff, 0x3);
\r
1276 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55555555, 0x5afa5afa, 0xffffff, 0x3);
\r
1279 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3);
\r
1282 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3);
\r
1285 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0xffffffff, 0xffffffff, 0xffffff, 0x3);
\r
1288 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3);
\r
1291 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3);
\r
1294 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
\r
1297 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
\r
1300 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
\r
1303 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
\r
1306 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
\r
1309 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
\r
1312 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3);
\r
1315 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3);
\r
1318 halbtc8723b2ant_CoexTable(pBtCoexist, bForceExec, 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3);
\r
1326 halbtc8723b2ant_SetFwIgnoreWlanAct(
\r
1327 IN PBTC_COEXIST pBtCoexist,
\r
1328 IN BOOLEAN bEnable
\r
1331 u1Byte H2C_Parameter[1] ={0};
\r
1335 H2C_Parameter[0] |= BIT0; // function enable
\r
1338 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n",
\r
1339 H2C_Parameter[0]));
\r
1341 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x63, 1, H2C_Parameter);
\r
1345 halbtc8723b2ant_SetLpsRpwm(
\r
1346 IN PBTC_COEXIST pBtCoexist,
\r
1351 u1Byte lps=lpsVal;
\r
1352 u1Byte rpwm=rpwmVal;
\r
1354 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_LPS_VAL, &lps);
\r
1355 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
\r
1359 halbtc8723b2ant_LpsRpwm(
\r
1360 IN PBTC_COEXIST pBtCoexist,
\r
1361 IN BOOLEAN bForceExec,
\r
1366 BOOLEAN bForceExecPwrCmd=FALSE;
\r
1368 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s set lps/rpwm=0x%x/0x%x \n",
\r
1369 (bForceExec? "force to":""), lpsVal, rpwmVal));
\r
1370 pCoexDm->curLps = lpsVal;
\r
1371 pCoexDm->curRpwm = rpwmVal;
\r
1375 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], LPS-RxBeaconMode=0x%x , LPS-RPWM=0x%x!!\n",
\r
1376 pCoexDm->curLps, pCoexDm->curRpwm));
\r
1378 if( (pCoexDm->preLps == pCoexDm->curLps) &&
\r
1379 (pCoexDm->preRpwm == pCoexDm->curRpwm) )
\r
1381 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], LPS-RPWM_Last=0x%x , LPS-RPWM_Now=0x%x!!\n",
\r
1382 pCoexDm->preRpwm, pCoexDm->curRpwm));
\r
1387 halbtc8723b2ant_SetLpsRpwm(pBtCoexist, lpsVal, rpwmVal);
\r
1389 pCoexDm->preLps = pCoexDm->curLps;
\r
1390 pCoexDm->preRpwm = pCoexDm->curRpwm;
\r
1394 halbtc8723b2ant_IgnoreWlanAct(
\r
1395 IN PBTC_COEXIST pBtCoexist,
\r
1396 IN BOOLEAN bForceExec,
\r
1397 IN BOOLEAN bEnable
\r
1400 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s turn Ignore WlanAct %s\n",
\r
1401 (bForceExec? "force to":""), (bEnable? "ON":"OFF")));
\r
1402 pCoexDm->bCurIgnoreWlanAct = bEnable;
\r
1406 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPreIgnoreWlanAct = %d, bCurIgnoreWlanAct = %d!!\n",
\r
1407 pCoexDm->bPreIgnoreWlanAct, pCoexDm->bCurIgnoreWlanAct));
\r
1409 if(pCoexDm->bPreIgnoreWlanAct == pCoexDm->bCurIgnoreWlanAct)
\r
1412 halbtc8723b2ant_SetFwIgnoreWlanAct(pBtCoexist, bEnable);
\r
1414 pCoexDm->bPreIgnoreWlanAct = pCoexDm->bCurIgnoreWlanAct;
\r
1418 halbtc8723b2ant_SetFwPstdma(
\r
1419 IN PBTC_COEXIST pBtCoexist,
\r
1427 u1Byte H2C_Parameter[5] ={0};
\r
1430 if ( (pCoexSta->bA2dpExist) && (pCoexSta->bHidExist) )
\r
1432 byte5 = byte5 | 0x1;
\r
1435 H2C_Parameter[0] = byte1;
\r
1436 H2C_Parameter[1] = byte2;
\r
1437 H2C_Parameter[2] = byte3;
\r
1438 H2C_Parameter[3] = byte4;
\r
1439 H2C_Parameter[4] = byte5;
\r
1441 pCoexDm->psTdmaPara[0] = byte1;
\r
1442 pCoexDm->psTdmaPara[1] = byte2;
\r
1443 pCoexDm->psTdmaPara[2] = byte3;
\r
1444 pCoexDm->psTdmaPara[3] = byte4;
\r
1445 pCoexDm->psTdmaPara[4] = byte5;
\r
1447 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x60(5bytes)=0x%x%08x\n",
\r
1448 H2C_Parameter[0],
\r
1449 H2C_Parameter[1]<<24|H2C_Parameter[2]<<16|H2C_Parameter[3]<<8|H2C_Parameter[4]));
\r
1451 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x60, 5, H2C_Parameter);
\r
1455 halbtc8723b2ant_SwMechanism1(
\r
1456 IN PBTC_COEXIST pBtCoexist,
\r
1457 IN BOOLEAN bShrinkRxLPF,
\r
1458 IN BOOLEAN bLowPenaltyRA,
\r
1459 IN BOOLEAN bLimitedDIG,
\r
1460 IN BOOLEAN bBTLNAConstrain
\r
1466 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
1468 if(BTC_WIFI_BW_HT40 != wifiBw) //only shrink RF Rx LPF for HT40
\r
1471 bShrinkRxLPF = FALSE;
\r
1475 //halbtc8723b2ant_RfShrink(pBtCoexist, NORMAL_EXEC, bShrinkRxLPF);
\r
1476 halbtc8723b2ant_LowPenaltyRa(pBtCoexist, NORMAL_EXEC, bLowPenaltyRA);
\r
1480 halbtc8723b2ant_SwMechanism2(
\r
1481 IN PBTC_COEXIST pBtCoexist,
\r
1482 IN BOOLEAN bAGCTableShift,
\r
1483 IN BOOLEAN bADCBackOff,
\r
1484 IN BOOLEAN bSWDACSwing,
\r
1485 IN u4Byte dacSwingLvl
\r
1488 //halbtc8723b2ant_AgcTable(pBtCoexist, NORMAL_EXEC, bAGCTableShift);
\r
1489 //halbtc8723b2ant_AdcBackOff(pBtCoexist, NORMAL_EXEC, bADCBackOff);
\r
1490 //halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, bSWDACSwing, dacSwingLvl);
\r
1494 halbtc8723b2ant_SetAntPath(
\r
1495 IN PBTC_COEXIST pBtCoexist,
\r
1496 IN u1Byte antPosType,
\r
1497 IN BOOLEAN bInitHwCfg,
\r
1498 IN BOOLEAN bWifiOff
\r
1501 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
\r
1502 u4Byte fwVer=0, u4Tmp=0;
\r
1503 BOOLEAN bPgExtSwitch=FALSE;
\r
1504 BOOLEAN bUseExtSwitch=FALSE;
\r
1505 u1Byte H2C_Parameter[2] ={0};
\r
1507 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_EXT_SWITCH, &bPgExtSwitch);
\r
1508 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer); // [31:16]=fw ver, [15:0]=fw sub ver
\r
1510 if((fwVer>0 && fwVer<0xc0000) || bPgExtSwitch)
\r
1511 bUseExtSwitch = TRUE;
\r
1515 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x39, 0x8, 0x1);
\r
1516 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x974, 0xff);
\r
1517 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x944, 0x3, 0x3);
\r
1518 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x930, 0x77);
\r
1519 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1);
\r
1521 if(fwVer >= 0x180000)
\r
1523 /* Use H2C to set GNT_BT to High to avoid A2DP click */
\r
1524 H2C_Parameter[0] = 1;
\r
1525 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
\r
1529 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
\r
1532 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
\r
1534 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); //WiFi TRx Mask off
\r
1535 //remove due to interrupt is disabled that polling c2h will fail and delay 100ms.
\r
1536 //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01); //BT TRx Mask off
\r
1538 if(pBoardInfo->btdmAntPos == BTC_ANTENNA_AT_MAIN_PORT)
\r
1540 //tell firmware "no antenna inverse"
\r
1541 H2C_Parameter[0] = 0;
\r
1545 //tell firmware "antenna inverse"
\r
1546 H2C_Parameter[0] = 1;
\r
1549 if (bUseExtSwitch)
\r
1552 H2C_Parameter[1] = 1;
\r
1557 H2C_Parameter[1] = 0;
\r
1559 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x65, 2, H2C_Parameter);
\r
1563 if(fwVer >= 0x180000)
\r
1565 /* Use H2C to set GNT_BT to "Control by PTA"*/
\r
1566 H2C_Parameter[0] = 0;
\r
1567 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
\r
1571 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x0);
\r
1575 // ext switch setting
\r
1580 // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT
\r
1581 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
\r
1584 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
\r
1587 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT
\r
1588 switch(antPosType)
\r
1590 case BTC_ANT_WIFI_AT_MAIN:
\r
1591 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x1); // ext switch main at wifi
\r
1593 case BTC_ANT_WIFI_AT_AUX:
\r
1594 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x92c, 0x3, 0x2); // ext switch aux at wifi
\r
1598 else // internal switch
\r
1602 // 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT
\r
1603 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
\r
1606 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x4c, u4Tmp);
\r
1609 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x64, 0x1, 0x0); //fixed external switch S1->Main, S0->Aux
\r
1610 switch(antPosType)
\r
1612 case BTC_ANT_WIFI_AT_MAIN:
\r
1613 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0); // fixed internal switch S1->WiFi, S0->BT
\r
1615 case BTC_ANT_WIFI_AT_AUX:
\r
1616 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x280); // fixed internal switch S0->WiFi, S1->BT
\r
1623 halbtc8723b2ant_PsTdma(
\r
1624 IN PBTC_COEXIST pBtCoexist,
\r
1625 IN BOOLEAN bForceExec,
\r
1626 IN BOOLEAN bTurnOn,
\r
1630 BOOLEAN bTurnOnByCnt=FALSE;
\r
1631 u1Byte psTdmaTypeByCnt=0;
\r
1632 u1Byte wifiRssiState1, btRssiState;
\r
1635 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
\r
1636 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
\r
1638 if (!(BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState)) && bTurnOn)
\r
1640 type = type +100; //for WiFi RSSI low or BT RSSI low
\r
1643 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], %s turn %s PS TDMA, type=%d\n",
\r
1644 (bForceExec? "force to":""), (bTurnOn? "ON":"OFF"), type));
\r
1645 pCoexDm->bCurPsTdmaOn = bTurnOn;
\r
1646 pCoexDm->curPsTdma = type;
\r
1650 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
\r
1651 pCoexDm->bPrePsTdmaOn, pCoexDm->bCurPsTdmaOn));
\r
1652 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
\r
1653 pCoexDm->prePsTdma, pCoexDm->curPsTdma));
\r
1655 if( (pCoexDm->bPrePsTdmaOn == pCoexDm->bCurPsTdmaOn) &&
\r
1656 (pCoexDm->prePsTdma == pCoexDm->curPsTdma) )
\r
1665 //halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
\r
1666 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90);
\r
1669 //halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90);
\r
1670 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90);
\r
1673 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90);
\r
1676 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x03, 0xf1, 0x90);
\r
1679 //halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90);
\r
1680 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90);
\r
1683 //halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90);
\r
1684 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90);
\r
1687 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90);
\r
1690 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x10, 0x3, 0x70, 0x90);
\r
1693 //halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
\r
1694 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90);
\r
1697 //halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0xe1, 0x90);
\r
1698 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x03, 0xf1, 0x90);
\r
1701 //halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0xe1, 0x90);
\r
1702 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0xf1, 0x90);
\r
1705 //halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
\r
1706 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0xf1, 0x90);
\r
1709 //halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0x60, 0x90);
\r
1710 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x3, 0x70, 0x90);
\r
1713 //halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x12, 0x12, 0x60, 0x90);
\r
1714 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x2d, 0x3, 0x70, 0x90);
\r
1717 //halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0xa, 0xa, 0x60, 0x90);
\r
1718 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1c, 0x3, 0x70, 0x90);
\r
1721 //halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0x60, 0x90);
\r
1722 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x10, 0x3, 0x70, 0x90);
\r
1725 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xa3, 0x2f, 0x2f, 0x60, 0x90);
\r
1728 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
\r
1731 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90);
\r
1734 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x25, 0x25, 0x60, 0x90);
\r
1737 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90);
\r
1740 //halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
\r
1742 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90);
\r
1747 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x3a, 0x03, 0x70, 0x50);
\r
1753 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x2d, 0x03, 0x70, 0x50);
\r
1759 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x1c, 0x03, 0x70, 0x50);
\r
1765 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xd3, 0x10, 0x03, 0x70, 0x50);
\r
1768 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0xf1, 0x90);
\r
1771 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x3c, 0x03, 0x70, 0x90);
\r
1774 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x15, 0x03, 0x70, 0x90);
\r
1778 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0xe3, 0x35, 0x03, 0x71, 0x11);
\r
1784 // disable PS tdma
\r
1788 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
\r
1791 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x48, 0x0);
\r
1794 halbtc8723b2ant_SetFwPstdma(pBtCoexist, 0x0, 0x0, 0x0, 0x40, 0x0);
\r
1799 // update pre state
\r
1800 pCoexDm->bPrePsTdmaOn = pCoexDm->bCurPsTdmaOn;
\r
1801 pCoexDm->prePsTdma = pCoexDm->curPsTdma;
\r
1805 halbtc8723b2ant_PsTdmaCheckForPowerSaveState(
\r
1806 IN PBTC_COEXIST pBtCoexist,
\r
1807 IN BOOLEAN bNewPsState
\r
1810 u1Byte lpsMode=0x0;
\r
1812 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_LPS_MODE, &lpsMode);
\r
1814 if(lpsMode) // already under LPS state
\r
1818 // keep state under LPS, do nothing.
\r
1822 // will leave LPS state, turn off psTdma first
\r
1823 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
1826 else // NO PS state
\r
1830 // will enter LPS state, turn off psTdma first
\r
1831 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
1835 // keep state under NO PS state, do nothing.
\r
1841 halbtc8723b2ant_PowerSaveState(
\r
1842 IN PBTC_COEXIST pBtCoexist,
\r
1848 BOOLEAN bLowPwrDisable=FALSE;
\r
1852 case BTC_PS_WIFI_NATIVE:
\r
1853 // recover to original 32k low power setting
\r
1854 bLowPwrDisable = FALSE;
\r
1855 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
\r
1856 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_NORMAL_LPS, NULL);
\r
1857 pCoexSta->bForceLpsOn = FALSE;
\r
1859 case BTC_PS_LPS_ON:
\r
1860 halbtc8723b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, TRUE);
\r
1861 halbtc8723b2ant_LpsRpwm(pBtCoexist, NORMAL_EXEC, lpsVal, rpwmVal);
\r
1862 // when coex force to enter LPS, do not enter 32k low power.
\r
1863 bLowPwrDisable = TRUE;
\r
1864 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
\r
1865 // power save must executed before psTdma.
\r
1866 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_ENTER_LPS, NULL);
\r
1867 pCoexSta->bForceLpsOn = TRUE;
\r
1869 case BTC_PS_LPS_OFF:
\r
1870 halbtc8723b2ant_PsTdmaCheckForPowerSaveState(pBtCoexist, FALSE);
\r
1871 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_LEAVE_LPS, NULL);
\r
1872 pCoexSta->bForceLpsOn = FALSE;
\r
1881 halbtc8723b2ant_CoexAllOff(
\r
1882 IN PBTC_COEXIST pBtCoexist
\r
1886 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
1887 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
1888 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
1889 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
1892 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
1893 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
1896 //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
1897 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
\r
1901 halbtc8723b2ant_InitCoexDm(
\r
1902 IN PBTC_COEXIST pBtCoexist
\r
1905 // force to reset coex mechanism
\r
1906 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
\r
1908 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
1909 halbtc8723b2ant_PsTdma(pBtCoexist, FORCE_EXEC, FALSE, 1);
\r
1910 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
\r
1911 halbtc8723b2ant_DecBtPwr(pBtCoexist, FORCE_EXEC, 0);
\r
1913 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
1914 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
1918 halbtc8723b2ant_ActionBtInquiry(
\r
1919 IN PBTC_COEXIST pBtCoexist
\r
1922 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
\r
1923 BOOLEAN bWifiConnected=FALSE;
\r
1924 BOOLEAN bLowPwrDisable=TRUE;
\r
1925 BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE;
\r
1928 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
1929 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
\r
1930 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
\r
1932 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
\r
1933 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
\r
1935 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
\r
1936 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
\r
1937 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
\r
1940 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
1942 if(bScan || bLink || bRoam)
\r
1944 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi link process + BT Inq/Page!!\n"));
\r
1945 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15);
\r
1946 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22);
\r
1948 else if(bWifiConnected)
\r
1950 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi connected + BT Inq/Page!!\n"));
\r
1951 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15);
\r
1952 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22);
\r
1956 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi no-link + BT Inq/Page!!\n"));
\r
1957 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
\r
1958 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
1961 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, FORCE_EXEC, 6);
\r
1962 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
1964 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
1965 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
1967 pCoexDm->bNeedRecover0x948 = TRUE;
\r
1968 pCoexDm->backup0x948 = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
\r
1970 halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_AUX, FALSE, FALSE);
\r
1976 halbtc8723b2ant_ActionWiFiLinkProcess(
\r
1977 IN PBTC_COEXIST pBtCoexist
\r
1981 u1Byte u1Tmpa, u1Tmpb;
\r
1983 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 15);
\r
1984 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 22);
\r
1986 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
1987 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
1990 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
\r
1991 u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765);
\r
1992 u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e);
\r
1994 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
\r
1995 u4Tmp, u1Tmpa, u1Tmpb));
\r
1999 halbtc8723b2ant_ActionWifiIdleProcess(
\r
2000 IN PBTC_COEXIST pBtCoexist
\r
2003 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
\r
2007 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
2008 //wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
\r
2009 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES-20, 0);
\r
2010 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
\r
2012 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
\r
2014 // define the office environment
\r
2015 if(BTC_RSSI_HIGH(wifiRssiState1) &&
\r
2016 (pCoexSta->bHidExist == TRUE) && (pCoexSta->bA2dpExist == TRUE))
\r
2019 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n"));
\r
2021 halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x6);
\r
2022 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
2025 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
2026 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
2028 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
\r
2030 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
2031 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
2037 halbtc8723b2ant_DacSwing(pBtCoexist, NORMAL_EXEC, TRUE, 0x18);
\r
2047 halbtc8723b2ant_IsCommonAction(
\r
2048 IN PBTC_COEXIST pBtCoexist
\r
2051 u1Byte btRssiState=BTC_RSSI_STATE_HIGH;
\r
2052 BOOLEAN bCommon=FALSE, bWifiConnected=FALSE, bWifiBusy=FALSE;
\r
2053 BOOLEAN bBtHsOn=FALSE, bLowPwrDisable=FALSE;
\r
2054 BOOLEAN bAsus8723b=FALSE;
\r
2056 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
\r
2057 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
\r
2058 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_BUSY, &bWifiBusy);
\r
2060 if(!bWifiConnected)
\r
2062 bLowPwrDisable = FALSE;
\r
2063 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
\r
2064 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
2066 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi non-connected idle!!\n"));
\r
2068 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
2069 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
\r
2071 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
2072 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
2073 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
2074 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
2076 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
2077 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
2083 if(BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)
\r
2085 bLowPwrDisable = FALSE;
\r
2086 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
\r
2087 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
2089 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi connected + BT non connected-idle!!\n"));
\r
2091 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
2092 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
\r
2094 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
2095 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
2096 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
\r
2097 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
2099 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
2100 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
2104 else if(BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)
\r
2106 bLowPwrDisable = TRUE;
\r
2107 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
\r
2111 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi connected + BT connected-idle!!\n"));
\r
2112 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
2114 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
2115 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
\r
2117 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
2118 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
2119 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 0xb);
\r
2120 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
2122 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
2123 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
2129 bLowPwrDisable = TRUE;
\r
2130 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &bLowPwrDisable);
\r
2134 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi Connected-Busy + BT Busy!!\n"));
\r
2135 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_IS_ASUS_8723B, &bAsus8723b);
\r
2139 bCommon = halbtc8723b2ant_ActionWifiIdleProcess(pBtCoexist);
\r
2143 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Wifi Connected-Idle + BT Busy!!\n"));
\r
2144 //bCommon = FALSE;
\r
2145 bCommon = halbtc8723b2ant_ActionWifiIdleProcess(pBtCoexist);
\r
2153 halbtc8723b2ant_TdmaDurationAdjust(
\r
2154 IN PBTC_COEXIST pBtCoexist,
\r
2155 IN BOOLEAN bScoHid,
\r
2156 IN BOOLEAN bTxPause,
\r
2157 IN u1Byte maxInterval
\r
2160 static s4Byte up,dn,m,n,WaitCount;
\r
2161 s4Byte result; //0: no change, +1: increase WiFi duration, -1: decrease WiFi duration
\r
2162 u1Byte retryCount=0;
\r
2164 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW, ("[BTCoex], TdmaDurationAdjust()\n"));
\r
2166 if(!pCoexDm->bAutoTdmaAdjust)
\r
2168 pCoexDm->bAutoTdmaAdjust = TRUE;
\r
2169 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], first run TdmaDurationAdjust()!!\n"));
\r
2175 if(maxInterval == 1)
\r
2177 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
\r
2178 pCoexDm->psTdmaDuAdjType = 13;
\r
2180 else if(maxInterval == 2)
\r
2182 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2183 pCoexDm->psTdmaDuAdjType = 14;
\r
2185 else if(maxInterval == 3)
\r
2187 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2188 pCoexDm->psTdmaDuAdjType = 15;
\r
2192 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2193 pCoexDm->psTdmaDuAdjType = 15;
\r
2198 if(maxInterval == 1)
\r
2200 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
\r
2201 pCoexDm->psTdmaDuAdjType = 9;
\r
2203 else if(maxInterval == 2)
\r
2205 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2206 pCoexDm->psTdmaDuAdjType = 10;
\r
2208 else if(maxInterval == 3)
\r
2210 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2211 pCoexDm->psTdmaDuAdjType = 11;
\r
2215 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2216 pCoexDm->psTdmaDuAdjType = 11;
\r
2224 if(maxInterval == 1)
\r
2226 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
\r
2227 pCoexDm->psTdmaDuAdjType = 5;
\r
2229 else if(maxInterval == 2)
\r
2231 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2232 pCoexDm->psTdmaDuAdjType = 6;
\r
2234 else if(maxInterval == 3)
\r
2236 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2237 pCoexDm->psTdmaDuAdjType = 7;
\r
2241 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2242 pCoexDm->psTdmaDuAdjType = 7;
\r
2247 if(maxInterval == 1)
\r
2249 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
\r
2250 pCoexDm->psTdmaDuAdjType = 1;
\r
2252 else if(maxInterval == 2)
\r
2254 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2255 pCoexDm->psTdmaDuAdjType = 2;
\r
2257 else if(maxInterval == 3)
\r
2259 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2260 pCoexDm->psTdmaDuAdjType = 3;
\r
2264 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2265 pCoexDm->psTdmaDuAdjType = 3;
\r
2280 //accquire the BT TRx retry count from BT_Info byte2
\r
2281 retryCount = pCoexSta->btRetryCnt;
\r
2282 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], retryCount = %d\n", retryCount));
\r
2283 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], up=%d, dn=%d, m=%d, n=%d, WaitCount=%d\n",
\r
2284 up, dn, m, n, WaitCount));
\r
2288 if(retryCount == 0) // no retry in the last 2-second duration
\r
2296 if(up >= n) // if ³sÄò n Ó2¬í retry count¬°0, «h½Õ¼eWiFi duration
\r
2303 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Increase wifi duration!!\n"));
\r
2306 else if (retryCount <= 3) // <=3 retry in the last 2-second duration
\r
2314 if (dn == 2) // if ³sÄò 2 Ó2¬í retry count< 3, «h½Õ¯¶WiFi duration
\r
2316 if (WaitCount <= 2)
\r
2317 m++; // ÁקK¤@ª½¦b¨âÓlevel¤¤¨Ó¦^
\r
2321 if ( m >= 20) //m ³Ì¤jÈ = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration.
\r
2329 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Decrease wifi duration for retryCounter<3!!\n"));
\r
2332 else //retry count > 3, ¥un1¦¸ retry count > 3, «h½Õ¯¶WiFi duration
\r
2334 if (WaitCount == 1)
\r
2335 m++; // ÁקK¤@ª½¦b¨âÓlevel¤¤¨Ó¦^
\r
2339 if ( m >= 20) //m ³Ì¤jÈ = 20 ' ³Ì¤j120¬í recheck¬O§_½Õ¾ã WiFi duration.
\r
2347 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], Decrease wifi duration for retryCounter>3!!\n"));
\r
2350 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], max Interval = %d\n", maxInterval));
\r
2351 if(maxInterval == 1)
\r
2355 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n"));
\r
2357 if(pCoexDm->curPsTdma == 71)
\r
2359 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
\r
2360 pCoexDm->psTdmaDuAdjType = 5;
\r
2362 else if(pCoexDm->curPsTdma == 1)
\r
2364 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
\r
2365 pCoexDm->psTdmaDuAdjType = 5;
\r
2367 else if(pCoexDm->curPsTdma == 2)
\r
2369 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2370 pCoexDm->psTdmaDuAdjType = 6;
\r
2372 else if(pCoexDm->curPsTdma == 3)
\r
2374 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2375 pCoexDm->psTdmaDuAdjType = 7;
\r
2377 else if(pCoexDm->curPsTdma == 4)
\r
2379 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
\r
2380 pCoexDm->psTdmaDuAdjType = 8;
\r
2382 if(pCoexDm->curPsTdma == 9)
\r
2384 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
\r
2385 pCoexDm->psTdmaDuAdjType = 13;
\r
2387 else if(pCoexDm->curPsTdma == 10)
\r
2389 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2390 pCoexDm->psTdmaDuAdjType = 14;
\r
2392 else if(pCoexDm->curPsTdma == 11)
\r
2394 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2395 pCoexDm->psTdmaDuAdjType = 15;
\r
2397 else if(pCoexDm->curPsTdma == 12)
\r
2399 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
\r
2400 pCoexDm->psTdmaDuAdjType = 16;
\r
2405 if(pCoexDm->curPsTdma == 5)
\r
2407 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2408 pCoexDm->psTdmaDuAdjType = 6;
\r
2410 else if(pCoexDm->curPsTdma == 6)
\r
2412 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2413 pCoexDm->psTdmaDuAdjType = 7;
\r
2415 else if(pCoexDm->curPsTdma == 7)
\r
2417 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
\r
2418 pCoexDm->psTdmaDuAdjType = 8;
\r
2420 else if(pCoexDm->curPsTdma == 13)
\r
2422 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2423 pCoexDm->psTdmaDuAdjType = 14;
\r
2425 else if(pCoexDm->curPsTdma == 14)
\r
2427 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2428 pCoexDm->psTdmaDuAdjType = 15;
\r
2430 else if(pCoexDm->curPsTdma == 15)
\r
2432 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
\r
2433 pCoexDm->psTdmaDuAdjType = 16;
\r
2436 else if (result == 1)
\r
2438 if(pCoexDm->curPsTdma == 8)
\r
2440 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2441 pCoexDm->psTdmaDuAdjType = 7;
\r
2443 else if(pCoexDm->curPsTdma == 7)
\r
2445 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2446 pCoexDm->psTdmaDuAdjType = 6;
\r
2448 else if(pCoexDm->curPsTdma == 6)
\r
2450 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
\r
2451 pCoexDm->psTdmaDuAdjType = 5;
\r
2453 else if(pCoexDm->curPsTdma == 16)
\r
2455 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2456 pCoexDm->psTdmaDuAdjType = 15;
\r
2458 else if(pCoexDm->curPsTdma == 15)
\r
2460 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2461 pCoexDm->psTdmaDuAdjType = 14;
\r
2463 else if(pCoexDm->curPsTdma == 14)
\r
2465 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
\r
2466 pCoexDm->psTdmaDuAdjType = 13;
\r
2472 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n"));
\r
2473 if(pCoexDm->curPsTdma == 5)
\r
2475 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71);
\r
2476 pCoexDm->psTdmaDuAdjType = 71;
\r
2478 else if(pCoexDm->curPsTdma == 6)
\r
2480 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2481 pCoexDm->psTdmaDuAdjType = 2;
\r
2483 else if(pCoexDm->curPsTdma == 7)
\r
2485 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2486 pCoexDm->psTdmaDuAdjType = 3;
\r
2488 else if(pCoexDm->curPsTdma == 8)
\r
2490 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
\r
2491 pCoexDm->psTdmaDuAdjType = 4;
\r
2493 if(pCoexDm->curPsTdma == 13)
\r
2495 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
\r
2496 pCoexDm->psTdmaDuAdjType = 9;
\r
2498 else if(pCoexDm->curPsTdma == 14)
\r
2500 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2501 pCoexDm->psTdmaDuAdjType = 10;
\r
2503 else if(pCoexDm->curPsTdma == 15)
\r
2505 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2506 pCoexDm->psTdmaDuAdjType = 11;
\r
2508 else if(pCoexDm->curPsTdma == 16)
\r
2510 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
\r
2511 pCoexDm->psTdmaDuAdjType = 12;
\r
2516 if(pCoexDm->curPsTdma == 71)
\r
2518 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
\r
2519 pCoexDm->psTdmaDuAdjType = 1;
\r
2521 else if(pCoexDm->curPsTdma == 1)
\r
2523 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2524 pCoexDm->psTdmaDuAdjType = 2;
\r
2526 else if(pCoexDm->curPsTdma == 2)
\r
2528 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2529 pCoexDm->psTdmaDuAdjType = 3;
\r
2531 else if(pCoexDm->curPsTdma == 3)
\r
2533 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
\r
2534 pCoexDm->psTdmaDuAdjType = 4;
\r
2536 else if(pCoexDm->curPsTdma == 9)
\r
2538 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2539 pCoexDm->psTdmaDuAdjType = 10;
\r
2541 else if(pCoexDm->curPsTdma == 10)
\r
2543 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2544 pCoexDm->psTdmaDuAdjType = 11;
\r
2546 else if(pCoexDm->curPsTdma == 11)
\r
2548 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
\r
2549 pCoexDm->psTdmaDuAdjType = 12;
\r
2552 else if (result == 1)
\r
2554 if(pCoexDm->curPsTdma == 4)
\r
2556 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2557 pCoexDm->psTdmaDuAdjType = 3;
\r
2559 else if(pCoexDm->curPsTdma == 3)
\r
2561 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2562 pCoexDm->psTdmaDuAdjType = 2;
\r
2564 else if(pCoexDm->curPsTdma == 2)
\r
2566 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
\r
2567 pCoexDm->psTdmaDuAdjType = 1;
\r
2569 else if(pCoexDm->curPsTdma == 1)
\r
2571 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 71);
\r
2572 pCoexDm->psTdmaDuAdjType = 71;
\r
2574 else if(pCoexDm->curPsTdma == 12)
\r
2576 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2577 pCoexDm->psTdmaDuAdjType = 11;
\r
2579 else if(pCoexDm->curPsTdma == 11)
\r
2581 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2582 pCoexDm->psTdmaDuAdjType = 10;
\r
2584 else if(pCoexDm->curPsTdma == 10)
\r
2586 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
\r
2587 pCoexDm->psTdmaDuAdjType = 9;
\r
2592 else if(maxInterval == 2)
\r
2596 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n"));
\r
2597 if(pCoexDm->curPsTdma == 1)
\r
2599 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2600 pCoexDm->psTdmaDuAdjType = 6;
\r
2602 else if(pCoexDm->curPsTdma == 2)
\r
2604 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2605 pCoexDm->psTdmaDuAdjType = 6;
\r
2607 else if(pCoexDm->curPsTdma == 3)
\r
2609 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2610 pCoexDm->psTdmaDuAdjType = 7;
\r
2612 else if(pCoexDm->curPsTdma == 4)
\r
2614 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
\r
2615 pCoexDm->psTdmaDuAdjType = 8;
\r
2617 if(pCoexDm->curPsTdma == 9)
\r
2619 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2620 pCoexDm->psTdmaDuAdjType = 14;
\r
2622 else if(pCoexDm->curPsTdma == 10)
\r
2624 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2625 pCoexDm->psTdmaDuAdjType = 14;
\r
2627 else if(pCoexDm->curPsTdma == 11)
\r
2629 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2630 pCoexDm->psTdmaDuAdjType = 15;
\r
2632 else if(pCoexDm->curPsTdma == 12)
\r
2634 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
\r
2635 pCoexDm->psTdmaDuAdjType = 16;
\r
2639 if(pCoexDm->curPsTdma == 5)
\r
2641 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2642 pCoexDm->psTdmaDuAdjType = 6;
\r
2644 else if(pCoexDm->curPsTdma == 6)
\r
2646 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2647 pCoexDm->psTdmaDuAdjType = 7;
\r
2649 else if(pCoexDm->curPsTdma == 7)
\r
2651 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
\r
2652 pCoexDm->psTdmaDuAdjType = 8;
\r
2654 else if(pCoexDm->curPsTdma == 13)
\r
2656 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2657 pCoexDm->psTdmaDuAdjType = 14;
\r
2659 else if(pCoexDm->curPsTdma == 14)
\r
2661 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2662 pCoexDm->psTdmaDuAdjType = 15;
\r
2664 else if(pCoexDm->curPsTdma == 15)
\r
2666 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
\r
2667 pCoexDm->psTdmaDuAdjType = 16;
\r
2670 else if (result == 1)
\r
2672 if(pCoexDm->curPsTdma == 8)
\r
2674 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2675 pCoexDm->psTdmaDuAdjType = 7;
\r
2677 else if(pCoexDm->curPsTdma == 7)
\r
2679 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2680 pCoexDm->psTdmaDuAdjType = 6;
\r
2682 else if(pCoexDm->curPsTdma == 6)
\r
2684 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 6);
\r
2685 pCoexDm->psTdmaDuAdjType = 6;
\r
2687 else if(pCoexDm->curPsTdma == 16)
\r
2689 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2690 pCoexDm->psTdmaDuAdjType = 15;
\r
2692 else if(pCoexDm->curPsTdma == 15)
\r
2694 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2695 pCoexDm->psTdmaDuAdjType = 14;
\r
2697 else if(pCoexDm->curPsTdma == 14)
\r
2699 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 14);
\r
2700 pCoexDm->psTdmaDuAdjType = 14;
\r
2706 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n"));
\r
2707 if(pCoexDm->curPsTdma == 5)
\r
2709 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2710 pCoexDm->psTdmaDuAdjType = 2;
\r
2712 else if(pCoexDm->curPsTdma == 6)
\r
2714 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2715 pCoexDm->psTdmaDuAdjType = 2;
\r
2717 else if(pCoexDm->curPsTdma == 7)
\r
2719 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2720 pCoexDm->psTdmaDuAdjType = 3;
\r
2722 else if(pCoexDm->curPsTdma == 8)
\r
2724 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
\r
2725 pCoexDm->psTdmaDuAdjType = 4;
\r
2727 if(pCoexDm->curPsTdma == 13)
\r
2729 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2730 pCoexDm->psTdmaDuAdjType = 10;
\r
2732 else if(pCoexDm->curPsTdma == 14)
\r
2734 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2735 pCoexDm->psTdmaDuAdjType = 10;
\r
2737 else if(pCoexDm->curPsTdma == 15)
\r
2739 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2740 pCoexDm->psTdmaDuAdjType = 11;
\r
2742 else if(pCoexDm->curPsTdma == 16)
\r
2744 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
\r
2745 pCoexDm->psTdmaDuAdjType = 12;
\r
2749 if(pCoexDm->curPsTdma == 1)
\r
2751 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2752 pCoexDm->psTdmaDuAdjType = 2;
\r
2754 else if(pCoexDm->curPsTdma == 2)
\r
2756 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2757 pCoexDm->psTdmaDuAdjType = 3;
\r
2759 else if(pCoexDm->curPsTdma == 3)
\r
2761 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
\r
2762 pCoexDm->psTdmaDuAdjType = 4;
\r
2764 else if(pCoexDm->curPsTdma == 9)
\r
2766 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2767 pCoexDm->psTdmaDuAdjType = 10;
\r
2769 else if(pCoexDm->curPsTdma == 10)
\r
2771 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2772 pCoexDm->psTdmaDuAdjType = 11;
\r
2774 else if(pCoexDm->curPsTdma == 11)
\r
2776 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
\r
2777 pCoexDm->psTdmaDuAdjType = 12;
\r
2780 else if (result == 1)
\r
2782 if(pCoexDm->curPsTdma == 4)
\r
2784 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2785 pCoexDm->psTdmaDuAdjType = 3;
\r
2787 else if(pCoexDm->curPsTdma == 3)
\r
2789 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2790 pCoexDm->psTdmaDuAdjType = 2;
\r
2792 else if(pCoexDm->curPsTdma == 2)
\r
2794 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 2);
\r
2795 pCoexDm->psTdmaDuAdjType = 2;
\r
2797 else if(pCoexDm->curPsTdma == 12)
\r
2799 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2800 pCoexDm->psTdmaDuAdjType = 11;
\r
2802 else if(pCoexDm->curPsTdma == 11)
\r
2804 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2805 pCoexDm->psTdmaDuAdjType = 10;
\r
2807 else if(pCoexDm->curPsTdma == 10)
\r
2809 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 10);
\r
2810 pCoexDm->psTdmaDuAdjType = 10;
\r
2815 else if(maxInterval == 3)
\r
2819 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 1\n"));
\r
2820 if(pCoexDm->curPsTdma == 1)
\r
2822 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2823 pCoexDm->psTdmaDuAdjType = 7;
\r
2825 else if(pCoexDm->curPsTdma == 2)
\r
2827 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2828 pCoexDm->psTdmaDuAdjType = 7;
\r
2830 else if(pCoexDm->curPsTdma == 3)
\r
2832 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2833 pCoexDm->psTdmaDuAdjType = 7;
\r
2835 else if(pCoexDm->curPsTdma == 4)
\r
2837 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
\r
2838 pCoexDm->psTdmaDuAdjType = 8;
\r
2840 if(pCoexDm->curPsTdma == 9)
\r
2842 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2843 pCoexDm->psTdmaDuAdjType = 15;
\r
2845 else if(pCoexDm->curPsTdma == 10)
\r
2847 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2848 pCoexDm->psTdmaDuAdjType = 15;
\r
2850 else if(pCoexDm->curPsTdma == 11)
\r
2852 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2853 pCoexDm->psTdmaDuAdjType = 15;
\r
2855 else if(pCoexDm->curPsTdma == 12)
\r
2857 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
\r
2858 pCoexDm->psTdmaDuAdjType = 16;
\r
2862 if(pCoexDm->curPsTdma == 5)
\r
2864 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2865 pCoexDm->psTdmaDuAdjType = 7;
\r
2867 else if(pCoexDm->curPsTdma == 6)
\r
2869 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2870 pCoexDm->psTdmaDuAdjType = 7;
\r
2872 else if(pCoexDm->curPsTdma == 7)
\r
2874 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 8);
\r
2875 pCoexDm->psTdmaDuAdjType = 8;
\r
2877 else if(pCoexDm->curPsTdma == 13)
\r
2879 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2880 pCoexDm->psTdmaDuAdjType = 15;
\r
2882 else if(pCoexDm->curPsTdma == 14)
\r
2884 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2885 pCoexDm->psTdmaDuAdjType = 15;
\r
2887 else if(pCoexDm->curPsTdma == 15)
\r
2889 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 16);
\r
2890 pCoexDm->psTdmaDuAdjType = 16;
\r
2893 else if (result == 1)
\r
2895 if(pCoexDm->curPsTdma == 8)
\r
2897 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2898 pCoexDm->psTdmaDuAdjType = 7;
\r
2900 else if(pCoexDm->curPsTdma == 7)
\r
2902 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2903 pCoexDm->psTdmaDuAdjType = 7;
\r
2905 else if(pCoexDm->curPsTdma == 6)
\r
2907 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 7);
\r
2908 pCoexDm->psTdmaDuAdjType = 7;
\r
2910 else if(pCoexDm->curPsTdma == 16)
\r
2912 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2913 pCoexDm->psTdmaDuAdjType = 15;
\r
2915 else if(pCoexDm->curPsTdma == 15)
\r
2917 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2918 pCoexDm->psTdmaDuAdjType = 15;
\r
2920 else if(pCoexDm->curPsTdma == 14)
\r
2922 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 15);
\r
2923 pCoexDm->psTdmaDuAdjType = 15;
\r
2929 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], TxPause = 0\n"));
\r
2930 if(pCoexDm->curPsTdma == 5)
\r
2932 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2933 pCoexDm->psTdmaDuAdjType = 3;
\r
2935 else if(pCoexDm->curPsTdma == 6)
\r
2937 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2938 pCoexDm->psTdmaDuAdjType = 3;
\r
2940 else if(pCoexDm->curPsTdma == 7)
\r
2942 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2943 pCoexDm->psTdmaDuAdjType = 3;
\r
2945 else if(pCoexDm->curPsTdma == 8)
\r
2947 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
\r
2948 pCoexDm->psTdmaDuAdjType = 4;
\r
2950 if(pCoexDm->curPsTdma == 13)
\r
2952 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2953 pCoexDm->psTdmaDuAdjType = 11;
\r
2955 else if(pCoexDm->curPsTdma == 14)
\r
2957 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2958 pCoexDm->psTdmaDuAdjType = 11;
\r
2960 else if(pCoexDm->curPsTdma == 15)
\r
2962 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2963 pCoexDm->psTdmaDuAdjType = 11;
\r
2965 else if(pCoexDm->curPsTdma == 16)
\r
2967 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
\r
2968 pCoexDm->psTdmaDuAdjType = 12;
\r
2972 if(pCoexDm->curPsTdma == 1)
\r
2974 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2975 pCoexDm->psTdmaDuAdjType = 3;
\r
2977 else if(pCoexDm->curPsTdma == 2)
\r
2979 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
2980 pCoexDm->psTdmaDuAdjType = 3;
\r
2982 else if(pCoexDm->curPsTdma == 3)
\r
2984 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 4);
\r
2985 pCoexDm->psTdmaDuAdjType = 4;
\r
2987 else if(pCoexDm->curPsTdma == 9)
\r
2989 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2990 pCoexDm->psTdmaDuAdjType = 11;
\r
2992 else if(pCoexDm->curPsTdma == 10)
\r
2994 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
2995 pCoexDm->psTdmaDuAdjType = 11;
\r
2997 else if(pCoexDm->curPsTdma == 11)
\r
2999 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 12);
\r
3000 pCoexDm->psTdmaDuAdjType = 12;
\r
3003 else if (result == 1)
\r
3005 if(pCoexDm->curPsTdma == 4)
\r
3007 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
3008 pCoexDm->psTdmaDuAdjType = 3;
\r
3010 else if(pCoexDm->curPsTdma == 3)
\r
3012 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
3013 pCoexDm->psTdmaDuAdjType = 3;
\r
3015 else if(pCoexDm->curPsTdma == 2)
\r
3017 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 3);
\r
3018 pCoexDm->psTdmaDuAdjType = 3;
\r
3020 else if(pCoexDm->curPsTdma == 12)
\r
3022 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
3023 pCoexDm->psTdmaDuAdjType = 11;
\r
3025 else if(pCoexDm->curPsTdma == 11)
\r
3027 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
3028 pCoexDm->psTdmaDuAdjType = 11;
\r
3030 else if(pCoexDm->curPsTdma == 10)
\r
3032 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 11);
\r
3033 pCoexDm->psTdmaDuAdjType = 11;
\r
3040 // if current PsTdma not match with the recorded one (when scan, dhcp...),
\r
3041 // then we have to adjust it back to the previous record one.
\r
3042 if(pCoexDm->curPsTdma != pCoexDm->psTdmaDuAdjType)
\r
3044 BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE;
\r
3045 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], PsTdma type dismatch!!!, curPsTdma=%d, recordPsTdma=%d\n",
\r
3046 pCoexDm->curPsTdma, pCoexDm->psTdmaDuAdjType));
\r
3048 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
\r
3049 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
\r
3050 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
\r
3052 if( !bScan && !bLink && !bRoam)
\r
3054 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, pCoexDm->psTdmaDuAdjType);
\r
3058 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL, ("[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n"));
\r
3063 // SCO only or SCO+PAN(HS)
\r
3065 halbtc8723b2ant_ActionSco(
\r
3066 IN PBTC_COEXIST pBtCoexist
\r
3069 u1Byte wifiRssiState, btRssiState;
\r
3072 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3073 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
\r
3075 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3077 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3079 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 4);
\r
3081 if(BTC_RSSI_HIGH(btRssiState))
\r
3082 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3084 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3086 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3088 if (BTC_WIFI_BW_LEGACY == wifiBw) //for SCO quality at 11b/g mode
\r
3090 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 2);
\r
3092 else //for SCO quality & wifi performance balance at 11n mode
\r
3094 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 8);
\r
3097 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3098 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 0); //for voice quality
\r
3101 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3103 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3104 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3106 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3107 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4);
\r
3111 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3112 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4);
\r
3117 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3118 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3120 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3121 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x4);
\r
3125 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3126 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,TRUE,0x4);
\r
3133 halbtc8723b2ant_ActionHid(
\r
3134 IN PBTC_COEXIST pBtCoexist
\r
3137 u1Byte wifiRssiState, btRssiState;
\r
3140 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3141 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
\r
3143 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3145 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3147 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3149 if(BTC_RSSI_HIGH(btRssiState))
\r
3150 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3152 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3154 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3156 if (BTC_WIFI_BW_LEGACY == wifiBw) //for HID at 11b/g mode
\r
3158 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
\r
3160 else //for HID quality & wifi performance balance at 11n mode
\r
3162 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 9);
\r
3165 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3167 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3168 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3170 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 9);
\r
3174 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 13);
\r
3178 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3180 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3181 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3183 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3184 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3188 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3189 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3194 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3195 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3197 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3198 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3202 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3203 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3208 //A2DP only / PAN(EDR) only/ A2DP+PAN(HS)
\r
3210 halbtc8723b2ant_ActionA2dp(
\r
3211 IN PBTC_COEXIST pBtCoexist
\r
3214 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
\r
3218 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3219 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
\r
3220 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
\r
3222 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
\r
3224 // define the office environment
\r
3225 if( (apNum >= 10) && BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
\r
3227 //DbgPrint(" AP#>10(%d)\n", apNum);
\r
3228 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3230 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3231 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3232 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3233 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3235 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
\r
3237 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3238 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
3241 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3242 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3244 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3245 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18);
\r
3249 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3250 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,TRUE,0x18);
\r
3256 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3257 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3259 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3261 if(BTC_RSSI_HIGH(btRssiState))
\r
3262 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3264 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3267 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
\r
3269 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
\r
3270 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3274 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13);
\r
3275 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
\r
3279 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3280 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3282 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 1);
\r
3286 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 1);
\r
3290 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3291 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3293 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3294 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3296 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3297 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3301 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3302 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3307 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3308 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3310 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3311 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3315 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3316 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3322 halbtc8723b2ant_ActionA2dpPanHs(
\r
3323 IN PBTC_COEXIST pBtCoexist
\r
3326 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
\r
3329 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3330 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
\r
3331 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
\r
3333 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3335 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3337 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3339 if(BTC_RSSI_HIGH(btRssiState))
\r
3340 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3342 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3344 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
\r
3346 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
\r
3347 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3351 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13);
\r
3352 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
\r
3355 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 2);
\r
3358 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3359 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3361 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3362 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3364 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3365 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3369 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3370 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3375 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3376 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3378 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3379 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3383 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3384 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3390 halbtc8723b2ant_ActionPanEdr(
\r
3391 IN PBTC_COEXIST pBtCoexist
\r
3394 u1Byte wifiRssiState,wifiRssiState1, btRssiState;
\r
3397 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3398 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
\r
3399 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
\r
3401 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3403 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3405 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3407 if(BTC_RSSI_HIGH(btRssiState))
\r
3408 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3410 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3412 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
\r
3414 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 10);
\r
3415 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3419 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13);
\r
3420 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
\r
3423 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3424 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3426 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 1);
\r
3430 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, TRUE, 5);
\r
3434 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3435 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3437 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3438 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3440 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3441 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3445 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3446 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3451 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3452 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3454 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3455 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3459 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3460 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3468 halbtc8723b2ant_ActionPanHs(
\r
3469 IN PBTC_COEXIST pBtCoexist
\r
3472 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
\r
3475 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3476 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
\r
3477 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
\r
3479 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3481 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3483 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3485 if(BTC_RSSI_HIGH(btRssiState))
\r
3486 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3488 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3490 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
\r
3492 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3493 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
3495 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3496 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3498 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3499 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3501 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3502 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3506 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3507 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3512 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3513 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3515 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3516 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3520 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3521 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3528 halbtc8723b2ant_ActionPanEdrA2dp(
\r
3529 IN PBTC_COEXIST pBtCoexist
\r
3532 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
\r
3535 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3536 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
\r
3537 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
\r
3539 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3541 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3543 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3545 if(BTC_RSSI_HIGH(btRssiState))
\r
3546 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3548 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3550 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
\r
3551 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3553 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
\r
3555 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3557 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3558 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3560 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 12);
\r
3562 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3563 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3);
\r
3565 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, FALSE, 3);
\r
3569 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 13);
\r
3570 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, FALSE, TRUE, 3);
\r
3574 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3576 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3577 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3579 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3580 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3584 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,FALSE,FALSE,FALSE);
\r
3585 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3590 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3591 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3593 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3594 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3598 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3599 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3605 halbtc8723b2ant_ActionPanEdrHid(
\r
3606 IN PBTC_COEXIST pBtCoexist
\r
3609 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
\r
3612 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3613 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
\r
3614 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
\r
3615 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3617 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3619 if(BTC_RSSI_HIGH(btRssiState))
\r
3620 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3622 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3624 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
\r
3626 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
\r
3627 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3631 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14);
\r
3632 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
\r
3635 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3636 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3638 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3640 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 3);
\r
3641 //halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 11);
\r
3642 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780);
\r
3646 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3647 //halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
\r
3648 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3650 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 2);
\r
3654 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3655 //halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14);
\r
3656 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3657 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 2);
\r
3661 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3663 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3664 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3666 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3667 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3671 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3672 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3677 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3678 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3680 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3681 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3685 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3686 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3691 // HID+A2DP+PAN(EDR)
\r
3693 halbtc8723b2ant_ActionHidA2dpPanEdr(
\r
3694 IN PBTC_COEXIST pBtCoexist
\r
3697 u1Byte wifiRssiState,wifiRssiState1, btRssiState;
\r
3700 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3701 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
\r
3702 btRssiState = halbtc8723b2ant_BtRssiState(2, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 0);
\r
3704 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3706 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, FALSE, 0x8);
\r
3708 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3710 if(BTC_RSSI_HIGH(btRssiState))
\r
3711 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3713 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3715 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
\r
3717 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
\r
3718 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3722 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14);
\r
3723 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
\r
3726 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3728 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3729 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3731 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3732 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
\r
3734 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3);
\r
3738 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
\r
3742 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3744 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3745 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3747 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3748 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3752 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3753 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3758 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3759 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3761 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3762 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3766 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3767 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3773 halbtc8723b2ant_ActionHidA2dp(
\r
3774 IN PBTC_COEXIST pBtCoexist
\r
3777 u1Byte wifiRssiState, wifiRssiState1, btRssiState;
\r
3781 wifiRssiState = halbtc8723b2ant_WifiRssiState(pBtCoexist, 0, 2, 15, 0);
\r
3782 //btRssiState = halbtc8723b2ant_BtRssiState(2, 29, 0);
\r
3783 wifiRssiState1 = halbtc8723b2ant_WifiRssiState(pBtCoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES, 0);
\r
3784 btRssiState = halbtc8723b2ant_BtRssiState(3, BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES, 37);
\r
3786 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3788 halbtc8723b2ant_LimitedRx(pBtCoexist, NORMAL_EXEC, FALSE, TRUE, 0x5);
\r
3790 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3792 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
3793 if(BTC_WIFI_BW_LEGACY == wifiBw)
\r
3795 if(BTC_RSSI_HIGH(btRssiState))
\r
3796 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3797 else if(BTC_RSSI_MEDIUM(btRssiState))
\r
3798 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3800 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3803 { // only 802.11N mode we have to dec bt power to 4 degree
\r
3804 if(BTC_RSSI_HIGH(btRssiState))
\r
3806 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
\r
3807 // need to check ap Number of Not
\r
3809 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 4);
\r
3811 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3813 else if(BTC_RSSI_MEDIUM(btRssiState))
\r
3814 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 2);
\r
3816 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3819 if (BTC_RSSI_HIGH(wifiRssiState1) && BTC_RSSI_HIGH(btRssiState))
\r
3821 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 7);
\r
3822 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3826 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 14);
\r
3827 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_LPS_ON, 0x50, 0x4);
\r
3830 if( (btRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3831 (btRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3833 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, FALSE, 3);
\r
3837 halbtc8723b2ant_TdmaDurationAdjust(pBtCoexist, TRUE, TRUE, 3);
\r
3841 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
3843 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3844 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3846 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3847 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3851 halbtc8723b2ant_SwMechanism1(pBtCoexist,TRUE,TRUE,FALSE,FALSE);
\r
3852 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3857 if( (wifiRssiState == BTC_RSSI_STATE_HIGH) ||
\r
3858 (wifiRssiState == BTC_RSSI_STATE_STAY_HIGH) )
\r
3860 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3861 halbtc8723b2ant_SwMechanism2(pBtCoexist,TRUE,FALSE,FALSE,0x18);
\r
3865 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,TRUE,FALSE,FALSE);
\r
3866 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3872 halbtc8723b2ant_ActionBtWhckTest(
\r
3873 IN PBTC_COEXIST pBtCoexist
\r
3876 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3879 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3880 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3882 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3884 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
3885 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
\r
3889 halbtc8723b2ant_ActionWifiMultiPort(
\r
3890 IN PBTC_COEXIST pBtCoexist
\r
3893 halbtc8723b2ant_FwDacSwingLvl(pBtCoexist, NORMAL_EXEC, 6);
\r
3894 halbtc8723b2ant_DecBtPwr(pBtCoexist, NORMAL_EXEC, 0);
\r
3897 halbtc8723b2ant_SwMechanism1(pBtCoexist,FALSE,FALSE,FALSE,FALSE);
\r
3898 halbtc8723b2ant_SwMechanism2(pBtCoexist,FALSE,FALSE,FALSE,0x18);
\r
3901 //pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3902 halbtc8723b2ant_CoexTableWithType(pBtCoexist, NORMAL_EXEC, 0);
\r
3904 halbtc8723b2ant_PowerSaveState(pBtCoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
3905 halbtc8723b2ant_PsTdma(pBtCoexist, NORMAL_EXEC, FALSE, 1);
\r
3909 halbtc8723b2ant_RunCoexistMechanism(
\r
3910 IN PBTC_COEXIST pBtCoexist
\r
3913 BOOLEAN bWifiUnder5G=FALSE, bBtHsOn=FALSE;
\r
3914 u1Byte btInfoOriginal=0, btRetryCnt=0;
\r
3915 u1Byte algorithm=0;
\r
3916 u4Byte numOfWifiLink=0;
\r
3917 u4Byte wifiLinkStatus=0;
\r
3918 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
\r
3919 BOOLEAN bMiracastPlusBt=FALSE;
\r
3920 BOOLEAN bScan=FALSE, bLink=FALSE, bRoam=FALSE;
\r
3922 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism()===>\n"));
\r
3924 if(pBtCoexist->bManualControl)
\r
3926 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n"));
\r
3930 if(pCoexSta->bUnderIps)
\r
3932 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], wifi is under IPS !!!\n"));
\r
3936 if(pCoexSta->bBtWhckTest)
\r
3938 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT is under WHCK TEST!!!\n"));
\r
3939 halbtc8723b2ant_ActionBtWhckTest(pBtCoexist);
\r
3943 algorithm = halbtc8723b2ant_ActionAlgorithm(pBtCoexist);
\r
3944 if(pCoexSta->bC2hBtInquiryPage && (BT_8723B_2ANT_COEX_ALGO_PANHS!=algorithm))
\r
3946 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT is under inquiry/page scan !!\n"));
\r
3947 halbtc8723b2ant_ActionBtInquiry(pBtCoexist);
\r
3953 if(pCoexDm->bNeedRecover0x948)
\r
3955 pCoexDm->bNeedRecover0x948 = FALSE;
\r
3956 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, pCoexDm->backup0x948);
\r
3961 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_SCAN, &bScan);
\r
3962 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_LINK, &bLink);
\r
3963 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam);
\r
3965 if(bScan || bLink || bRoam)
\r
3967 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], WiFi is under Link Process !!\n"));
\r
3968 halbtc8723b2ant_ActionWiFiLinkProcess(pBtCoexist);
\r
3974 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_LINK_STATUS, &wifiLinkStatus);
\r
3975 numOfWifiLink = wifiLinkStatus>>16;
\r
3977 if((numOfWifiLink>=2) || (wifiLinkStatus&WIFI_P2P_GO_CONNECTED))
\r
3979 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("############# [BTCoex], Multi-Port numOfWifiLink = %d, wifiLinkStatus = 0x%x\n", numOfWifiLink,wifiLinkStatus) );
\r
3981 if(pBtLinkInfo->bBtLinkExist)
\r
3983 bMiracastPlusBt = TRUE;
\r
3987 bMiracastPlusBt = FALSE;
\r
3990 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt);
\r
3991 halbtc8723b2ant_ActionWifiMultiPort(pBtCoexist);
\r
3997 bMiracastPlusBt = FALSE;
\r
3998 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_MIRACAST_PLUS_BT, &bMiracastPlusBt);
\r
4001 pCoexDm->curAlgorithm = algorithm;
\r
4002 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Algorithm = %d \n", pCoexDm->curAlgorithm));
\r
4004 if(halbtc8723b2ant_IsCommonAction(pBtCoexist))
\r
4006 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant common.\n"));
\r
4007 pCoexDm->bAutoTdmaAdjust = FALSE;
\r
4011 if(pCoexDm->curAlgorithm != pCoexDm->preAlgorithm)
\r
4013 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], preAlgorithm=%d, curAlgorithm=%d\n",
\r
4014 pCoexDm->preAlgorithm, pCoexDm->curAlgorithm));
\r
4015 pCoexDm->bAutoTdmaAdjust = FALSE;
\r
4017 switch(pCoexDm->curAlgorithm)
\r
4019 case BT_8723B_2ANT_COEX_ALGO_SCO:
\r
4020 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = SCO.\n"));
\r
4021 halbtc8723b2ant_ActionSco(pBtCoexist);
\r
4023 case BT_8723B_2ANT_COEX_ALGO_HID:
\r
4024 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID.\n"));
\r
4025 halbtc8723b2ant_ActionHid(pBtCoexist);
\r
4027 case BT_8723B_2ANT_COEX_ALGO_A2DP:
\r
4028 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = A2DP.\n"));
\r
4029 halbtc8723b2ant_ActionA2dp(pBtCoexist);
\r
4031 case BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS:
\r
4032 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n"));
\r
4033 halbtc8723b2ant_ActionA2dpPanHs(pBtCoexist);
\r
4035 case BT_8723B_2ANT_COEX_ALGO_PANEDR:
\r
4036 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n"));
\r
4037 halbtc8723b2ant_ActionPanEdr(pBtCoexist);
\r
4039 case BT_8723B_2ANT_COEX_ALGO_PANHS:
\r
4040 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HS mode.\n"));
\r
4041 halbtc8723b2ant_ActionPanHs(pBtCoexist);
\r
4043 case BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP:
\r
4044 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n"));
\r
4045 halbtc8723b2ant_ActionPanEdrA2dp(pBtCoexist);
\r
4047 case BT_8723B_2ANT_COEX_ALGO_PANEDR_HID:
\r
4048 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n"));
\r
4049 halbtc8723b2ant_ActionPanEdrHid(pBtCoexist);
\r
4051 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
\r
4052 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n"));
\r
4053 halbtc8723b2ant_ActionHidA2dpPanEdr(pBtCoexist);
\r
4055 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP:
\r
4056 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n"));
\r
4057 halbtc8723b2ant_ActionHidA2dp(pBtCoexist);
\r
4060 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n"));
\r
4061 halbtc8723b2ant_CoexAllOff(pBtCoexist);
\r
4064 pCoexDm->preAlgorithm = pCoexDm->curAlgorithm;
\r
4069 halbtc8723b2ant_WifiOffHwCfg(
\r
4070 IN PBTC_COEXIST pBtCoexist
\r
4073 BOOLEAN bIsInMpMode = FALSE;
\r
4074 u1Byte H2C_Parameter[2] ={0};
\r
4077 // set wlan_act to low
\r
4078 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4);
\r
4080 pBtCoexist->fBtcSetRfReg(pBtCoexist, BTC_RF_A, 0x1, 0xfffff, 0x780); //WiFi goto standby while GNT_BT 0-->1
\r
4081 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
\r
4082 if(fwVer >= 0x180000)
\r
4084 /* Use H2C to set GNT_BT to HIGH */
\r
4085 H2C_Parameter[0] = 1;
\r
4086 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x6E, 1, H2C_Parameter);
\r
4090 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x765, 0x18);
\r
4093 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE, &bIsInMpMode);
\r
4095 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x0); //BT select s0/s1 is controlled by BT
\r
4097 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x67, 0x20, 0x1); //BT select s0/s1 is controlled by WiFi
\r
4101 halbtc8723b2ant_InitHwConfig(
\r
4102 IN PBTC_COEXIST pBtCoexist,
\r
4103 IN BOOLEAN bBackUp
\r
4106 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
\r
4107 u4Byte u4Tmp=0, fwVer;
\r
4110 u1Byte H2C_Parameter[2] ={0};
\r
4113 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], 2Ant Init HW Config!!\n"));
\r
4115 // backup rf 0x1e value
\r
4116 pCoexDm->btRf0x1eBackup =
\r
4117 pBtCoexist->fBtcGetRfReg(pBtCoexist, BTC_RF_A, 0x1e, 0xfffff);
\r
4120 u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x790);
\r
4123 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x790, u1Tmp);
\r
4126 halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, TRUE, FALSE);
\r
4127 pCoexSta->disVerInfoCnt = 0;
\r
4130 halbtc8723b2ant_CoexTableWithType(pBtCoexist, FORCE_EXEC, 0);
\r
4132 // Enable counter statistics
\r
4133 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0x4); //0x76e[3] =1, WLAN_Act control by PTA
\r
4134 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3);
\r
4135 pBtCoexist->fBtcWrite1ByteBitMask(pBtCoexist, 0x40, 0x20, 0x1);
\r
4138 //============================================================
\r
4139 // work around function start with wa_halbtc8723b2ant_
\r
4140 //============================================================
\r
4141 //============================================================
\r
4142 // extern function start with EXhalbtc8723b2ant_
\r
4143 //============================================================
\r
4145 EXhalbtc8723b2ant_PowerOnSetting(
\r
4146 IN PBTC_COEXIST pBtCoexist
\r
4149 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
\r
4152 pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x67, 0x20);
\r
4154 // enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly.
\r
4155 u2Tmp = pBtCoexist->fBtcRead2Byte(pBtCoexist, 0x2);
\r
4156 pBtCoexist->fBtcWrite2Byte(pBtCoexist, 0x2, u2Tmp|BIT0|BIT1);
\r
4158 pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x948, 0x0);
\r
4160 if(pBtCoexist->chipInterface == BTC_INTF_USB)
\r
4162 // fixed at S0 for USB interface
\r
4163 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
\r
4167 // for PCIE and SDIO interface, we check efuse 0xc3[6]
\r
4168 if(pBoardInfo->singleAntPath == 0)
\r
4171 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT;
\r
4173 else if(pBoardInfo->singleAntPath == 1)
\r
4176 pBoardInfo->btdmAntPos = BTC_ANTENNA_AT_AUX_PORT;
\r
4182 EXhalbtc8723b2ant_PreLoadFirmware(
\r
4183 IN PBTC_COEXIST pBtCoexist
\r
4186 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
\r
4187 u1Byte u1Tmp=0x4; /* Set BIT2 by default since it's 2ant case */
\r
4190 // S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info)
\r
4191 // Local setting bit define
\r
4192 // BIT0: "0" for no antenna inverse; "1" for antenna inverse
\r
4193 // BIT1: "0" for internal switch; "1" for external switch
\r
4194 // BIT2: "0" for one antenna; "1" for two antenna
\r
4195 // NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0
\r
4196 if(pBtCoexist->chipInterface == BTC_INTF_USB)
\r
4198 // fixed at S0 for USB interface
\r
4199 u1Tmp |= 0x1; // antenna inverse
\r
4200 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0xfe08, u1Tmp);
\r
4204 // for PCIE and SDIO interface, we check efuse 0xc3[6]
\r
4205 if(pBoardInfo->singleAntPath == 0)
\r
4208 else if(pBoardInfo->singleAntPath == 1)
\r
4211 u1Tmp |= 0x1; // antenna inverse
\r
4214 if(pBtCoexist->chipInterface == BTC_INTF_PCI)
\r
4216 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x384, u1Tmp);
\r
4218 else if(pBtCoexist->chipInterface == BTC_INTF_SDIO)
\r
4220 pBtCoexist->fBtcWriteLocalReg1Byte(pBtCoexist, 0x60, u1Tmp);
\r
4226 EXhalbtc8723b2ant_InitHwConfig(
\r
4227 IN PBTC_COEXIST pBtCoexist,
\r
4228 IN BOOLEAN bWifiOnly
\r
4231 halbtc8723b2ant_InitHwConfig(pBtCoexist, TRUE);
\r
4235 EXhalbtc8723b2ant_InitCoexDm(
\r
4236 IN PBTC_COEXIST pBtCoexist
\r
4239 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], Coex Mechanism Init!!\n"));
\r
4241 halbtc8723b2ant_InitCoexDm(pBtCoexist);
\r
4245 EXhalbtc8723b2ant_DisplayCoexInfo(
\r
4246 IN PBTC_COEXIST pBtCoexist
\r
4249 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
\r
4250 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
\r
4251 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
\r
4252 pu1Byte cliBuf=pBtCoexist->cliBuf;
\r
4253 u1Byte u1Tmp[4], i, btInfoExt, psTdmaCase=0;
\r
4255 u4Byte faOfdm, faCck;
\r
4256 u4Byte fwVer=0, btPatchVer=0;
\r
4258 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[BT Coexist info]============");
\r
4259 CL_PRINTF(cliBuf);
\r
4261 if(pBtCoexist->bManualControl)
\r
4263 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ============[Under Manual Control]============");
\r
4264 CL_PRINTF(cliBuf);
\r
4265 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n ==========================================");
\r
4266 CL_PRINTF(cliBuf);
\r
4269 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:", \
\r
4270 pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum);
\r
4271 CL_PRINTF(cliBuf);
\r
4273 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d", "BT stack/ hci ext ver", \
\r
4274 ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion);
\r
4275 CL_PRINTF(cliBuf);
\r
4277 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
\r
4278 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
\r
4279 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)", "CoexVer/ FwVer/ PatchVer", \
\r
4280 GLCoexVerDate8723b2Ant, GLCoexVer8723b2Ant, fwVer, btPatchVer, btPatchVer);
\r
4281 CL_PRINTF(cliBuf);
\r
4283 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ", "Wifi channel informed to BT", \
\r
4284 pCoexDm->wifiChnlInfo[0], pCoexDm->wifiChnlInfo[1],
\r
4285 pCoexDm->wifiChnlInfo[2]);
\r
4286 CL_PRINTF(cliBuf);
\r
4289 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Wifi Status]============");
\r
4290 CL_PRINTF(cliBuf);
\r
4291 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_WIFI_STATUS);
\r
4293 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[BT Status]============");
\r
4294 CL_PRINTF(cliBuf);
\r
4296 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %ddBm/ %d] ", "BT [status/ rssi/ retryCnt]", \
\r
4297 ((pBtCoexist->btInfo.bBtDisabled)? ("disabled"): ((pCoexSta->bC2hBtInquiryPage)?("inquiry/page scan"):((BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE == pCoexDm->btStatus)? "non-connected idle":
\r
4298 ( (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == pCoexDm->btStatus)? "connected-idle":"busy")))),
\r
4299 pCoexSta->btRssi-100, pCoexSta->btRetryCnt);
\r
4300 CL_PRINTF(cliBuf);
\r
4302 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d", "SCO/HID/PAN/A2DP", \
\r
4303 pBtLinkInfo->bScoExist, pBtLinkInfo->bHidExist, pBtLinkInfo->bPanExist, pBtLinkInfo->bA2dpExist);
\r
4304 CL_PRINTF(cliBuf);
\r
4306 if (pStackInfo->bProfileNotified)
\r
4308 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_BT_LINK_INFO);
\r
4312 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Role", \
\r
4313 (pBtLinkInfo->bSlaveRole )? "Slave":"Master");
\r
4314 CL_PRINTF(cliBuf);
\r
4317 btInfoExt = pCoexSta->btInfoExt;
\r
4318 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Info A2DP rate", \
\r
4319 (btInfoExt&BIT0)? "Basic rate":"EDR rate");
\r
4320 CL_PRINTF(cliBuf);
\r
4322 for(i=0; i<BT_INFO_SRC_8723B_2ANT_MAX; i++)
\r
4324 if(pCoexSta->btInfoC2hCnt[i])
\r
4326 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)", GLBtInfoSrc8723b2Ant[i], \
\r
4327 pCoexSta->btInfoC2h[i][0], pCoexSta->btInfoC2h[i][1],
\r
4328 pCoexSta->btInfoC2h[i][2], pCoexSta->btInfoC2h[i][3],
\r
4329 pCoexSta->btInfoC2h[i][4], pCoexSta->btInfoC2h[i][5],
\r
4330 pCoexSta->btInfoC2h[i][6], pCoexSta->btInfoC2hCnt[i]);
\r
4331 CL_PRINTF(cliBuf);
\r
4336 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Sw mechanism]============");
\r
4337 CL_PRINTF(cliBuf);
\r
4338 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "SM1[ShRf/ LpRA/ LimDig]", \
\r
4339 pCoexDm->bCurRfRxLpfShrink, pCoexDm->bCurLowPenaltyRa, pCoexDm->bLimitedDig);
\r
4340 CL_PRINTF(cliBuf);
\r
4341 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ", "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]", \
\r
4342 pCoexDm->bCurAgcTableEn, pCoexDm->bCurAdcBackOff, pCoexDm->bCurDacSwingOn, pCoexDm->curDacSwingLvl);
\r
4343 CL_PRINTF(cliBuf);
\r
4346 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Fw mechanism]============");
\r
4347 CL_PRINTF(cliBuf);
\r
4349 psTdmaCase = pCoexDm->curPsTdma;
\r
4350 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)", "PS TDMA", \
\r
4351 pCoexDm->psTdmaPara[0], pCoexDm->psTdmaPara[1],
\r
4352 pCoexDm->psTdmaPara[2], pCoexDm->psTdmaPara[3],
\r
4353 pCoexDm->psTdmaPara[4], psTdmaCase, pCoexDm->bAutoTdmaAdjust);
\r
4354 CL_PRINTF(cliBuf);
\r
4356 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Coex Table Type", \
\r
4357 pCoexSta->nCoexTableType);
\r
4358 CL_PRINTF(cliBuf);
\r
4360 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ", "DecBtPwr/ IgnWlanAct", \
\r
4361 pCoexDm->curBtDecPwrLvl, pCoexDm->bCurIgnoreWlanAct);
\r
4362 CL_PRINTF(cliBuf);
\r
4365 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Hw setting]============");
\r
4366 CL_PRINTF(cliBuf);
\r
4368 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "RF-A, 0x1e initVal", \
\r
4369 pCoexDm->btRf0x1eBackup);
\r
4370 CL_PRINTF(cliBuf);
\r
4372 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x778);
\r
4373 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x880);
\r
4374 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x778/0x880[29:25]", \
\r
4375 u1Tmp[0], (u4Tmp[0]&0x3e000000) >> 25);
\r
4376 CL_PRINTF(cliBuf);
\r
4379 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
\r
4380 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x67);
\r
4381 u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765);
\r
4382 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x948/ 0x67[5] / 0x765", \
\r
4383 u4Tmp[0], ((u1Tmp[0]&0x20)>> 5), u1Tmp[1]);
\r
4384 CL_PRINTF(cliBuf);
\r
4386 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x92c);
\r
4387 u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x930);
\r
4388 u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x944);
\r
4389 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]", \
\r
4390 u4Tmp[0]&0x3, u4Tmp[1]&0xff, u4Tmp[2]&0x3);
\r
4391 CL_PRINTF(cliBuf);
\r
4394 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x39);
\r
4395 u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x40);
\r
4396 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x4c);
\r
4397 u1Tmp[2] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x64);
\r
4398 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x38[11]/0x40/0x4c[24:23]/0x64[0]", \
\r
4399 ((u1Tmp[0] & 0x8)>>3), u1Tmp[1], ((u4Tmp[0]&0x01800000)>>23), u1Tmp[2]&0x1);
\r
4400 CL_PRINTF(cliBuf);
\r
4402 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x550);
\r
4403 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x522);
\r
4404 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x550(bcn ctrl)/0x522", \
\r
4405 u4Tmp[0], u1Tmp[0]);
\r
4406 CL_PRINTF(cliBuf);
\r
4408 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xc50);
\r
4409 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49c);
\r
4410 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0xc50(dig)/0x49c(null-drop)", \
\r
4411 u4Tmp[0]&0xff, u1Tmp[0]);
\r
4412 CL_PRINTF(cliBuf);
\r
4414 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda0);
\r
4415 u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda4);
\r
4416 u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xda8);
\r
4417 u4Tmp[3] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0xcf0);
\r
4419 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5b);
\r
4420 u1Tmp[1] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0xa5c);
\r
4422 faOfdm = ((u4Tmp[0]&0xffff0000) >> 16) + ((u4Tmp[1]&0xffff0000) >> 16) + (u4Tmp[1] & 0xffff) + (u4Tmp[2] & 0xffff) + \
\r
4423 ((u4Tmp[3]&0xffff0000) >> 16) + (u4Tmp[3] & 0xffff) ;
\r
4424 faCck = (u1Tmp[0] << 8) + u1Tmp[1];
\r
4426 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x", "OFDM-CCA/OFDM-FA/CCK-FA", \
\r
4427 u4Tmp[0]&0xffff, faOfdm, faCck);
\r
4428 CL_PRINTF(cliBuf);
\r
4430 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_OK CCK/11g/11n/11n-Agg", \
\r
4431 pCoexSta->nCRCOK_CCK, pCoexSta->nCRCOK_11g, pCoexSta->nCRCOK_11n, pCoexSta->nCRCOK_11nAgg);
\r
4432 CL_PRINTF(cliBuf);
\r
4434 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "CRC_Err CCK/11g/11n/11n-Agg", \
\r
4435 pCoexSta->nCRCErr_CCK, pCoexSta->nCRCErr_11g, pCoexSta->nCRCErr_11n, pCoexSta->nCRCErr_11nAgg);
\r
4436 CL_PRINTF(cliBuf);
\r
4438 u4Tmp[0] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c0);
\r
4439 u4Tmp[1] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c4);
\r
4440 u4Tmp[2] = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x6c8);
\r
4441 u1Tmp[0] = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x6cc);
\r
4442 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x", "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)", \
\r
4443 u4Tmp[0], u4Tmp[1], u4Tmp[2], u1Tmp[0]);
\r
4444 CL_PRINTF(cliBuf);
\r
4446 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x770(high-pri rx/tx)", \
\r
4447 pCoexSta->highPriorityRx, pCoexSta->highPriorityTx);
\r
4448 CL_PRINTF(cliBuf);
\r
4449 CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)", \
\r
4450 pCoexSta->lowPriorityRx, pCoexSta->lowPriorityTx);
\r
4451 CL_PRINTF(cliBuf);
\r
4452 #if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 1)
\r
4453 //halbtc8723b2ant_MonitorBtCtr(pBtCoexist);
\r
4455 pBtCoexist->fBtcDispDbgMsg(pBtCoexist, BTC_DBG_DISP_COEX_STATISTICS);
\r
4460 EXhalbtc8723b2ant_IpsNotify(
\r
4461 IN PBTC_COEXIST pBtCoexist,
\r
4465 if(BTC_IPS_ENTER == type)
\r
4467 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS ENTER notify\n"));
\r
4468 pCoexSta->bUnderIps = TRUE;
\r
4469 halbtc8723b2ant_WifiOffHwCfg(pBtCoexist);
\r
4470 halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE);
\r
4471 halbtc8723b2ant_CoexAllOff(pBtCoexist);
\r
4473 else if(BTC_IPS_LEAVE == type)
\r
4475 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], IPS LEAVE notify\n"));
\r
4476 pCoexSta->bUnderIps = FALSE;
\r
4477 halbtc8723b2ant_InitHwConfig(pBtCoexist, FALSE);
\r
4478 halbtc8723b2ant_InitCoexDm(pBtCoexist);
\r
4479 halbtc8723b2ant_QueryBtInfo(pBtCoexist);
\r
4484 EXhalbtc8723b2ant_LpsNotify(
\r
4485 IN PBTC_COEXIST pBtCoexist,
\r
4489 if(BTC_LPS_ENABLE == type)
\r
4491 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS ENABLE notify\n"));
\r
4492 pCoexSta->bUnderLps = TRUE;
\r
4494 else if(BTC_LPS_DISABLE == type)
\r
4496 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], LPS DISABLE notify\n"));
\r
4497 pCoexSta->bUnderLps = FALSE;
\r
4502 EXhalbtc8723b2ant_ScanNotify(
\r
4503 IN PBTC_COEXIST pBtCoexist,
\r
4508 u1Byte u1Tmpa, u1Tmpb;
\r
4512 u4Tmp = pBtCoexist->fBtcRead4Byte(pBtCoexist, 0x948);
\r
4513 u1Tmpa = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x765);
\r
4514 u1Tmpb = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x76e);
\r
4516 if(BTC_SCAN_START == type)
\r
4518 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN START notify\n"));
\r
4520 else if(BTC_SCAN_FINISH == type)
\r
4522 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], SCAN FINISH notify\n"));
\r
4525 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
\r
4526 u4Tmp, u1Tmpa, u1Tmpb));
\r
4530 EXhalbtc8723b2ant_ConnectNotify(
\r
4531 IN PBTC_COEXIST pBtCoexist,
\r
4535 if(BTC_ASSOCIATE_START == type)
\r
4537 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT START notify\n"));
\r
4539 else if(BTC_ASSOCIATE_FINISH == type)
\r
4541 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], CONNECT FINISH notify\n"));
\r
4546 EXhalbtc8723b2ant_MediaStatusNotify(
\r
4547 IN PBTC_COEXIST pBtCoexist,
\r
4551 u1Byte H2C_Parameter[3] ={0};
\r
4553 u1Byte wifiCentralChnl;
\r
4556 if(BTC_MEDIA_CONNECT == type)
\r
4558 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA connect notify\n"));
\r
4562 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], MEDIA disconnect notify\n"));
\r
4565 // only 2.4G we need to inform bt the chnl mask
\r
4566 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL, &wifiCentralChnl);
\r
4567 if( (BTC_MEDIA_CONNECT == type) &&
\r
4568 (wifiCentralChnl <= 14) )
\r
4570 H2C_Parameter[0] = 0x1;
\r
4571 H2C_Parameter[1] = wifiCentralChnl;
\r
4572 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_BW, &wifiBw);
\r
4573 if(BTC_WIFI_BW_HT40 == wifiBw)
\r
4574 H2C_Parameter[2] = 0x30;
\r
4577 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U1_AP_NUM, &apNum);
\r
4579 H2C_Parameter[2] = 0x30;
\r
4581 H2C_Parameter[2] = 0x20;
\r
4585 pCoexDm->wifiChnlInfo[0] = H2C_Parameter[0];
\r
4586 pCoexDm->wifiChnlInfo[1] = H2C_Parameter[1];
\r
4587 pCoexDm->wifiChnlInfo[2] = H2C_Parameter[2];
\r
4589 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC, ("[BTCoex], FW write 0x66=0x%x\n",
\r
4590 H2C_Parameter[0]<<16|H2C_Parameter[1]<<8|H2C_Parameter[2]));
\r
4592 pBtCoexist->fBtcFillH2c(pBtCoexist, 0x66, 3, H2C_Parameter);
\r
4596 EXhalbtc8723b2ant_SpecialPacketNotify(
\r
4597 IN PBTC_COEXIST pBtCoexist,
\r
4601 if(type == BTC_PACKET_DHCP)
\r
4603 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], DHCP Packet notify\n"));
\r
4608 EXhalbtc8723b2ant_BtInfoNotify(
\r
4609 IN PBTC_COEXIST pBtCoexist,
\r
4610 IN pu1Byte tmpBuf,
\r
4614 PBTC_BT_LINK_INFO pBtLinkInfo=&pBtCoexist->btLinkInfo;
\r
4616 u1Byte i, rspSource=0;
\r
4617 BOOLEAN bBtBusy=FALSE, bLimitedDig=FALSE;
\r
4618 BOOLEAN bWifiConnected=FALSE;
\r
4619 static BOOLEAN bPreScoExist=FALSE;
\r
4620 u4Byte raMask=0x0;
\r
4622 pCoexSta->bC2hBtInfoReqSent = FALSE;
\r
4624 rspSource = tmpBuf[0]&0xf;
\r
4625 if(rspSource >= BT_INFO_SRC_8723B_2ANT_MAX)
\r
4626 rspSource = BT_INFO_SRC_8723B_2ANT_WIFI_FW;
\r
4627 pCoexSta->btInfoC2hCnt[rspSource]++;
\r
4629 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Bt info[%d], length=%d, hex data=[", rspSource, length));
\r
4630 for(i=0; i<length; i++)
\r
4632 pCoexSta->btInfoC2h[rspSource][i] = tmpBuf[i];
\r
4634 btInfo = tmpBuf[i];
\r
4637 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x]\n", tmpBuf[i]));
\r
4641 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("0x%02x, ", tmpBuf[i]));
\r
4645 if(pBtCoexist->bManualControl)
\r
4647 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n"));
\r
4651 // if 0xff, it means BT is under WHCK test
\r
4652 if (btInfo == 0xff)
\r
4653 pCoexSta->bBtWhckTest = TRUE;
\r
4655 pCoexSta->bBtWhckTest = FALSE;
\r
4657 if(BT_INFO_SRC_8723B_2ANT_WIFI_FW != rspSource)
\r
4659 pCoexSta->btRetryCnt = // [3:0]
\r
4660 pCoexSta->btInfoC2h[rspSource][2]&0xf;
\r
4662 pCoexSta->btRssi =
\r
4663 pCoexSta->btInfoC2h[rspSource][3]*2+10;
\r
4665 pCoexSta->btInfoExt =
\r
4666 pCoexSta->btInfoC2h[rspSource][4];
\r
4668 pCoexSta->bBtTxRxMask = (pCoexSta->btInfoC2h[rspSource][2]&0x40);
\r
4669 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TX_RX_MASK, &pCoexSta->bBtTxRxMask);
\r
4670 if (pCoexSta->bBtTxRxMask)
\r
4672 /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */
\r
4673 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n"));
\r
4674 pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x01);
\r
4677 // Here we need to resend some wifi info to BT
\r
4678 // because bt is reset and loss of the info.
\r
4679 if( (pCoexSta->btInfoExt & BIT1) )
\r
4681 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n"));
\r
4682 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_WIFI_CONNECTED, &bWifiConnected);
\r
4683 if(bWifiConnected)
\r
4685 EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_CONNECT);
\r
4689 EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
\r
4693 if( (pCoexSta->btInfoExt & BIT3) )
\r
4695 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n"));
\r
4696 halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, FALSE);
\r
4700 // BT already NOT ignore Wlan active, do nothing here.
\r
4702 #if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
\r
4703 if( (pCoexSta->btInfoExt & BIT4) )
\r
4705 // BT auto report already enabled, do nothing
\r
4709 halbtc8723b2ant_BtAutoReport(pBtCoexist, FORCE_EXEC, TRUE);
\r
4714 // check BIT2 first ==> check if bt is under inquiry or page scan
\r
4715 if(btInfo & BT_INFO_8723B_2ANT_B_INQ_PAGE)
\r
4716 pCoexSta->bC2hBtInquiryPage = TRUE;
\r
4718 pCoexSta->bC2hBtInquiryPage = FALSE;
\r
4720 // set link exist status
\r
4721 if(!(btInfo&BT_INFO_8723B_2ANT_B_CONNECTION))
\r
4723 pCoexSta->bBtLinkExist = FALSE;
\r
4724 pCoexSta->bPanExist = FALSE;
\r
4725 pCoexSta->bA2dpExist = FALSE;
\r
4726 pCoexSta->bHidExist = FALSE;
\r
4727 pCoexSta->bScoExist = FALSE;
\r
4729 else // connection exists
\r
4731 pCoexSta->bBtLinkExist = TRUE;
\r
4732 if(btInfo & BT_INFO_8723B_2ANT_B_FTP)
\r
4733 pCoexSta->bPanExist = TRUE;
\r
4735 pCoexSta->bPanExist = FALSE;
\r
4736 if(btInfo & BT_INFO_8723B_2ANT_B_A2DP)
\r
4737 pCoexSta->bA2dpExist = TRUE;
\r
4739 pCoexSta->bA2dpExist = FALSE;
\r
4740 if(btInfo & BT_INFO_8723B_2ANT_B_HID)
\r
4741 pCoexSta->bHidExist = TRUE;
\r
4743 pCoexSta->bHidExist = FALSE;
\r
4744 if(btInfo & BT_INFO_8723B_2ANT_B_SCO_ESCO)
\r
4745 pCoexSta->bScoExist = TRUE;
\r
4747 pCoexSta->bScoExist = FALSE;
\r
4749 if ( (pCoexSta->bHidExist == FALSE) && (pCoexSta->bC2hBtInquiryPage == FALSE) )
\r
4751 if (pCoexSta->highPriorityTx + pCoexSta->highPriorityRx >= 160)
\r
4752 pCoexSta->bHidExist = TRUE;
\r
4756 halbtc8723b2ant_UpdateBtLinkInfo(pBtCoexist);
\r
4758 if(!(btInfo&BT_INFO_8723B_2ANT_B_CONNECTION))
\r
4760 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
\r
4761 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n"));
\r
4763 else if(btInfo == BT_INFO_8723B_2ANT_B_CONNECTION) // connection exists but no busy
\r
4765 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE;
\r
4766 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n"));
\r
4768 else if((btInfo&BT_INFO_8723B_2ANT_B_SCO_ESCO) ||
\r
4769 (btInfo&BT_INFO_8723B_2ANT_B_SCO_BUSY))
\r
4771 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_SCO_BUSY;
\r
4772 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT SCO busy!!!\n"));
\r
4774 else if(btInfo&BT_INFO_8723B_2ANT_B_ACL_BUSY)
\r
4776 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_ACL_BUSY;
\r
4777 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT ACL busy!!!\n"));
\r
4781 pCoexDm->btStatus = BT_8723B_2ANT_BT_STATUS_MAX;
\r
4782 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n"));
\r
4785 if( (BT_8723B_2ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ||
\r
4786 (BT_8723B_2ANT_BT_STATUS_SCO_BUSY == pCoexDm->btStatus) ||
\r
4787 (BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY == pCoexDm->btStatus) )
\r
4790 bLimitedDig = TRUE;
\r
4795 bLimitedDig = FALSE;
\r
4798 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bBtBusy);
\r
4800 pCoexDm->bLimitedDig = bLimitedDig;
\r
4801 pBtCoexist->fBtcSet(pBtCoexist, BTC_SET_BL_BT_LIMITED_DIG, &bLimitedDig);
\r
4803 halbtc8723b2ant_RunCoexistMechanism(pBtCoexist);
\r
4807 EXhalbtc8723b2ant_HaltNotify(
\r
4808 IN PBTC_COEXIST pBtCoexist
\r
4811 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Halt notify\n"));
\r
4813 halbtc8723b2ant_WifiOffHwCfg(pBtCoexist);
\r
4814 //remove due to interrupt is disabled that polling c2h will fail and delay 100ms.
\r
4815 //pBtCoexist->fBtcSetBtReg(pBtCoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0
\r
4816 halbtc8723b2ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, TRUE);
\r
4818 EXhalbtc8723b2ant_MediaStatusNotify(pBtCoexist, BTC_MEDIA_DISCONNECT);
\r
4822 EXhalbtc8723b2ant_PnpNotify(
\r
4823 IN PBTC_COEXIST pBtCoexist,
\r
4824 IN u1Byte pnpState
\r
4827 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify\n"));
\r
4829 if(BTC_WIFI_PNP_SLEEP == pnpState)
\r
4831 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify to SLEEP\n"));
\r
4833 else if(BTC_WIFI_PNP_WAKE_UP == pnpState)
\r
4835 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, ("[BTCoex], Pnp notify to WAKE UP\n"));
\r
4836 halbtc8723b2ant_InitHwConfig(pBtCoexist, FALSE);
\r
4837 halbtc8723b2ant_InitCoexDm(pBtCoexist);
\r
4838 halbtc8723b2ant_QueryBtInfo(pBtCoexist);
\r
4843 EXhalbtc8723b2ant_Periodical(
\r
4844 IN PBTC_COEXIST pBtCoexist
\r
4847 //static u1Byte disVerInfoCnt=0;
\r
4848 u4Byte fwVer=0, btPatchVer=0;
\r
4849 PBTC_BOARD_INFO pBoardInfo=&pBtCoexist->boardInfo;
\r
4850 PBTC_STACK_INFO pStackInfo=&pBtCoexist->stackInfo;
\r
4852 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE, ("[BTCoex], ==========================Periodical===========================\n"));
\r
4854 if(pCoexSta->disVerInfoCnt <= 5)
\r
4856 pCoexSta->disVerInfoCnt += 1;
\r
4857 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ****************************************************************\n"));
\r
4858 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n", \
\r
4859 pBoardInfo->pgAntNum, pBoardInfo->btdmAntNum, pBoardInfo->btdmAntPos));
\r
4860 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], BT stack/ hci ext ver = %s / %d\n", \
\r
4861 ((pStackInfo->bProfileNotified)? "Yes":"No"), pStackInfo->hciVersion));
\r
4862 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_BT_PATCH_VER, &btPatchVer);
\r
4863 pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_U4_WIFI_FW_VER, &fwVer);
\r
4864 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n", \
\r
4865 GLCoexVerDate8723b2Ant, GLCoexVer8723b2Ant, fwVer, btPatchVer, btPatchVer));
\r
4866 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], ****************************************************************\n"));
\r
4868 if (pCoexSta->disVerInfoCnt == 3)
\r
4870 //Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial
\r
4871 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT, ("[BTCoex], Set GNT_BT control by PTA\n"));
\r
4872 halbtc8723b2ant_SetAntPath(pBtCoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE);
\r
4876 #if(BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
\r
4877 halbtc8723b2ant_QueryBtInfo(pBtCoexist);
\r
4878 halbtc8723b2ant_MonitorBtEnableDisable(pBtCoexist);
\r
4880 halbtc8723b2ant_MonitorBtCtr(pBtCoexist);
\r
4881 halbtc8723b2ant_MonitorWiFiCtr(pBtCoexist);
\r
4883 if( halbtc8723b2ant_IsWifiStatusChanged(pBtCoexist) ||
\r
4884 pCoexDm->bAutoTdmaAdjust)
\r
4886 halbtc8723b2ant_RunCoexistMechanism(pBtCoexist);
\r