drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/btc/HalBtc8192e2Ant.c

   1 /* ************************************************************
   2  * Description:
   3  *
   4  * This file is for RTL8192E Co-exist mechanism
   5  *
   6  * History
   7  * 2012/11/15 Cosa first check in.
   8  *
   9  * ************************************************************ */
  10
  11 /* ************************************************************
  12  * include files
  13  * ************************************************************ */
  14 #include "Mp_Precomp.h"
  15
  16
  17 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
  18
  19 #if (RTL8192E_SUPPORT == 1)
  20 /* ************************************************************
  21  * Global variables, these are static variables
  22  * ************************************************************ */
  23 static u8        *trace_buf = &gl_btc_trace_buf[0];
  24 static struct  coex_dm_8192e_2ant               glcoex_dm_8192e_2ant;
  25 static struct  coex_dm_8192e_2ant       *coex_dm = &glcoex_dm_8192e_2ant;
  26 static struct  coex_sta_8192e_2ant              glcoex_sta_8192e_2ant;
  27 static struct  coex_sta_8192e_2ant      *coex_sta = &glcoex_sta_8192e_2ant;
  28
  29 const char *const glbt_info_src_8192e_2ant[] = {
  30         "BT Info[wifi fw]",
  31         "BT Info[bt rsp]",
  32         "BT Info[bt auto report]",
  33 };
  34
  35 u32     glcoex_ver_date_8192e_2ant = 20130912;
  36 u32     glcoex_ver_8192e_2ant = 0x35;
  37
  38 /* ************************************************************
  39  * local function proto type if needed
  40  * ************************************************************
  41  * ************************************************************
  42  * local function start with halbtc8192e2ant_
  43  * ************************************************************ */
  44 u8 halbtc8192e2ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1)
  45 {
  46         s32                     bt_rssi = 0;
  47         u8                      bt_rssi_state = coex_sta->pre_bt_rssi_state;
  48
  49         bt_rssi = coex_sta->bt_rssi;
  50
  51         if (level_num == 2) {
  52                 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  53                     (coex_sta->pre_bt_rssi_state ==
  54                      BTC_RSSI_STATE_STAY_LOW)) {
  55                         if (bt_rssi >= (rssi_thresh +
  56                                         BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  57                                 bt_rssi_state = BTC_RSSI_STATE_HIGH;
  58                         else
  59                                 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  60                 } else {
  61                         if (bt_rssi < rssi_thresh)
  62                                 bt_rssi_state = BTC_RSSI_STATE_LOW;
  63                         else
  64                                 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  65                 }
  66         } else if (level_num == 3) {
  67                 if (rssi_thresh > rssi_thresh1) {
  68                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  69                                     "[BTCoex], BT Rssi thresh error!!\n");
  70                         BTC_TRACE(trace_buf);
  71                         return coex_sta->pre_bt_rssi_state;
  72                 }
  73
  74                 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  75                     (coex_sta->pre_bt_rssi_state ==
  76                      BTC_RSSI_STATE_STAY_LOW)) {
  77                         if (bt_rssi >= (rssi_thresh +
  78                                         BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  79                                 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  80                         else
  81                                 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  82                 } else if ((coex_sta->pre_bt_rssi_state ==
  83                             BTC_RSSI_STATE_MEDIUM) ||
  84                            (coex_sta->pre_bt_rssi_state ==
  85                             BTC_RSSI_STATE_STAY_MEDIUM)) {
  86                         if (bt_rssi >= (rssi_thresh1 +
  87                                         BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  88                                 bt_rssi_state = BTC_RSSI_STATE_HIGH;
  89                         else if (bt_rssi < rssi_thresh)
  90                                 bt_rssi_state = BTC_RSSI_STATE_LOW;
  91                         else
  92                                 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
  93                 } else {
  94                         if (bt_rssi < rssi_thresh1)
  95                                 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  96                         else
  97                                 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  98                 }
  99         }
 100
 101         coex_sta->pre_bt_rssi_state = bt_rssi_state;
 102
 103         return bt_rssi_state;
 104 }
 105
 106 u8 halbtc8192e2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
 107            IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1)
 108 {
 109         s32                     wifi_rssi = 0;
 110         u8                      wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
 111
 112         btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
 113
 114         if (level_num == 2) {
 115                 if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
 116                     ||
 117                     (coex_sta->pre_wifi_rssi_state[index] ==
 118                      BTC_RSSI_STATE_STAY_LOW)) {
 119                         if (wifi_rssi >= (rssi_thresh +
 120                                           BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
 121                                 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
 122                         else
 123                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
 124                 } else {
 125                         if (wifi_rssi < rssi_thresh)
 126                                 wifi_rssi_state = BTC_RSSI_STATE_LOW;
 127                         else
 128                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
 129                 }
 130         } else if (level_num == 3) {
 131                 if (rssi_thresh > rssi_thresh1) {
 132                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 133                                     "[BTCoex], wifi RSSI thresh error!!\n");
 134                         BTC_TRACE(trace_buf);
 135                         return coex_sta->pre_wifi_rssi_state[index];
 136                 }
 137
 138                 if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
 139                     ||
 140                     (coex_sta->pre_wifi_rssi_state[index] ==
 141                      BTC_RSSI_STATE_STAY_LOW)) {
 142                         if (wifi_rssi >= (rssi_thresh +
 143                                           BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
 144                                 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
 145                         else
 146                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
 147                 } else if ((coex_sta->pre_wifi_rssi_state[index] ==
 148                             BTC_RSSI_STATE_MEDIUM) ||
 149                            (coex_sta->pre_wifi_rssi_state[index] ==
 150                             BTC_RSSI_STATE_STAY_MEDIUM)) {
 151                         if (wifi_rssi >= (rssi_thresh1 +
 152                                           BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
 153                                 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
 154                         else if (wifi_rssi < rssi_thresh)
 155                                 wifi_rssi_state = BTC_RSSI_STATE_LOW;
 156                         else
 157                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
 158                 } else {
 159                         if (wifi_rssi < rssi_thresh1)
 160                                 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
 161                         else
 162                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
 163                 }
 164         }
 165
 166         coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state;
 167
 168         return wifi_rssi_state;
 169 }
 170
 171 void halbtc8192e2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 172 {
 173         static u32      bt_disable_cnt = 0;
 174         boolean                 bt_active = true, bt_disabled = false;
 175
 176         /* This function check if bt is disabled */
 177
 178         if (coex_sta->high_priority_tx == 0 &&
 179             coex_sta->high_priority_rx == 0 &&
 180             coex_sta->low_priority_tx == 0 &&
 181             coex_sta->low_priority_rx == 0)
 182                 bt_active = false;
 183         if (coex_sta->high_priority_tx == 0xffff &&
 184             coex_sta->high_priority_rx == 0xffff &&
 185             coex_sta->low_priority_tx == 0xffff &&
 186             coex_sta->low_priority_rx == 0xffff)
 187                 bt_active = false;
 188         if (bt_active) {
 189                 bt_disable_cnt = 0;
 190                 bt_disabled = false;
 191                 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 192                                    &bt_disabled);
 193                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 194                             "[BTCoex], BT is enabled !!\n");
 195                 BTC_TRACE(trace_buf);
 196         } else {
 197                 bt_disable_cnt++;
 198                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 199                             "[BTCoex], bt all counters=0, %d times!!\n",
 200                             bt_disable_cnt);
 201                 BTC_TRACE(trace_buf);
 202                 if (bt_disable_cnt >= 2) {
 203                         bt_disabled = true;
 204                         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 205                                            &bt_disabled);
 206                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 207                                     "[BTCoex], BT is disabled !!\n");
 208                         BTC_TRACE(trace_buf);
 209                 }
 210         }
 211         if (coex_sta->bt_disabled != bt_disabled) {
 212                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 213                             "[BTCoex], BT is from %s to %s!!\n",
 214                             (coex_sta->bt_disabled ? "disabled" : "enabled"),
 215                             (bt_disabled ? "disabled" : "enabled"));
 216                 BTC_TRACE(trace_buf);
 217                 coex_sta->bt_disabled = bt_disabled;
 218                 if (!bt_disabled) {
 219                 } else {
 220                 }
 221         }
 222 }
 223
 224 u32 halbtc8192e2ant_decide_ra_mask(IN struct btc_coexist *btcoexist,
 225                                    IN u8 ss_type, IN u32 ra_mask_type)
 226 {
 227         u32     dis_ra_mask = 0x0;
 228
 229         switch (ra_mask_type) {
 230         case 0: /* normal mode */
 231                 if (ss_type == 2)
 232                         dis_ra_mask = 0x0;                      /* enable 2ss */
 233                 else
 234                         dis_ra_mask = 0xfff00000;               /* disable 2ss */
 235                 break;
 236         case 1: /* disable cck 1/2 */
 237                 if (ss_type == 2)
 238                         dis_ra_mask = 0x00000003;               /* enable 2ss */
 239                 else
 240                         dis_ra_mask = 0xfff00003;               /* disable 2ss */
 241                 break;
 242         case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
 243                 if (ss_type == 2)
 244                         dis_ra_mask = 0x0001f1f7;               /* enable 2ss */
 245                 else
 246                         dis_ra_mask = 0xfff1f1f7;               /* disable 2ss */
 247                 break;
 248         default:
 249                 break;
 250         }
 251
 252         return dis_ra_mask;
 253 }
 254
 255 void halbtc8192e2ant_update_ra_mask(IN struct btc_coexist *btcoexist,
 256                                     IN boolean force_exec, IN u32 dis_rate_mask)
 257 {
 258         coex_dm->cur_ra_mask = dis_rate_mask;
 259
 260         if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask))
 261                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK,
 262                                    &coex_dm->cur_ra_mask);
 263         coex_dm->pre_ra_mask = coex_dm->cur_ra_mask;
 264 }
 265
 266 void halbtc8192e2ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist,
 267                 IN boolean force_exec, IN u8 type)
 268 {
 269         boolean wifi_under_b_mode = false;
 270
 271         coex_dm->cur_arfr_type = type;
 272
 273         if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) {
 274                 switch (coex_dm->cur_arfr_type) {
 275                 case 0: /* normal mode */
 276                         btcoexist->btc_write_4byte(btcoexist, 0x430,
 277                                                    coex_dm->backup_arfr_cnt1);
 278                         btcoexist->btc_write_4byte(btcoexist, 0x434,
 279                                                    coex_dm->backup_arfr_cnt2);
 280                         break;
 281                 case 1:
 282                         btcoexist->btc_get(btcoexist,
 283                                            BTC_GET_BL_WIFI_UNDER_B_MODE,
 284                                            &wifi_under_b_mode);
 285                         if (wifi_under_b_mode) {
 286                                 btcoexist->btc_write_4byte(btcoexist,
 287                                                            0x430, 0x0);
 288                                 btcoexist->btc_write_4byte(btcoexist,
 289                                                            0x434, 0x01010101);
 290                         } else {
 291                                 btcoexist->btc_write_4byte(btcoexist,
 292                                                            0x430, 0x0);
 293                                 btcoexist->btc_write_4byte(btcoexist,
 294                                                            0x434, 0x04030201);
 295                         }
 296                         break;
 297                 default:
 298                         break;
 299                 }
 300         }
 301
 302         coex_dm->pre_arfr_type = coex_dm->cur_arfr_type;
 303 }
 304
 305 void halbtc8192e2ant_retry_limit(IN struct btc_coexist *btcoexist,
 306                                  IN boolean force_exec, IN u8 type)
 307 {
 308         coex_dm->cur_retry_limit_type = type;
 309
 310         if (force_exec ||
 311             (coex_dm->pre_retry_limit_type !=
 312              coex_dm->cur_retry_limit_type)) {
 313                 switch (coex_dm->cur_retry_limit_type) {
 314                 case 0: /* normal mode */
 315                         btcoexist->btc_write_2byte(btcoexist, 0x42a,
 316                                                    coex_dm->backup_retry_limit);
 317                         break;
 318                 case 1: /* retry limit=8 */
 319                         btcoexist->btc_write_2byte(btcoexist, 0x42a,
 320                                                    0x0808);
 321                         break;
 322                 default:
 323                         break;
 324                 }
 325         }
 326
 327         coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type;
 328 }
 329
 330 void halbtc8192e2ant_ampdu_max_time(IN struct btc_coexist *btcoexist,
 331                                     IN boolean force_exec, IN u8 type)
 332 {
 333         coex_dm->cur_ampdu_time_type = type;
 334
 335         if (force_exec ||
 336             (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) {
 337                 switch (coex_dm->cur_ampdu_time_type) {
 338                 case 0: /* normal mode */
 339                         btcoexist->btc_write_1byte(btcoexist, 0x456,
 340                                            coex_dm->backup_ampdu_max_time);
 341                         break;
 342                 case 1: /* AMPDU timw = 0x38 * 32us */
 343                         btcoexist->btc_write_1byte(btcoexist, 0x456,
 344                                                    0x38);
 345                         break;
 346                 default:
 347                         break;
 348                 }
 349         }
 350
 351         coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type;
 352 }
 353
 354 void halbtc8192e2ant_limited_tx(IN struct btc_coexist *btcoexist,
 355                 IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type,
 356                                 IN u8 retry_limit_type, IN u8 ampdu_time_type)
 357 {
 358         u32     dis_ra_mask = 0x0;
 359
 360         coex_dm->cur_ra_mask_type = ra_mask_type;
 361         dis_ra_mask = halbtc8192e2ant_decide_ra_mask(btcoexist,
 362                         coex_dm->cur_ss_type, ra_mask_type);
 363         halbtc8192e2ant_update_ra_mask(btcoexist, force_exec, dis_ra_mask);
 364
 365         halbtc8192e2ant_auto_rate_fallback_retry(btcoexist, force_exec,
 366                         arfr_type);
 367         halbtc8192e2ant_retry_limit(btcoexist, force_exec, retry_limit_type);
 368         halbtc8192e2ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type);
 369 }
 370
 371 void halbtc8192e2ant_limited_rx(IN struct btc_coexist *btcoexist,
 372                         IN boolean force_exec, IN boolean rej_ap_agg_pkt,
 373                         IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
 374 {
 375         boolean reject_rx_agg = rej_ap_agg_pkt;
 376         boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
 377         u8      rx_agg_size = agg_buf_size;
 378
 379         /* ============================================ */
 380         /*      Rx Aggregation related setting */
 381         /* ============================================ */
 382         btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
 383                            &reject_rx_agg);
 384         /* decide BT control aggregation buf size or not */
 385         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
 386                            &bt_ctrl_rx_agg_size);
 387         /* aggregation buf size, only work when BT control Rx aggregation size. */
 388         btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
 389         /* real update aggregation setting */
 390         btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
 391
 392
 393 }
 394
 395 void halbtc8192e2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 396 {
 397         u32                     reg_hp_txrx, reg_lp_txrx, u32tmp;
 398         u32                     reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
 399
 400         reg_hp_txrx = 0x770;
 401         reg_lp_txrx = 0x774;
 402
 403         u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
 404         reg_hp_tx = u32tmp & MASKLWORD;
 405         reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
 406
 407         u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
 408         reg_lp_tx = u32tmp & MASKLWORD;
 409         reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
 410
 411         coex_sta->high_priority_tx = reg_hp_tx;
 412         coex_sta->high_priority_rx = reg_hp_rx;
 413         coex_sta->low_priority_tx = reg_lp_tx;
 414         coex_sta->low_priority_rx = reg_lp_rx;
 415
 416         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 417                 "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
 418                     reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
 419         BTC_TRACE(trace_buf);
 420         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 421                 "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
 422                     reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
 423         BTC_TRACE(trace_buf);
 424
 425         /* reset counter */
 426         btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
 427 }
 428
 429 void halbtc8192e2ant_query_bt_info(IN struct btc_coexist *btcoexist)
 430 {
 431         u8                      h2c_parameter[1] = {0};
 432
 433         coex_sta->c2h_bt_info_req_sent = true;
 434
 435         h2c_parameter[0] |= BIT(0);     /* trigger */
 436
 437         btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
 438 }
 439
 440 boolean halbtc8192e2ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
 441 {
 442         static boolean  pre_wifi_busy = false, pre_under_4way = false,
 443                         pre_bt_hs_on = false;
 444         boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
 445         boolean wifi_connected = false;
 446
 447         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 448                            &wifi_connected);
 449         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 450         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 451         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
 452                            &under_4way);
 453
 454         if (wifi_connected) {
 455                 if (wifi_busy != pre_wifi_busy) {
 456                         pre_wifi_busy = wifi_busy;
 457                         return true;
 458                 }
 459                 if (under_4way != pre_under_4way) {
 460                         pre_under_4way = under_4way;
 461                         return true;
 462                 }
 463                 if (bt_hs_on != pre_bt_hs_on) {
 464                         pre_bt_hs_on = bt_hs_on;
 465                         return true;
 466                 }
 467         }
 468
 469         return false;
 470 }
 471
 472 void halbtc8192e2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 473 {
 474         struct  btc_bt_link_info        *bt_link_info = &btcoexist->bt_link_info;
 475         boolean                         bt_hs_on = false;
 476
 477         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 478
 479         bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
 480         bt_link_info->sco_exist = coex_sta->sco_exist;
 481         bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
 482         bt_link_info->pan_exist = coex_sta->pan_exist;
 483         bt_link_info->hid_exist = coex_sta->hid_exist;
 484
 485         /* work around for HS mode. */
 486         if (bt_hs_on) {
 487                 bt_link_info->pan_exist = true;
 488                 bt_link_info->bt_link_exist = true;
 489         }
 490
 491         /* check if Sco only */
 492         if (bt_link_info->sco_exist &&
 493             !bt_link_info->a2dp_exist &&
 494             !bt_link_info->pan_exist &&
 495             !bt_link_info->hid_exist)
 496                 bt_link_info->sco_only = true;
 497         else
 498                 bt_link_info->sco_only = false;
 499
 500         /* check if A2dp only */
 501         if (!bt_link_info->sco_exist &&
 502             bt_link_info->a2dp_exist &&
 503             !bt_link_info->pan_exist &&
 504             !bt_link_info->hid_exist)
 505                 bt_link_info->a2dp_only = true;
 506         else
 507                 bt_link_info->a2dp_only = false;
 508
 509         /* check if Pan only */
 510         if (!bt_link_info->sco_exist &&
 511             !bt_link_info->a2dp_exist &&
 512             bt_link_info->pan_exist &&
 513             !bt_link_info->hid_exist)
 514                 bt_link_info->pan_only = true;
 515         else
 516                 bt_link_info->pan_only = false;
 517
 518         /* check if Hid only */
 519         if (!bt_link_info->sco_exist &&
 520             !bt_link_info->a2dp_exist &&
 521             !bt_link_info->pan_exist &&
 522             bt_link_info->hid_exist)
 523                 bt_link_info->hid_only = true;
 524         else
 525                 bt_link_info->hid_only = false;
 526 }
 527
 528 u8 halbtc8192e2ant_action_algorithm(IN struct btc_coexist *btcoexist)
 529 {
 530         struct  btc_bt_link_info        *bt_link_info = &btcoexist->bt_link_info;
 531         struct  btc_stack_info  *stack_info = &btcoexist->stack_info;
 532         boolean                         bt_hs_on = false;
 533         u8                              algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
 534         u8                              num_of_diff_profile = 0;
 535
 536         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 537
 538         if (!bt_link_info->bt_link_exist) {
 539                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 540                             "[BTCoex], No BT link exists!!!\n");
 541                 BTC_TRACE(trace_buf);
 542                 return algorithm;
 543         }
 544
 545         if (bt_link_info->sco_exist)
 546                 num_of_diff_profile++;
 547         if (bt_link_info->hid_exist)
 548                 num_of_diff_profile++;
 549         if (bt_link_info->pan_exist)
 550                 num_of_diff_profile++;
 551         if (bt_link_info->a2dp_exist)
 552                 num_of_diff_profile++;
 553
 554         if (num_of_diff_profile == 1) {
 555                 if (bt_link_info->sco_exist) {
 556                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 557                                     "[BTCoex], SCO only\n");
 558                         BTC_TRACE(trace_buf);
 559                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 560                 } else {
 561                         if (bt_link_info->hid_exist) {
 562                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 563                                             "[BTCoex], HID only\n");
 564                                 BTC_TRACE(trace_buf);
 565                                 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
 566                         } else if (bt_link_info->a2dp_exist) {
 567                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 568                                             "[BTCoex], A2DP only\n");
 569                                 BTC_TRACE(trace_buf);
 570                                 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
 571                         } else if (bt_link_info->pan_exist) {
 572                                 if (bt_hs_on) {
 573                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 574                                                     "[BTCoex], PAN(HS) only\n");
 575                                         BTC_TRACE(trace_buf);
 576                                         algorithm =
 577                                                 BT_8192E_2ANT_COEX_ALGO_PANHS;
 578                                 } else {
 579                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 580                                                 "[BTCoex], PAN(EDR) only\n");
 581                                         BTC_TRACE(trace_buf);
 582                                         algorithm =
 583                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR;
 584                                 }
 585                         }
 586                 }
 587         } else if (num_of_diff_profile == 2) {
 588                 if (bt_link_info->sco_exist) {
 589                         if (bt_link_info->hid_exist) {
 590                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 591                                             "[BTCoex], SCO + HID\n");
 592                                 BTC_TRACE(trace_buf);
 593                                 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 594                         } else if (bt_link_info->a2dp_exist) {
 595                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 596                                             "[BTCoex], SCO + A2DP ==> SCO\n");
 597                                 BTC_TRACE(trace_buf);
 598                                 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 599                         } else if (bt_link_info->pan_exist) {
 600                                 if (bt_hs_on) {
 601                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 602                                                 "[BTCoex], SCO + PAN(HS)\n");
 603                                         BTC_TRACE(trace_buf);
 604                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 605                                 } else {
 606                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 607                                                 "[BTCoex], SCO + PAN(EDR)\n");
 608                                         BTC_TRACE(trace_buf);
 609                                         algorithm =
 610                                                 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
 611                                 }
 612                         }
 613                 } else {
 614                         if (bt_link_info->hid_exist &&
 615                             bt_link_info->a2dp_exist) {
 616                                 if (stack_info->num_of_hid >= 2) {
 617                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 618                                                     "[BTCoex], HID*2 + A2DP\n");
 619                                         BTC_TRACE(trace_buf);
 620                                         algorithm =
 621                                                 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 622                                 } else {
 623                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 624                                                     "[BTCoex], HID + A2DP\n");
 625                                         BTC_TRACE(trace_buf);
 626                                         algorithm =
 627                                                 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
 628                                 }
 629                         } else if (bt_link_info->hid_exist &&
 630                                    bt_link_info->pan_exist) {
 631                                 if (bt_hs_on) {
 632                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 633                                                 "[BTCoex], HID + PAN(HS)\n");
 634                                         BTC_TRACE(trace_buf);
 635                                         algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
 636                                 } else {
 637                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 638                                                 "[BTCoex], HID + PAN(EDR)\n");
 639                                         BTC_TRACE(trace_buf);
 640                                         algorithm =
 641                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 642                                 }
 643                         } else if (bt_link_info->pan_exist &&
 644                                    bt_link_info->a2dp_exist) {
 645                                 if (bt_hs_on) {
 646                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 647                                                 "[BTCoex], A2DP + PAN(HS)\n");
 648                                         BTC_TRACE(trace_buf);
 649                                         algorithm =
 650                                                 BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
 651                                 } else {
 652                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 653                                                 "[BTCoex], A2DP + PAN(EDR)\n");
 654                                         BTC_TRACE(trace_buf);
 655                                         algorithm =
 656                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
 657                                 }
 658                         }
 659                 }
 660         } else if (num_of_diff_profile == 3) {
 661                 if (bt_link_info->sco_exist) {
 662                         if (bt_link_info->hid_exist &&
 663                             bt_link_info->a2dp_exist) {
 664                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 665                                         "[BTCoex], SCO + HID + A2DP ==> HID\n");
 666                                 BTC_TRACE(trace_buf);
 667                                 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 668                         } else if (bt_link_info->hid_exist &&
 669                                    bt_link_info->pan_exist) {
 670                                 if (bt_hs_on) {
 671                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 672                                                 "[BTCoex], SCO + HID + PAN(HS)\n");
 673                                         BTC_TRACE(trace_buf);
 674                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 675                                 } else {
 676                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 677                                                 "[BTCoex], SCO + HID + PAN(EDR)\n");
 678                                         BTC_TRACE(trace_buf);
 679                                         algorithm =
 680                                                 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
 681                                 }
 682                         } else if (bt_link_info->pan_exist &&
 683                                    bt_link_info->a2dp_exist) {
 684                                 if (bt_hs_on) {
 685                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 686                                                 "[BTCoex], SCO + A2DP + PAN(HS)\n");
 687                                         BTC_TRACE(trace_buf);
 688                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 689                                 } else {
 690                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 691                                                 "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n");
 692                                         BTC_TRACE(trace_buf);
 693                                         algorithm =
 694                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 695                                 }
 696                         }
 697                 } else {
 698                         if (bt_link_info->hid_exist &&
 699                             bt_link_info->pan_exist &&
 700                             bt_link_info->a2dp_exist) {
 701                                 if (bt_hs_on) {
 702                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 703                                                 "[BTCoex], HID + A2DP + PAN(HS)\n");
 704                                         BTC_TRACE(trace_buf);
 705                                         algorithm =
 706                                                 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
 707                                 } else {
 708                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 709                                                 "[BTCoex], HID + A2DP + PAN(EDR)\n");
 710                                         BTC_TRACE(trace_buf);
 711                                         algorithm =
 712                                                 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 713                                 }
 714                         }
 715                 }
 716         } else if (num_of_diff_profile >= 3) {
 717                 if (bt_link_info->sco_exist) {
 718                         if (bt_link_info->hid_exist &&
 719                             bt_link_info->pan_exist &&
 720                             bt_link_info->a2dp_exist) {
 721                                 if (bt_hs_on) {
 722                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 723                                                 "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n");
 724                                         BTC_TRACE(trace_buf);
 725                                 } else {
 726                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 727                                                 "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
 728                                         BTC_TRACE(trace_buf);
 729                                         algorithm =
 730                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 731                                 }
 732                         }
 733                 }
 734         }
 735
 736         return algorithm;
 737 }
 738
 739 void halbtc8192e2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
 740                 IN u8 dac_swing_lvl)
 741 {
 742         u8                      h2c_parameter[1] = {0};
 743
 744         /* There are several type of dacswing */
 745         /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
 746         h2c_parameter[0] = dac_swing_lvl;
 747
 748         btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
 749 }
 750
 751 void halbtc8192e2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
 752                                        IN u8 dec_bt_pwr_lvl)
 753 {
 754         u8                      h2c_parameter[1] = {0};
 755
 756         h2c_parameter[0] = dec_bt_pwr_lvl;
 757
 758         btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
 759 }
 760
 761 void halbtc8192e2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
 762                                 IN boolean force_exec, IN u8 dec_bt_pwr_lvl)
 763 {
 764         coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl;
 765
 766         if (!force_exec) {
 767 #if 0   /* work around, avoid h2c command fail. */
 768                 if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl)
 769                         return;
 770 #endif
 771         }
 772         halbtc8192e2ant_set_fw_dec_bt_pwr(btcoexist,
 773                                           coex_dm->cur_bt_dec_pwr_lvl);
 774
 775         coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl;
 776 }
 777
 778 void halbtc8192e2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
 779                                         IN boolean enable_auto_report)
 780 {
 781         u8                      h2c_parameter[1] = {0};
 782
 783         h2c_parameter[0] = 0;
 784
 785         if (enable_auto_report)
 786                 h2c_parameter[0] |= BIT(0);
 787
 788         btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
 789 }
 790
 791 void halbtc8192e2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
 792                     IN boolean force_exec, IN boolean enable_auto_report)
 793 {
 794         coex_dm->cur_bt_auto_report = enable_auto_report;
 795
 796         if (!force_exec) {
 797                 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
 798                         return;
 799         }
 800         halbtc8192e2ant_set_bt_auto_report(btcoexist,
 801                                            coex_dm->cur_bt_auto_report);
 802
 803         coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
 804 }
 805
 806 void halbtc8192e2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
 807                               IN boolean force_exec, IN u8 fw_dac_swing_lvl)
 808 {
 809         coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
 810
 811         if (!force_exec) {
 812                 if (coex_dm->pre_fw_dac_swing_lvl ==
 813                     coex_dm->cur_fw_dac_swing_lvl)
 814                         return;
 815         }
 816
 817         halbtc8192e2ant_set_fw_dac_swing_level(btcoexist,
 818                                                coex_dm->cur_fw_dac_swing_lvl);
 819
 820         coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
 821 }
 822
 823 void halbtc8192e2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist *btcoexist,
 824                 IN boolean rx_rf_shrink_on)
 825 {
 826         if (rx_rf_shrink_on) {
 827                 /* Shrink RF Rx LPF corner */
 828                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 829                             "[BTCoex], Shrink RF Rx LPF corner!!\n");
 830                 BTC_TRACE(trace_buf);
 831                 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff,
 832                                           0xffffc);
 833         } else {
 834                 /* Resume RF Rx LPF corner */
 835                 /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */
 836                 if (btcoexist->initilized) {
 837                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 838                                     "[BTCoex], Resume RF Rx LPF corner!!\n");
 839                         BTC_TRACE(trace_buf);
 840                         btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
 841                                           0xfffff, coex_dm->bt_rf_0x1e_backup);
 842                 }
 843         }
 844 }
 845
 846 void halbtc8192e2ant_rf_shrink(IN struct btc_coexist *btcoexist,
 847                        IN boolean force_exec, IN boolean rx_rf_shrink_on)
 848 {
 849         coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
 850
 851         if (!force_exec) {
 852                 if (coex_dm->pre_rf_rx_lpf_shrink ==
 853                     coex_dm->cur_rf_rx_lpf_shrink)
 854                         return;
 855         }
 856         halbtc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist,
 857                                                 coex_dm->cur_rf_rx_lpf_shrink);
 858
 859         coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
 860 }
 861
 862 void halbtc8192e2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist
 863                 *btcoexist, IN boolean low_penalty_ra)
 864 {
 865         u8                      h2c_parameter[6] = {0};
 866
 867         h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */
 868
 869         if (low_penalty_ra) {
 870                 h2c_parameter[1] |= BIT(0);
 871                 h2c_parameter[2] =
 872                         0x00;  /* normal rate except MCS7/6/5, OFDM54/48/36 */
 873                 h2c_parameter[3] = 0xf7;  /* MCS7 or OFDM54 */
 874                 h2c_parameter[4] = 0xf8;  /* MCS6 or OFDM48 */
 875                 h2c_parameter[5] = 0xf9;        /* MCS5 or OFDM36        */
 876         }
 877
 878         btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
 879 }
 880
 881 void halbtc8192e2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
 882                             IN boolean force_exec, IN boolean low_penalty_ra)
 883 {
 884         coex_dm->cur_low_penalty_ra = low_penalty_ra;
 885
 886         if (!force_exec) {
 887                 if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
 888                         return;
 889         }
 890         halbtc8192e2ant_set_sw_penalty_tx_rate_adaptive(btcoexist,
 891                         coex_dm->cur_low_penalty_ra);
 892
 893         coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
 894 }
 895
 896 void halbtc8192e2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist,
 897                                        IN u32 level)
 898 {
 899         u8      val = (u8)level;
 900
 901         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 902                     "[BTCoex], Write SwDacSwing = 0x%x\n", level);
 903         BTC_TRACE(trace_buf);
 904         btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
 905 }
 906
 907 void halbtc8192e2ant_set_sw_full_time_dac_swing(IN struct btc_coexist
 908                 *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl)
 909 {
 910         if (sw_dac_swing_on)
 911                 halbtc8192e2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
 912         else
 913                 halbtc8192e2ant_set_dac_swing_reg(btcoexist, 0x18);
 914 }
 915
 916
 917 void halbtc8192e2ant_dac_swing(IN struct btc_coexist *btcoexist,
 918         IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl)
 919 {
 920         coex_dm->cur_dac_swing_on = dac_swing_on;
 921         coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
 922
 923         if (!force_exec) {
 924                 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
 925                     (coex_dm->pre_dac_swing_lvl ==
 926                      coex_dm->cur_dac_swing_lvl))
 927                         return;
 928         }
 929         delay_ms(30);
 930         halbtc8192e2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on,
 931                         dac_swing_lvl);
 932
 933         coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
 934         coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
 935 }
 936
 937 void halbtc8192e2ant_set_adc_back_off(IN struct btc_coexist *btcoexist,
 938                                       IN boolean adc_back_off)
 939 {
 940         if (adc_back_off) {
 941                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 942                             "[BTCoex], BB BackOff Level On!\n");
 943                 BTC_TRACE(trace_buf);
 944                 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x3);
 945         } else {
 946                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 947                             "[BTCoex], BB BackOff Level Off!\n");
 948                 BTC_TRACE(trace_buf);
 949                 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x1);
 950         }
 951 }
 952
 953 void halbtc8192e2ant_adc_back_off(IN struct btc_coexist *btcoexist,
 954                           IN boolean force_exec, IN boolean adc_back_off)
 955 {
 956         coex_dm->cur_adc_back_off = adc_back_off;
 957
 958         if (!force_exec) {
 959                 if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off)
 960                         return;
 961         }
 962         halbtc8192e2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off);
 963
 964         coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off;
 965 }
 966
 967 void halbtc8192e2ant_set_agc_table(IN struct btc_coexist *btcoexist,
 968                                    IN boolean agc_table_en)
 969 {
 970         /* =================BB AGC Gain Table */
 971         if (agc_table_en) {
 972                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 973                             "[BTCoex], BB Agc Table On!\n");
 974                 BTC_TRACE(trace_buf);
 975                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001);
 976                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001);
 977                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001);
 978                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001);
 979                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001);
 980                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001);
 981         } else {
 982                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 983                             "[BTCoex], BB Agc Table Off!\n");
 984                 BTC_TRACE(trace_buf);
 985                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
 986                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
 987                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
 988                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
 989                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
 990                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
 991         }
 992 }
 993
 994 void halbtc8192e2ant_agc_table(IN struct btc_coexist *btcoexist,
 995                                IN boolean force_exec, IN boolean agc_table_en)
 996 {
 997         coex_dm->cur_agc_table_en = agc_table_en;
 998
 999         if (!force_exec) {
1000                 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
1001                         return;
1002         }
1003         halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en);
1004
1005         coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
1006 }
1007
1008 void halbtc8192e2ant_set_coex_table(IN struct btc_coexist *btcoexist,
1009             IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
1010 {
1011         btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
1012
1013         btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
1014
1015         btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
1016
1017         btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
1018 }
1019
1020 void halbtc8192e2ant_coex_table(IN struct btc_coexist *btcoexist,
1021                         IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
1022                                 IN u32 val0x6c8, IN u8 val0x6cc)
1023 {
1024         coex_dm->cur_val0x6c0 = val0x6c0;
1025         coex_dm->cur_val0x6c4 = val0x6c4;
1026         coex_dm->cur_val0x6c8 = val0x6c8;
1027         coex_dm->cur_val0x6cc = val0x6cc;
1028
1029         if (!force_exec) {
1030                 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1031                     (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1032                     (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1033                     (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1034                         return;
1035         }
1036         halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
1037                                        val0x6cc);
1038
1039         coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1040         coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1041         coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1042         coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1043 }
1044
1045 void halbtc8192e2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
1046                 IN boolean force_exec, IN u8 type)
1047 {
1048         switch (type) {
1049         case 0:
1050                 halbtc8192e2ant_coex_table(btcoexist, force_exec,
1051                                    0x55555555, 0x5a5a5a5a, 0xffffff, 0x3);
1052                 break;
1053         case 1:
1054                 halbtc8192e2ant_coex_table(btcoexist, force_exec,
1055                                    0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3);
1056                 break;
1057         case 2:
1058                 halbtc8192e2ant_coex_table(btcoexist, force_exec,
1059                                    0x55555555, 0x5ffb5ffb, 0xffffff, 0x3);
1060                 break;
1061         case 3:
1062                 halbtc8192e2ant_coex_table(btcoexist, force_exec,
1063                                    0x5fdf5fdf, 0x5fdb5fdb, 0xffffff, 0x3);
1064                 break;
1065         case 4:
1066                 halbtc8192e2ant_coex_table(btcoexist, force_exec,
1067                                    0xdfffdfff, 0x5ffb5ffb, 0xffffff, 0x3);
1068                 break;
1069
1070         default:
1071                 break;
1072         }
1073 }
1074
1075 void halbtc8192e2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1076                 IN boolean enable)
1077 {
1078         u8                      h2c_parameter[1] = {0};
1079
1080         if (enable) {
1081                 h2c_parameter[0] |= BIT(0);             /* function enable */
1082         }
1083
1084         btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1085 }
1086
1087 void halbtc8192e2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1088                                      IN boolean force_exec, IN boolean enable)
1089 {
1090         coex_dm->cur_ignore_wlan_act = enable;
1091
1092         if (!force_exec) {
1093                 if (coex_dm->pre_ignore_wlan_act ==
1094                     coex_dm->cur_ignore_wlan_act)
1095                         return;
1096         }
1097         halbtc8192e2ant_set_fw_ignore_wlan_act(btcoexist, enable);
1098
1099         coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1100 }
1101
1102 void halbtc8192e2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
1103            IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
1104 {
1105         u8                      h2c_parameter[5] = {0};
1106
1107         h2c_parameter[0] = byte1;
1108         h2c_parameter[1] = byte2;
1109         h2c_parameter[2] = byte3;
1110         h2c_parameter[3] = byte4;
1111         h2c_parameter[4] = byte5;
1112
1113         coex_dm->ps_tdma_para[0] = byte1;
1114         coex_dm->ps_tdma_para[1] = byte2;
1115         coex_dm->ps_tdma_para[2] = byte3;
1116         coex_dm->ps_tdma_para[3] = byte4;
1117         coex_dm->ps_tdma_para[4] = byte5;
1118
1119         btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1120 }
1121
1122 void halbtc8192e2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
1123                            IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
1124                            IN boolean limited_dig, IN boolean bt_lna_constrain)
1125 {
1126         /*
1127         u32     wifi_bw;
1128
1129         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
1130
1131         if(BTC_WIFI_BW_HT40 != wifi_bw)
1132         {
1133                 if (shrink_rx_lpf)
1134                         shrink_rx_lpf = false;
1135         }
1136         */
1137
1138         halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1139         /* halbtc8192e2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); */
1140 }
1141
1142 void halbtc8192e2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
1143                            IN boolean agc_table_shift, IN boolean adc_back_off,
1144                            IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
1145 {
1146         halbtc8192e2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift);
1147         /* halbtc8192e2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */
1148         halbtc8192e2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1149                                   dac_swing_lvl);
1150 }
1151
1152 void halbtc8192e2ant_set_ant_path(IN struct btc_coexist *btcoexist,
1153           IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off)
1154 {
1155         u32                     u32tmp = 0;
1156
1157         if (init_hwcfg) {
1158                 btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24);
1159                 btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700);
1160                 if (btcoexist->chip_interface == BTC_INTF_USB)
1161                         btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
1162                 else
1163                         btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
1164
1165                 /* 0x4c[27][24]='00', Set Antenna to BB */
1166                 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1167                 u32tmp &= ~BIT(24);
1168                 u32tmp &= ~BIT(27);
1169                 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
1170         } else if (wifi_off) {
1171                 if (btcoexist->chip_interface == BTC_INTF_USB)
1172                         btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
1173                 else
1174                         btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
1175
1176                 /* 0x4c[27][24]='11', Set Antenna to BT, 0x64[8:7]=0, 0x64[2]=1 */
1177                 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1178                 u32tmp |= BIT(24);
1179                 u32tmp |= BIT(27);
1180                 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
1181         }
1182
1183         /* ext switch setting */
1184         switch (ant_pos_type) {
1185         case BTC_ANT_PATH_WIFI:
1186                 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1187                 break;
1188         case BTC_ANT_PATH_BT:
1189                 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
1190                 break;
1191         default:
1192         case BTC_ANT_PATH_PTA:
1193                 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1194                 break;
1195         }
1196 }
1197
1198 void halbtc8192e2ant_ps_tdma(IN struct btc_coexist *btcoexist,
1199                      IN boolean force_exec, IN boolean turn_on, IN u8 type)
1200 {
1201         coex_dm->cur_ps_tdma_on = turn_on;
1202         coex_dm->cur_ps_tdma = type;
1203
1204         if (!force_exec) {
1205                 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1206                     (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1207                         return;
1208         }
1209         if (turn_on) {
1210                 switch (type) {
1211                 case 1:
1212                 default:
1213                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1214                                                       0x1a, 0x1a, 0xe1, 0x90);
1215                         break;
1216                 case 2:
1217                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1218                                                       0x12, 0x12, 0xe1, 0x90);
1219                         break;
1220                 case 3:
1221                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1222                                                       0x1c, 0x3, 0xf1, 0x90);
1223                         break;
1224                 case 4:
1225                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1226                                                       0x10, 0x3, 0xf1, 0x90);
1227                         break;
1228                 case 5:
1229                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1230                                                       0x1a, 0x1a, 0x60, 0x90);
1231                         break;
1232                 case 6:
1233                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1234                                                       0x12, 0x12, 0x60, 0x90);
1235                         break;
1236                 case 7:
1237                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1238                                                       0x1c, 0x3, 0x70, 0x90);
1239                         break;
1240                 case 8:
1241                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xa3,
1242                                                       0x10, 0x3, 0x70, 0x90);
1243                         break;
1244                 case 9:
1245                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1246                                                       0x1a, 0x1a, 0xe1, 0x10);
1247                         break;
1248                 case 10:
1249                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1250                                                       0x12, 0x12, 0xe1, 0x10);
1251                         break;
1252                 case 11:
1253                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1254                                                       0x1c, 0x3, 0xf1, 0x10);
1255                         break;
1256                 case 12:
1257                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1258                                                       0x10, 0x3, 0xf1, 0x10);
1259                         break;
1260                 case 13:
1261                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1262                                                       0x1a, 0x1a, 0xe0, 0x10);
1263                         break;
1264                 case 14:
1265                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1266                                                       0x12, 0x12, 0xe0, 0x10);
1267                         break;
1268                 case 15:
1269                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1270                                                       0x1c, 0x3, 0xf0, 0x10);
1271                         break;
1272                 case 16:
1273                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1274                                                       0x12, 0x3, 0xf0, 0x10);
1275                         break;
1276                 case 17:
1277                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61,
1278                                                       0x20, 0x03, 0x10, 0x10);
1279                         break;
1280                 case 18:
1281                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1282                                                       0x5, 0x5, 0xe1, 0x90);
1283                         break;
1284                 case 19:
1285                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1286                                                       0x25, 0x25, 0xe1, 0x90);
1287                         break;
1288                 case 20:
1289                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1290                                                       0x25, 0x25, 0x60, 0x90);
1291                         break;
1292                 case 21:
1293                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1294                                                       0x15, 0x03, 0x70, 0x90);
1295                         break;
1296                 case 71:
1297                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3,
1298                                                       0x1a, 0x1a, 0xe1, 0x90);
1299                         break;
1300                 }
1301         } else {
1302                 /* disable PS tdma */
1303                 switch (type) {
1304                 default:
1305                 case 0:  /* ANT2PTA, 0x778=1 */
1306                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x8,
1307                                                       0x0, 0x0, 0x0, 0x0);
1308                         halbtc8192e2ant_set_ant_path(btcoexist,
1309                                              BTC_ANT_PATH_PTA, false, false);
1310                         break;
1311                 case 1:  /* ANT2BT, 0x778=3 */
1312                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x0,
1313                                                       0x0, 0x0, 0x8, 0x0);
1314                         delay_ms(5);
1315                         halbtc8192e2ant_set_ant_path(btcoexist,
1316                                              BTC_ANT_PATH_BT, false, false);
1317                         break;
1318
1319                 }
1320         }
1321
1322         /* update pre state */
1323         coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1324         coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1325 }
1326
1327 void halbtc8192e2ant_set_switch_ss_type(IN struct btc_coexist *btcoexist,
1328                                         IN u8 ss_type)
1329 {
1330         u8      mimo_ps = BTC_MIMO_PS_DYNAMIC;
1331         u32     dis_ra_mask = 0x0;
1332
1333         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1334                     "[BTCoex], REAL set SS Type = %d\n", ss_type);
1335         BTC_TRACE(trace_buf);
1336
1337         dis_ra_mask = halbtc8192e2ant_decide_ra_mask(btcoexist, ss_type,
1338                         coex_dm->cur_ra_mask_type);
1339         halbtc8192e2ant_update_ra_mask(btcoexist, FORCE_EXEC, dis_ra_mask);
1340
1341         if (ss_type == 1) {
1342                 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1343                 /* switch ofdm path */
1344                 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
1345                 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
1346                 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111);
1347                 /* switch cck patch */
1348                 /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1); */
1349                 /* btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81); */
1350                 mimo_ps = BTC_MIMO_PS_STATIC;
1351         } else if (ss_type == 2) {
1352                 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
1353                 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
1354                 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
1355                 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
1356                 /* remove, if 0xe77[2]=0x0 then CCK will fail, advised by Jenyu */
1357                 /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0); */
1358                 /* btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41); */
1359                 mimo_ps = BTC_MIMO_PS_DYNAMIC;
1360         }
1361
1362         btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS,
1363                            &mimo_ps);   /* set rx 1ss or 2ss */
1364 }
1365
1366 void halbtc8192e2ant_switch_ss_type(IN struct btc_coexist *btcoexist,
1367                                     IN boolean force_exec, IN u8 new_ss_type)
1368 {
1369         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1370                     "[BTCoex], %s Switch SS Type = %d\n",
1371                     (force_exec ? "force to" : ""), new_ss_type);
1372         BTC_TRACE(trace_buf);
1373         coex_dm->cur_ss_type = new_ss_type;
1374
1375         if (!force_exec) {
1376                 if (coex_dm->pre_ss_type == coex_dm->cur_ss_type)
1377                         return;
1378         }
1379         halbtc8192e2ant_set_switch_ss_type(btcoexist, coex_dm->cur_ss_type);
1380
1381         coex_dm->pre_ss_type = coex_dm->cur_ss_type;
1382 }
1383
1384 void halbtc8192e2ant_coex_all_off(IN struct btc_coexist *btcoexist)
1385 {
1386         /* fw all off */
1387         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1388         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1389         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1390
1391         /* sw all off */
1392         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1393         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1394
1395         /* hw all off */
1396         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1397 }
1398
1399 void halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
1400 {
1401         /* force to reset coex mechanism */
1402
1403         halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1404         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
1405         halbtc8192e2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0);
1406
1407         halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
1408         halbtc8192e2ant_switch_ss_type(btcoexist, FORCE_EXEC, 2);
1409
1410         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1411         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1412 }
1413
1414 void halbtc8192e2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
1415 {
1416         boolean low_pwr_disable = true;
1417
1418         btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1419                            &low_pwr_disable);
1420
1421         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
1422
1423         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
1424         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1425         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1426         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1427
1428         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1429         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1430 }
1431
1432 boolean halbtc8192e2ant_is_common_action(IN struct btc_coexist *btcoexist)
1433 {
1434         struct  btc_bt_link_info        *bt_link_info = &btcoexist->bt_link_info;
1435         boolean                 common = false, wifi_connected = false, wifi_busy = false;
1436         boolean                 bt_hs_on = false, low_pwr_disable = false;
1437
1438         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
1439         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1440                            &wifi_connected);
1441         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1442
1443         if (bt_link_info->sco_exist || bt_link_info->hid_exist)
1444                 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
1445         else
1446                 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
1447
1448         if (!wifi_connected) {
1449                 low_pwr_disable = false;
1450                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1451                                    &low_pwr_disable);
1452
1453                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1454                             "[BTCoex], Wifi non-connected idle!!\n");
1455                 BTC_TRACE(trace_buf);
1456
1457                 if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1458                      coex_dm->bt_status) ||
1459                     (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1460                      coex_dm->bt_status)) {
1461                         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC,
1462                                                        2);
1463                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1464                                                              NORMAL_EXEC, 1);
1465                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1466                                                 0);
1467                 } else {
1468                         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC,
1469                                                        1);
1470                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1471                                                              NORMAL_EXEC, 0);
1472                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1473                                                 1);
1474                 }
1475
1476                 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1477                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1478
1479                 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false,
1480                                               false);
1481                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
1482                                               0x18);
1483
1484                 common = true;
1485         } else {
1486                 if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1487                     coex_dm->bt_status) {
1488                         low_pwr_disable = false;
1489                         btcoexist->btc_set(btcoexist,
1490                                            BTC_SET_ACT_DISABLE_LOW_POWER,
1491                                            &low_pwr_disable);
1492
1493                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1494                                 "[BTCoex], Wifi connected + BT non connected-idle!!\n");
1495                         BTC_TRACE(trace_buf);
1496
1497                         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC,
1498                                                        2);
1499                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1500                                                              NORMAL_EXEC, 1);
1501                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1502                                                 0);
1503                         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
1504                                                          6);
1505                         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1506
1507                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
1508                                                       false, false);
1509                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
1510                                                       false, 0x18);
1511
1512                         common = true;
1513                 } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1514                            coex_dm->bt_status) {
1515                         low_pwr_disable = true;
1516                         btcoexist->btc_set(btcoexist,
1517                                            BTC_SET_ACT_DISABLE_LOW_POWER,
1518                                            &low_pwr_disable);
1519
1520                         if (bt_hs_on)
1521                                 return false;
1522                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1523                                 "[BTCoex], Wifi connected + BT connected-idle!!\n");
1524                         BTC_TRACE(trace_buf);
1525
1526                         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC,
1527                                                        2);
1528                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1529                                                              NORMAL_EXEC, 1);
1530                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1531                                                 0);
1532                         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
1533                                                          6);
1534                         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1535
1536                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
1537                                                       false, false);
1538                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
1539                                                       false, 0x18);
1540
1541                         common = true;
1542                 } else {
1543                         low_pwr_disable = true;
1544                         btcoexist->btc_set(btcoexist,
1545                                            BTC_SET_ACT_DISABLE_LOW_POWER,
1546                                            &low_pwr_disable);
1547
1548                         if (wifi_busy) {
1549                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1550                                         "[BTCoex], Wifi Connected-Busy + BT Busy!!\n");
1551                                 BTC_TRACE(trace_buf);
1552                                 common = false;
1553                         } else {
1554                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1555                                         "[BTCoex], Wifi Connected-Idle + BT Busy!!\n");
1556                                 BTC_TRACE(trace_buf);
1557
1558                                 halbtc8192e2ant_switch_ss_type(btcoexist,
1559                                                                NORMAL_EXEC, 1);
1560                                 halbtc8192e2ant_coex_table_with_type(btcoexist,
1561                                                              NORMAL_EXEC, 2);
1562                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1563                                                         true, 21);
1564                                 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist,
1565                                                          NORMAL_EXEC, 6);
1566                                 halbtc8192e2ant_dec_bt_pwr(btcoexist,
1567                                                            NORMAL_EXEC, 0);
1568                                 halbtc8192e2ant_sw_mechanism1(btcoexist, false,
1569                                                       false, false, false);
1570                                 halbtc8192e2ant_sw_mechanism2(btcoexist, false,
1571                                                       false, false, 0x18);
1572                                 common = true;
1573                         }
1574                 }
1575         }
1576
1577         return common;
1578 }
1579 void halbtc8192e2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist,
1580                 IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval)
1581 {
1582         static s32              up, dn, m, n, wait_count;
1583         s32                     result;   /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
1584         u8                      retry_count = 0;
1585
1586
1587         if (!coex_dm->auto_tdma_adjust) {
1588                 coex_dm->auto_tdma_adjust = true;
1589                 {
1590                         if (sco_hid) {
1591                                 if (tx_pause) {
1592                                         if (max_interval == 1) {
1593                                                 halbtc8192e2ant_ps_tdma(
1594                                                         btcoexist, NORMAL_EXEC,
1595                                                         true, 13);
1596                                                 coex_dm->ps_tdma_du_adj_type =
1597                                                         13;
1598                                         } else if (max_interval == 2) {
1599                                                 halbtc8192e2ant_ps_tdma(
1600                                                         btcoexist, NORMAL_EXEC,
1601                                                         true, 14);
1602                                                 coex_dm->ps_tdma_du_adj_type =
1603                                                         14;
1604                                         } else if (max_interval == 3) {
1605                                                 halbtc8192e2ant_ps_tdma(
1606                                                         btcoexist, NORMAL_EXEC,
1607                                                         true, 15);
1608                                                 coex_dm->ps_tdma_du_adj_type =
1609                                                         15;
1610                                         } else {
1611                                                 halbtc8192e2ant_ps_tdma(
1612                                                         btcoexist, NORMAL_EXEC,
1613                                                         true, 15);
1614                                                 coex_dm->ps_tdma_du_adj_type =
1615                                                         15;
1616                                         }
1617                                 } else {
1618                                         if (max_interval == 1) {
1619                                                 halbtc8192e2ant_ps_tdma(
1620                                                         btcoexist, NORMAL_EXEC,
1621                                                         true, 9);
1622                                                 coex_dm->ps_tdma_du_adj_type =
1623                                                         9;
1624                                         } else if (max_interval == 2) {
1625                                                 halbtc8192e2ant_ps_tdma(
1626                                                         btcoexist, NORMAL_EXEC,
1627                                                         true, 10);
1628                                                 coex_dm->ps_tdma_du_adj_type =
1629                                                         10;
1630                                         } else if (max_interval == 3) {
1631                                                 halbtc8192e2ant_ps_tdma(
1632                                                         btcoexist, NORMAL_EXEC,
1633                                                         true, 11);
1634                                                 coex_dm->ps_tdma_du_adj_type =
1635                                                         11;
1636                                         } else {
1637                                                 halbtc8192e2ant_ps_tdma(
1638                                                         btcoexist, NORMAL_EXEC,
1639                                                         true, 11);
1640                                                 coex_dm->ps_tdma_du_adj_type =
1641                                                         11;
1642                                         }
1643                                 }
1644                         } else {
1645                                 if (tx_pause) {
1646                                         if (max_interval == 1) {
1647                                                 halbtc8192e2ant_ps_tdma(
1648                                                         btcoexist, NORMAL_EXEC,
1649                                                         true, 5);
1650                                                 coex_dm->ps_tdma_du_adj_type =
1651                                                         5;
1652                                         } else if (max_interval == 2) {
1653                                                 halbtc8192e2ant_ps_tdma(
1654                                                         btcoexist, NORMAL_EXEC,
1655                                                         true, 6);
1656                                                 coex_dm->ps_tdma_du_adj_type =
1657                                                         6;
1658                                         } else if (max_interval == 3) {
1659                                                 halbtc8192e2ant_ps_tdma(
1660                                                         btcoexist, NORMAL_EXEC,
1661                                                         true, 7);
1662                                                 coex_dm->ps_tdma_du_adj_type =
1663                                                         7;
1664                                         } else {
1665                                                 halbtc8192e2ant_ps_tdma(
1666                                                         btcoexist, NORMAL_EXEC,
1667                                                         true, 7);
1668                                                 coex_dm->ps_tdma_du_adj_type =
1669                                                         7;
1670                                         }
1671                                 } else {
1672                                         if (max_interval == 1) {
1673                                                 halbtc8192e2ant_ps_tdma(
1674                                                         btcoexist, NORMAL_EXEC,
1675                                                         true, 1);
1676                                                 coex_dm->ps_tdma_du_adj_type =
1677                                                         1;
1678                                         } else if (max_interval == 2) {
1679                                                 halbtc8192e2ant_ps_tdma(
1680                                                         btcoexist, NORMAL_EXEC,
1681                                                         true, 2);
1682                                                 coex_dm->ps_tdma_du_adj_type =
1683                                                         2;
1684                                         } else if (max_interval == 3) {
1685                                                 halbtc8192e2ant_ps_tdma(
1686                                                         btcoexist, NORMAL_EXEC,
1687                                                         true, 3);
1688                                                 coex_dm->ps_tdma_du_adj_type =
1689                                                         3;
1690                                         } else {
1691                                                 halbtc8192e2ant_ps_tdma(
1692                                                         btcoexist, NORMAL_EXEC,
1693                                                         true, 3);
1694                                                 coex_dm->ps_tdma_du_adj_type =
1695                                                         3;
1696                                         }
1697                                 }
1698                         }
1699                 }
1700                 /* ============ */
1701                 up = 0;
1702                 dn = 0;
1703                 m = 1;
1704                 n = 3;
1705                 result = 0;
1706                 wait_count = 0;
1707         } else {
1708                 /* accquire the BT TRx retry count from BT_Info byte2 */
1709                 retry_count = coex_sta->bt_retry_cnt;
1710                 result = 0;
1711                 wait_count++;
1712
1713                 if (retry_count ==
1714                     0) { /* no retry in the last 2-second duration */
1715                         up++;
1716                         dn--;
1717
1718                         if (dn <= 0)
1719                                 dn = 0;
1720
1721                         if (up >= n) {  /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */
1722                                 wait_count = 0;
1723                                 n = 3;
1724                                 up = 0;
1725                                 dn = 0;
1726                                 result = 1;
1727                         }
1728                 } else if (retry_count <=
1729                            3) { /* <=3 retry in the last 2-second duration */
1730                         up--;
1731                         dn++;
1732
1733                         if (up <= 0)
1734                                 up = 0;
1735
1736                         if (dn == 2) {  /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */
1737                                 if (wait_count <= 2)
1738                                         m++; /* to avoid loop between the two levels */
1739                                 else
1740                                         m = 1;
1741
1742                                 if (m >= 20)  /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
1743                                         m = 20;
1744
1745                                 n = 3 * m;
1746                                 up = 0;
1747                                 dn = 0;
1748                                 wait_count = 0;
1749                                 result = -1;
1750                         }
1751                 } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */
1752                         if (wait_count == 1)
1753                                 m++; /* to avoid loop between the two levels */
1754                         else
1755                                 m = 1;
1756
1757                         if (m >= 20)  /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
1758                                 m = 20;
1759
1760                         n = 3 * m;
1761                         up = 0;
1762                         dn = 0;
1763                         wait_count = 0;
1764                         result = -1;
1765                 }
1766
1767                 if (max_interval == 1) {
1768                         if (tx_pause) {
1769                                 if (coex_dm->cur_ps_tdma == 71) {
1770                                         halbtc8192e2ant_ps_tdma(btcoexist,
1771                                                         NORMAL_EXEC, true, 5);
1772                                         coex_dm->ps_tdma_du_adj_type = 5;
1773                                 } else if (coex_dm->cur_ps_tdma == 1) {
1774                                         halbtc8192e2ant_ps_tdma(btcoexist,
1775                                                         NORMAL_EXEC, true, 5);
1776                                         coex_dm->ps_tdma_du_adj_type = 5;
1777                                 } else if (coex_dm->cur_ps_tdma == 2) {
1778                                         halbtc8192e2ant_ps_tdma(btcoexist,
1779                                                         NORMAL_EXEC, true, 6);
1780                                         coex_dm->ps_tdma_du_adj_type = 6;
1781                                 } else if (coex_dm->cur_ps_tdma == 3) {
1782                                         halbtc8192e2ant_ps_tdma(btcoexist,
1783                                                         NORMAL_EXEC, true, 7);
1784                                         coex_dm->ps_tdma_du_adj_type = 7;
1785                                 } else if (coex_dm->cur_ps_tdma == 4) {
1786                                         halbtc8192e2ant_ps_tdma(btcoexist,
1787                                                         NORMAL_EXEC, true, 8);
1788                                         coex_dm->ps_tdma_du_adj_type = 8;
1789                                 }
1790                                 if (coex_dm->cur_ps_tdma == 9) {
1791                                         halbtc8192e2ant_ps_tdma(btcoexist,
1792                                                         NORMAL_EXEC, true, 13);
1793                                         coex_dm->ps_tdma_du_adj_type = 13;
1794                                 } else if (coex_dm->cur_ps_tdma == 10) {
1795                                         halbtc8192e2ant_ps_tdma(btcoexist,
1796                                                         NORMAL_EXEC, true, 14);
1797                                         coex_dm->ps_tdma_du_adj_type = 14;
1798                                 } else if (coex_dm->cur_ps_tdma == 11) {
1799                                         halbtc8192e2ant_ps_tdma(btcoexist,
1800                                                         NORMAL_EXEC, true, 15);
1801                                         coex_dm->ps_tdma_du_adj_type = 15;
1802                                 } else if (coex_dm->cur_ps_tdma == 12) {
1803                                         halbtc8192e2ant_ps_tdma(btcoexist,
1804                                                         NORMAL_EXEC, true, 16);
1805                                         coex_dm->ps_tdma_du_adj_type = 16;
1806                                 }
1807
1808                                 if (result == -1) {
1809                                         if (coex_dm->cur_ps_tdma == 5) {
1810                                                 halbtc8192e2ant_ps_tdma(
1811                                                         btcoexist, NORMAL_EXEC,
1812                                                         true, 6);
1813                                                 coex_dm->ps_tdma_du_adj_type =
1814                                                         6;
1815                                         } else if (coex_dm->cur_ps_tdma == 6) {
1816                                                 halbtc8192e2ant_ps_tdma(
1817                                                         btcoexist, NORMAL_EXEC,
1818                                                         true, 7);
1819                                                 coex_dm->ps_tdma_du_adj_type =
1820                                                         7;
1821                                         } else if (coex_dm->cur_ps_tdma == 7) {
1822                                                 halbtc8192e2ant_ps_tdma(
1823                                                         btcoexist, NORMAL_EXEC,
1824                                                         true, 8);
1825                                                 coex_dm->ps_tdma_du_adj_type =
1826                                                         8;
1827                                         } else if (coex_dm->cur_ps_tdma == 13) {
1828                                                 halbtc8192e2ant_ps_tdma(
1829                                                         btcoexist, NORMAL_EXEC,
1830                                                         true, 14);
1831                                                 coex_dm->ps_tdma_du_adj_type =
1832                                                         14;
1833                                         } else if (coex_dm->cur_ps_tdma == 14) {
1834                                                 halbtc8192e2ant_ps_tdma(
1835                                                         btcoexist, NORMAL_EXEC,
1836                                                         true, 15);
1837                                                 coex_dm->ps_tdma_du_adj_type =
1838                                                         15;
1839                                         } else if (coex_dm->cur_ps_tdma == 15) {
1840                                                 halbtc8192e2ant_ps_tdma(
1841                                                         btcoexist, NORMAL_EXEC,
1842                                                         true, 16);
1843                                                 coex_dm->ps_tdma_du_adj_type =
1844                                                         16;
1845                                         }
1846                                 } else if (result == 1) {
1847                                         if (coex_dm->cur_ps_tdma == 8) {
1848                                                 halbtc8192e2ant_ps_tdma(
1849                                                         btcoexist, NORMAL_EXEC,
1850                                                         true, 7);
1851                                                 coex_dm->ps_tdma_du_adj_type =
1852                                                         7;
1853                                         } else if (coex_dm->cur_ps_tdma == 7) {
1854                                                 halbtc8192e2ant_ps_tdma(
1855                                                         btcoexist, NORMAL_EXEC,
1856                                                         true, 6);
1857                                                 coex_dm->ps_tdma_du_adj_type =
1858                                                         6;
1859                                         } else if (coex_dm->cur_ps_tdma == 6) {
1860                                                 halbtc8192e2ant_ps_tdma(
1861                                                         btcoexist, NORMAL_EXEC,
1862                                                         true, 5);
1863                                                 coex_dm->ps_tdma_du_adj_type =
1864                                                         5;
1865                                         } else if (coex_dm->cur_ps_tdma == 16) {
1866                                                 halbtc8192e2ant_ps_tdma(
1867                                                         btcoexist, NORMAL_EXEC,
1868                                                         true, 15);
1869                                                 coex_dm->ps_tdma_du_adj_type =
1870                                                         15;
1871                                         } else if (coex_dm->cur_ps_tdma == 15) {
1872                                                 halbtc8192e2ant_ps_tdma(
1873                                                         btcoexist, NORMAL_EXEC,
1874                                                         true, 14);
1875                                                 coex_dm->ps_tdma_du_adj_type =
1876                                                         14;
1877                                         } else if (coex_dm->cur_ps_tdma == 14) {
1878                                                 halbtc8192e2ant_ps_tdma(
1879                                                         btcoexist, NORMAL_EXEC,
1880                                                         true, 13);
1881                                                 coex_dm->ps_tdma_du_adj_type =
1882                                                         13;
1883                                         }
1884                                 }
1885                         } else {
1886                                 if (coex_dm->cur_ps_tdma == 5) {
1887                                         halbtc8192e2ant_ps_tdma(btcoexist,
1888                                                         NORMAL_EXEC, true, 71);
1889                                         coex_dm->ps_tdma_du_adj_type = 71;
1890                                 } else if (coex_dm->cur_ps_tdma == 6) {
1891                                         halbtc8192e2ant_ps_tdma(btcoexist,
1892                                                         NORMAL_EXEC, true, 2);
1893                                         coex_dm->ps_tdma_du_adj_type = 2;
1894                                 } else if (coex_dm->cur_ps_tdma == 7) {
1895                                         halbtc8192e2ant_ps_tdma(btcoexist,
1896                                                         NORMAL_EXEC, true, 3);
1897                                         coex_dm->ps_tdma_du_adj_type = 3;
1898                                 } else if (coex_dm->cur_ps_tdma == 8) {
1899                                         halbtc8192e2ant_ps_tdma(btcoexist,
1900                                                         NORMAL_EXEC, true, 4);
1901                                         coex_dm->ps_tdma_du_adj_type = 4;
1902                                 }
1903                                 if (coex_dm->cur_ps_tdma == 13) {
1904                                         halbtc8192e2ant_ps_tdma(btcoexist,
1905                                                         NORMAL_EXEC, true, 9);
1906                                         coex_dm->ps_tdma_du_adj_type = 9;
1907                                 } else if (coex_dm->cur_ps_tdma == 14) {
1908                                         halbtc8192e2ant_ps_tdma(btcoexist,
1909                                                         NORMAL_EXEC, true, 10);
1910                                         coex_dm->ps_tdma_du_adj_type = 10;
1911                                 } else if (coex_dm->cur_ps_tdma == 15) {
1912                                         halbtc8192e2ant_ps_tdma(btcoexist,
1913                                                         NORMAL_EXEC, true, 11);
1914                                         coex_dm->ps_tdma_du_adj_type = 11;
1915                                 } else if (coex_dm->cur_ps_tdma == 16) {
1916                                         halbtc8192e2ant_ps_tdma(btcoexist,
1917                                                         NORMAL_EXEC, true, 12);
1918                                         coex_dm->ps_tdma_du_adj_type = 12;
1919                                 }
1920
1921                                 if (result == -1) {
1922                                         if (coex_dm->cur_ps_tdma == 71) {
1923                                                 halbtc8192e2ant_ps_tdma(
1924                                                         btcoexist, NORMAL_EXEC,
1925                                                         true, 1);
1926                                                 coex_dm->ps_tdma_du_adj_type =
1927                                                         1;
1928                                         } else if (coex_dm->cur_ps_tdma == 1) {
1929                                                 halbtc8192e2ant_ps_tdma(
1930                                                         btcoexist, NORMAL_EXEC,
1931                                                         true, 2);
1932                                                 coex_dm->ps_tdma_du_adj_type =
1933                                                         2;
1934                                         } else if (coex_dm->cur_ps_tdma == 2) {
1935                                                 halbtc8192e2ant_ps_tdma(
1936                                                         btcoexist, NORMAL_EXEC,
1937                                                         true, 3);
1938                                                 coex_dm->ps_tdma_du_adj_type =
1939                                                         3;
1940                                         } else if (coex_dm->cur_ps_tdma == 3) {
1941                                                 halbtc8192e2ant_ps_tdma(
1942                                                         btcoexist, NORMAL_EXEC,
1943                                                         true, 4);
1944                                                 coex_dm->ps_tdma_du_adj_type =
1945                                                         4;
1946                                         } else if (coex_dm->cur_ps_tdma == 9) {
1947                                                 halbtc8192e2ant_ps_tdma(
1948                                                         btcoexist, NORMAL_EXEC,
1949                                                         true, 10);
1950                                                 coex_dm->ps_tdma_du_adj_type =
1951                                                         10;
1952                                         } else if (coex_dm->cur_ps_tdma == 10) {
1953                                                 halbtc8192e2ant_ps_tdma(
1954                                                         btcoexist, NORMAL_EXEC,
1955                                                         true, 11);
1956                                                 coex_dm->ps_tdma_du_adj_type =
1957                                                         11;
1958                                         } else if (coex_dm->cur_ps_tdma == 11) {
1959                                                 halbtc8192e2ant_ps_tdma(
1960                                                         btcoexist, NORMAL_EXEC,
1961                                                         true, 12);
1962                                                 coex_dm->ps_tdma_du_adj_type =
1963                                                         12;
1964                                         }
1965                                 } else if (result == 1) {
1966                                         if (coex_dm->cur_ps_tdma == 4) {
1967                                                 halbtc8192e2ant_ps_tdma(
1968                                                         btcoexist, NORMAL_EXEC,
1969                                                         true, 3);
1970                                                 coex_dm->ps_tdma_du_adj_type =
1971                                                         3;
1972                                         } else if (coex_dm->cur_ps_tdma == 3) {
1973                                                 halbtc8192e2ant_ps_tdma(
1974                                                         btcoexist, NORMAL_EXEC,
1975                                                         true, 2);
1976                                                 coex_dm->ps_tdma_du_adj_type =
1977                                                         2;
1978                                         } else if (coex_dm->cur_ps_tdma == 2) {
1979                                                 halbtc8192e2ant_ps_tdma(
1980                                                         btcoexist, NORMAL_EXEC,
1981                                                         true, 1);
1982                                                 coex_dm->ps_tdma_du_adj_type =
1983                                                         1;
1984                                         } else if (coex_dm->cur_ps_tdma == 1) {
1985                                                 halbtc8192e2ant_ps_tdma(
1986                                                         btcoexist, NORMAL_EXEC,
1987                                                         true, 71);
1988                                                 coex_dm->ps_tdma_du_adj_type =
1989                                                         71;
1990                                         } else if (coex_dm->cur_ps_tdma == 12) {
1991                                                 halbtc8192e2ant_ps_tdma(
1992                                                         btcoexist, NORMAL_EXEC,
1993                                                         true, 11);
1994                                                 coex_dm->ps_tdma_du_adj_type =
1995                                                         11;
1996                                         } else if (coex_dm->cur_ps_tdma == 11) {
1997                                                 halbtc8192e2ant_ps_tdma(
1998                                                         btcoexist, NORMAL_EXEC,
1999                                                         true, 10);
2000                                                 coex_dm->ps_tdma_du_adj_type =
2001                                                         10;
2002                                         } else if (coex_dm->cur_ps_tdma == 10) {
2003                                                 halbtc8192e2ant_ps_tdma(
2004                                                         btcoexist, NORMAL_EXEC,
2005                                                         true, 9);
2006                                                 coex_dm->ps_tdma_du_adj_type =
2007                                                         9;
2008                                         }
2009                                 }
2010                         }
2011                 } else if (max_interval == 2) {
2012                         if (tx_pause) {
2013                                 if (coex_dm->cur_ps_tdma == 1) {
2014                                         halbtc8192e2ant_ps_tdma(btcoexist,
2015                                                         NORMAL_EXEC, true, 6);
2016                                         coex_dm->ps_tdma_du_adj_type = 6;
2017                                 } else if (coex_dm->cur_ps_tdma == 2) {
2018                                         halbtc8192e2ant_ps_tdma(btcoexist,
2019                                                         NORMAL_EXEC, true, 6);
2020                                         coex_dm->ps_tdma_du_adj_type = 6;
2021                                 } else if (coex_dm->cur_ps_tdma == 3) {
2022                                         halbtc8192e2ant_ps_tdma(btcoexist,
2023                                                         NORMAL_EXEC, true, 7);
2024                                         coex_dm->ps_tdma_du_adj_type = 7;
2025                                 } else if (coex_dm->cur_ps_tdma == 4) {
2026                                         halbtc8192e2ant_ps_tdma(btcoexist,
2027                                                         NORMAL_EXEC, true, 8);
2028                                         coex_dm->ps_tdma_du_adj_type = 8;
2029                                 }
2030                                 if (coex_dm->cur_ps_tdma == 9) {
2031                                         halbtc8192e2ant_ps_tdma(btcoexist,
2032                                                         NORMAL_EXEC, true, 14);
2033                                         coex_dm->ps_tdma_du_adj_type = 14;
2034                                 } else if (coex_dm->cur_ps_tdma == 10) {
2035                                         halbtc8192e2ant_ps_tdma(btcoexist,
2036                                                         NORMAL_EXEC, true, 14);
2037                                         coex_dm->ps_tdma_du_adj_type = 14;
2038                                 } else if (coex_dm->cur_ps_tdma == 11) {
2039                                         halbtc8192e2ant_ps_tdma(btcoexist,
2040                                                         NORMAL_EXEC, true, 15);
2041                                         coex_dm->ps_tdma_du_adj_type = 15;
2042                                 } else if (coex_dm->cur_ps_tdma == 12) {
2043                                         halbtc8192e2ant_ps_tdma(btcoexist,
2044                                                         NORMAL_EXEC, true, 16);
2045                                         coex_dm->ps_tdma_du_adj_type = 16;
2046                                 }
2047                                 if (result == -1) {
2048                                         if (coex_dm->cur_ps_tdma == 5) {
2049                                                 halbtc8192e2ant_ps_tdma(
2050                                                         btcoexist, NORMAL_EXEC,
2051                                                         true, 6);
2052                                                 coex_dm->ps_tdma_du_adj_type =
2053                                                         6;
2054                                         } else if (coex_dm->cur_ps_tdma == 6) {
2055                                                 halbtc8192e2ant_ps_tdma(
2056                                                         btcoexist, NORMAL_EXEC,
2057                                                         true, 7);
2058                                                 coex_dm->ps_tdma_du_adj_type =
2059                                                         7;
2060                                         } else if (coex_dm->cur_ps_tdma == 7) {
2061                                                 halbtc8192e2ant_ps_tdma(
2062                                                         btcoexist, NORMAL_EXEC,
2063                                                         true, 8);
2064                                                 coex_dm->ps_tdma_du_adj_type =
2065                                                         8;
2066                                         } else if (coex_dm->cur_ps_tdma == 13) {
2067                                                 halbtc8192e2ant_ps_tdma(
2068                                                         btcoexist, NORMAL_EXEC,
2069                                                         true, 14);
2070                                                 coex_dm->ps_tdma_du_adj_type =
2071                                                         14;
2072                                         } else if (coex_dm->cur_ps_tdma == 14) {
2073                                                 halbtc8192e2ant_ps_tdma(
2074                                                         btcoexist, NORMAL_EXEC,
2075                                                         true, 15);
2076                                                 coex_dm->ps_tdma_du_adj_type =
2077                                                         15;
2078                                         } else if (coex_dm->cur_ps_tdma == 15) {
2079                                                 halbtc8192e2ant_ps_tdma(
2080                                                         btcoexist, NORMAL_EXEC,
2081                                                         true, 16);
2082                                                 coex_dm->ps_tdma_du_adj_type =
2083                                                         16;
2084                                         }
2085                                 } else if (result == 1) {
2086                                         if (coex_dm->cur_ps_tdma == 8) {
2087                                                 halbtc8192e2ant_ps_tdma(
2088                                                         btcoexist, NORMAL_EXEC,
2089                                                         true, 7);
2090                                                 coex_dm->ps_tdma_du_adj_type =
2091                                                         7;
2092                                         } else if (coex_dm->cur_ps_tdma == 7) {
2093                                                 halbtc8192e2ant_ps_tdma(
2094                                                         btcoexist, NORMAL_EXEC,
2095                                                         true, 6);
2096                                                 coex_dm->ps_tdma_du_adj_type =
2097                                                         6;
2098                                         } else if (coex_dm->cur_ps_tdma == 6) {
2099                                                 halbtc8192e2ant_ps_tdma(
2100                                                         btcoexist, NORMAL_EXEC,
2101                                                         true, 6);
2102                                                 coex_dm->ps_tdma_du_adj_type =
2103                                                         6;
2104                                         } else if (coex_dm->cur_ps_tdma == 16) {
2105                                                 halbtc8192e2ant_ps_tdma(
2106                                                         btcoexist, NORMAL_EXEC,
2107                                                         true, 15);
2108                                                 coex_dm->ps_tdma_du_adj_type =
2109                                                         15;
2110                                         } else if (coex_dm->cur_ps_tdma == 15) {
2111                                                 halbtc8192e2ant_ps_tdma(
2112                                                         btcoexist, NORMAL_EXEC,
2113                                                         true, 14);
2114                                                 coex_dm->ps_tdma_du_adj_type =
2115                                                         14;
2116                                         } else if (coex_dm->cur_ps_tdma == 14) {
2117                                                 halbtc8192e2ant_ps_tdma(
2118                                                         btcoexist, NORMAL_EXEC,
2119                                                         true, 14);
2120                                                 coex_dm->ps_tdma_du_adj_type =
2121                                                         14;
2122                                         }
2123                                 }
2124                         } else {
2125                                 if (coex_dm->cur_ps_tdma == 5) {
2126                                         halbtc8192e2ant_ps_tdma(btcoexist,
2127                                                         NORMAL_EXEC, true, 2);
2128                                         coex_dm->ps_tdma_du_adj_type = 2;
2129                                 } else if (coex_dm->cur_ps_tdma == 6) {
2130                                         halbtc8192e2ant_ps_tdma(btcoexist,
2131                                                         NORMAL_EXEC, true, 2);
2132                                         coex_dm->ps_tdma_du_adj_type = 2;
2133                                 } else if (coex_dm->cur_ps_tdma == 7) {
2134                                         halbtc8192e2ant_ps_tdma(btcoexist,
2135                                                         NORMAL_EXEC, true, 3);
2136                                         coex_dm->ps_tdma_du_adj_type = 3;
2137                                 } else if (coex_dm->cur_ps_tdma == 8) {
2138                                         halbtc8192e2ant_ps_tdma(btcoexist,
2139                                                         NORMAL_EXEC, true, 4);
2140                                         coex_dm->ps_tdma_du_adj_type = 4;
2141                                 }
2142                                 if (coex_dm->cur_ps_tdma == 13) {
2143                                         halbtc8192e2ant_ps_tdma(btcoexist,
2144                                                         NORMAL_EXEC, true, 10);
2145                                         coex_dm->ps_tdma_du_adj_type = 10;
2146                                 } else if (coex_dm->cur_ps_tdma == 14) {
2147                                         halbtc8192e2ant_ps_tdma(btcoexist,
2148                                                         NORMAL_EXEC, true, 10);
2149                                         coex_dm->ps_tdma_du_adj_type = 10;
2150                                 } else if (coex_dm->cur_ps_tdma == 15) {
2151                                         halbtc8192e2ant_ps_tdma(btcoexist,
2152                                                         NORMAL_EXEC, true, 11);
2153                                         coex_dm->ps_tdma_du_adj_type = 11;
2154                                 } else if (coex_dm->cur_ps_tdma == 16) {
2155                                         halbtc8192e2ant_ps_tdma(btcoexist,
2156                                                         NORMAL_EXEC, true, 12);
2157                                         coex_dm->ps_tdma_du_adj_type = 12;
2158                                 }
2159                                 if (result == -1) {
2160                                         if (coex_dm->cur_ps_tdma == 1) {
2161                                                 halbtc8192e2ant_ps_tdma(
2162                                                         btcoexist, NORMAL_EXEC,
2163                                                         true, 2);
2164                                                 coex_dm->ps_tdma_du_adj_type =
2165                                                         2;
2166                                         } else if (coex_dm->cur_ps_tdma == 2) {
2167                                                 halbtc8192e2ant_ps_tdma(
2168                                                         btcoexist, NORMAL_EXEC,
2169                                                         true, 3);
2170                                                 coex_dm->ps_tdma_du_adj_type =
2171                                                         3;
2172                                         } else if (coex_dm->cur_ps_tdma == 3) {
2173                                                 halbtc8192e2ant_ps_tdma(
2174                                                         btcoexist, NORMAL_EXEC,
2175                                                         true, 4);
2176                                                 coex_dm->ps_tdma_du_adj_type =
2177                                                         4;
2178                                         } else if (coex_dm->cur_ps_tdma == 9) {
2179                                                 halbtc8192e2ant_ps_tdma(
2180                                                         btcoexist, NORMAL_EXEC,
2181                                                         true, 10);
2182                                                 coex_dm->ps_tdma_du_adj_type =
2183                                                         10;
2184                                         } else if (coex_dm->cur_ps_tdma == 10) {
2185                                                 halbtc8192e2ant_ps_tdma(
2186                                                         btcoexist, NORMAL_EXEC,
2187                                                         true, 11);
2188                                                 coex_dm->ps_tdma_du_adj_type =
2189                                                         11;
2190                                         } else if (coex_dm->cur_ps_tdma == 11) {
2191                                                 halbtc8192e2ant_ps_tdma(
2192                                                         btcoexist, NORMAL_EXEC,
2193                                                         true, 12);
2194                                                 coex_dm->ps_tdma_du_adj_type =
2195                                                         12;
2196                                         }
2197                                 } else if (result == 1) {
2198                                         if (coex_dm->cur_ps_tdma == 4) {
2199                                                 halbtc8192e2ant_ps_tdma(
2200                                                         btcoexist, NORMAL_EXEC,
2201                                                         true, 3);
2202                                                 coex_dm->ps_tdma_du_adj_type =
2203                                                         3;
2204                                         } else if (coex_dm->cur_ps_tdma == 3) {
2205                                                 halbtc8192e2ant_ps_tdma(
2206                                                         btcoexist, NORMAL_EXEC,
2207                                                         true, 2);
2208                                                 coex_dm->ps_tdma_du_adj_type =
2209                                                         2;
2210                                         } else if (coex_dm->cur_ps_tdma == 2) {
2211                                                 halbtc8192e2ant_ps_tdma(
2212                                                         btcoexist, NORMAL_EXEC,
2213                                                         true, 2);
2214                                                 coex_dm->ps_tdma_du_adj_type =
2215                                                         2;
2216                                         } else if (coex_dm->cur_ps_tdma == 12) {
2217                                                 halbtc8192e2ant_ps_tdma(
2218                                                         btcoexist, NORMAL_EXEC,
2219                                                         true, 11);
2220                                                 coex_dm->ps_tdma_du_adj_type =
2221                                                         11;
2222                                         } else if (coex_dm->cur_ps_tdma == 11) {
2223                                                 halbtc8192e2ant_ps_tdma(
2224                                                         btcoexist, NORMAL_EXEC,
2225                                                         true, 10);
2226                                                 coex_dm->ps_tdma_du_adj_type =
2227                                                         10;
2228                                         } else if (coex_dm->cur_ps_tdma == 10) {
2229                                                 halbtc8192e2ant_ps_tdma(
2230                                                         btcoexist, NORMAL_EXEC,
2231                                                         true, 10);
2232                                                 coex_dm->ps_tdma_du_adj_type =
2233                                                         10;
2234                                         }
2235                                 }
2236                         }
2237                 } else if (max_interval == 3) {
2238                         if (tx_pause) {
2239                                 if (coex_dm->cur_ps_tdma == 1) {
2240                                         halbtc8192e2ant_ps_tdma(btcoexist,
2241                                                         NORMAL_EXEC, true, 7);
2242                                         coex_dm->ps_tdma_du_adj_type = 7;
2243                                 } else if (coex_dm->cur_ps_tdma == 2) {
2244                                         halbtc8192e2ant_ps_tdma(btcoexist,
2245                                                         NORMAL_EXEC, true, 7);
2246                                         coex_dm->ps_tdma_du_adj_type = 7;
2247                                 } else if (coex_dm->cur_ps_tdma == 3) {
2248                                         halbtc8192e2ant_ps_tdma(btcoexist,
2249                                                         NORMAL_EXEC, true, 7);
2250                                         coex_dm->ps_tdma_du_adj_type = 7;
2251                                 } else if (coex_dm->cur_ps_tdma == 4) {
2252                                         halbtc8192e2ant_ps_tdma(btcoexist,
2253                                                         NORMAL_EXEC, true, 8);
2254                                         coex_dm->ps_tdma_du_adj_type = 8;
2255                                 }
2256                                 if (coex_dm->cur_ps_tdma == 9) {
2257                                         halbtc8192e2ant_ps_tdma(btcoexist,
2258                                                         NORMAL_EXEC, true, 15);
2259                                         coex_dm->ps_tdma_du_adj_type = 15;
2260                                 } else if (coex_dm->cur_ps_tdma == 10) {
2261                                         halbtc8192e2ant_ps_tdma(btcoexist,
2262                                                         NORMAL_EXEC, true, 15);
2263                                         coex_dm->ps_tdma_du_adj_type = 15;
2264                                 } else if (coex_dm->cur_ps_tdma == 11) {
2265                                         halbtc8192e2ant_ps_tdma(btcoexist,
2266                                                         NORMAL_EXEC, true, 15);
2267                                         coex_dm->ps_tdma_du_adj_type = 15;
2268                                 } else if (coex_dm->cur_ps_tdma == 12) {
2269                                         halbtc8192e2ant_ps_tdma(btcoexist,
2270                                                         NORMAL_EXEC, true, 16);
2271                                         coex_dm->ps_tdma_du_adj_type = 16;
2272                                 }
2273                                 if (result == -1) {
2274                                         if (coex_dm->cur_ps_tdma == 5) {
2275                                                 halbtc8192e2ant_ps_tdma(
2276                                                         btcoexist, NORMAL_EXEC,
2277                                                         true, 7);
2278                                                 coex_dm->ps_tdma_du_adj_type =
2279                                                         7;
2280                                         } else if (coex_dm->cur_ps_tdma == 6) {
2281                                                 halbtc8192e2ant_ps_tdma(
2282                                                         btcoexist, NORMAL_EXEC,
2283                                                         true, 7);
2284                                                 coex_dm->ps_tdma_du_adj_type =
2285                                                         7;
2286                                         } else if (coex_dm->cur_ps_tdma == 7) {
2287                                                 halbtc8192e2ant_ps_tdma(
2288                                                         btcoexist, NORMAL_EXEC,
2289                                                         true, 8);
2290                                                 coex_dm->ps_tdma_du_adj_type =
2291                                                         8;
2292                                         } else if (coex_dm->cur_ps_tdma == 13) {
2293                                                 halbtc8192e2ant_ps_tdma(
2294                                                         btcoexist, NORMAL_EXEC,
2295                                                         true, 15);
2296                                                 coex_dm->ps_tdma_du_adj_type =
2297                                                         15;
2298                                         } else if (coex_dm->cur_ps_tdma == 14) {
2299                                                 halbtc8192e2ant_ps_tdma(
2300                                                         btcoexist, NORMAL_EXEC,
2301                                                         true, 15);
2302                                                 coex_dm->ps_tdma_du_adj_type =
2303                                                         15;
2304                                         } else if (coex_dm->cur_ps_tdma == 15) {
2305                                                 halbtc8192e2ant_ps_tdma(
2306                                                         btcoexist, NORMAL_EXEC,
2307                                                         true, 16);
2308                                                 coex_dm->ps_tdma_du_adj_type =
2309                                                         16;
2310                                         }
2311                                 } else if (result == 1) {
2312                                         if (coex_dm->cur_ps_tdma == 8) {
2313                                                 halbtc8192e2ant_ps_tdma(
2314                                                         btcoexist, NORMAL_EXEC,
2315                                                         true, 7);
2316                                                 coex_dm->ps_tdma_du_adj_type =
2317                                                         7;
2318                                         } else if (coex_dm->cur_ps_tdma == 7) {
2319                                                 halbtc8192e2ant_ps_tdma(
2320                                                         btcoexist, NORMAL_EXEC,
2321                                                         true, 7);
2322                                                 coex_dm->ps_tdma_du_adj_type =
2323                                                         7;
2324                                         } else if (coex_dm->cur_ps_tdma == 6) {
2325                                                 halbtc8192e2ant_ps_tdma(
2326                                                         btcoexist, NORMAL_EXEC,
2327                                                         true, 7);
2328                                                 coex_dm->ps_tdma_du_adj_type =
2329                                                         7;
2330                                         } else if (coex_dm->cur_ps_tdma == 16) {
2331                                                 halbtc8192e2ant_ps_tdma(
2332                                                         btcoexist, NORMAL_EXEC,
2333                                                         true, 15);
2334                                                 coex_dm->ps_tdma_du_adj_type =
2335                                                         15;
2336                                         } else if (coex_dm->cur_ps_tdma == 15) {
2337                                                 halbtc8192e2ant_ps_tdma(
2338                                                         btcoexist, NORMAL_EXEC,
2339                                                         true, 15);
2340                                                 coex_dm->ps_tdma_du_adj_type =
2341                                                         15;
2342                                         } else if (coex_dm->cur_ps_tdma == 14) {
2343                                                 halbtc8192e2ant_ps_tdma(
2344                                                         btcoexist, NORMAL_EXEC,
2345                                                         true, 15);
2346                                                 coex_dm->ps_tdma_du_adj_type =
2347                                                         15;
2348                                         }
2349                                 }
2350                         } else {
2351                                 if (coex_dm->cur_ps_tdma == 5) {
2352                                         halbtc8192e2ant_ps_tdma(btcoexist,
2353                                                         NORMAL_EXEC, true, 3);
2354                                         coex_dm->ps_tdma_du_adj_type = 3;
2355                                 } else if (coex_dm->cur_ps_tdma == 6) {
2356                                         halbtc8192e2ant_ps_tdma(btcoexist,
2357                                                         NORMAL_EXEC, true, 3);
2358                                         coex_dm->ps_tdma_du_adj_type = 3;
2359                                 } else if (coex_dm->cur_ps_tdma == 7) {
2360                                         halbtc8192e2ant_ps_tdma(btcoexist,
2361                                                         NORMAL_EXEC, true, 3);
2362                                         coex_dm->ps_tdma_du_adj_type = 3;
2363                                 } else if (coex_dm->cur_ps_tdma == 8) {
2364                                         halbtc8192e2ant_ps_tdma(btcoexist,
2365                                                         NORMAL_EXEC, true, 4);
2366                                         coex_dm->ps_tdma_du_adj_type = 4;
2367                                 }
2368                                 if (coex_dm->cur_ps_tdma == 13) {
2369                                         halbtc8192e2ant_ps_tdma(btcoexist,
2370                                                         NORMAL_EXEC, true, 11);
2371                                         coex_dm->ps_tdma_du_adj_type = 11;
2372                                 } else if (coex_dm->cur_ps_tdma == 14) {
2373                                         halbtc8192e2ant_ps_tdma(btcoexist,
2374                                                         NORMAL_EXEC, true, 11);
2375                                         coex_dm->ps_tdma_du_adj_type = 11;
2376                                 } else if (coex_dm->cur_ps_tdma == 15) {
2377                                         halbtc8192e2ant_ps_tdma(btcoexist,
2378                                                         NORMAL_EXEC, true, 11);
2379                                         coex_dm->ps_tdma_du_adj_type = 11;
2380                                 } else if (coex_dm->cur_ps_tdma == 16) {
2381                                         halbtc8192e2ant_ps_tdma(btcoexist,
2382                                                         NORMAL_EXEC, true, 12);
2383                                         coex_dm->ps_tdma_du_adj_type = 12;
2384                                 }
2385                                 if (result == -1) {
2386                                         if (coex_dm->cur_ps_tdma == 1) {
2387                                                 halbtc8192e2ant_ps_tdma(
2388                                                         btcoexist, NORMAL_EXEC,
2389                                                         true, 3);
2390                                                 coex_dm->ps_tdma_du_adj_type =
2391                                                         3;
2392                                         } else if (coex_dm->cur_ps_tdma == 2) {
2393                                                 halbtc8192e2ant_ps_tdma(
2394                                                         btcoexist, NORMAL_EXEC,
2395                                                         true, 3);
2396                                                 coex_dm->ps_tdma_du_adj_type =
2397                                                         3;
2398                                         } else if (coex_dm->cur_ps_tdma == 3) {
2399                                                 halbtc8192e2ant_ps_tdma(
2400                                                         btcoexist, NORMAL_EXEC,
2401                                                         true, 4);
2402                                                 coex_dm->ps_tdma_du_adj_type =
2403                                                         4;
2404                                         } else if (coex_dm->cur_ps_tdma == 9) {
2405                                                 halbtc8192e2ant_ps_tdma(
2406                                                         btcoexist, NORMAL_EXEC,
2407                                                         true, 11);
2408                                                 coex_dm->ps_tdma_du_adj_type =
2409                                                         11;
2410                                         } else if (coex_dm->cur_ps_tdma == 10) {
2411                                                 halbtc8192e2ant_ps_tdma(
2412                                                         btcoexist, NORMAL_EXEC,
2413                                                         true, 11);
2414                                                 coex_dm->ps_tdma_du_adj_type =
2415                                                         11;
2416                                         } else if (coex_dm->cur_ps_tdma == 11) {
2417                                                 halbtc8192e2ant_ps_tdma(
2418                                                         btcoexist, NORMAL_EXEC,
2419                                                         true, 12);
2420                                                 coex_dm->ps_tdma_du_adj_type =
2421                                                         12;
2422                                         }
2423                                 } else if (result == 1) {
2424                                         if (coex_dm->cur_ps_tdma == 4) {
2425                                                 halbtc8192e2ant_ps_tdma(
2426                                                         btcoexist, NORMAL_EXEC,
2427                                                         true, 3);
2428                                                 coex_dm->ps_tdma_du_adj_type =
2429                                                         3;
2430                                         } else if (coex_dm->cur_ps_tdma == 3) {
2431                                                 halbtc8192e2ant_ps_tdma(
2432                                                         btcoexist, NORMAL_EXEC,
2433                                                         true, 3);
2434                                                 coex_dm->ps_tdma_du_adj_type =
2435                                                         3;
2436                                         } else if (coex_dm->cur_ps_tdma == 2) {
2437                                                 halbtc8192e2ant_ps_tdma(
2438                                                         btcoexist, NORMAL_EXEC,
2439                                                         true, 3);
2440                                                 coex_dm->ps_tdma_du_adj_type =
2441                                                         3;
2442                                         } else if (coex_dm->cur_ps_tdma == 12) {
2443                                                 halbtc8192e2ant_ps_tdma(
2444                                                         btcoexist, NORMAL_EXEC,
2445                                                         true, 11);
2446                                                 coex_dm->ps_tdma_du_adj_type =
2447                                                         11;
2448                                         } else if (coex_dm->cur_ps_tdma == 11) {
2449                                                 halbtc8192e2ant_ps_tdma(
2450                                                         btcoexist, NORMAL_EXEC,
2451                                                         true, 11);
2452                                                 coex_dm->ps_tdma_du_adj_type =
2453                                                         11;
2454                                         } else if (coex_dm->cur_ps_tdma == 10) {
2455                                                 halbtc8192e2ant_ps_tdma(
2456                                                         btcoexist, NORMAL_EXEC,
2457                                                         true, 11);
2458                                                 coex_dm->ps_tdma_du_adj_type =
2459                                                         11;
2460                                         }
2461                                 }
2462                         }
2463                 }
2464         }
2465
2466         /* if current PsTdma not match with the recorded one (when scan, dhcp...), */
2467         /* then we have to adjust it back to the previous record one. */
2468         if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
2469                 boolean scan = false, link = false, roam = false;
2470                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2471                         "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n",
2472                             coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
2473                 BTC_TRACE(trace_buf);
2474
2475                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2476                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2477                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2478
2479                 if (!scan && !link && !roam)
2480                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2481                                                 coex_dm->ps_tdma_du_adj_type);
2482                 else {
2483                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2484                                 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
2485                         BTC_TRACE(trace_buf);
2486                 }
2487         }
2488 }
2489
2490 /* SCO only or SCO+PAN(HS) */
2491 void halbtc8192e2ant_action_sco(IN struct btc_coexist *btcoexist)
2492 {
2493         u8      wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
2494         u32     wifi_bw;
2495
2496         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2497                           0);
2498
2499         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2500         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2501
2502         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2503
2504         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2505
2506         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2507
2508         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2509             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2510                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2511                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2512         } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2513                    (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2514                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2515                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2516         } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2517                    (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2518                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2519                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2520         }
2521
2522         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2523
2524         /* sw mechanism */
2525         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2526                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2527                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2528                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2529                                                       false, false);
2530                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2531                                                       false, 0x6);
2532                 } else {
2533                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2534                                                       false, false);
2535                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2536                                                       false, 0x6);
2537                 }
2538         } else {
2539                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2540                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2541                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2542                                                       false, false);
2543                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2544                                                       false, 0x6);
2545                 } else {
2546                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2547                                                       false, false);
2548                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2549                                                       false, 0x6);
2550                 }
2551         }
2552 }
2553
2554 void halbtc8192e2ant_action_sco_pan(IN struct btc_coexist *btcoexist)
2555 {
2556         u8      wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
2557         u32     wifi_bw;
2558
2559         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2560                           0);
2561
2562         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2563         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2564
2565         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2566
2567         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2568
2569         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2570
2571         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2572             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2573                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2574                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
2575         } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2576                    (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2577                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2578                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2579         } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2580                    (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2581                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2582                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2583         }
2584
2585         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2586
2587         /* sw mechanism */
2588         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2589                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2590                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2591                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2592                                                       false, false);
2593                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2594                                                       false, 0x6);
2595                 } else {
2596                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2597                                                       false, false);
2598                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2599                                                       false, 0x6);
2600                 }
2601         } else {
2602                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2603                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2604                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2605                                                       false, false);
2606                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2607                                                       false, 0x6);
2608                 } else {
2609                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2610                                                       false, false);
2611                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2612                                                       false, 0x6);
2613                 }
2614         }
2615 }
2616
2617 void halbtc8192e2ant_action_hid(IN struct btc_coexist *btcoexist)
2618 {
2619         u8      wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2620         u32     wifi_bw;
2621
2622         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2623                           0);
2624         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2625
2626         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2627         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2628
2629         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2630
2631         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2632
2633         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
2634
2635         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2636             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2637                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2638                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2639         } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2640                    (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2641                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2642                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2643         } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2644                    (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2645                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2646                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2647         }
2648
2649         /* sw mechanism */
2650         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2651                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2652                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2653                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2654                                                       false, false);
2655                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2656                                                       false, 0x18);
2657                 } else {
2658                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
2659                                                       false, false);
2660                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2661                                                       false, 0x18);
2662                 }
2663         } else {
2664                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2665                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2666                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2667                                                       false, false);
2668                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2669                                                       false, 0x18);
2670                 } else {
2671                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
2672                                                       false, false);
2673                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2674                                                       false, 0x18);
2675                 }
2676         }
2677 }
2678
2679 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
2680 void halbtc8192e2ant_action_a2dp(IN struct btc_coexist *btcoexist)
2681 {
2682         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2683         u32             wifi_bw;
2684         boolean         long_dist = false;
2685
2686         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2687                           0);
2688         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2689
2690         if ((bt_rssi_state == BTC_RSSI_STATE_LOW ||
2691              bt_rssi_state == BTC_RSSI_STATE_STAY_LOW) &&
2692             (wifi_rssi_state == BTC_RSSI_STATE_LOW ||
2693              wifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2694                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2695                             "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n");
2696                 BTC_TRACE(trace_buf);
2697                 long_dist = true;
2698         }
2699         if (long_dist) {
2700                 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2);
2701                 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true,
2702                                            0x4);
2703         } else {
2704                 halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2705                 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
2706                                            0x8);
2707         }
2708
2709         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2710
2711         if (long_dist)
2712                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2713         else
2714                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2715
2716
2717         if (long_dist) {
2718                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
2719                 coex_dm->auto_tdma_adjust = false;
2720                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2721         } else {
2722                 if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2723                     (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2724                         halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2725                                                              true, 1);
2726                         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2727                 } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2728                            (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2729                         halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2730                                                              false, 1);
2731                         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2732                 } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2733                            (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2734                         halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2735                                                              false, 1);
2736                         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2737                 }
2738         }
2739
2740         /* sw mechanism */
2741         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2742         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2743                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2744                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2745                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2746                                                       false, false);
2747                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2748                                                       false, 0x18);
2749                 } else {
2750                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2751                                                       false, false);
2752                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2753                                                       false, 0x18);
2754                 }
2755         } else {
2756                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2757                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2758                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2759                                                       false, false);
2760                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2761                                                       false, 0x18);
2762                 } else {
2763                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2764                                                       false, false);
2765                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2766                                                       false, 0x18);
2767                 }
2768         }
2769 }
2770
2771 void halbtc8192e2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
2772 {
2773         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2774         u32             wifi_bw;
2775
2776         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2777                           0);
2778         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2779
2780         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2781         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2782
2783         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2784         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2785
2786         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2787             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2788                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
2789                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2790         } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2791                    (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2792                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2793                                                      2);
2794                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2795         } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2796                    (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2797                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2798                                                      2);
2799                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2800         }
2801
2802         /* sw mechanism */
2803         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2804         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2805                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2806                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2807                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2808                                                       false, false);
2809                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2810                                                       true, 0x6);
2811                 } else {
2812                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2813                                                       false, false);
2814                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2815                                                       true, 0x6);
2816                 }
2817         } else {
2818                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2819                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2820                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2821                                                       false, false);
2822                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2823                                                       true, 0x6);
2824                 } else {
2825                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2826                                                       false, false);
2827                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2828                                                       true, 0x6);
2829                 }
2830         }
2831 }
2832
2833 void halbtc8192e2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
2834 {
2835         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2836         u32             wifi_bw;
2837
2838         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2839                           0);
2840         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2841
2842         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2843         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2844
2845         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2846
2847         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2848
2849         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2850             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2851                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2852                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
2853         } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2854                    (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2855                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2856                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2857         } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2858                    (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2859                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2860                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2861         }
2862
2863         /* sw mechanism */
2864         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2865         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2866                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2867                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2868                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2869                                                       false, false);
2870                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2871                                                       false, 0x18);
2872                 } else {
2873                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2874                                                       false, false);
2875                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2876                                                       false, 0x18);
2877                 }
2878         } else {
2879                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2880                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2881                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2882                                                       false, false);
2883                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2884                                                       false, 0x18);
2885                 } else {
2886                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2887                                                       false, false);
2888                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2889                                                       false, 0x18);
2890                 }
2891         }
2892 }
2893
2894 /* PAN(HS) only */
2895 void halbtc8192e2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
2896 {
2897         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2898         u32             wifi_bw;
2899
2900         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2901                           0);
2902         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2903
2904         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2905         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2906
2907         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2908
2909         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2910
2911         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2912             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW))
2913                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2914         else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2915                  (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM))
2916                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2917         else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2918                  (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
2919                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2920         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
2921
2922         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2923         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2924                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2925                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2926                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2927                                                       false, false);
2928                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2929                                                       false, 0x18);
2930                 } else {
2931                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2932                                                       false, false);
2933                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2934                                                       false, 0x18);
2935                 }
2936         } else {
2937                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2938                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2939                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2940                                                       false, false);
2941                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2942                                                       false, 0x18);
2943                 } else {
2944                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
2945                                                       false, false);
2946                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2947                                                       false, 0x18);
2948                 }
2949         }
2950 }
2951
2952 /* PAN(EDR)+A2DP */
2953 void halbtc8192e2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
2954 {
2955         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
2956         u32             wifi_bw;
2957
2958         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
2959                           0);
2960         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
2961
2962         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
2963         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2964
2965         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2966
2967         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
2968
2969         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2970
2971         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
2972             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2973                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2974                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3);
2975         } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
2976                    (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2977                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
2978                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2979                                                      3);
2980         } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
2981                    (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2982                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
2983                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
2984                                                      3);
2985         }
2986
2987         /* sw mechanism  */
2988         if (BTC_WIFI_BW_HT40 == wifi_bw) {
2989                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
2990                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2991                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2992                                                       false, false);
2993                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
2994                                                       false, 0x18);
2995                 } else {
2996                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
2997                                                       false, false);
2998                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
2999                                                       false, 0x18);
3000                 }
3001         } else {
3002                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3003                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3004                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3005                                                       false, false);
3006                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3007                                                       false, 0x18);
3008                 } else {
3009                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3010                                                       false, false);
3011                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3012                                                       false, 0x18);
3013                 }
3014         }
3015 }
3016
3017 void halbtc8192e2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
3018 {
3019         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3020         u32             wifi_bw;
3021
3022         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
3023                           0);
3024         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3025
3026         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3027
3028         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
3029         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3030
3031         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3032
3033         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3034
3035         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
3036             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3037                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3038                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
3039         } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
3040                    (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3041                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3042                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3043         } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3044                    (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3045                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
3046                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3047         }
3048
3049         /* sw mechanism */
3050         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3051                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3052                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3053                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3054                                                       false, false);
3055                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3056                                                       false, 0x18);
3057                 } else {
3058                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3059                                                       false, false);
3060                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3061                                                       false, 0x18);
3062                 }
3063         } else {
3064                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3065                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3066                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3067                                                       false, false);
3068                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3069                                                       false, 0x18);
3070                 } else {
3071                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3072                                                       false, false);
3073                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3074                                                       false, 0x18);
3075                 }
3076         }
3077 }
3078
3079 /* HID+A2DP+PAN(EDR) */
3080 void halbtc8192e2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
3081 {
3082         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3083         u32             wifi_bw;
3084
3085         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
3086                           0);
3087         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3088
3089         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
3090         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3091
3092         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3093
3094         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3095
3096         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3097
3098         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
3099             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3100                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3101                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3);
3102         } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
3103                    (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3104                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3105                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3106         } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3107                    (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3108                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
3109                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3110         }
3111
3112         /* sw mechanism */
3113         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3114                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3115                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3116                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3117                                                       false, false);
3118                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3119                                                       false, 0x18);
3120                 } else {
3121                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3122                                                       false, false);
3123                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3124                                                       false, 0x18);
3125                 }
3126         } else {
3127                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3128                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3129                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3130                                                       false, false);
3131                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3132                                                       false, 0x18);
3133                 } else {
3134                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3135                                                       false, false);
3136                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3137                                                       false, 0x18);
3138                 }
3139         }
3140 }
3141
3142 void halbtc8192e2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
3143 {
3144         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3145         u32             wifi_bw;
3146
3147         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
3148                           0);
3149         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3150
3151         halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
3152         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3153
3154         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3155
3156         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3157
3158         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
3159             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3160                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3161                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2);
3162         } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
3163                    (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3164                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3165                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3166         } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3167                    (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3168                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
3169                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3170         }
3171
3172         /* sw mechanism */
3173         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3174                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3175                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3176                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3177                                                       false, false);
3178                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3179                                                       false, 0x18);
3180                 } else {
3181                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, true,
3182                                                       false, false);
3183                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3184                                                       false, 0x18);
3185                 }
3186         } else {
3187                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3188                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3189                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3190                                                       false, false);
3191                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3192                                                       false, 0x18);
3193                 } else {
3194                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, true,
3195                                                       false, false);
3196                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3197                                                       false, 0x18);
3198                 }
3199         }
3200 }
3201
3202 void halbtc8192e2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
3203 {
3204         u8                              algorithm = 0;
3205
3206         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3207                     "[BTCoex], RunCoexistMechanism()===>\n");
3208         BTC_TRACE(trace_buf);
3209
3210         if (btcoexist->manual_control) {
3211                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3212                         "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n");
3213                 BTC_TRACE(trace_buf);
3214                 return;
3215         }
3216
3217         if (coex_sta->under_ips) {
3218                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3219                             "[BTCoex], wifi is under IPS !!!\n");
3220                 BTC_TRACE(trace_buf);
3221                 return;
3222         }
3223
3224         algorithm = halbtc8192e2ant_action_algorithm(btcoexist);
3225         if (coex_sta->c2h_bt_inquiry_page &&
3226             (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
3227                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3228                             "[BTCoex], BT is under inquiry/page scan !!\n");
3229                 BTC_TRACE(trace_buf);
3230                 halbtc8192e2ant_action_bt_inquiry(btcoexist);
3231                 return;
3232         }
3233
3234         coex_dm->cur_algorithm = algorithm;
3235         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
3236                     coex_dm->cur_algorithm);
3237         BTC_TRACE(trace_buf);
3238
3239         if (halbtc8192e2ant_is_common_action(btcoexist)) {
3240                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3241                             "[BTCoex], Action 2-Ant common.\n");
3242                 BTC_TRACE(trace_buf);
3243                 coex_dm->auto_tdma_adjust = false;
3244         } else {
3245                 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
3246                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3247                                 "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
3248                                 coex_dm->pre_algorithm, coex_dm->cur_algorithm);
3249                         BTC_TRACE(trace_buf);
3250                         coex_dm->auto_tdma_adjust = false;
3251                 }
3252                 switch (coex_dm->cur_algorithm) {
3253                 case BT_8192E_2ANT_COEX_ALGO_SCO:
3254                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3255                                 "[BTCoex], Action 2-Ant, algorithm = SCO.\n");
3256                         BTC_TRACE(trace_buf);
3257                         halbtc8192e2ant_action_sco(btcoexist);
3258                         break;
3259                 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
3260                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3261                                 "[BTCoex], Action 2-Ant, algorithm = SCO+PAN(EDR).\n");
3262                         BTC_TRACE(trace_buf);
3263                         halbtc8192e2ant_action_sco_pan(btcoexist);
3264                         break;
3265                 case BT_8192E_2ANT_COEX_ALGO_HID:
3266                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3267                                 "[BTCoex], Action 2-Ant, algorithm = HID.\n");
3268                         BTC_TRACE(trace_buf);
3269                         halbtc8192e2ant_action_hid(btcoexist);
3270                         break;
3271                 case BT_8192E_2ANT_COEX_ALGO_A2DP:
3272                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3273                                 "[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
3274                         BTC_TRACE(trace_buf);
3275                         halbtc8192e2ant_action_a2dp(btcoexist);
3276                         break;
3277                 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
3278                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3279                                 "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
3280                         BTC_TRACE(trace_buf);
3281                         halbtc8192e2ant_action_a2dp_pan_hs(btcoexist);
3282                         break;
3283                 case BT_8192E_2ANT_COEX_ALGO_PANEDR:
3284                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3285                                 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
3286                         BTC_TRACE(trace_buf);
3287                         halbtc8192e2ant_action_pan_edr(btcoexist);
3288                         break;
3289                 case BT_8192E_2ANT_COEX_ALGO_PANHS:
3290                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3291                                 "[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
3292                         BTC_TRACE(trace_buf);
3293                         halbtc8192e2ant_action_pan_hs(btcoexist);
3294                         break;
3295                 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
3296                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3297                                 "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
3298                         BTC_TRACE(trace_buf);
3299                         halbtc8192e2ant_action_pan_edr_a2dp(btcoexist);
3300                         break;
3301                 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
3302                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3303                                 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
3304                         BTC_TRACE(trace_buf);
3305                         halbtc8192e2ant_action_pan_edr_hid(btcoexist);
3306                         break;
3307                 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
3308                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3309                                 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
3310                         BTC_TRACE(trace_buf);
3311                         halbtc8192e2ant_action_hid_a2dp_pan_edr(
3312                                 btcoexist);
3313                         break;
3314                 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
3315                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3316                                 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
3317                         BTC_TRACE(trace_buf);
3318                         halbtc8192e2ant_action_hid_a2dp(btcoexist);
3319                         break;
3320                 default:
3321                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3322                                 "[BTCoex], Action 2-Ant, algorithm = unknown!!\n");
3323                         BTC_TRACE(trace_buf);
3324                         break;
3325                 }
3326                 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
3327         }
3328 }
3329
3330 void halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
3331                                     IN boolean back_up)
3332 {
3333         u16     u16tmp = 0;
3334         u8      u8tmp = 0;
3335
3336         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3337                     "[BTCoex], 2Ant Init HW Config!!\n");
3338         BTC_TRACE(trace_buf);
3339
3340         if (back_up) {
3341                 /* backup rf 0x1e value */
3342                 coex_dm->bt_rf_0x1e_backup =
3343                         btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e,
3344                                                   0xfffff);
3345
3346                 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
3347                                             0x430);
3348                 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
3349                                             0x434);
3350                 coex_dm->backup_retry_limit = btcoexist->btc_read_2byte(
3351                                                       btcoexist, 0x42a);
3352                 coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte(
3353                                 btcoexist, 0x456);
3354         }
3355
3356         /* antenna sw ctrl to bt */
3357         halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, true, false);
3358
3359         halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
3360
3361         /* antenna switch control parameter */
3362         btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555);
3363
3364         /* coex parameters */
3365         btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
3366         /* 0x790[5:0]=0x5 */
3367         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
3368         u8tmp &= 0xc0;
3369         u8tmp |= 0x5;
3370         btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
3371
3372         /* enable counter statistics */
3373         btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
3374
3375         /* enable PTA */
3376         btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20);
3377         /* enable mailbox interface */
3378         u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40);
3379         u16tmp |= BIT(9);
3380         btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
3381
3382         /* enable PTA I2C mailbox */
3383         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
3384         u8tmp |= BIT(4);
3385         btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
3386
3387         /* enable bt clock when wifi is disabled. */
3388         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93);
3389         u8tmp |= BIT(0);
3390         btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp);
3391         /* enable bt clock when suspend. */
3392         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7);
3393         u8tmp |= BIT(0);
3394         btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
3395 }
3396
3397 /* ************************************************************
3398  * work around function start with wa_halbtc8192e2ant_
3399  * ************************************************************
3400  * ************************************************************
3401  * extern function start with ex_halbtc8192e2ant_
3402  * ************************************************************ */
3403 void ex_halbtc8192e2ant_power_on_setting(IN struct btc_coexist *btcoexist)
3404 {
3405 }
3406
3407 void ex_halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
3408                                        IN boolean wifi_only)
3409 {
3410         halbtc8192e2ant_init_hw_config(btcoexist, true);
3411 }
3412
3413 void ex_halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
3414 {
3415         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3416                     "[BTCoex], Coex Mechanism Init!!\n");
3417         BTC_TRACE(trace_buf);
3418
3419         halbtc8192e2ant_init_coex_dm(btcoexist);
3420 }
3421
3422 void ex_halbtc8192e2ant_display_coex_info(IN struct btc_coexist *btcoexist)
3423 {
3424         struct  btc_board_info          *board_info = &btcoexist->board_info;
3425         struct  btc_stack_info          *stack_info = &btcoexist->stack_info;
3426         u8                              *cli_buf = btcoexist->cli_buf;
3427         u8                              u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
3428         u16                             u16tmp[4];
3429         u32                             u32tmp[4];
3430         u32                             fw_ver = 0, bt_patch_ver = 0;
3431
3432         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3433                    "\r\n ============[BT Coexist info]============");
3434         CL_PRINTF(cli_buf);
3435
3436         if (btcoexist->manual_control) {
3437                 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3438                         "\r\n ============[Under Manual Control]============");
3439                 CL_PRINTF(cli_buf);
3440                 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3441                            "\r\n ==========================================");
3442                 CL_PRINTF(cli_buf);
3443         }
3444
3445         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3446                    "Ant PG number/ Ant mechanism:",
3447                    board_info->pg_ant_num, board_info->btdm_ant_num);
3448         CL_PRINTF(cli_buf);
3449
3450         btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
3451         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3452         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3453                    "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)",
3454                    "CoexVer/ FwVer/ PatchVer",
3455                    glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant, fw_ver,
3456                    bt_patch_ver, bt_patch_ver);
3457         CL_PRINTF(cli_buf);
3458
3459         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
3460                    "Wifi channel informed to BT",
3461                    coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
3462                    coex_dm->wifi_chnl_info[2]);
3463         CL_PRINTF(cli_buf);
3464
3465         /* wifi status */
3466         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3467                    "============[Wifi Status]============");
3468         CL_PRINTF(cli_buf);
3469         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
3470
3471         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3472                    "============[BT Status]============");
3473         CL_PRINTF(cli_buf);
3474
3475         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ",
3476                    "BT [status/ rssi/ retryCnt]",
3477                    ((coex_sta->bt_disabled) ? ("disabled") :    ((
3478                    coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan")
3479                            : ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
3480                                coex_dm->bt_status) ? "non-connected idle" :
3481                 ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
3482                                        ? "connected-idle" : "busy")))),
3483                    coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
3484         CL_PRINTF(cli_buf);
3485
3486         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d",
3487                    "SCO/HID/PAN/A2DP",
3488                    stack_info->sco_exist, stack_info->hid_exist,
3489                    stack_info->pan_exist, stack_info->a2dp_exist);
3490         CL_PRINTF(cli_buf);
3491         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO);
3492
3493         bt_info_ext = coex_sta->bt_info_ext;
3494         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
3495                    "BT Info A2DP rate",
3496                    (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate");
3497         CL_PRINTF(cli_buf);
3498
3499         for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) {
3500                 if (coex_sta->bt_info_c2h_cnt[i]) {
3501                         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3502                                 "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)",
3503                                    glbt_info_src_8192e_2ant[i],
3504                                    coex_sta->bt_info_c2h[i][0],
3505                                    coex_sta->bt_info_c2h[i][1],
3506                                    coex_sta->bt_info_c2h[i][2],
3507                                    coex_sta->bt_info_c2h[i][3],
3508                                    coex_sta->bt_info_c2h[i][4],
3509                                    coex_sta->bt_info_c2h[i][5],
3510                                    coex_sta->bt_info_c2h[i][6],
3511                                    coex_sta->bt_info_c2h_cnt[i]);
3512                         CL_PRINTF(cli_buf);
3513                 }
3514         }
3515
3516         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type",
3517                    coex_dm->cur_ss_type);
3518         CL_PRINTF(cli_buf);
3519
3520         /* Sw mechanism  */
3521         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3522                    "============[Sw mechanism]============");
3523         CL_PRINTF(cli_buf);
3524         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3525                    "SM1[ShRf/ LpRA/ LimDig]",
3526                    coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra,
3527                    coex_dm->limited_dig);
3528         CL_PRINTF(cli_buf);
3529         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3530                    "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
3531                    coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
3532                    coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
3533         CL_PRINTF(cli_buf);
3534
3535         /* Fw mechanism          */
3536         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3537                    "============[Fw mechanism]============");
3538         CL_PRINTF(cli_buf);
3539
3540         ps_tdma_case = coex_dm->cur_ps_tdma;
3541         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3542                    "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)",
3543                    "PS TDMA",
3544                    coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
3545                    coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
3546                    coex_dm->ps_tdma_para[4], ps_tdma_case,
3547                    coex_dm->auto_tdma_adjust);
3548         CL_PRINTF(cli_buf);
3549
3550         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3551                    "DecBtPwr/ IgnWlanAct",
3552                    coex_dm->cur_bt_dec_pwr_lvl, coex_dm->cur_ignore_wlan_act);
3553         CL_PRINTF(cli_buf);
3554
3555         /* Hw setting            */
3556         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3557                    "============[Hw setting]============");
3558         CL_PRINTF(cli_buf);
3559
3560         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
3561                    "RF-A, 0x1e initVal",
3562                    coex_dm->bt_rf_0x1e_backup);
3563         CL_PRINTF(cli_buf);
3564
3565         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3566                    "backup ARFR1/ARFR2/RL/AMaxTime",
3567                    coex_dm->backup_arfr_cnt1, coex_dm->backup_arfr_cnt2,
3568                    coex_dm->backup_retry_limit,
3569                    coex_dm->backup_ampdu_max_time);
3570         CL_PRINTF(cli_buf);
3571
3572         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
3573         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
3574         u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
3575         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
3576         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3577                    "0x430/0x434/0x42a/0x456",
3578                    u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
3579         CL_PRINTF(cli_buf);
3580
3581         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04);
3582         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04);
3583         u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c);
3584         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3585                    "0xc04/ 0xd04/ 0x90c",
3586                    u32tmp[0], u32tmp[1], u32tmp[2]);
3587         CL_PRINTF(cli_buf);
3588
3589         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
3590         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778",
3591                    u8tmp[0]);
3592         CL_PRINTF(cli_buf);
3593
3594         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c);
3595         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930);
3596         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3597                    "0x92c/ 0x930",
3598                    (u8tmp[0]), u32tmp[0]);
3599         CL_PRINTF(cli_buf);
3600
3601         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
3602         u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f);
3603         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3604                    "0x40/ 0x4f",
3605                    u8tmp[0], u8tmp[1]);
3606         CL_PRINTF(cli_buf);
3607
3608         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
3609         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
3610         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3611                    "0x550(bcn ctrl)/0x522",
3612                    u32tmp[0], u8tmp[0]);
3613         CL_PRINTF(cli_buf);
3614
3615         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
3616         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)",
3617                    u32tmp[0]);
3618         CL_PRINTF(cli_buf);
3619
3620         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
3621         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
3622         u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
3623         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
3624         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3625                    "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
3626                    "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
3627                    u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
3628         CL_PRINTF(cli_buf);
3629
3630         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3631                    "0x770(hp rx[31:16]/tx[15:0])",
3632                    coex_sta->high_priority_rx, coex_sta->high_priority_tx);
3633         CL_PRINTF(cli_buf);
3634         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
3635                    "0x774(lp rx[31:16]/tx[15:0])",
3636                    coex_sta->low_priority_rx, coex_sta->low_priority_tx);
3637         CL_PRINTF(cli_buf);
3638 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
3639         halbtc8192e2ant_monitor_bt_ctr(btcoexist);
3640 #endif
3641         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
3642 }
3643
3644
3645 void ex_halbtc8192e2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
3646 {
3647         if (BTC_IPS_ENTER == type) {
3648                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3649                             "[BTCoex], IPS ENTER notify\n");
3650                 BTC_TRACE(trace_buf);
3651                 coex_sta->under_ips = true;
3652                 halbtc8192e2ant_coex_all_off(btcoexist);
3653                 halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false,
3654                                              true);
3655         } else if (BTC_IPS_LEAVE == type) {
3656                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3657                             "[BTCoex], IPS LEAVE notify\n");
3658                 BTC_TRACE(trace_buf);
3659                 coex_sta->under_ips = false;
3660         }
3661 }
3662
3663 void ex_halbtc8192e2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
3664 {
3665         if (BTC_LPS_ENABLE == type) {
3666                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3667                             "[BTCoex], LPS ENABLE notify\n");
3668                 BTC_TRACE(trace_buf);
3669                 coex_sta->under_lps = true;
3670         } else if (BTC_LPS_DISABLE == type) {
3671                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3672                             "[BTCoex], LPS DISABLE notify\n");
3673                 BTC_TRACE(trace_buf);
3674                 coex_sta->under_lps = false;
3675         }
3676 }
3677
3678 void ex_halbtc8192e2ant_scan_notify(IN struct btc_coexist *btcoexist,
3679                                     IN u8 type)
3680 {
3681         if (BTC_SCAN_START == type) {
3682                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3683                             "[BTCoex], SCAN START notify\n");
3684                 BTC_TRACE(trace_buf);
3685         } else if (BTC_SCAN_FINISH == type) {
3686                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3687                             "[BTCoex], SCAN FINISH notify\n");
3688                 BTC_TRACE(trace_buf);
3689         }
3690 }
3691
3692 void ex_halbtc8192e2ant_connect_notify(IN struct btc_coexist *btcoexist,
3693                                        IN u8 type)
3694 {
3695         if (BTC_ASSOCIATE_START == type) {
3696                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3697                             "[BTCoex], CONNECT START notify\n");
3698                 BTC_TRACE(trace_buf);
3699         } else if (BTC_ASSOCIATE_FINISH == type) {
3700                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3701                             "[BTCoex], CONNECT FINISH notify\n");
3702                 BTC_TRACE(trace_buf);
3703         }
3704 }
3705
3706 void ex_halbtc8192e2ant_media_status_notify(IN struct btc_coexist *btcoexist,
3707                 IN u8 type)
3708 {
3709         u8                      h2c_parameter[3] = {0};
3710         u32                     wifi_bw;
3711         u8                      wifi_central_chnl;
3712
3713         if (btcoexist->manual_control ||
3714             btcoexist->stop_coex_dm ||
3715             coex_sta->bt_disabled)
3716                 return;
3717
3718         if (BTC_MEDIA_CONNECT == type) {
3719                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3720                             "[BTCoex], MEDIA connect notify\n");
3721                 BTC_TRACE(trace_buf);
3722         } else {
3723                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3724                             "[BTCoex], MEDIA disconnect notify\n");
3725                 BTC_TRACE(trace_buf);
3726         }
3727
3728         /* only 2.4G we need to inform bt the chnl mask */
3729         btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
3730                            &wifi_central_chnl);
3731         if ((BTC_MEDIA_CONNECT == type) &&
3732             (wifi_central_chnl <= 14)) {
3733                 h2c_parameter[0] = 0x1;
3734                 h2c_parameter[1] = wifi_central_chnl;
3735                 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3736                 if (BTC_WIFI_BW_HT40 == wifi_bw)
3737                         h2c_parameter[2] = 0x30;
3738                 else
3739                         h2c_parameter[2] = 0x20;
3740         }
3741
3742         coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
3743         coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
3744         coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
3745
3746         btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
3747 }
3748
3749 void ex_halbtc8192e2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
3750                 IN u8 type)
3751 {
3752         if (type == BTC_PACKET_DHCP) {
3753                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3754                             "[BTCoex], DHCP Packet notify\n");
3755                 BTC_TRACE(trace_buf);
3756         }
3757 }
3758
3759 void ex_halbtc8192e2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
3760                                        IN u8 *tmp_buf, IN u8 length)
3761 {
3762         u8                      bt_info = 0;
3763         u8                      i, rsp_source = 0;
3764         boolean                 bt_busy = false, limited_dig = false;
3765         boolean                 wifi_connected = false;
3766
3767         coex_sta->c2h_bt_info_req_sent = false;
3768
3769         rsp_source = tmp_buf[0] & 0xf;
3770         if (rsp_source >= BT_INFO_SRC_8192E_2ANT_MAX)
3771                 rsp_source = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
3772         coex_sta->bt_info_c2h_cnt[rsp_source]++;
3773
3774         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3775                     "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source,
3776                     length);
3777         BTC_TRACE(trace_buf);
3778         for (i = 0; i < length; i++) {
3779                 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
3780                 if (i == 1)
3781                         bt_info = tmp_buf[i];
3782                 if (i == length - 1) {
3783                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
3784                                     tmp_buf[i]);
3785                         BTC_TRACE(trace_buf);
3786                 } else {
3787                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
3788                                     tmp_buf[i]);
3789                         BTC_TRACE(trace_buf);
3790                 }
3791         }
3792
3793         if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) {
3794                 coex_sta->bt_retry_cnt =        /* [3:0] */
3795                         coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
3796
3797                 coex_sta->bt_rssi =
3798                         coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
3799
3800                 coex_sta->bt_info_ext =
3801                         coex_sta->bt_info_c2h[rsp_source][4];
3802
3803                 /* Here we need to resend some wifi info to BT */
3804                 /* because bt is reset and loss of the info. */
3805                 if ((coex_sta->bt_info_ext & BIT(1))) {
3806                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3807                                 "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
3808                         BTC_TRACE(trace_buf);
3809                         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
3810                                            &wifi_connected);
3811                         if (wifi_connected)
3812                                 ex_halbtc8192e2ant_media_status_notify(
3813                                         btcoexist, BTC_MEDIA_CONNECT);
3814                         else
3815                                 ex_halbtc8192e2ant_media_status_notify(
3816                                         btcoexist, BTC_MEDIA_DISCONNECT);
3817                 }
3818
3819                 if ((coex_sta->bt_info_ext & BIT(3))) {
3820                         if (!btcoexist->manual_control &&
3821                             !btcoexist->stop_coex_dm) {
3822                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3823                                         "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
3824                                 BTC_TRACE(trace_buf);
3825                                 halbtc8192e2ant_ignore_wlan_act(btcoexist,
3826                                                         FORCE_EXEC, false);
3827                         }
3828                 } else {
3829                         /* BT already NOT ignore Wlan active, do nothing here. */
3830                 }
3831
3832 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
3833                 if ((coex_sta->bt_info_ext & BIT(4))) {
3834                         /* BT auto report already enabled, do nothing */
3835                 } else
3836                         halbtc8192e2ant_bt_auto_report(btcoexist, FORCE_EXEC,
3837                                                        true);
3838 #endif
3839         }
3840
3841         /* check BIT2 first ==> check if bt is under inquiry or page scan */
3842         if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE)
3843                 coex_sta->c2h_bt_inquiry_page = true;
3844         else
3845                 coex_sta->c2h_bt_inquiry_page = false;
3846
3847         /* set link exist status */
3848         if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) {
3849                 coex_sta->bt_link_exist = false;
3850                 coex_sta->pan_exist = false;
3851                 coex_sta->a2dp_exist = false;
3852                 coex_sta->hid_exist = false;
3853                 coex_sta->sco_exist = false;
3854         } else {        /* connection exists */
3855                 coex_sta->bt_link_exist = true;
3856                 if (bt_info & BT_INFO_8192E_2ANT_B_FTP)
3857                         coex_sta->pan_exist = true;
3858                 else
3859                         coex_sta->pan_exist = false;
3860                 if (bt_info & BT_INFO_8192E_2ANT_B_A2DP)
3861                         coex_sta->a2dp_exist = true;
3862                 else
3863                         coex_sta->a2dp_exist = false;
3864                 if (bt_info & BT_INFO_8192E_2ANT_B_HID)
3865                         coex_sta->hid_exist = true;
3866                 else
3867                         coex_sta->hid_exist = false;
3868                 if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO)
3869                         coex_sta->sco_exist = true;
3870                 else
3871                         coex_sta->sco_exist = false;
3872         }
3873
3874         halbtc8192e2ant_update_bt_link_info(btcoexist);
3875
3876         if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) {
3877                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
3878                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3879                         "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
3880                 BTC_TRACE(trace_buf);
3881         } else if (bt_info ==
3882                 BT_INFO_8192E_2ANT_B_CONNECTION) {      /* connection exists but no busy */
3883                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
3884                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3885                             "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
3886                 BTC_TRACE(trace_buf);
3887         } else if ((bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
3888                    (bt_info & BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
3889                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
3890                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3891                             "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
3892                 BTC_TRACE(trace_buf);
3893         } else if (bt_info & BT_INFO_8192E_2ANT_B_ACL_BUSY) {
3894                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
3895                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3896                             "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
3897                 BTC_TRACE(trace_buf);
3898         } else {
3899                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX;
3900                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3901                         "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
3902                 BTC_TRACE(trace_buf);
3903         }
3904
3905         if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
3906             (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
3907             (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
3908                 bt_busy = true;
3909                 limited_dig = true;
3910         } else {
3911                 bt_busy = false;
3912                 limited_dig = false;
3913         }
3914
3915         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
3916
3917         coex_dm->limited_dig = limited_dig;
3918         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
3919
3920         halbtc8192e2ant_run_coexist_mechanism(btcoexist);
3921 }
3922
3923 void ex_halbtc8192e2ant_halt_notify(IN struct btc_coexist *btcoexist)
3924 {
3925         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
3926         BTC_TRACE(trace_buf);
3927
3928         halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, true);
3929         halbtc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
3930         ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
3931 }
3932
3933 void ex_halbtc8192e2ant_periodical(IN struct btc_coexist *btcoexist)
3934 {
3935 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
3936         halbtc8192e2ant_query_bt_info(btcoexist);
3937         halbtc8192e2ant_monitor_bt_ctr(btcoexist);
3938         halbtc8192e2ant_monitor_bt_enable_disable(btcoexist);
3939 #else
3940         if (halbtc8192e2ant_is_wifi_status_changed(btcoexist) ||
3941             coex_dm->auto_tdma_adjust)
3942                 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
3943 #endif
3944 }
3945
3946 #endif
3947
3948 #endif  /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */
3949