1 /*============================================================*/
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3 /*This file is for 8812/8821/8811 TXBF mechanism*/
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4 /*============================================================*/
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5 #include "mp_precomp.h"
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6 #include "../phydm_precomp.h"
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8 #if (BEAMFORMING_SUPPORT == 1)
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9 #if (RTL8821B_SUPPORT == 1)
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12 halTxbf8821B_RfMode(
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14 IN PRT_BEAMFORMING_INFO pBeamInfo
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17 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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19 if (pDM_Odm->RFType == ODM_1T1R)
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22 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] set TxIQGen\n", __func__));
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24 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/
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25 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x1); /*RF Mode table write enable*/
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27 if (pBeamInfo->beamformee_su_cnt > 0) {
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29 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/
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30 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/
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31 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/
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33 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/
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34 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/
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35 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/
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38 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/
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39 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/
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40 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/
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42 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); /*Select RX mode*/
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43 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff, 0x3F7FF); /*Set Table data*/
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44 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/
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47 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/
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48 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000, 0x0); /*RF Mode table write disable*/
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50 if (pBeamInfo->beamformee_su_cnt > 0)
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51 ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x33);
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53 ODM_SetBBReg(pDM_Odm, rTxPath_Jaguar, bMaskByte1, 0x11);
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58 halTxbf8821B_DownloadNDPA(
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59 IN PDM_ODM_T pDM_Odm,
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63 u1Byte u1bTmp = 0, tmpReg422 = 0, Head_Page;
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64 u1Byte BcnValidReg = 0, count = 0, DLBcnCount = 0;
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65 BOOLEAN bSendBeacon = FALSE;
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66 u1Byte TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*default reseved 1 page for the IC type which is undefined.*/
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67 PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
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68 PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx;
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69 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter);
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70 PADAPTER Adapter = pDM_Odm->Adapter;
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72 pHalData->bFwDwRsvdPageInProgress = TRUE;
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74 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
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81 Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu1Byte)&TxPageBndy);
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83 /*Set REG_CR bit 8. DMA beacon by SW.*/
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84 u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8821B + 1);
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85 ODM_Write1Byte(pDM_Odm, REG_CR_8821B + 1, (u1bTmp | BIT0));
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88 /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
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89 tmpReg422 = ODM_Read1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2);
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90 ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2, tmpReg422 & (~BIT6));
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92 if (tmpReg422 & BIT6) {
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93 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("SetBeamformDownloadNDPA_8812(): There is an Adapter is sending beacon.\n"));
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97 /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/
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98 ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, Head_Page);
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101 /*Clear beacon valid check bit.*/
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102 BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2);
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103 ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 2, (BcnValidReg | BIT0));
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105 /*download NDPA rsvd page.*/
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106 if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU)
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107 Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE);
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109 Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE);
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111 /*check rsvd page download OK.*/
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112 BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2);
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114 while (!(BcnValidReg & BIT0) && count < 20) {
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117 BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_TDECTRL_8812A + 2);
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120 } while (!(BcnValidReg & BIT0) && DLBcnCount < 5);
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122 if (!(BcnValidReg & BIT0))
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123 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Download RSVD page failed!\n", __func__));
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125 /*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/
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126 ODM_Write1Byte(pDM_Odm, REG_TDECTRL_8812A + 1, TxPageBndy);
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128 /*To make sure that if there exists an adapter which would like to send beacon.*/
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129 /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
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130 /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/
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131 /*the beacon cannot be sent by HW.*/
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132 /*2010.06.23. Added by tynli.*/
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134 ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8821B + 2, tmpReg422);
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136 /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
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137 /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
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138 u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8821B + 1);
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139 ODM_Write1Byte(pDM_Odm, REG_CR_8821B + 1, (u1bTmp & (~BIT0)));
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141 pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED;
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143 pHalData->bFwDwRsvdPageInProgress = FALSE;
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148 halTxbf8821B_FwTxBFCmd(
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149 IN PDM_ODM_T pDM_Odm
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152 u1Byte Idx, Period0 = 0, Period1 = 0;
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153 u1Byte PageNum0 = 0xFF, PageNum1 = 0xFF;
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154 u1Byte u1TxBFParm[3] = {0};
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155 PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
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157 for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) {
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158 /*Modified by David*/
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159 if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
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161 if (pBeamInfo->BeamformeeEntry[Idx].bSound)
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164 PageNum0 = 0xFF; /*stop sounding*/
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165 Period0 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod);
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166 } else if (Idx == 1) {
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167 if (pBeamInfo->BeamformeeEntry[Idx].bSound)
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170 PageNum1 = 0xFF; /*stop sounding*/
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171 Period1 = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod);
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176 u1TxBFParm[0] = PageNum0;
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177 u1TxBFParm[1] = PageNum1;
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178 u1TxBFParm[2] = (Period1 << 4) | Period0;
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179 FillH2CCmd(Adapter, PHYDM_H2C_TXBF, 3, u1TxBFParm);
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181 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD,
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182 ("[%s] PageNum0 = %d Period0 = %d, PageNum1 = %d Period1 %d\n", __func__, PageNum0, Period0, PageNum1, Period1));
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187 HalTxbf8821B_Enter(
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189 IN u1Byte BFerBFeeIdx
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192 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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194 u1Byte BFerIdx = (BFerBFeeIdx & 0xF0) >> 4;
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195 u1Byte BFeeIdx = (BFerBFeeIdx & 0xF);
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197 PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo;
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198 RT_BEAMFORMEE_ENTRY BeamformeeEntry;
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199 RT_BEAMFORMER_ENTRY BeamformerEntry;
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202 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!\n", __func__));
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204 halTxbf8821B_RfMode(pDM_Odm, pBeamformingInfo);
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206 if (pDM_Odm->RFType == ODM_2T2R)
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207 ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x00000000); /*Nc =2*/
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209 ODM_SetBBReg(pDM_Odm, ODM_REG_CSI_CONTENT_VALUE, bMaskDWord, 0x01081008); /*Nc =1*/
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211 if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) {
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212 BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx];
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214 /*Sounding protocol control*/
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215 ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B, 0xCB);
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217 /*MAC address/Partial AID of Beamformer*/
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218 if (BFerIdx == 0) {
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219 for (i = 0; i < 6 ; i++)
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220 ODM_Write1Byte(pDM_Odm, (REG_BFMER0_INFO_8812A + i), BeamformerEntry.MacAddr[i]);
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221 /*CSI report use legacy ofdm so don't need to fill P_AID. */
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222 /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER0_INFO_8821B+6, BeamformEntry.P_AID); */
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224 for (i = 0; i < 6 ; i++)
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225 ODM_Write1Byte(pDM_Odm, (REG_BFMER1_INFO_8812A + i), BeamformerEntry.MacAddr[i]);
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226 /*CSI report use legacy ofdm so don't need to fill P_AID.*/
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227 /*PlatformEFIOWrite2Byte(Adapter, REG_BFMER1_INFO_8821B+6, BeamformEntry.P_AID);*/
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230 /*CSI report parameters of Beamformee*/
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231 if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU) {
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232 if (pDM_Odm->RFType == ODM_2T2R)
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233 CSI_Param = 0x01090109;
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235 CSI_Param = 0x01080108;
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237 if (pDM_Odm->RFType == ODM_2T2R)
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238 CSI_Param = 0x03090309;
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240 CSI_Param = 0x03080308;
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243 ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, CSI_Param);
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244 ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, CSI_Param);
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245 ODM_Write4Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, CSI_Param);
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247 /*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/
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248 ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B + 3, 0x50);
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252 if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) {
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253 BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx];
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255 if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS))
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256 STAid = BeamformeeEntry.MacId;
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258 STAid = BeamformeeEntry.P_AID;
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260 /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
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261 if (BFeeIdx == 0) {
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262 ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B, STAid);
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263 ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 3) | BIT4 | BIT6 | BIT7);
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265 ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2, STAid | BIT12 | BIT14 | BIT15);
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267 /*CSI report parameters of Beamformee*/
\r
268 if (BFeeIdx == 0) {
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269 /*Get BIT24 & BIT25*/
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270 u1Byte tmp = ODM_Read1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3) & 0x3;
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272 ODM_Write1Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60);
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273 ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, STAid | BIT9);
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276 ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, STAid | 0xE200);
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278 phydm_Beamforming_Notify(pDM_Odm);
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284 HalTxbf8821B_Leave(
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289 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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290 PRT_BEAMFORMING_INFO pBeamformingInfo = &pDM_Odm->BeamformingInfo;
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291 RT_BEAMFORMER_ENTRY BeamformerEntry;
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292 RT_BEAMFORMEE_ENTRY BeamformeeEntry;
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294 if (Idx < BEAMFORMER_ENTRY_NUM) {
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295 BeamformerEntry = pBeamformingInfo->BeamformerEntry[Idx];
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296 BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[Idx];
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300 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!, IDx = %d\n", __func__, Idx));
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302 /*Clear P_AID of Beamformee*/
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303 /*Clear MAC address of Beamformer*/
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304 /*Clear Associated Bfmee Sel*/
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306 if (BeamformerEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) {
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307 ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8821B, 0xC8);
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309 ODM_Write4Byte(pDM_Odm, REG_BFMER0_INFO_8812A, 0);
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310 ODM_Write2Byte(pDM_Odm, REG_BFMER0_INFO_8812A + 4, 0);
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311 ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, 0);
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312 ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, 0);
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313 ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, 0);
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315 ODM_Write4Byte(pDM_Odm, REG_BFMER1_INFO_8812A, 0);
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316 ODM_Write2Byte(pDM_Odm, REG_BFMER1_INFO_8812A + 4, 0);
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317 ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8821B, 0);
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318 ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW40_8821B, 0);
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319 ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW80_8821B, 0);
\r
323 if (BeamformeeEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) {
\r
324 halTxbf8821B_RfMode(pDM_Odm, pBeamformingInfo);
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326 ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B, 0x0);
\r
327 ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, 0);
\r
329 ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2, ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8821B + 2) & 0xF000);
\r
330 ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2, ODM_Read2Byte(pDM_Odm, REG_BFMEE_SEL_8812A + 2) & 0x60);
\r
338 HalTxbf8821B_Status(
\r
343 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
\r
344 u2Byte BeamCtrlVal;
\r
345 u4Byte BeamCtrlReg;
\r
346 PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
\r
347 RT_BEAMFORMEE_ENTRY BeamformEntry = pBeamInfo->BeamformeeEntry[Idx];
\r
349 if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS))
\r
350 BeamCtrlVal = BeamformEntry.MacId;
\r
352 BeamCtrlVal = BeamformEntry.P_AID;
\r
355 BeamCtrlReg = REG_TXBF_CTRL_8821B;
\r
357 BeamCtrlReg = REG_TXBF_CTRL_8821B + 2;
\r
358 BeamCtrlVal |= BIT12 | BIT14 | BIT15;
\r
361 if (BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
\r
362 if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20)
\r
363 BeamCtrlVal |= BIT9;
\r
364 else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40)
\r
365 BeamCtrlVal |= BIT10;
\r
366 else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_80)
\r
367 BeamCtrlVal |= BIT11;
\r
369 BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11);
\r
371 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BeamCtrlVal = 0x%x!\n", __func__, BeamCtrlVal));
\r
373 ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal);
\r
379 HalTxbf8821B_FwTxBF(
\r
384 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
\r
385 PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;
\r
386 PRT_BEAMFORMEE_ENTRY pBeamEntry = pBeamInfo->BeamformeeEntry + Idx;
\r
388 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
\r
390 if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING)
\r
391 halTxbf8821B_DownloadNDPA(pDM_Odm, Idx);
\r
393 halTxbf8821B_FwTxBFCmd(pDM_Odm);
\r