1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
20 /*****************************************************************************
21 * Module: __INC_HAL8192CPHYCFG_H
27 * Export: Constants, macro, functions(API), global variables(None).
33 * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h.
34 * 2. Reorganize code architecture.
36 *****************************************************************************/
37 /* Check to see if the file has been included already. */
38 #ifndef __INC_HAL8192CPHYCFG_H
39 #define __INC_HAL8192CPHYCFG_H
42 /*--------------------------Define Parameters-------------------------------*/
44 #define MAX_STALL_TIME 50 //us
45 #define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80)
46 #define MAX_TXPWR_IDX_NMODE_92S 63
47 #define Reset_Cnt_Limit 3
51 #define MAX_AGGR_NUM 0x0A0A
53 #define MAX_AGGR_NUM 0x0909
57 #define SET_RTL8192SE_RF_SLEEP(_pAdapter) \
60 u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \
62 PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \
63 PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \
64 PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \
65 PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \
67 PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \
68 PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \
70 PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \
72 PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \
74 PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \
79 /*--------------------------Define Parameters-------------------------------*/
82 /*------------------------------Define structure----------------------------*/
87 /*------------------------------Define structure----------------------------*/
90 /*------------------------Export global variable----------------------------*/
91 /*------------------------Export global variable----------------------------*/
94 /*------------------------Export Marco Definition---------------------------*/
95 /*------------------------Export Marco Definition---------------------------*/
98 /*--------------------------Exported Function prototype---------------------*/
100 // BB and RF register read/write
102 u32 PHY_QueryBBReg8192C( IN PADAPTER Adapter,
105 void PHY_SetBBReg8192C( IN PADAPTER Adapter,
109 u32 PHY_QueryRFReg8192C( IN PADAPTER Adapter,
113 void PHY_SetRFReg8192C( IN PADAPTER Adapter,
120 // Initialization related function
122 /* MAC/BB/RF HAL config */
123 int PHY_MACConfig8192C( IN PADAPTER Adapter );
124 int PHY_BBConfig8192C( IN PADAPTER Adapter );
125 int PHY_RFConfig8192C( IN PADAPTER Adapter );
127 int rtl8192c_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter,
130 int rtl8192c_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter,
133 /* BB/RF readback check for making sure init OK */
134 int rtl8192c_PHY_CheckBBAndRFOK( IN PADAPTER Adapter,
135 IN HW_BLOCK_E CheckBlock,
137 /* Read initi reg value for tx power setting. */
138 void rtl8192c_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter );
143 //extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter,
144 // IN RT_RF_POWER_STATE eRFPowerState);
149 void PHY_GetTxPowerLevel8192C( IN PADAPTER Adapter,
150 OUT s32* powerlevel );
151 void PHY_SetTxPowerLevel8192C( IN PADAPTER Adapter,
153 BOOLEAN PHY_UpdateTxPowerDbm8192C( IN PADAPTER Adapter,
158 PHY_ScanOperationBackup8192C(IN PADAPTER Adapter,
162 // Switch bandwidth for 8192S
164 //extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer );
165 void PHY_SetBWMode8192C( IN PADAPTER pAdapter,
166 IN CHANNEL_WIDTH ChnlWidth,
167 IN unsigned char Offset );
170 // Set FW CMD IO for 8192S.
172 //extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter,
173 // IN IO_TYPE IOType);
176 // Set A2 entry to fw for 8192S
178 extern void FillA2Entry8192C( IN PADAPTER Adapter,
184 // channel switch related funciton
186 //extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer );
187 void PHY_SwChnl8192C( IN PADAPTER pAdapter,
191 PHY_SetSwChnlBWMode8192C(
194 IN CHANNEL_WIDTH Bandwidth,
200 // BB/MAC/RF other monitor API
202 void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter,
203 IN BOOLEAN bEnableMonitorMode );
205 BOOLEAN PHY_CheckIsLegalRfPath8192C(IN PADAPTER pAdapter,
209 VOID rtl8192c_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain);
212 // Modify the value of the hw register when beacon interval be changed.
215 rtl8192c_PHY_SetBeaconHwReg( IN PADAPTER Adapter,
216 IN u16 BeaconInterval );
220 PHY_SwitchEphyParameter(
225 PHY_EnableHostClkReq(
235 #ifdef RTL8192C_RECONFIG_TO_1T1R
236 extern void PHY_Reconfig_To_1T1R(_adapter *padapter);
238 /*--------------------------Exported Function prototype---------------------*/
240 #endif // __INC_HAL8192CPHYCFG_H