drivers/net/wireless/rockchip_wlan/rtl8723bs/include/Hal8192CPhyCfg.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 /*****************************************************************************
  21  * Module:      __INC_HAL8192CPHYCFG_H
  22  *
  23  *
  24  * Note:
  25  *
  26  *
  27  * Export:      Constants, macro, functions(API), global variables(None).
  28  *
  29  * Abbrev:
  30  *
  31  * History:
  32  *              Data            Who             Remark
  33  *      08/07/2007  MHC         1. Porting from 9x series PHYCFG.h.
  34  *                                                      2. Reorganize code architecture.
  35  *
  36  *****************************************************************************/
  37  /* Check to see if the file has been included already.  */
  38 #ifndef __INC_HAL8192CPHYCFG_H
  39 #define __INC_HAL8192CPHYCFG_H
  40
  41
  42 /*--------------------------Define Parameters-------------------------------*/
  43 #define LOOP_LIMIT                              5
  44 #define MAX_STALL_TIME                  50              //us
  45 #define AntennaDiversityValue   0x80    //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80)
  46 #define MAX_TXPWR_IDX_NMODE_92S 63
  47 #define Reset_Cnt_Limit                 3
  48
  49
  50 #ifdef CONFIG_PCI_HCI
  51 #define MAX_AGGR_NUM    0x0A0A
  52 #else
  53 #define MAX_AGGR_NUM    0x0909
  54 #endif
  55
  56 #ifdef CONFIG_PCI_HCI
  57 #define SET_RTL8192SE_RF_SLEEP(_pAdapter)                                                       \
  58 {                                                                                                                                       \
  59         u1Byte          u1bTmp;                                                                                         \
  60         u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL);            \
  61         u1bTmp |= BIT0;                                                                                                 \
  62         PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp);            \
  63         PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0);                                \
  64         PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF);                               \
  65         PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC);                                \
  66         delay_us(100);                                                                                                  \
  67         PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC);                                \
  68         PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0);                                \
  69         delay_us(10);                                                                                                   \
  70         PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC);                                \
  71         delay_us(10);                                                                                                   \
  72         PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC);                                \
  73         delay_us(10);                                                                                                   \
  74         PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC);                                \
  75 }
  76 #endif
  77
  78
  79 /*--------------------------Define Parameters-------------------------------*/
  80
  81
  82 /*------------------------------Define structure----------------------------*/
  83
  84
  85 /* BB/RF related */
  86
  87 /*------------------------------Define structure----------------------------*/
  88
  89
  90 /*------------------------Export global variable----------------------------*/
  91 /*------------------------Export global variable----------------------------*/
  92
  93
  94 /*------------------------Export Marco Definition---------------------------*/
  95 /*------------------------Export Marco Definition---------------------------*/
  96
  97
  98 /*--------------------------Exported Function prototype---------------------*/
  99 //
 100 // BB and RF register read/write
 101 //
 102 u32     PHY_QueryBBReg8192C(    IN      PADAPTER        Adapter,
 103                                                                 IN      u32             RegAddr,
 104                                                                 IN      u32             BitMask );
 105 void    PHY_SetBBReg8192C(      IN      PADAPTER        Adapter,
 106                                                                 IN      u32             RegAddr,
 107                                                                 IN      u32             BitMask,
 108                                                                 IN      u32             Data    );
 109 u32     PHY_QueryRFReg8192C(    IN      PADAPTER        Adapter,
 110                                                                 IN      u8                              eRFPath,
 111                                                                 IN      u32                             RegAddr,
 112                                                                 IN      u32                             BitMask );
 113 void    PHY_SetRFReg8192C(      IN      PADAPTER                Adapter,
 114                                                                 IN      u8                              eRFPath,
 115                                                                 IN      u32                             RegAddr,
 116                                                                 IN      u32                             BitMask,
 117                                                                 IN      u32                             Data    );
 118
 119 //
 120 // Initialization related function
 121 //
 122 /* MAC/BB/RF HAL config */
 123 int     PHY_MACConfig8192C(     IN      PADAPTER        Adapter );
 124 int     PHY_BBConfig8192C(      IN      PADAPTER        Adapter );
 125 int     PHY_RFConfig8192C(      IN      PADAPTER        Adapter );
 126 /* RF config */
 127 int     rtl8192c_PHY_ConfigRFWithParaFile(      IN      PADAPTER        Adapter,
 128                                                                                                 IN      u8*                     pFileName,
 129                                                                                                 IN      u8                      eRFPath);
 130 int     rtl8192c_PHY_ConfigRFWithHeaderFile(    IN      PADAPTER        Adapter,
 131                                                                                                 IN      u8                      eRFPath);
 132
 133 /* BB/RF readback check for making sure init OK */
 134 int     rtl8192c_PHY_CheckBBAndRFOK(    IN      PADAPTER                Adapter,
 135                                                                                         IN      HW_BLOCK_E              CheckBlock,
 136                                                                                         IN      u8                              eRFPath   );
 137 /* Read initi reg value for tx power setting. */
 138 void    rtl8192c_PHY_GetHWRegOriginalValue(     IN      PADAPTER                Adapter );
 139
 140 //
 141 // RF Power setting
 142 //
 143 //extern        BOOLEAN PHY_SetRFPowerState(IN  PADAPTER                        Adapter,
 144 //                                                                      IN      RT_RF_POWER_STATE       eRFPowerState);
 145
 146 //
 147 // BB TX Power R/W
 148 //
 149 void    PHY_GetTxPowerLevel8192C(       IN      PADAPTER                Adapter,
 150                                                                                         OUT s32*                powerlevel      );
 151 void    PHY_SetTxPowerLevel8192C(       IN      PADAPTER                Adapter,
 152                                                                                         IN      u8                      channel );
 153 BOOLEAN PHY_UpdateTxPowerDbm8192C(      IN      PADAPTER        Adapter,
 154                                                                                         IN      int             powerInDbm      );
 155
 156 //
 157 VOID
 158 PHY_ScanOperationBackup8192C(IN PADAPTER        Adapter,
 159                                                                                 IN      u8              Operation       );
 160
 161 //
 162 // Switch bandwidth for 8192S
 163 //
 164 //extern        void    PHY_SetBWModeCallback8192C(     IN      PRT_TIMER               pTimer  );
 165 void    PHY_SetBWMode8192C(     IN      PADAPTER                        pAdapter,
 166                                                                         IN      CHANNEL_WIDTH   ChnlWidth,
 167                                                                         IN      unsigned char   Offset  );
 168
 169 //
 170 // Set FW CMD IO for 8192S.
 171 //
 172 //extern        BOOLEAN HalSetIO8192C(  IN      PADAPTER                        Adapter,
 173 //                                                                      IN      IO_TYPE                         IOType);
 174
 175 //
 176 // Set A2 entry to fw for 8192S
 177 //
 178 extern  void FillA2Entry8192C(          IN      PADAPTER                        Adapter,
 179                                                                                 IN      u8                              index,
 180                                                                                 IN      u8*                             val);
 181
 182
 183 //
 184 // channel switch related funciton
 185 //
 186 //extern        void    PHY_SwChnlCallback8192C(        IN      PRT_TIMER               pTimer  );
 187 void    PHY_SwChnl8192C(        IN      PADAPTER                pAdapter,
 188                                                                         IN      u8                      channel );
 189
 190 VOID
 191 PHY_SetSwChnlBWMode8192C(
 192         IN      PADAPTER                        Adapter,
 193         IN      u8                                      channel,
 194         IN      CHANNEL_WIDTH   Bandwidth,
 195         IN      u8                                      Offset40,
 196         IN      u8                                      Offset80
 197 );
 198
 199 //
 200 // BB/MAC/RF other monitor API
 201 //
 202 void    PHY_SetMonitorMode8192C(IN      PADAPTER        pAdapter,
 203                                                                                 IN      BOOLEAN         bEnableMonitorMode      );
 204
 205 BOOLEAN PHY_CheckIsLegalRfPath8192C(IN  PADAPTER        pAdapter,
 206                                                                                         IN      u32             eRFPath );
 207
 208
 209 VOID rtl8192c_PHY_SetRFPathSwitch(IN    PADAPTER        pAdapter, IN    BOOLEAN         bMain);
 210
 211 //
 212 // Modify the value of the hw register when beacon interval be changed.
 213 //
 214 void
 215 rtl8192c_PHY_SetBeaconHwReg(    IN      PADAPTER                Adapter,
 216                                         IN      u16                     BeaconInterval  );
 217
 218
 219 extern  VOID
 220 PHY_SwitchEphyParameter(
 221         IN      PADAPTER                        Adapter
 222         );
 223
 224 extern  VOID
 225 PHY_EnableHostClkReq(
 226         IN      PADAPTER                        Adapter
 227         );
 228
 229 BOOLEAN
 230 SetAntennaConfig92C(
 231         IN      PADAPTER        Adapter,
 232         IN      u8              DefaultAnt
 233         );
 234
 235 #ifdef RTL8192C_RECONFIG_TO_1T1R
 236 extern void     PHY_Reconfig_To_1T1R(_adapter *padapter);
 237 #endif
 238 /*--------------------------Exported Function prototype---------------------*/
 239
 240 #endif  // __INC_HAL8192CPHYCFG_H
 241