drivers/net/wireless/rockchip_wlan/rtl8723bs/include/rtl8188e_spec.h

   1 /******************************************************************************\r
   2  *\r
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
   4  *\r
   5  * This program is free software; you can redistribute it and/or modify it\r
   6  * under the terms of version 2 of the GNU General Public License as\r
   7  * published by the Free Software Foundation.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
  12  * more details.\r
  13  *\r
  14  * You should have received a copy of the GNU General Public License along with\r
  15  * this program; if not, write to the Free Software Foundation, Inc.,\r
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
  17  *\r
  18  *******************************************************************************/\r
  19 #ifndef __RTL8188E_SPEC_H__\r
  20 #define __RTL8188E_SPEC_H__\r
  21 \r
  22 \r
  23 //============================================================\r
  24 //       8188E Regsiter offset definition\r
  25 //============================================================\r
  26 \r
  27 \r
  28 //============================================================\r
  29 //\r
  30 //============================================================\r
  31 \r
  32 //-----------------------------------------------------\r
  33 //\r
  34 //      0x0000h ~ 0x00FFh       System Configuration\r
  35 //\r
  36 //-----------------------------------------------------\r
  37 #define REG_BB_PAD_CTRL                         0x0064\r
  38 #define REG_HMEBOX_E0                                   0x0088\r
  39 #define REG_HMEBOX_E1                                   0x008A\r
  40 #define REG_HMEBOX_E2                                   0x008C\r
  41 #define REG_HMEBOX_E3                                   0x008E\r
  42 #define REG_HMEBOX_EXT_0                                0x01F0\r
  43 #define REG_HMEBOX_EXT_1                                0x01F4\r
  44 #define REG_HMEBOX_EXT_2                                0x01F8\r
  45 #define REG_HMEBOX_EXT_3                                0x01FC\r
  46 #define REG_HIMR_88E                                    0x00B0 //RTL8188E\r
  47 #define REG_HISR_88E                                    0x00B4 //RTL8188E\r
  48 #define REG_HIMRE_88E                                   0x00B8 //RTL8188E\r
  49 #define REG_HISRE_88E                                   0x00BC //RTL8188E\r
  50 #define REG_MACID_NO_LINK_0                     0x0484\r
  51 #define REG_MACID_NO_LINK_1                     0x0488\r
  52 #define REG_MACID_PAUSE_0                       0x048c\r
  53 #define REG_MACID_PAUSE_1                       0x0490\r
  54 \r
  55 //-----------------------------------------------------\r
  56 //\r
  57 //      0x0100h ~ 0x01FFh       MACTOP General Configuration\r
  58 //\r
  59 //-----------------------------------------------------\r
  60 #define REG_PKTBUF_DBG_ADDR                     (REG_PKTBUF_DBG_CTRL)\r
  61 #define REG_RXPKTBUF_DBG                                (REG_PKTBUF_DBG_CTRL+2)\r
  62 #define REG_TXPKTBUF_DBG                                (REG_PKTBUF_DBG_CTRL+3)\r
  63 #define REG_WOWLAN_WAKE_REASON          REG_MCUTST_WOWLAN\r
  64 \r
  65 //-----------------------------------------------------\r
  66 //\r
  67 //      0x0200h ~ 0x027Fh       TXDMA Configuration\r
  68 //\r
  69 //-----------------------------------------------------\r
  70 \r
  71 //-----------------------------------------------------\r
  72 //\r
  73 //      0x0280h ~ 0x02FFh       RXDMA Configuration\r
  74 //\r
  75 //-----------------------------------------------------\r
  76 \r
  77 //-----------------------------------------------------\r
  78 //\r
  79 //      0x0300h ~ 0x03FFh       PCIe\r
  80 //\r
  81 //-----------------------------------------------------\r
  82 \r
  83 //-----------------------------------------------------\r
  84 //\r
  85 //      0x0400h ~ 0x047Fh       Protocol Configuration\r
  86 //\r
  87 //-----------------------------------------------------\r
  88 #ifdef CONFIG_WOWLAN\r
  89 #define REG_TXPKTBUF_IV_LOW             0x01a4\r
  90 #define REG_TXPKTBUF_IV_HIGH            0x01a8\r
  91 #endif\r
  92 \r
  93 //-----------------------------------------------------\r
  94 //\r
  95 //      0x0500h ~ 0x05FFh       EDCA Configuration\r
  96 //\r
  97 //-----------------------------------------------------\r
  98 \r
  99 //-----------------------------------------------------\r
 100 //\r
 101 //      0x0600h ~ 0x07FFh       WMAC Configuration\r
 102 //\r
 103 //-----------------------------------------------------\r
 104 #ifdef CONFIG_RF_GAIN_OFFSET\r
 105 #define EEPROM_RF_GAIN_OFFSET                   0xC1\r
 106 #define EEPROM_RF_GAIN_VAL                              0xF6\r
 107 #define EEPROM_THERMAL_OFFSET                   0xF5\r
 108 #endif //CONFIG_RF_GAIN_OFFSET\r
 109 //----------------------------------------------------------------------------\r
 110 //       88E Driver Initialization Offload REG_FDHM0(Offset 0x88, 8 bits)  \r
 111 //----------------------------------------------------------------------------\r
 112 //IOL config for REG_FDHM0(Reg0x88)\r
 113 #define CMD_INIT_LLT                                    BIT0\r
 114 #define CMD_READ_EFUSE_MAP              BIT1\r
 115 #define CMD_EFUSE_PATCH                 BIT2\r
 116 #define CMD_IOCONFIG                            BIT3\r
 117 #define CMD_INIT_LLT_ERR                        BIT4\r
 118 #define CMD_READ_EFUSE_MAP_ERR  BIT5\r
 119 #define CMD_EFUSE_PATCH_ERR             BIT6\r
 120 #define CMD_IOCONFIG_ERR                        BIT7\r
 121 \r
 122 //-----------------------------------------------------\r
 123 //\r
 124 //      Redifine register definition for compatibility\r
 125 //\r
 126 //-----------------------------------------------------\r
 127 \r
 128 // TODO: use these definition when using REG_xxx naming rule.\r
 129 // NOTE: DO NOT Remove these definition. Use later.\r
 130 #define ISR_88E                         REG_HISR_88E\r
 131 \r
 132 #ifdef CONFIG_PCI_HCI\r
 133 //#define IMR_RX_MASK           (IMR_ROK_88E|IMR_RDU_88E|IMR_RXFOVW_88E)\r
 134 #define IMR_TX_MASK                     (IMR_VODOK_88E|IMR_VIDOK_88E|IMR_BEDOK_88E|IMR_BKDOK_88E|IMR_MGNTDOK_88E|IMR_HIGHDOK_88E|IMR_BCNDERR0_88E)\r
 135 \r
 136 #ifdef CONFIG_CONCURRENT_MODE\r
 137 #define RT_BCN_INT_MASKS        (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E | IMR_BCNDMAINT_E_88E)\r
 138 #else\r
 139 #define RT_BCN_INT_MASKS        (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E)\r
 140 #endif\r
 141 \r
 142 #define RT_AC_INT_MASKS (IMR_VIDOK_88E | IMR_VODOK_88E | IMR_BEDOK_88E|IMR_BKDOK_88E)\r
 143 #endif\r
 144 \r
 145 \r
 146 //========================================================\r
 147 // General definitions\r
 148 //========================================================\r
 149 \r
 150 #define MACID_NUM_88E 64\r
 151 #define SEC_CAM_ENT_NUM_88E 32\r
 152 #define NSS_NUM_88E 1\r
 153 #define BAND_CAP_88E (BAND_CAP_2G)\r
 154 #define BW_CAP_88E (BW_CAP_20M | BW_CAP_40M)\r
 155 #define PROTO_CAP_88E (PROTO_CAP_11B|PROTO_CAP_11G|PROTO_CAP_11N)\r
 156 \r
 157 //----------------------------------------------------------------------------\r
 158 //       8192C EEPROM/EFUSE share register definition.\r
 159 //----------------------------------------------------------------------------\r
 160 \r
 161 #define EFUSE_ACCESS_ON                 0x69    // For RTL8723 only.\r
 162 #define EFUSE_ACCESS_OFF                        0x00    // For RTL8723 only.\r
 163 \r
 164 #endif /* __RTL8188E_SPEC_H__ */\r
 165 \r