1 /******************************************************************************
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3 * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved.
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5 * This program is free software; you can redistribute it and/or modify it
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6 * under the terms of version 2 of the GNU General Public License as
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7 * published by the Free Software Foundation.
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9 * This program is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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14 * You should have received a copy of the GNU General Public License along with
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15 * this program; if not, write to the Free Software Foundation, Inc.,
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16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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19 ******************************************************************************/
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20 #ifndef __RTL8192E_HAL_H__
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21 #define __RTL8192E_HAL_H__
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23 //#include "hal_com.h"
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26 #include "hal_data.h"
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28 #include "../hal/OUTSRC/odm_precomp.h"
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31 //include HAL Related header after HAL Related compiling flags
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32 #include "rtl8192e_spec.h"
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33 #include "rtl8192e_rf.h"
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34 #include "rtl8192e_dm.h"
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35 #include "rtl8192e_recv.h"
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36 #include "rtl8192e_xmit.h"
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37 #include "rtl8192e_cmd.h"
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38 #include "rtl8192e_led.h"
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39 #include "Hal8192EPwrSeq.h"
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40 #include "Hal8192EPhyReg.h"
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41 #include "Hal8192EPhyCfg.h"
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44 #ifdef DBG_CONFIG_ERROR_DETECT
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45 #include "rtl8192e_sreset.h"
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49 //---------------------------------------------------------------------
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50 // RTL8192E From header
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51 //---------------------------------------------------------------------
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52 #define RTL8192E_FW_IMG "rtl8192e/FW_NIC.bin"
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53 #define RTL8192E_FW_WW_IMG "rtl8192e/FW_WoWLAN.bin"
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54 #define RTL8192E_PHY_REG "rtl8192e/PHY_REG.txt"
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55 #define RTL8192E_PHY_RADIO_A "rtl8192e/RadioA.txt"
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56 #define RTL8192E_PHY_RADIO_B "rtl8192e/RadioB.txt"
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57 #define RTL8192E_TXPWR_TRACK "rtl8192e/TxPowerTrack.txt"
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58 #define RTL8192E_AGC_TAB "rtl8192e/AGC_TAB.txt"
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59 #define RTL8192E_PHY_MACREG "rtl8192e/MAC_REG.txt"
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60 #define RTL8192E_PHY_REG_PG "rtl8192e/PHY_REG_PG.txt"
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61 #define RTL8192E_PHY_REG_MP "rtl8192e/PHY_REG_MP.txt"
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62 #define RTL8192E_TXPWR_LMT "rtl8192e/TXPWR_LMT.txt"
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64 //---------------------------------------------------------------------
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65 // RTL8192E Power Configuration CMDs for PCIe interface
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66 //---------------------------------------------------------------------
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67 #define Rtl8192E_NIC_PWR_ON_FLOW rtl8192E_power_on_flow
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68 #define Rtl8192E_NIC_RF_OFF_FLOW rtl8192E_radio_off_flow
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69 #define Rtl8192E_NIC_DISABLE_FLOW rtl8192E_card_disable_flow
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70 #define Rtl8192E_NIC_ENABLE_FLOW rtl8192E_card_enable_flow
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71 #define Rtl8192E_NIC_SUSPEND_FLOW rtl8192E_suspend_flow
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72 #define Rtl8192E_NIC_RESUME_FLOW rtl8192E_resume_flow
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73 #define Rtl8192E_NIC_PDN_FLOW rtl8192E_hwpdn_flow
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74 #define Rtl8192E_NIC_LPS_ENTER_FLOW rtl8192E_enter_lps_flow
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75 #define Rtl8192E_NIC_LPS_LEAVE_FLOW rtl8192E_leave_lps_flow
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78 #if 1 // download firmware related data structure
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79 #define FW_SIZE_8192E 0x8000 // Compatible with RTL8192e Maximal RAM code size 32k
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80 #define FW_START_ADDRESS 0x1000
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81 #define FW_END_ADDRESS 0x5FFF
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84 #define IS_FW_HEADER_EXIST_8192E(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8192E(_pFwHdr) &0xFFF0) == 0x92E0)
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88 typedef struct _RT_FIRMWARE_8192E {
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89 FIRMWARE_SOURCE eFWSource;
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90 #ifdef CONFIG_EMBEDDED_FWIMG
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93 u8 szFwBuffer[FW_SIZE_8192E];
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96 } RT_FIRMWARE_8192E, *PRT_FIRMWARE_8192E;
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99 // This structure must be cared byte-ordering
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101 // Added by tynli. 2009.12.04.
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103 //=====================================================
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104 // Firmware Header(8-byte alinment required)
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105 //=====================================================
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106 //--- LONG WORD 0 ----
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107 #define GET_FIRMWARE_HDR_SIGNATURE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut
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108 #define GET_FIRMWARE_HDR_CATEGORY_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI
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109 #define GET_FIRMWARE_HDR_FUNCTION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions
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110 #define GET_FIRMWARE_HDR_VERSION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version
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111 #define GET_FIRMWARE_HDR_SUB_VER_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00
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112 #define GET_FIRMWARE_HDR_RSVD1_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8)
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114 //--- LONG WORD 1 ----
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115 #define GET_FIRMWARE_HDR_MONTH_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field
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116 #define GET_FIRMWARE_HDR_DATE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field
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117 #define GET_FIRMWARE_HDR_HOUR_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field
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118 #define GET_FIRMWARE_HDR_MINUTE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field
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119 #define GET_FIRMWARE_HDR_ROMCODE_SIZE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code
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120 #define GET_FIRMWARE_HDR_RSVD2_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16)
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122 //--- LONG WORD 2 ----
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123 #define GET_FIRMWARE_HDR_SVN_IDX_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index
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124 #define GET_FIRMWARE_HDR_RSVD3_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32)
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126 //--- LONG WORD 3 ----
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127 #define GET_FIRMWARE_HDR_RSVD4_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32)
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128 #define GET_FIRMWARE_HDR_RSVD5_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32)
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130 #endif // download firmware related data structure
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132 #define DRIVER_EARLY_INT_TIME_8192E 0x05
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133 #define BCN_DMA_ATIME_INT_TIME_8192E 0x02
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135 #define MAX_RX_DMA_BUFFER_SIZE_8192E 0x3d00 //0x3E80 //0x3FFF // RX 16K reserved for WOW ?
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138 #define TX_TOTAL_PAGE_NUMBER_8192E 243 //0x00~0xF3 totoal pages: F4
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140 #define TX_PAGE_BOUNDARY_8192E (TX_TOTAL_PAGE_NUMBER_8192E + 1)//0xF4 ~0xFF ,Rserved 12 pages for BCN/PS-POLL..
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141 #define TX_PAGE_LOAD_FW_BOUNDARY_8192E 0x47 //0xA5
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142 #define TX_PAGE_BOUNDARY_WOWLAN_8192E 0xE0
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144 // For Normal Chip Setting
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145 // (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_92C
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147 #define NORMAL_PAGE_NUM_HPQ_8192E 0x10
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148 #define NORMAL_PAGE_NUM_LPQ_8192E 0x10
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149 #define NORMAL_PAGE_NUM_NPQ_8192E 0x10
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150 #define NORMAL_PAGE_NUM_EPQ_8192E 0x00
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153 //Note: For WMM Normal Chip Setting ,modify later
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154 #define WMM_NORMAL_PAGE_NUM_HPQ_8192E NORMAL_PAGE_NUM_HPQ_8192E
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155 #define WMM_NORMAL_PAGE_NUM_LPQ_8192E NORMAL_PAGE_NUM_LPQ_8192E
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156 #define WMM_NORMAL_PAGE_NUM_NPQ_8192E NORMAL_PAGE_NUM_NPQ_8192E
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159 //-------------------------------------------------------------------------
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161 //-------------------------------------------------------------------------
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163 // pic buffer descriptor
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164 #define RTL8192EE_SEG_NUM TX_BUFFER_SEG_NUM
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165 #define TX_DESC_NUM_92E 128
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166 #define RX_DESC_NUM_92E 128
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168 //-------------------------------------------------------------------------
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170 //-------------------------------------------------------------------------
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172 #define HWSET_MAX_SIZE_8192E 512
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174 #define EFUSE_REAL_CONTENT_LEN_8192E 512
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176 #define EFUSE_MAP_LEN_8192E 512
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177 #define EFUSE_MAX_SECTION_8192E 64
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178 #define EFUSE_MAX_WORD_UNIT_8192E 4
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179 #define EFUSE_IC_ID_OFFSET_8192E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02.
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180 #define AVAILABLE_EFUSE_ADDR_8192E(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192E)
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182 // <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section
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183 // 9bytes + 1byt + 5bytes and pre 1byte.
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185 // | 1byte|----8bytes----|1byte|--5bytes--|
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186 // | | Reserved(14bytes) |
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188 #define EFUSE_OOB_PROTECT_BYTES_8192E 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte.
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192 //========================================================
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193 // EFUSE for BT definition
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194 //========================================================
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195 #define EFUSE_BT_REAL_BANK_CONTENT_LEN_8192E 512
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196 #define EFUSE_BT_REAL_CONTENT_LEN_8192E 1024 // 512*2
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197 #define EFUSE_BT_MAP_LEN_8192E 1024 // 1k bytes
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198 #define EFUSE_BT_MAX_SECTION_8192E 128 // 1024/8
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200 #define EFUSE_PROTECT_BYTES_BANK_8192E 16
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201 #define EFUSE_MAX_BANK_8192E 3
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202 //===========================================================
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204 #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)
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205 #define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
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207 //#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE)
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209 //#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )
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211 #define GetDefaultAdapter(padapter) padapter
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213 // rtl8812_hal_init.c
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214 void _8051Reset8192E(PADAPTER padapter);
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215 s32 FirmwareDownload8192E(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw);
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216 void InitializeFirmwareVars8192E(PADAPTER padapter);
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218 s32 InitLLTTable8192E(PADAPTER padapter, u8 txpktbuf_bndy);
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221 u8 GetEEPROMSize8192E(PADAPTER padapter);
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222 void hal_InitPGData_8192E(PADAPTER padapter, u8* PROMContent);
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223 void Hal_EfuseParseIDCode8192E(PADAPTER padapter, u8 *hwinfo);
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224 void Hal_ReadPROMVersion8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
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225 void Hal_ReadPowerSavingMode8192E(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail);
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226 void Hal_ReadTxPowerInfo8192E(PADAPTER padapter,u8* hwinfo,BOOLEAN AutoLoadFail);
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227 void Hal_ReadBoardType8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail);
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228 void Hal_ReadThermalMeter_8192E(PADAPTER Adapter,u8* PROMContent,BOOLEAN AutoloadFail);
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229 void Hal_ReadChannelPlan8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
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230 void Hal_EfuseParseXtal_8192E(PADAPTER pAdapter,u8* hwinfo,BOOLEAN AutoLoadFail);
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231 void Hal_ReadAntennaDiversity8192E(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail);
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232 void Hal_ReadPAType_8192E(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail);
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233 void Hal_EfuseParseBTCoexistInfo8192E(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail);
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234 u8 Hal_CrystalAFEAdjust(_adapter * Adapter);
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236 BOOLEAN HalDetectPwrDownMode8192E(PADAPTER Adapter);
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238 #ifdef CONFIG_WOWLAN
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239 void Hal_DetectWoWMode(PADAPTER pAdapter);
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240 #endif //CONFIG_WOWLAN
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242 /***********************************************************/
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243 // RTL8192E-MAC Setting
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244 VOID _InitTxBufferBoundary_8192E(IN PADAPTER Adapter,IN u8 txpktbuf_bndy);
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245 VOID _InitPageBoundary_8192E(IN PADAPTER Adapter);
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246 //VOID _InitTransferPageSize_8192E(IN PADAPTER Adapter);
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247 VOID _InitDriverInfoSize_8192E(IN PADAPTER Adapter,IN u8 drvInfoSize);
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248 VOID _InitRxSetting_8192E(PADAPTER Adapter);
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249 VOID _InitRDGSetting_8192E(PADAPTER Adapter);
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250 void _InitID_8192E(IN PADAPTER Adapter);
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251 VOID _InitNetworkType_8192E(IN PADAPTER Adapter);
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252 VOID _InitWMACSetting_8192E(IN PADAPTER Adapter);
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253 VOID _InitAdaptiveCtrl_8192E(IN PADAPTER Adapter);
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254 VOID _InitEDCA_8192E( IN PADAPTER Adapter);
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255 VOID _InitRetryFunction_8192E( IN PADAPTER Adapter);
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256 VOID _InitBeaconParameters_8192E(IN PADAPTER Adapter);
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257 VOID _InitBeaconMaxError_8192E(
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258 IN PADAPTER Adapter,
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259 IN BOOLEAN InfraMode
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261 void _BBTurnOnBlock_8192E(PADAPTER padapter);
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262 void SetBeaconRelatedRegisters8192E(PADAPTER padapter);
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263 VOID hal_ReadRFType_8192E(PADAPTER Adapter);
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264 // RTL8192E-MAC Setting
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265 /***********************************************************/
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267 void SetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val);
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268 void GetHwReg8192E(PADAPTER Adapter, u8 variable, u8* val);
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271 IN PADAPTER Adapter,
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272 IN HAL_DEF_VARIABLE eVariable,
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277 IN PADAPTER Adapter,
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278 IN HAL_DEF_VARIABLE eVariable,
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282 void rtl8192e_set_hal_ops(struct hal_ops *pHalFunc);
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283 void rtl8192e_init_default_value(_adapter * padapter);
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285 void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits);
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287 void rtl8192e_start_thread(_adapter *padapter);
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288 void rtl8192e_stop_thread(_adapter *padapter);
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290 #ifdef CONFIG_PCI_HCI
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291 BOOLEAN InterruptRecognized8192EE(PADAPTER Adapter);
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292 u16 get_txdesc_buf_addr(u16 ff_hwaddr);
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295 #endif //__RTL8192E_HAL_H__
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