1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
25 #define MPT_READ_MAC_1BYTE 1
26 #define MPT_READ_MAC_2BYTE 2
27 #define MPT_READ_MAC_4BYTE 3
28 #define MPT_WRITE_MAC_1BYTE 4
29 #define MPT_WRITE_MAC_2BYTE 5
30 #define MPT_WRITE_MAC_4BYTE 6
31 #define MPT_READ_BB_CCK 7
32 #define MPT_WRITE_BB_CCK 8
33 #define MPT_READ_BB_OFDM 9
34 #define MPT_WRITE_BB_OFDM 10
35 #define MPT_READ_RF 11
36 #define MPT_WRITE_RF 12
37 #define MPT_READ_EEPROM_1BYTE 13
38 #define MPT_WRITE_EEPROM_1BYTE 14
39 #define MPT_READ_EEPROM_2BYTE 15
40 #define MPT_WRITE_EEPROM_2BYTE 16
41 #define MPT_SET_CSTHRESHOLD 21
42 #define MPT_SET_INITGAIN 22
43 #define MPT_SWITCH_BAND 23
44 #define MPT_SWITCH_CHANNEL 24
45 #define MPT_SET_DATARATE 25
46 #define MPT_SWITCH_ANTENNA 26
47 #define MPT_SET_TX_POWER 27
48 #define MPT_SET_CONT_TX 28
49 #define MPT_SET_SINGLE_CARRIER 29
50 #define MPT_SET_CARRIER_SUPPRESSION 30
51 #define MPT_GET_RATE_TABLE 31
52 #define MPT_READ_TSSI 32
53 #define MPT_GET_THERMAL_METER 33
56 #define RTWPRIV_VER_INFO 1
58 #define MAX_MP_XMITBUF_SZ 2048
59 #define NR_MP_XMITFRAME 8
65 struct pkt_attrib attrib;
75 //insert urb, irp, and irpcnt info below...
81 #if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX)
94 #endif /* CONFIG_USB_HCI */
96 uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
107 typedef void(*wi_act_func)(void* padapter);
109 #ifdef PLATFORM_WINDOWS
115 NDIS_WORK_ITEM mp_wi;
116 NDIS_EVENT mp_wi_evt;
119 wi_act_func curractfunc;
120 // Variable needed in each implementation of CurrActFunc.
121 struct mp_wiparam param;
130 struct pkt_attrib attrib;
131 //struct tx_desc desc;
133 u8 desc[TXDESC_SIZE];
136 u32 buf_size, write_size;
137 _thread_hdl_ PktTxThread;
140 #if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) || defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ||defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8723B)
142 #define MP_MAX_LINES 1000
143 #define MP_MAX_LINES_BYTES 256
180 typedef VOID (*MPT_WORK_ITEM_HANDLER)(IN PVOID Adapter);
181 typedef struct _MPT_CONTEXT
183 // Indicate if we have started Mass Production Test.
184 BOOLEAN bMassProdTest;
186 // Indicate if the driver is unloading or unloaded.
187 BOOLEAN bMptDrvUnload;
190 _timer MPh2c_timeout_timer;
191 // Event used to sync H2c for BT control
193 BOOLEAN MptH2cRspEvent;
194 BOOLEAN MptBtC2hEvent;
195 BOOLEAN bMPh2c_timeout;
197 /* 8190 PCI does not support NDIS_WORK_ITEM. */
198 // Work Item for Mass Production Test.
199 //NDIS_WORK_ITEM MptWorkItem;
200 // RT_WORK_ITEM MptWorkItem;
201 // Event used to sync the case unloading driver and MptWorkItem is still in progress.
202 // NDIS_EVENT MptWorkItemEvent;
203 // To protect the following variables.
204 // NDIS_SPIN_LOCK MptWorkItemSpinLock;
205 // Indicate a MptWorkItem is scheduled and not yet finished.
206 BOOLEAN bMptWorkItemInProgress;
207 // An instance which implements function and context of MptWorkItem.
208 MPT_WORK_ITEM_HANDLER CurrMptAct;
210 // 1=Start, 0=Stop from UI.
212 // _TEST_MODE, defined in MPT_Req2.h
214 // Variable needed in each implementation of CurrMptAct.
215 ULONG MptActType; // Type of action performed in CurrMptAct.
216 // The Offset of IO operation is depend of MptActType.
218 // The Value of IO operation is depend of MptActType.
220 // The RfPath of IO operation is depend of MptActType.
223 WIRELESS_MODE MptWirelessModeToSw; // Wireless mode to switch.
224 u8 MptChannelToSw; // Channel to switch.
225 u8 MptInitGainToSet; // Initial gain to set.
226 //ULONG bMptAntennaA; // TRUE if we want to use antenna A.
227 ULONG MptBandWidth; // bandwidth to switch.
228 ULONG MptRateIndex; // rate index.
229 // Register value kept for Single Carrier Tx test.
231 // Register value kept for Single Carrier Tx test.
233 // For MP Tx Power index
234 u8 TxPwrLevel[2]; // rf-A, rf-B
236 // Content of RCR Regsiter for Mass Production Test.
238 // TRUE if we only receive packets with specific pattern.
239 BOOLEAN bMptFilterPattern;
240 // Rx OK count, statistics used in Mass Production Test.
242 // Rx CRC32 error count, statistics used in Mass Production Test.
243 ULONG MptRxCrcErrCnt;
245 BOOLEAN bCckContTx; // TRUE if we are in CCK Continuous Tx test.
246 BOOLEAN bOfdmContTx; // TRUE if we are in OFDM Continuous Tx test.
247 BOOLEAN bStartContTx; // TRUE if we have start Continuous Tx test.
248 // TRUE if we are in Single Carrier Tx test.
249 BOOLEAN bSingleCarrier;
250 // TRUE if we are in Carrier Suppression Tx Test.
251 BOOLEAN bCarrierSuppression;
252 //TRUE if we are in Single Tone Tx test.
255 // ACK counter asked by K.Y..
256 BOOLEAN bMptEnableAckCounter;
259 // SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~!
260 //s1Byte BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT];
261 //s1Byte BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES];
262 //s4Byte RfReadLine[2];
264 u8 APK_bound[2]; //for APK path A/path B
265 BOOLEAN bMptIndexEven;
273 u4Byte backup0x58_RF_A;
274 u4Byte backup0x58_RF_B;
281 u1Byte mptOutBuf[100];
283 }MPT_CONTEXT, *PMPT_CONTEXT;
288 #ifdef CONFIG_RTL8192D
289 #define EFUSE_MAP_SIZE 256
291 #ifdef CONFIG_RTL8192C
292 #define EFUSE_MAP_SIZE 128
294 #ifdef CONFIG_RTL8723A
295 #define EFUSE_MAP_SIZE 256
297 #ifdef CONFIG_RTL8188E
298 #define EFUSE_MAP_SIZE 512
300 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
301 #define EFUSE_MAP_SIZE 512
303 #ifdef CONFIG_RTL8192E
304 #define EFUSE_MAP_SIZE 512
306 #ifdef CONFIG_RTL8723B
307 #define EFUSE_MAP_SIZE 512
310 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
311 #define EFUSE_MAX_SIZE 1024
312 #elif defined(CONFIG_RTL8188E)
313 #define EFUSE_MAX_SIZE 256
315 #define EFUSE_MAX_SIZE 512
319 //#define RTPRIV_IOCTL_MP ( SIOCIWFIRSTPRIV + 0x17)
349 MP_DISABLE_BT_COEXIST,
355 #ifdef CONFIG_AP_WOWLAN
367 u32 mode;//0 for normal type packet, 1 for loopback packet (16bytes TXCMD)
372 struct mp_wiparam workparam;
373 // u8 act_in_progress;
382 u32 rx_bssidpktcount;
384 u32 rx_pktcount_filter_out;
385 u32 rx_crcerrpktcount;
387 BOOLEAN rx_bindicatePkt;
388 struct recv_stat rxstat;
393 u8 prime_channel_offset;
400 // u32 curr_crystalcap;
409 // uint ForcedDataRate;
411 u8 mac_filter[ETH_ALEN];
414 struct wlan_network mp_network;
415 NDIS_802_11_MAC_ADDRESS network_macaddr;
417 #ifdef PLATFORM_WINDOWS
424 struct mp_wi_cntx wi_cntx;
429 u8 h2c_resp_parambuf[512];
433 NDIS_EVENT h2c_cmd_evt;
438 NDIS_EVENT scsir_full_evt;
439 NDIS_EVENT scsiw_empty_evt;
442 u8 *pallocated_mp_xmitframe_buf;
443 u8 *pmp_xmtframe_buf;
444 _queue free_mp_xmitqueue;
445 u32 free_mp_xmitframe_cnt;
447 BOOLEAN bTxBufCkFail;
454 typedef struct _IOCMD_STRUCT_ {
460 struct rf_reg_param {
466 struct bb_reg_param {
471 typedef struct _MP_FIRMWARE {
472 FIRMWARE_SOURCE eFWSource;
473 #ifdef CONFIG_EMBEDDED_FWIMG
476 u8 szFwBuffer[0x8000];
479 } RT_MP_FIRMWARE, *PRT_MP_FIRMWARE;
484 //=======================================================================
489 /* Hardware Registers */
492 #define IOCMD_CTRL_REG 0x102502C0
493 #define IOCMD_DATA_REG 0x102502C4
495 #define IOCMD_CTRL_REG 0x10250370
496 #define IOCMD_DATA_REG 0x10250374
499 #define IOCMD_GET_THERMAL_METER 0xFD000028
501 #define IOCMD_CLASS_BB_RF 0xF0
502 #define IOCMD_BB_READ_IDX 0x00
503 #define IOCMD_BB_WRITE_IDX 0x01
504 #define IOCMD_RF_READ_IDX 0x02
505 #define IOCMD_RF_WRIT_IDX 0x03
507 #define BB_REG_BASE_ADDR 0x800
511 #define _2MAC_MODE_ 0
512 #define _LOOPBOOK_MODE_ 1
514 typedef enum _MP_MODE_ {
519 MP_SINGLE_CARRIER_TX,
520 MP_CARRIER_SUPPRISSION_TX,
527 #define MAX_RF_PATH_NUMS RF_PATH_MAX
530 extern u8 mpdatarate[NumRates];
532 /* MP set force data rate base on the definition. */
533 typedef enum _MPT_RATE_INDEX
536 MPT_RATE_1M =0 , /* 0 */
539 MPT_RATE_11M, /* 3 */
549 MPT_RATE_54M, /* 11 */
552 MPT_RATE_MCS0, /* 12 */
559 MPT_RATE_MCS7, /* 19 */
567 MPT_RATE_MCS15, /* 27 */
569 MPT_RATE_MCS17, // #29
574 MPT_RATE_MCS22, // #34
579 MPT_RATE_MCS27, // #39
580 MPT_RATE_MCS28, // #40
581 MPT_RATE_MCS29, // #41
582 MPT_RATE_MCS30, // #42
583 MPT_RATE_MCS31, // #43
584 /* VHT rate. Total: 20*/
585 MPT_RATE_VHT1SS_MCS0,// #44
586 MPT_RATE_VHT1SS_MCS1, // #
587 MPT_RATE_VHT1SS_MCS2,
588 MPT_RATE_VHT1SS_MCS3,
589 MPT_RATE_VHT1SS_MCS4,
590 MPT_RATE_VHT1SS_MCS5,
591 MPT_RATE_VHT1SS_MCS6, // #
592 MPT_RATE_VHT1SS_MCS7,
593 MPT_RATE_VHT1SS_MCS8,
594 MPT_RATE_VHT1SS_MCS9, //#53
595 MPT_RATE_VHT2SS_MCS0, //#54
596 MPT_RATE_VHT2SS_MCS1,
597 MPT_RATE_VHT2SS_MCS2,
598 MPT_RATE_VHT2SS_MCS3,
599 MPT_RATE_VHT2SS_MCS4,
600 MPT_RATE_VHT2SS_MCS5,
601 MPT_RATE_VHT2SS_MCS6,
602 MPT_RATE_VHT2SS_MCS7,
603 MPT_RATE_VHT2SS_MCS8,
604 MPT_RATE_VHT2SS_MCS9, //#63
605 MPT_RATE_VHT3SS_MCS0,
606 MPT_RATE_VHT3SS_MCS1,
607 MPT_RATE_VHT3SS_MCS2,
608 MPT_RATE_VHT3SS_MCS3,
609 MPT_RATE_VHT3SS_MCS4,
610 MPT_RATE_VHT3SS_MCS5,
611 MPT_RATE_VHT3SS_MCS6, // #126
612 MPT_RATE_VHT3SS_MCS7,
613 MPT_RATE_VHT3SS_MCS8,
614 MPT_RATE_VHT3SS_MCS9,
615 MPT_RATE_VHT4SS_MCS0,
616 MPT_RATE_VHT4SS_MCS1, // #131
617 MPT_RATE_VHT4SS_MCS2,
618 MPT_RATE_VHT4SS_MCS3,
619 MPT_RATE_VHT4SS_MCS4,
620 MPT_RATE_VHT4SS_MCS5,
621 MPT_RATE_VHT4SS_MCS6, // #136
622 MPT_RATE_VHT4SS_MCS7,
623 MPT_RATE_VHT4SS_MCS8,
624 MPT_RATE_VHT4SS_MCS9,
626 }MPT_RATE_E, *PMPT_RATE_E;
628 #define MAX_TX_PWR_INDEX_N_MODE 64 // 0x3F
630 typedef enum _POWER_MODE_ {
635 // The following enumeration is used to define the value of Reg0xD00[30:28] or JaguarReg0x914[18:16].
636 typedef enum _OFDM_TX_MODE {
638 OFDM_ContinuousTx = 1,
639 OFDM_SingleCarrier = 2,
644 #define RX_PKT_BROADCAST 1
645 #define RX_PKT_DEST_ADDR 2
646 #define RX_PKT_PHY_MATCH 3
649 #define RPTMaxCount 0x000FFFFF;
651 // parameter 1 : BitMask
653 // bit 1 : OFDM False Alarm
654 // bit 2 : OFDM MPDU OK
655 // bit 3 : OFDM MPDU Fail
657 // bit 5 : CCK False Alarm
658 // bit 6 : CCK MPDU ok
659 // bit 7 : CCK MPDU fail
660 // bit 8 : HT PPDU counter
661 // bit 9 : HT false alarm
662 // bit 10 : HT MPDU total
663 // bit 11 : HT MPDU OK
664 // bit 12 : HT MPDU fail
665 // bit 15 : RX full drop
666 typedef enum _RXPHY_BITMASK_
684 #define Mac_OFDM_OK 0x00000000
685 #define Mac_OFDM_Fail 0x10000000
686 #define Mac_OFDM_FasleAlarm 0x20000000
687 #define Mac_CCK_OK 0x30000000
688 #define Mac_CCK_Fail 0x40000000
689 #define Mac_CCK_FasleAlarm 0x50000000
690 #define Mac_HT_OK 0x60000000
691 #define Mac_HT_Fail 0x70000000
692 #define Mac_HT_FasleAlarm 0x90000000
693 #define Mac_DropPacket 0xA0000000
695 typedef enum _ENCRY_CTRL_STATE_ {
696 HW_CONTROL, //hw encryption& decryption
697 SW_CONTROL, //sw encryption& decryption
698 HW_ENCRY_SW_DECRY, //hw encryption & sw decryption
699 SW_ENCRY_HW_DECRY //sw encryption & hw decryption
702 typedef enum _MPT_TXPWR_DEF{
704 MPT_OFDM, // L and HT OFDM
708 #ifdef CONFIG_RF_GAIN_OFFSET
710 #if defined(CONFIG_RTL8723A)
711 #define REG_RF_BB_GAIN_OFFSET_CCK 0x0d
712 #define REG_RF_BB_GAIN_OFFSET_OFDM 0x0e
713 #define RF_GAIN_OFFSET_MASK 0xfffff
714 #elif defined(CONFIG_RTL8723B)
715 #define REG_RF_BB_GAIN_OFFSET 0x7f
716 #define RF_GAIN_OFFSET_MASK 0xfffff
717 #elif defined(CONFIG_RTL8188E)
718 #define REG_RF_BB_GAIN_OFFSET 0x55
719 #define RF_GAIN_OFFSET_MASK 0xfffff
721 #define REG_RF_BB_GAIN_OFFSET 0x55
722 #define RF_GAIN_OFFSET_MASK 0xfffff
723 #endif //CONFIG_RTL8723A
725 #endif //CONFIG_RF_GAIN_OFFSET
727 //=======================================================================
728 //extern struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv);
729 //extern int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe);
731 extern s32 init_mp_priv(PADAPTER padapter);
732 extern void free_mp_priv(struct mp_priv *pmp_priv);
733 extern s32 MPT_InitializeAdapter(PADAPTER padapter, u8 Channel);
734 extern void MPT_DeInitAdapter(PADAPTER padapter);
735 extern s32 mp_start_test(PADAPTER padapter);
736 extern void mp_stop_test(PADAPTER padapter);
738 //=======================================================================
739 //extern void IQCalibrateBcut(PADAPTER pAdapter);
741 //extern u32 bb_reg_read(PADAPTER Adapter, u16 offset);
742 //extern u8 bb_reg_write(PADAPTER Adapter, u16 offset, u32 value);
743 //extern u32 rf_reg_read(PADAPTER Adapter, u8 path, u8 offset);
744 //extern u8 rf_reg_write(PADAPTER Adapter, u8 path, u8 offset, u32 value);
746 //extern u32 get_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask);
747 //extern u8 set_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask, u32 value);
748 //extern u32 get_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask);
749 //extern u8 set_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask, u32 value);
751 extern u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask);
752 extern void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val);
754 extern u32 read_macreg(_adapter *padapter, u32 addr, u32 sz);
755 extern void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz);
756 extern u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask);
757 extern void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val);
758 extern u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr);
759 extern void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val);
761 extern void SetChannel(PADAPTER pAdapter);
762 extern void SetBandwidth(PADAPTER pAdapter);
763 extern int SetTxPower(PADAPTER pAdapter);
764 extern void SetAntennaPathPower(PADAPTER pAdapter);
765 //extern void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset);
766 extern void SetDataRate(PADAPTER pAdapter);
768 extern void SetAntenna(PADAPTER pAdapter);
770 //extern void SetCrystalCap(PADAPTER pAdapter);
772 extern s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther);
773 extern void GetThermalMeter(PADAPTER pAdapter, u8 *value);
775 extern void SetContinuousTx(PADAPTER pAdapter, u8 bStart);
776 extern void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart);
777 extern void SetSingleToneTx(PADAPTER pAdapter, u8 bStart);
778 extern void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart);
779 extern void PhySetTxPowerLevel(PADAPTER pAdapter);
781 extern void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc);
782 extern void SetPacketTx(PADAPTER padapter);
783 extern void SetPacketRx(PADAPTER pAdapter, u8 bStartRx);
785 extern void ResetPhyRxPktCount(PADAPTER pAdapter);
786 extern u32 GetPhyRxPktReceived(PADAPTER pAdapter);
787 extern u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter);
789 extern s32 SetPowerTracking(PADAPTER padapter, u8 enable);
790 extern void GetPowerTracking(PADAPTER padapter, u8 *enable);
792 extern u32 mp_query_psd(PADAPTER pAdapter, u8 *data);
795 extern void Hal_SetAntenna(PADAPTER pAdapter);
796 extern void Hal_SetBandwidth(PADAPTER pAdapter);
798 extern void Hal_SetTxPower(PADAPTER pAdapter);
799 extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart);
800 extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart );
801 extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart);
802 extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart);
803 extern void Hal_SetBandwidth(PADAPTER pAdapter);
805 extern void Hal_SetDataRate(PADAPTER pAdapter);
806 extern void Hal_SetChannel(PADAPTER pAdapter);
807 extern void Hal_SetAntennaPathPower(PADAPTER pAdapter);
808 extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther);
809 extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable);
810 extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable);
811 extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value);
812 extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter);
813 extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14);
814 extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven);
815 extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower);
816 extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower);
817 extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter);
818 extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter);
819 extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart);
820 extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart);
821 extern void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCapVal);
822 //extern void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv);
823 extern void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter ,BOOLEAN bMain);
824 extern ULONG mpt_ProQueryCalTxPower(PADAPTER pAdapter,u8 RfPath);
825 extern void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart);
826 extern u8 MptToMgntRate(u32 MptRateIdx);
827 extern u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr);