1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
25 #define MPT_READ_MAC_1BYTE 1
26 #define MPT_READ_MAC_2BYTE 2
27 #define MPT_READ_MAC_4BYTE 3
28 #define MPT_WRITE_MAC_1BYTE 4
29 #define MPT_WRITE_MAC_2BYTE 5
30 #define MPT_WRITE_MAC_4BYTE 6
31 #define MPT_READ_BB_CCK 7
32 #define MPT_WRITE_BB_CCK 8
33 #define MPT_READ_BB_OFDM 9
34 #define MPT_WRITE_BB_OFDM 10
35 #define MPT_READ_RF 11
36 #define MPT_WRITE_RF 12
37 #define MPT_READ_EEPROM_1BYTE 13
38 #define MPT_WRITE_EEPROM_1BYTE 14
39 #define MPT_READ_EEPROM_2BYTE 15
40 #define MPT_WRITE_EEPROM_2BYTE 16
41 #define MPT_SET_CSTHRESHOLD 21
42 #define MPT_SET_INITGAIN 22
43 #define MPT_SWITCH_BAND 23
44 #define MPT_SWITCH_CHANNEL 24
45 #define MPT_SET_DATARATE 25
46 #define MPT_SWITCH_ANTENNA 26
47 #define MPT_SET_TX_POWER 27
48 #define MPT_SET_CONT_TX 28
49 #define MPT_SET_SINGLE_CARRIER 29
50 #define MPT_SET_CARRIER_SUPPRESSION 30
51 #define MPT_GET_RATE_TABLE 31
52 #define MPT_READ_TSSI 32
53 #define MPT_GET_THERMAL_METER 33
57 #define MAX_MP_XMITBUF_SZ 2048
58 #define NR_MP_XMITFRAME 8
64 struct pkt_attrib attrib;
74 //insert urb, irp, and irpcnt info below...
80 #if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX)
93 #endif /* CONFIG_USB_HCI */
95 uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
106 typedef void(*wi_act_func)(void* padapter);
108 #ifdef PLATFORM_WINDOWS
114 NDIS_WORK_ITEM mp_wi;
115 NDIS_EVENT mp_wi_evt;
118 wi_act_func curractfunc;
119 // Variable needed in each implementation of CurrActFunc.
120 struct mp_wiparam param;
129 struct pkt_attrib attrib;
130 //struct tx_desc desc;
132 u8 desc[TXDESC_SIZE];
135 u32 buf_size, write_size;
136 _thread_hdl_ PktTxThread;
139 #if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) || defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) ||defined(CONFIG_RTL8192E) || defined(CONFIG_RTL8723B)
141 #define MP_MAX_LINES 1000
142 #define MP_MAX_LINES_BYTES 256
179 typedef VOID (*MPT_WORK_ITEM_HANDLER)(IN PVOID Adapter);
180 typedef struct _MPT_CONTEXT
182 // Indicate if we have started Mass Production Test.
183 BOOLEAN bMassProdTest;
185 // Indicate if the driver is unloading or unloaded.
186 BOOLEAN bMptDrvUnload;
189 _timer MPh2c_timeout_timer;
190 // Event used to sync H2c for BT control
192 BOOLEAN MptH2cRspEvent;
193 BOOLEAN MptBtC2hEvent;
194 BOOLEAN bMPh2c_timeout;
196 /* 8190 PCI does not support NDIS_WORK_ITEM. */
197 // Work Item for Mass Production Test.
198 //NDIS_WORK_ITEM MptWorkItem;
199 // RT_WORK_ITEM MptWorkItem;
200 // Event used to sync the case unloading driver and MptWorkItem is still in progress.
201 // NDIS_EVENT MptWorkItemEvent;
202 // To protect the following variables.
203 // NDIS_SPIN_LOCK MptWorkItemSpinLock;
204 // Indicate a MptWorkItem is scheduled and not yet finished.
205 BOOLEAN bMptWorkItemInProgress;
206 // An instance which implements function and context of MptWorkItem.
207 MPT_WORK_ITEM_HANDLER CurrMptAct;
209 // 1=Start, 0=Stop from UI.
211 // _TEST_MODE, defined in MPT_Req2.h
213 // Variable needed in each implementation of CurrMptAct.
214 ULONG MptActType; // Type of action performed in CurrMptAct.
215 // The Offset of IO operation is depend of MptActType.
217 // The Value of IO operation is depend of MptActType.
219 // The RfPath of IO operation is depend of MptActType.
222 WIRELESS_MODE MptWirelessModeToSw; // Wireless mode to switch.
223 u8 MptChannelToSw; // Channel to switch.
224 u8 MptInitGainToSet; // Initial gain to set.
225 //ULONG bMptAntennaA; // TRUE if we want to use antenna A.
226 ULONG MptBandWidth; // bandwidth to switch.
227 ULONG MptRateIndex; // rate index.
228 // Register value kept for Single Carrier Tx test.
230 // Register value kept for Single Carrier Tx test.
232 // For MP Tx Power index
233 u8 TxPwrLevel[2]; // rf-A, rf-B
235 // Content of RCR Regsiter for Mass Production Test.
237 // TRUE if we only receive packets with specific pattern.
238 BOOLEAN bMptFilterPattern;
239 // Rx OK count, statistics used in Mass Production Test.
241 // Rx CRC32 error count, statistics used in Mass Production Test.
242 ULONG MptRxCrcErrCnt;
244 BOOLEAN bCckContTx; // TRUE if we are in CCK Continuous Tx test.
245 BOOLEAN bOfdmContTx; // TRUE if we are in OFDM Continuous Tx test.
246 BOOLEAN bStartContTx; // TRUE if we have start Continuous Tx test.
247 // TRUE if we are in Single Carrier Tx test.
248 BOOLEAN bSingleCarrier;
249 // TRUE if we are in Carrier Suppression Tx Test.
250 BOOLEAN bCarrierSuppression;
251 //TRUE if we are in Single Tone Tx test.
254 // ACK counter asked by K.Y..
255 BOOLEAN bMptEnableAckCounter;
258 // SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~!
259 //s1Byte BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT];
260 //s1Byte BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES];
261 //s4Byte RfReadLine[2];
263 u8 APK_bound[2]; //for APK path A/path B
264 BOOLEAN bMptIndexEven;
272 u4Byte backup0x58_RF_A;
273 u4Byte backup0x58_RF_B;
280 u1Byte mptOutBuf[100];
282 }MPT_CONTEXT, *PMPT_CONTEXT;
287 #ifdef CONFIG_RTL8192D
288 #define EFUSE_MAP_SIZE 256
290 #ifdef CONFIG_RTL8192C
291 #define EFUSE_MAP_SIZE 128
293 #ifdef CONFIG_RTL8723A
294 #define EFUSE_MAP_SIZE 256
296 #ifdef CONFIG_RTL8188E
297 #define EFUSE_MAP_SIZE 512
299 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
300 #define EFUSE_MAP_SIZE 512
302 #ifdef CONFIG_RTL8192E
303 #define EFUSE_MAP_SIZE 512
305 #ifdef CONFIG_RTL8723B
306 #define EFUSE_MAP_SIZE 512
309 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
310 #define EFUSE_MAX_SIZE 1024
311 #elif defined(CONFIG_RTL8188E)
312 #define EFUSE_MAX_SIZE 256
314 #define EFUSE_MAX_SIZE 512
318 //#define RTPRIV_IOCTL_MP ( SIOCIWFIRSTPRIV + 0x17)
348 MP_DISABLE_BT_COEXIST,
350 #ifdef CONFIG_AP_WOWLAN
362 u32 mode;//0 for normal type packet, 1 for loopback packet (16bytes TXCMD)
367 struct mp_wiparam workparam;
368 // u8 act_in_progress;
376 u32 rx_bssidpktcount;
378 u32 rx_pktcount_filter_out;
379 u32 rx_crcerrpktcount;
382 struct recv_stat rxstat;
387 u8 prime_channel_offset;
394 // u32 curr_crystalcap;
403 // uint ForcedDataRate;
405 u8 mac_filter[ETH_ALEN];
408 struct wlan_network mp_network;
409 NDIS_802_11_MAC_ADDRESS network_macaddr;
411 #ifdef PLATFORM_WINDOWS
418 struct mp_wi_cntx wi_cntx;
423 u8 h2c_resp_parambuf[512];
427 NDIS_EVENT h2c_cmd_evt;
432 NDIS_EVENT scsir_full_evt;
433 NDIS_EVENT scsiw_empty_evt;
436 u8 *pallocated_mp_xmitframe_buf;
437 u8 *pmp_xmtframe_buf;
438 _queue free_mp_xmitqueue;
439 u32 free_mp_xmitframe_cnt;
441 BOOLEAN bTxBufCkFail;
448 typedef struct _IOCMD_STRUCT_ {
454 struct rf_reg_param {
460 struct bb_reg_param {
465 typedef struct _MP_FIRMWARE {
466 FIRMWARE_SOURCE eFWSource;
467 #ifdef CONFIG_EMBEDDED_FWIMG
470 u8 szFwBuffer[0x8000];
474 #ifdef CONFIG_EMBEDDED_FWIMG
476 u8 myBTFwBuffer[0x8000];
478 u8 szBTFwBuffer[0x8000];
481 } RT_MP_FIRMWARE, *PRT_MP_FIRMWARE;
486 //=======================================================================
491 /* Hardware Registers */
494 #define IOCMD_CTRL_REG 0x102502C0
495 #define IOCMD_DATA_REG 0x102502C4
497 #define IOCMD_CTRL_REG 0x10250370
498 #define IOCMD_DATA_REG 0x10250374
501 #define IOCMD_GET_THERMAL_METER 0xFD000028
503 #define IOCMD_CLASS_BB_RF 0xF0
504 #define IOCMD_BB_READ_IDX 0x00
505 #define IOCMD_BB_WRITE_IDX 0x01
506 #define IOCMD_RF_READ_IDX 0x02
507 #define IOCMD_RF_WRIT_IDX 0x03
509 #define BB_REG_BASE_ADDR 0x800
513 #define _2MAC_MODE_ 0
514 #define _LOOPBOOK_MODE_ 1
516 typedef enum _MP_MODE_ {
521 MP_SINGLE_CARRIER_TX,
522 MP_CARRIER_SUPPRISSION_TX,
529 #define MAX_RF_PATH_NUMS RF_PATH_MAX
532 extern u8 mpdatarate[NumRates];
534 /* MP set force data rate base on the definition. */
535 typedef enum _MPT_RATE_INDEX
538 MPT_RATE_1M =0 , /* 0 */
541 MPT_RATE_11M, /* 3 */
551 MPT_RATE_54M, /* 11 */
554 MPT_RATE_MCS0, /* 12 */
561 MPT_RATE_MCS7, /* 19 */
569 MPT_RATE_MCS15, /* 27 */
570 /* VHT rate. Total: 20*/
571 MPT_RATE_VHT1SS_MCS0 = 100,// To reserve MCS16~MCS31, the index starts from #100.
572 MPT_RATE_VHT1SS_MCS1, // #101
573 MPT_RATE_VHT1SS_MCS2,
574 MPT_RATE_VHT1SS_MCS3,
575 MPT_RATE_VHT1SS_MCS4,
576 MPT_RATE_VHT1SS_MCS5,
577 MPT_RATE_VHT1SS_MCS6, // #106
578 MPT_RATE_VHT1SS_MCS7,
579 MPT_RATE_VHT1SS_MCS8,
580 MPT_RATE_VHT1SS_MCS9,
581 MPT_RATE_VHT2SS_MCS0,
582 MPT_RATE_VHT2SS_MCS1, // #111
583 MPT_RATE_VHT2SS_MCS2,
584 MPT_RATE_VHT2SS_MCS3,
585 MPT_RATE_VHT2SS_MCS4,
586 MPT_RATE_VHT2SS_MCS5,
587 MPT_RATE_VHT2SS_MCS6, // #116
588 MPT_RATE_VHT2SS_MCS7,
589 MPT_RATE_VHT2SS_MCS8,
590 MPT_RATE_VHT2SS_MCS9,
592 }MPT_RATE_E, *PMPT_RATE_E;
594 #define MAX_TX_PWR_INDEX_N_MODE 64 // 0x3F
596 typedef enum _POWER_MODE_ {
601 // The following enumeration is used to define the value of Reg0xD00[30:28] or JaguarReg0x914[18:16].
602 typedef enum _OFDM_TX_MODE {
604 OFDM_ContinuousTx = 1,
605 OFDM_SingleCarrier = 2,
610 #define RX_PKT_BROADCAST 1
611 #define RX_PKT_DEST_ADDR 2
612 #define RX_PKT_PHY_MATCH 3
615 #define RPTMaxCount 0x000FFFFF;
617 // parameter 1 : BitMask
619 // bit 1 : OFDM False Alarm
620 // bit 2 : OFDM MPDU OK
621 // bit 3 : OFDM MPDU Fail
623 // bit 5 : CCK False Alarm
624 // bit 6 : CCK MPDU ok
625 // bit 7 : CCK MPDU fail
626 // bit 8 : HT PPDU counter
627 // bit 9 : HT false alarm
628 // bit 10 : HT MPDU total
629 // bit 11 : HT MPDU OK
630 // bit 12 : HT MPDU fail
631 // bit 15 : RX full drop
632 typedef enum _RXPHY_BITMASK_
650 #define Mac_OFDM_OK 0x00000000
651 #define Mac_OFDM_Fail 0x10000000
652 #define Mac_OFDM_FasleAlarm 0x20000000
653 #define Mac_CCK_OK 0x30000000
654 #define Mac_CCK_Fail 0x40000000
655 #define Mac_CCK_FasleAlarm 0x50000000
656 #define Mac_HT_OK 0x60000000
657 #define Mac_HT_Fail 0x70000000
658 #define Mac_HT_FasleAlarm 0x90000000
659 #define Mac_DropPacket 0xA0000000
661 typedef enum _ENCRY_CTRL_STATE_ {
662 HW_CONTROL, //hw encryption& decryption
663 SW_CONTROL, //sw encryption& decryption
664 HW_ENCRY_SW_DECRY, //hw encryption & sw decryption
665 SW_ENCRY_HW_DECRY //sw encryption & hw decryption
668 typedef enum _MPT_TXPWR_DEF{
670 MPT_OFDM, // L and HT OFDM
674 #ifdef CONFIG_RF_GAIN_OFFSET
676 #if defined(CONFIG_RTL8723A)
677 #define REG_RF_BB_GAIN_OFFSET_CCK 0x0d
678 #define REG_RF_BB_GAIN_OFFSET_OFDM 0x0e
679 #define RF_GAIN_OFFSET_MASK 0xfffff
680 #elif defined(CONFIG_RTL8723B)
681 #define REG_RF_BB_GAIN_OFFSET 0x7f
682 #define RF_GAIN_OFFSET_MASK 0xfffff
684 #define REG_RF_BB_GAIN_OFFSET 0x55
685 #define RF_GAIN_OFFSET_MASK 0xfffff
686 #endif //CONFIG_RTL8723A
688 #endif //CONFIG_RF_GAIN_OFFSET
690 //=======================================================================
691 //extern struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv);
692 //extern int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe);
694 extern s32 init_mp_priv(PADAPTER padapter);
695 extern void free_mp_priv(struct mp_priv *pmp_priv);
696 extern s32 MPT_InitializeAdapter(PADAPTER padapter, u8 Channel);
697 extern void MPT_DeInitAdapter(PADAPTER padapter);
698 extern s32 mp_start_test(PADAPTER padapter);
699 extern void mp_stop_test(PADAPTER padapter);
701 //=======================================================================
702 //extern void IQCalibrateBcut(PADAPTER pAdapter);
704 //extern u32 bb_reg_read(PADAPTER Adapter, u16 offset);
705 //extern u8 bb_reg_write(PADAPTER Adapter, u16 offset, u32 value);
706 //extern u32 rf_reg_read(PADAPTER Adapter, u8 path, u8 offset);
707 //extern u8 rf_reg_write(PADAPTER Adapter, u8 path, u8 offset, u32 value);
709 //extern u32 get_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask);
710 //extern u8 set_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask, u32 value);
711 //extern u32 get_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask);
712 //extern u8 set_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask, u32 value);
714 extern u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask);
715 extern void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val);
717 extern u32 read_macreg(_adapter *padapter, u32 addr, u32 sz);
718 extern void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz);
719 extern u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask);
720 extern void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val);
721 extern u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr);
722 extern void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val);
724 extern void SetChannel(PADAPTER pAdapter);
725 extern void SetBandwidth(PADAPTER pAdapter);
726 extern int SetTxPower(PADAPTER pAdapter);
727 extern void SetAntennaPathPower(PADAPTER pAdapter);
728 //extern void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset);
729 extern void SetDataRate(PADAPTER pAdapter);
731 extern void SetAntenna(PADAPTER pAdapter);
733 //extern void SetCrystalCap(PADAPTER pAdapter);
735 extern s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther);
736 extern void GetThermalMeter(PADAPTER pAdapter, u8 *value);
738 extern void SetContinuousTx(PADAPTER pAdapter, u8 bStart);
739 extern void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart);
740 extern void SetSingleToneTx(PADAPTER pAdapter, u8 bStart);
741 extern void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart);
742 extern void PhySetTxPowerLevel(PADAPTER pAdapter);
744 extern void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc);
745 extern void SetPacketTx(PADAPTER padapter);
746 extern void SetPacketRx(PADAPTER pAdapter, u8 bStartRx);
748 extern void ResetPhyRxPktCount(PADAPTER pAdapter);
749 extern u32 GetPhyRxPktReceived(PADAPTER pAdapter);
750 extern u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter);
752 extern s32 SetPowerTracking(PADAPTER padapter, u8 enable);
753 extern void GetPowerTracking(PADAPTER padapter, u8 *enable);
755 extern u32 mp_query_psd(PADAPTER pAdapter, u8 *data);
758 extern void Hal_SetAntenna(PADAPTER pAdapter);
759 extern void Hal_SetBandwidth(PADAPTER pAdapter);
761 extern void Hal_SetTxPower(PADAPTER pAdapter);
762 extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart);
763 extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart );
764 extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart);
765 extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart);
766 extern void Hal_SetBandwidth(PADAPTER pAdapter);
768 extern void Hal_SetDataRate(PADAPTER pAdapter);
769 extern void Hal_SetChannel(PADAPTER pAdapter);
770 extern void Hal_SetAntennaPathPower(PADAPTER pAdapter);
771 extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther);
772 extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable);
773 extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable);
774 extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value);
775 extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter);
776 extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14);
777 extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven);
778 extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower);
779 extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower);
780 extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter);
781 extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter);
782 extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart);
783 extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart);
784 extern void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCapVal);
785 extern void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv);
786 extern void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter ,BOOLEAN bMain);
787 extern ULONG mpt_ProQueryCalTxPower(PADAPTER pAdapter,u8 RfPath);
788 extern void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart);
789 extern u8 MptToMgntRate(u32 MptRateIdx);