drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/OUTSRC/odm.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20
  21 //============================================================
  22 // include files
  23 //============================================================
  24
  25 #include "odm_precomp.h"
  26
  27
  28 const u2Byte dB_Invert_Table[8][12] = {
  29         {       1,              1,              1,              2,              2,              2,              2,              3,              3,              3,              4,              4},
  30         {       4,              5,              6,              6,              7,              8,              9,              10,             11,             13,             14,             16},
  31         {       18,             20,             22,             25,             28,             32,             35,             40,             45,             50,             56,             63},
  32         {       71,             79,             89,             100,    112,    126,    141,    158,    178,    200,    224,    251},
  33         {       282,    316,    355,    398,    447,    501,    562,    631,    708,    794,    891,    1000},
  34         {       1122,   1259,   1413,   1585,   1778,   1995,   2239,   2512,   2818,   3162,   3548,   3981},
  35         {       4467,   5012,   5623,   6310,   7079,   7943,   8913,   10000,  11220,  12589,  14125,  15849},
  36         {       17783,  19953,  22387,  25119,  28184,  31623,  35481,  39811,  44668,  50119,  56234,  65535}};
  37
  38
  39 //============================================================
  40 // Global var
  41 //============================================================
  42
  43 u4Byte  OFDMSwingTable[OFDM_TABLE_SIZE] = {
  44         0x7f8001fe,     // 0, +6.0dB
  45         0x788001e2,     // 1, +5.5dB
  46         0x71c001c7,     // 2, +5.0dB
  47         0x6b8001ae,     // 3, +4.5dB
  48         0x65400195,     // 4, +4.0dB
  49         0x5fc0017f,     // 5, +3.5dB
  50         0x5a400169,     // 6, +3.0dB
  51         0x55400155,     // 7, +2.5dB
  52         0x50800142,     // 8, +2.0dB
  53         0x4c000130,     // 9, +1.5dB
  54         0x47c0011f,     // 10, +1.0dB
  55         0x43c0010f,     // 11, +0.5dB
  56         0x40000100,     // 12, +0dB
  57         0x3c8000f2,     // 13, -0.5dB
  58         0x390000e4,     // 14, -1.0dB
  59         0x35c000d7,     // 15, -1.5dB
  60         0x32c000cb,     // 16, -2.0dB
  61         0x300000c0,     // 17, -2.5dB
  62         0x2d4000b5,     // 18, -3.0dB
  63         0x2ac000ab,     // 19, -3.5dB
  64         0x288000a2,     // 20, -4.0dB
  65         0x26000098,     // 21, -4.5dB
  66         0x24000090,     // 22, -5.0dB
  67         0x22000088,     // 23, -5.5dB
  68         0x20000080,     // 24, -6.0dB
  69         0x1e400079,     // 25, -6.5dB
  70         0x1c800072,     // 26, -7.0dB
  71         0x1b00006c,     // 27. -7.5dB
  72         0x19800066,     // 28, -8.0dB
  73         0x18000060,     // 29, -8.5dB
  74         0x16c0005b,     // 30, -9.0dB
  75         0x15800056,     // 31, -9.5dB
  76         0x14400051,     // 32, -10.0dB
  77         0x1300004c,     // 33, -10.5dB
  78         0x12000048,     // 34, -11.0dB
  79         0x11000044,     // 35, -11.5dB
  80         0x10000040,     // 36, -12.0dB
  81 };
  82
  83 u1Byte  CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = {
  84         {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},       // 0, +0dB
  85         {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},       // 1, -0.5dB
  86         {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},       // 2, -1.0dB
  87         {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},       // 3, -1.5dB
  88         {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},       // 4, -2.0dB
  89         {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},       // 5, -2.5dB
  90         {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},       // 6, -3.0dB
  91         {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},       // 7, -3.5dB
  92         {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},       // 8, -4.0dB
  93         {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},       // 9, -4.5dB
  94         {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},       // 10, -5.0dB
  95         {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},       // 11, -5.5dB
  96         {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},       // 12, -6.0dB <== default
  97         {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},       // 13, -6.5dB
  98         {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},       // 14, -7.0dB
  99         {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},       // 15, -7.5dB
 100         {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},       // 16, -8.0dB
 101         {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},       // 17, -8.5dB
 102         {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},       // 18, -9.0dB
 103         {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},       // 19, -9.5dB
 104         {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},       // 20, -10.0dB
 105         {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},       // 21, -10.5dB
 106         {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},       // 22, -11.0dB
 107         {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},       // 23, -11.5dB
 108         {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},       // 24, -12.0dB
 109         {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},       // 25, -12.5dB
 110         {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},       // 26, -13.0dB
 111         {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},       // 27, -13.5dB
 112         {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},       // 28, -14.0dB
 113         {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},       // 29, -14.5dB
 114         {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},       // 30, -15.0dB
 115         {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},       // 31, -15.5dB
 116         {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}        // 32, -16.0dB
 117 };
 118
 119
 120 u1Byte  CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = {
 121         {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},       // 0, +0dB
 122         {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},       // 1, -0.5dB
 123         {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},       // 2, -1.0dB
 124         {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},       // 3, -1.5dB
 125         {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},       // 4, -2.0dB
 126         {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},       // 5, -2.5dB
 127         {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},       // 6, -3.0dB
 128         {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},       // 7, -3.5dB
 129         {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},       // 8, -4.0dB
 130         {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},       // 9, -4.5dB
 131         {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},       // 10, -5.0dB
 132         {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},       // 11, -5.5dB
 133         {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},       // 12, -6.0dB  <== default
 134         {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},       // 13, -6.5dB
 135         {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},       // 14, -7.0dB
 136         {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},       // 15, -7.5dB
 137         {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},       // 16, -8.0dB
 138         {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},       // 17, -8.5dB
 139         {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},       // 18, -9.0dB
 140         {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},       // 19, -9.5dB
 141         {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},       // 20, -10.0dB
 142         {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},       // 21, -10.5dB
 143         {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},       // 22, -11.0dB
 144         {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},       // 23, -11.5dB
 145         {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},       // 24, -12.0dB
 146         {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},       // 25, -12.5dB
 147         {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},       // 26, -13.0dB
 148         {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},       // 27, -13.5dB
 149         {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},       // 28, -14.0dB
 150         {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},       // 29, -14.5dB
 151         {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},       // 30, -15.0dB
 152         {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},       // 31, -15.5dB
 153         {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}        // 32, -16.0dB
 154 };
 155
 156
 157 u4Byte OFDMSwingTable_New[OFDM_TABLE_SIZE] = {
 158         0x0b40002d, // 0,  -15.0dB
 159         0x0c000030, // 1,  -14.5dB
 160         0x0cc00033, // 2,  -14.0dB
 161         0x0d800036, // 3,  -13.5dB
 162         0x0e400039, // 4,  -13.0dB
 163         0x0f00003c, // 5,  -12.5dB
 164         0x10000040, // 6,  -12.0dB
 165         0x11000044, // 7,  -11.5dB
 166         0x12000048, // 8,  -11.0dB
 167         0x1300004c, // 9,  -10.5dB
 168         0x14400051, // 10, -10.0dB
 169         0x15800056, // 11, -9.5dB
 170         0x16c0005b, // 12, -9.0dB
 171         0x18000060, // 13, -8.5dB
 172         0x19800066, // 14, -8.0dB
 173         0x1b00006c, // 15, -7.5dB
 174         0x1c800072, // 16, -7.0dB
 175         0x1e400079, // 17, -6.5dB
 176         0x20000080, // 18, -6.0dB
 177         0x22000088, // 19, -5.5dB
 178         0x24000090, // 20, -5.0dB
 179         0x26000098, // 21, -4.5dB
 180         0x288000a2, // 22, -4.0dB
 181         0x2ac000ab, // 23, -3.5dB
 182         0x2d4000b5, // 24, -3.0dB
 183         0x300000c0, // 25, -2.5dB
 184         0x32c000cb, // 26, -2.0dB
 185         0x35c000d7, // 27, -1.5dB
 186         0x390000e4, // 28, -1.0dB
 187         0x3c8000f2, // 29, -0.5dB
 188         0x40000100, // 30, +0dB
 189         0x43c0010f, // 31, +0.5dB
 190         0x47c0011f, // 32, +1.0dB
 191         0x4c000130, // 33, +1.5dB
 192         0x50800142, // 34, +2.0dB
 193         0x55400155, // 35, +2.5dB
 194         0x5a400169, // 36, +3.0dB
 195         0x5fc0017f, // 37, +3.5dB
 196         0x65400195, // 38, +4.0dB
 197         0x6b8001ae, // 39, +4.5dB
 198         0x71c001c7, // 40, +5.0dB
 199         0x788001e2, // 41, +5.5dB
 200         0x7f8001fe  // 42, +6.0dB
 201 };
 202
 203
 204 u1Byte CCKSwingTable_Ch1_Ch13_New[CCK_TABLE_SIZE][8] = {
 205         {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01},       //  0, -16.0dB
 206         {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},       //  1, -15.5dB
 207         {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},       //  2, -15.0dB
 208         {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},       //  3, -14.5dB
 209         {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},       //  4, -14.0dB
 210         {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},       //  5, -13.5dB
 211         {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},       //  6, -13.0dB
 212         {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},       //  7, -12.5dB
 213         {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},       //  8, -12.0dB
 214         {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},       //  9, -11.5dB
 215         {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},       // 10, -11.0dB
 216         {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},       // 11, -10.5dB
 217         {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},       // 12, -10.0dB
 218         {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},       // 13, -9.5dB
 219         {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},       // 14, -9.0dB
 220         {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},       // 15, -8.5dB
 221         {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},       // 16, -8.0dB
 222         {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},       // 17, -7.5dB
 223         {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},       // 18, -7.0dB
 224         {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},       // 19, -6.5dB
 225     {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},   // 20, -6.0dB
 226         {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},       // 21, -5.5dB
 227         {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},       // 22, -5.0dB
 228         {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},       // 23, -4.5dB
 229         {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},       // 24, -4.0dB
 230         {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},       // 25, -3.5dB
 231         {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},       // 26, -3.0dB
 232         {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},       // 27, -2.5dB
 233         {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},       // 28, -2.0dB
 234         {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},       // 29, -1.5dB
 235         {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},       // 30, -1.0dB
 236         {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},       // 31, -0.5dB
 237         {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}        // 32, +0dB
 238 };
 239
 240
 241 u1Byte CCKSwingTable_Ch14_New[CCK_TABLE_SIZE][8]= {
 242         {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00},       //  0, -16.0dB
 243         {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},       //  1, -15.5dB
 244         {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},       //  2, -15.0dB
 245         {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},       //  3, -14.5dB
 246         {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},       //  4, -14.0dB
 247         {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},       //  5, -13.5dB
 248         {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},       //  6, -13.0dB
 249         {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},       //  7, -12.5dB
 250         {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},       //  8, -12.0dB
 251         {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},       //  9, -11.5dB
 252         {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},       // 10, -11.0dB
 253         {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},       // 11, -10.5dB
 254         {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},       // 12, -10.0dB
 255         {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},       // 13, -9.5dB
 256         {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},       // 14, -9.0dB
 257         {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},       // 15, -8.5dB
 258         {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},       // 16, -8.0dB
 259         {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},       // 17, -7.5dB
 260         {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},       // 18, -7.0dB
 261         {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},       // 19, -6.5dB
 262         {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},       // 20, -6.0dB
 263         {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},       // 21, -5.5dB
 264         {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},       // 22, -5.0dB
 265         {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},       // 23, -4.5dB
 266         {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},       // 24, -4.0dB
 267         {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},       // 25, -3.5dB
 268         {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},       // 26, -3.0dB
 269         {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},       // 27, -2.5dB
 270         {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},       // 28, -2.0dB
 271         {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},       // 29, -1.5dB
 272         {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},       // 30, -1.0dB
 273         {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},       // 31, -0.5dB
 274         {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}        // 32, +0dB
 275 };
 276
 277 u4Byte TxScalingTable_Jaguar[TXSCALE_TABLE_SIZE] =
 278 {
 279         0x081, // 0,  -12.0dB
 280         0x088, // 1,  -11.5dB
 281         0x090, // 2,  -11.0dB
 282         0x099, // 3,  -10.5dB
 283         0x0A2, // 4,  -10.0dB
 284         0x0AC, // 5,  -9.5dB
 285         0x0B6, // 6,  -9.0dB
 286         0x0C0, // 7,  -8.5dB
 287         0x0CC, // 8,  -8.0dB
 288         0x0D8, // 9,  -7.5dB
 289         0x0E5, // 10, -7.0dB
 290         0x0F2, // 11, -6.5dB
 291         0x101, // 12, -6.0dB
 292         0x110, // 13, -5.5dB
 293         0x120, // 14, -5.0dB
 294         0x131, // 15, -4.5dB
 295         0x143, // 16, -4.0dB
 296         0x156, // 17, -3.5dB
 297         0x16A, // 18, -3.0dB
 298         0x180, // 19, -2.5dB
 299         0x197, // 20, -2.0dB
 300         0x1AF, // 21, -1.5dB
 301         0x1C8, // 22, -1.0dB
 302         0x1E3, // 23, -0.5dB
 303         0x200, // 24, +0  dB
 304         0x21E, // 25, +0.5dB
 305         0x23E, // 26, +1.0dB
 306         0x261, // 27, +1.5dB
 307         0x285, // 28, +2.0dB
 308         0x2AB, // 29, +2.5dB
 309         0x2D3, // 30, +3.0dB
 310         0x2FE, // 31, +3.5dB
 311         0x32B, // 32, +4.0dB
 312         0x35C, // 33, +4.5dB
 313         0x38E, // 34, +5.0dB
 314         0x3C4, // 35, +5.5dB
 315         0x3FE  // 36, +6.0dB
 316 };
 317
 318 #ifdef AP_BUILD_WORKAROUND
 319
 320 unsigned int TxPwrTrk_OFDM_SwingTbl[TxPwrTrk_OFDM_SwingTbl_Len] = {
 321         /*  +6.0dB */ 0x7f8001fe,
 322         /*  +5.5dB */ 0x788001e2,
 323         /*  +5.0dB */ 0x71c001c7,
 324         /*  +4.5dB */ 0x6b8001ae,
 325         /*  +4.0dB */ 0x65400195,
 326         /*  +3.5dB */ 0x5fc0017f,
 327         /*  +3.0dB */ 0x5a400169,
 328         /*  +2.5dB */ 0x55400155,
 329         /*  +2.0dB */ 0x50800142,
 330         /*  +1.5dB */ 0x4c000130,
 331         /*  +1.0dB */ 0x47c0011f,
 332         /*  +0.5dB */ 0x43c0010f,
 333         /*   0.0dB */ 0x40000100,
 334         /*  -0.5dB */ 0x3c8000f2,
 335         /*  -1.0dB */ 0x390000e4,
 336         /*  -1.5dB */ 0x35c000d7,
 337         /*  -2.0dB */ 0x32c000cb,
 338         /*  -2.5dB */ 0x300000c0,
 339         /*  -3.0dB */ 0x2d4000b5,
 340         /*  -3.5dB */ 0x2ac000ab,
 341         /*  -4.0dB */ 0x288000a2,
 342         /*  -4.5dB */ 0x26000098,
 343         /*  -5.0dB */ 0x24000090,
 344         /*  -5.5dB */ 0x22000088,
 345         /*  -6.0dB */ 0x20000080,
 346         /*  -6.5dB */ 0x1a00006c,
 347         /*  -7.0dB */ 0x1c800072,
 348         /*  -7.5dB */ 0x18000060,
 349         /*  -8.0dB */ 0x19800066,
 350         /*  -8.5dB */ 0x15800056,
 351         /*  -9.0dB */ 0x26c0005b,
 352         /*  -9.5dB */ 0x14400051,
 353         /* -10.0dB */ 0x24400051,
 354         /* -10.5dB */ 0x1300004c,
 355         /* -11.0dB */ 0x12000048,
 356         /* -11.5dB */ 0x11000044,
 357         /* -12.0dB */ 0x10000040
 358 };
 359 #endif
 360
 361 //============================================================
 362 // Local Function predefine.
 363 //============================================================
 364
 365 //START------------COMMON INFO RELATED---------------//
 366 VOID
 367 odm_CommonInfoSelfInit(
 368         IN              PDM_ODM_T               pDM_Odm
 369         );
 370
 371 VOID
 372 odm_CommonInfoSelfUpdate(
 373         IN              PDM_ODM_T               pDM_Odm
 374         );
 375
 376 VOID
 377 odm_CmnInfoInit_Debug(
 378         IN              PDM_ODM_T               pDM_Odm
 379         );
 380
 381 VOID
 382 odm_CmnInfoHook_Debug(
 383         IN              PDM_ODM_T               pDM_Odm
 384         );
 385
 386 VOID
 387 odm_CmnInfoUpdate_Debug(
 388         IN              PDM_ODM_T               pDM_Odm
 389         );
 390 VOID
 391 odm_BasicDbgMessage
 392 (
 393         IN              PDM_ODM_T               pDM_Odm
 394         );
 395
 396 //END------------COMMON INFO RELATED---------------//
 397
 398 //START---------------DIG---------------------------//
 399
 400 //Remove by Yuchen
 401
 402 //END---------------DIG---------------------------//
 403
 404 //START-------BB POWER SAVE-----------------------//
 405 //Remove BB power Saving by YuChen
 406 //END---------BB POWER SAVE-----------------------//
 407
 408 //START-----------------PSD-----------------------//
 409 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
 410 //============================================================
 411 // Function predefine.
 412 //============================================================
 413
 414 //Remove PathDiversity related funtion predefine to odm_PathDiv.h
 415
 416 //Start-------------------- RX High Power------------------------//
 417 VOID    odm_RXHPInit(   IN              PDM_ODM_T               pDM_Odm);
 418 VOID    odm_RXHP(       IN              PDM_ODM_T               pDM_Odm);
 419 VOID    odm_Write_RXHP( IN      PDM_ODM_T       pDM_Odm);
 420
 421 VOID    odm_PSD_RXHP(           IN      PDM_ODM_T       pDM_Odm);
 422 VOID    odm_PSD_RXHPCallback(   PRT_TIMER               pTimer);
 423 VOID    odm_PSD_RXHPWorkitemCallback(   IN PVOID            pContext);
 424 //End--------------------- RX High Power -----------------------//
 425
 426 #endif
 427
 428 //END-------------------PSD-----------------------//
 429
 430 //Remove  RAMASK  by RS_James
 431
 432 //Remove by YuChen
 433
 434 //Remove Rssimonitorcheck by RS_James
 435
 436 VOID
 437 odm_SwAntDivInit(
 438         IN              PDM_ODM_T               pDM_Odm
 439         );
 440
 441 VOID
 442 odm_SwAntDivInit_NIC(
 443         IN              PDM_ODM_T               pDM_Odm
 444         );
 445
 446 VOID
 447 odm_SwAntDetectInit(
 448         IN              PDM_ODM_T               pDM_Odm
 449         );
 450
 451 VOID
 452 odm_SwAntDivChkAntSwitch(
 453         IN              PDM_ODM_T               pDM_Odm,
 454         IN              u1Byte                  Step
 455         );
 456
 457 VOID
 458 odm_SwAntDivChkAntSwitchNIC(
 459         IN              PDM_ODM_T               pDM_Odm,
 460         IN              u1Byte          Step
 461         );
 462
 463
 464 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 465 VOID
 466 odm_SwAntDivChkAntSwitchCallback(
 467         PRT_TIMER               pTimer
 468 );
 469 VOID
 470 odm_SwAntDivChkAntSwitchWorkitemCallback(
 471     IN PVOID            pContext
 472     );
 473 VOID
 474 ODM_UpdateInitRateWorkItemCallback(
 475     IN PVOID            pContext
 476     );
 477 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
 478 VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext);
 479 #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
 480 VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext);
 481 #endif
 482
 483
 484
 485 VOID
 486 odm_GlobalAdapterCheck(
 487         IN              VOID
 488         );
 489
 490 //Remove RAMask by RS_James
 491
 492 VOID
 493 ODM_TXPowerTrackingCheck(
 494         IN              PDM_ODM_T               pDM_Odm
 495         );
 496
 497 VOID
 498 odm_TXPowerTrackingCheckAP(
 499         IN              PDM_ODM_T               pDM_Odm
 500         );
 501
 502
 503 VOID
 504 odm_TXPowerTrackingThermalMeterInit(
 505         IN      PDM_ODM_T       pDM_Odm
 506         );
 507
 508
 509 VOID
 510 odm_IQCalibrate(
 511                 IN      PDM_ODM_T       pDM_Odm
 512                 );
 513
 514 VOID
 515 odm_TXPowerTrackingInit(
 516         IN      PDM_ODM_T       pDM_Odm
 517         );
 518
 519 VOID
 520 odm_TXPowerTrackingCheckMP(
 521         IN      PDM_ODM_T       pDM_Odm
 522         );
 523
 524
 525 VOID
 526 odm_TXPowerTrackingCheckCE(
 527         IN      PDM_ODM_T       pDM_Odm
 528         );
 529
 530 #if(DM_ODM_SUPPORT_TYPE & (ODM_WIN))
 531
 532 VOID
 533 odm_TXPowerTrackingCallbackThermalMeter92C(
 534             IN PADAPTER Adapter
 535             );
 536
 537 VOID
 538 odm_TXPowerTrackingCallbackRXGainThermalMeter92D(
 539         IN PADAPTER     Adapter
 540         );
 541
 542 VOID
 543 odm_TXPowerTrackingCallbackThermalMeter92D(
 544             IN PADAPTER Adapter
 545             );
 546
 547 VOID
 548 odm_TXPowerTrackingDirectCall92C(
 549             IN  PADAPTER                Adapter
 550             );
 551
 552 VOID
 553 odm_TXPowerTrackingThermalMeterCheck(
 554         IN      PADAPTER                Adapter
 555         );
 556
 557 #endif
 558
 559 //Remove Edca by Yu Chen
 560
 561
 562 #define         RxDefaultAnt1           0x65a9
 563 #define RxDefaultAnt2           0x569a
 564
 565 VOID
 566 odm_InitHybridAntDiv(
 567         IN PDM_ODM_T    pDM_Odm
 568         );
 569
 570 BOOLEAN
 571 odm_StaDefAntSel(
 572         IN PDM_ODM_T    pDM_Odm,
 573         IN u4Byte               OFDM_Ant1_Cnt,
 574         IN u4Byte               OFDM_Ant2_Cnt,
 575         IN u4Byte               CCK_Ant1_Cnt,
 576         IN u4Byte               CCK_Ant2_Cnt,
 577         OUT u1Byte              *pDefAnt
 578         );
 579
 580 VOID
 581 odm_SetRxIdleAnt(
 582         IN      PDM_ODM_T       pDM_Odm,
 583         IN      u1Byte  Ant,
 584         IN   BOOLEAN   bDualPath
 585 );
 586
 587
 588
 589 VOID
 590 odm_HwAntDiv(
 591         IN      PDM_ODM_T       pDM_Odm
 592 );
 593
 594
 595 //============================================================
 596 //3 Export Interface
 597 //============================================================
 598
 599 //
 600 // 2011/09/21 MH Add to describe different team necessary resource allocate??
 601 //
 602 VOID
 603 ODM_DMInit(
 604         IN              PDM_ODM_T               pDM_Odm
 605         )
 606 {
 607
 608         odm_CommonInfoSelfInit(pDM_Odm);
 609         odm_CmnInfoInit_Debug(pDM_Odm);
 610         odm_DIGInit(pDM_Odm);
 611         odm_NHMCounterStatisticsInit(pDM_Odm);
 612         odm_AdaptivityInit(pDM_Odm);
 613         odm_RateAdaptiveMaskInit(pDM_Odm);
 614         ODM_CfoTrackingInit(pDM_Odm);
 615         ODM_EdcaTurboInit(pDM_Odm);
 616         odm_RSSIMonitorInit(pDM_Odm);
 617         odm_TXPowerTrackingInit(pDM_Odm);
 618
 619 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
 620         ODM_ClearTxPowerTrackingState(pDM_Odm);
 621
 622         if ( *(pDM_Odm->mp_mode) != 1)
 623         odm_PathDiversityInit(pDM_Odm);
 624
 625 #endif
 626
 627 #if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
 628         if ( *(pDM_Odm->mp_mode) != 1){
 629         if(pDM_Odm->SupportICType==ODM_RTL8723A)
 630                 odm_SwAntDivInit(pDM_Odm);
 631         else if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D))
 632         {
 633                 if(pDM_Odm->AntDivType == HW_ANTDIV)
 634                         odm_InitHybridAntDiv(pDM_Odm);
 635                 else
 636                         odm_SwAntDivInit(pDM_Odm);
 637         }
 638         else
 639                 ODM_AntDivInit(pDM_Odm);
 640         }
 641 #endif
 642
 643         if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
 644         {
 645                 odm_DynamicBBPowerSavingInit(pDM_Odm);
 646                 odm_DynamicTxPowerInit(pDM_Odm);
 647
 648 #if (RTL8188E_SUPPORT == 1)
 649                 if(pDM_Odm->SupportICType==ODM_RTL8188E)
 650                 {
 651                         odm_PrimaryCCA_Init(pDM_Odm);
 652                         ODM_RAInfo_Init_all(pDM_Odm);
 653                 }
 654 #endif
 655
 656 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
 657
 658         #if (RTL8723B_SUPPORT == 1)
 659                 if(pDM_Odm->SupportICType == ODM_RTL8723B)
 660                         odm_SwAntDetectInit(pDM_Odm);
 661         #endif
 662
 663         #if (RTL8192E_SUPPORT == 1)
 664                 if(pDM_Odm->SupportICType==ODM_RTL8192E)
 665                         odm_PrimaryCCA_Check_Init(pDM_Odm);
 666         #endif
 667
 668 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
 669         #if (RTL8723A_SUPPORT == 1)
 670                 if(pDM_Odm->SupportICType == ODM_RTL8723A)
 671                         odm_PSDMonitorInit(pDM_Odm);
 672         #endif
 673
 674         #if (RTL8192D_SUPPORT == 1)
 675                 if(pDM_Odm->SupportICType==ODM_RTL8192D)
 676                         odm_PathDivInit_92D(pDM_Odm);
 677         #endif
 678
 679         #if ((RTL8192C_SUPPORT == 1) || (RTL8192D_SUPPORT == 1))
 680                 if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D))
 681                         odm_RXHPInit(pDM_Odm);
 682         #endif
 683 #endif
 684 #endif
 685
 686         }
 687
 688 }
 689
 690 //
 691 // 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM.
 692 // You can not add any dummy function here, be care, you can only use DM structure
 693 // to perform any new ODM_DM.
 694 //
 695 VOID
 696 ODM_DMWatchdog(
 697         IN              PDM_ODM_T               pDM_Odm
 698         )
 699 {
 700         if((pDM_Odm->SupportICType == ODM_RTL8821) && (pDM_Odm->SupportInterface == ODM_ITRF_USB))
 701         {
 702                 if(pDM_Odm->RSSI_Min > 25)
 703                         ODM_Write1Byte(pDM_Odm, 0x4CF, 0x02);
 704                 else if(pDM_Odm->RSSI_Min < 20)
 705                         ODM_Write1Byte(pDM_Odm, 0x4CF, 0x00);
 706         }
 707
 708
 709         odm_CommonInfoSelfUpdate(pDM_Odm);
 710         odm_BasicDbgMessage(pDM_Odm);
 711         odm_FalseAlarmCounterStatistics(pDM_Odm);
 712         odm_NHMCounterStatistics(pDM_Odm);
 713         ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): RSSI=0x%x\n",pDM_Odm->RSSI_Min));
 714
 715         odm_RSSIMonitorCheck(pDM_Odm);
 716
 717 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 718 //#ifdef CONFIG_PLATFORM_SPRD
 719         //For CE Platform(SPRD or Tablet)
 720         //8723A or 8189ES platform
 721         //NeilChen--2012--08--24--
 722         //Fix Leave LPS issue
 723         if(     (adapter_to_pwrctl(pDM_Odm->Adapter)->pwr_mode != PS_MODE_ACTIVE) // in LPS mode
 724                 //&&(
 725                 //      (pDM_Odm->SupportICType & (ODM_RTL8723A ) )||
 726                 //      (pDM_Odm->SupportICType & (ODM_RTL8188E) &&((pDM_Odm->SupportInterface  == ODM_ITRF_SDIO)) )
 727                 //)
 728         )
 729         {
 730                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("----Step1: odm_DIG is in LPS mode\n"));
 731                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("---Step2: 8723AS is in LPS mode\n"));
 732                         odm_DIGbyRSSI_LPS(pDM_Odm);
 733         }
 734         else
 735 //#endif
 736 #endif
 737         {
 738                 odm_DIG(pDM_Odm);
 739         }
 740
 741         {
 742                 pDIG_T  pDM_DigTable = &pDM_Odm->DM_DigTable;
 743                 odm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue);
 744         }
 745         odm_CCKPacketDetectionThresh(pDM_Odm);
 746
 747         if(*(pDM_Odm->pbPowerSaving)==TRUE)
 748                 return;
 749
 750
 751         odm_RefreshRateAdaptiveMask(pDM_Odm);
 752         odm_RefreshBasicRateMask(pDM_Odm);
 753         odm_DynamicBBPowerSaving(pDM_Odm);
 754         odm_EdcaTurboCheck(pDM_Odm);
 755         odm_PathDiversity(pDM_Odm);
 756         ODM_CfoTracking(pDM_Odm);
 757         odm_DynamicTxPower(pDM_Odm);
 758
 759 #if (RTL8192E_SUPPORT == 1)
 760         if(pDM_Odm->SupportICType==ODM_RTL8192E)
 761                 odm_DynamicPrimaryCCA_Check(pDM_Odm);
 762 #endif
 763          //if(pDM_Odm->SupportICType == ODM_RTL8192E)
 764          //        return;
 765
 766
 767 //#if (MP_DRIVER != 1)
 768 if ( *(pDM_Odm->mp_mode) != 1) {
 769         if(pDM_Odm->SupportICType==ODM_RTL8723A)
 770         {
 771                 odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_PEAK);
 772         }
 773         else if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D))
 774         {
 775                 if(pDM_Odm->AntDivType == HW_ANTDIV)
 776                         odm_HwAntDiv(pDM_Odm);
 777                 else
 778                         odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_PEAK);
 779         }
 780         else
 781                 ODM_AntDiv(pDM_Odm);
 782 }
 783 //#endif
 784
 785         if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
 786         {
 787                 ODM_TXPowerTrackingCheck(pDM_Odm);
 788
 789                 odm_IQCalibrate(pDM_Odm);
 790         }
 791         else if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
 792         {
 793                 ODM_TXPowerTrackingCheck(pDM_Odm);
 794
 795                 //odm_EdcaTurboCheck(pDM_Odm);
 796
 797                 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN))
 798                 if(!(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8188E)))
 799                         odm_RXHP(pDM_Odm);
 800                 #endif
 801
 802         //2010.05.30 LukeLee: For CE platform, files in IC subfolders may not be included to be compiled,
 803         // so compile flags must be left here to prevent from compile errors
 804 #if (RTL8192D_SUPPORT == 1)
 805                 if(pDM_Odm->SupportICType==ODM_RTL8192D)
 806                         ODM_DynamicEarlyMode(pDM_Odm);
 807 #endif
 808                 odm_DynamicBBPowerSaving(pDM_Odm);
 809 #if (RTL8188E_SUPPORT == 1)
 810                 if(pDM_Odm->SupportICType==ODM_RTL8188E)
 811                         odm_DynamicPrimaryCCA(pDM_Odm);
 812 #endif
 813
 814         }
 815         pDM_Odm->PhyDbgInfo.NumQryBeaconPkt = 0;
 816
 817 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
 818         odm_dtc(pDM_Odm);
 819 #endif
 820 }
 821
 822
 823 //
 824 // Init /.. Fixed HW value. Only init time.
 825 //
 826 VOID
 827 ODM_CmnInfoInit(
 828         IN              PDM_ODM_T               pDM_Odm,
 829         IN              ODM_CMNINFO_E   CmnInfo,
 830         IN              u4Byte                  Value
 831         )
 832 {
 833         //
 834         // This section is used for init value
 835         //
 836         switch  (CmnInfo)
 837         {
 838                 //
 839                 // Fixed ODM value.
 840                 //
 841                 case    ODM_CMNINFO_ABILITY:
 842                         pDM_Odm->SupportAbility = (u4Byte)Value;
 843                         break;
 844
 845                 case    ODM_CMNINFO_RF_TYPE:
 846                         pDM_Odm->RFType = (u1Byte)Value;
 847                         break;
 848
 849                 case    ODM_CMNINFO_PLATFORM:
 850                         pDM_Odm->SupportPlatform = (u1Byte)Value;
 851                         break;
 852
 853                 case    ODM_CMNINFO_INTERFACE:
 854                         pDM_Odm->SupportInterface = (u1Byte)Value;
 855                         break;
 856
 857                 case    ODM_CMNINFO_MP_TEST_CHIP:
 858                         pDM_Odm->bIsMPChip= (u1Byte)Value;
 859                         break;
 860
 861                 case    ODM_CMNINFO_IC_TYPE:
 862                         pDM_Odm->SupportICType = Value;
 863                         break;
 864
 865                 case    ODM_CMNINFO_CUT_VER:
 866                         pDM_Odm->CutVersion = (u1Byte)Value;
 867                         break;
 868
 869                 case    ODM_CMNINFO_FAB_VER:
 870                         pDM_Odm->FabVersion = (u1Byte)Value;
 871                         break;
 872
 873                 case    ODM_CMNINFO_RFE_TYPE:
 874                         pDM_Odm->RFEType = (u1Byte)Value;
 875                         break;
 876
 877                 case    ODM_CMNINFO_RF_ANTENNA_TYPE:
 878                         pDM_Odm->AntDivType= (u1Byte)Value;
 879                         break;
 880
 881                 case    ODM_CMNINFO_BOARD_TYPE:
 882                         pDM_Odm->BoardType = (u1Byte)Value;
 883                         break;
 884
 885                 case    ODM_CMNINFO_PACKAGE_TYPE:
 886                         pDM_Odm->PackageType = (u1Byte)Value;
 887                         break;
 888
 889                 case    ODM_CMNINFO_EXT_LNA:
 890                         pDM_Odm->ExtLNA = (u1Byte)Value;
 891                         break;
 892
 893                 case    ODM_CMNINFO_5G_EXT_LNA:
 894                         pDM_Odm->ExtLNA5G = (u1Byte)Value;
 895                         break;
 896
 897                 case    ODM_CMNINFO_EXT_PA:
 898                         pDM_Odm->ExtPA = (u1Byte)Value;
 899                         break;
 900
 901                 case    ODM_CMNINFO_5G_EXT_PA:
 902                         pDM_Odm->ExtPA5G = (u1Byte)Value;
 903                         break;
 904
 905                 case    ODM_CMNINFO_GPA:
 906                         pDM_Odm->TypeGPA= (ODM_TYPE_GPA_E)Value;
 907                         break;
 908                 case    ODM_CMNINFO_APA:
 909                         pDM_Odm->TypeAPA= (ODM_TYPE_APA_E)Value;
 910                         break;
 911                 case    ODM_CMNINFO_GLNA:
 912                         pDM_Odm->TypeGLNA= (ODM_TYPE_GLNA_E)Value;
 913                         break;
 914                 case    ODM_CMNINFO_ALNA:
 915                         pDM_Odm->TypeALNA= (ODM_TYPE_ALNA_E)Value;
 916                         break;
 917
 918                 case    ODM_CMNINFO_EXT_TRSW:
 919                         pDM_Odm->ExtTRSW = (u1Byte)Value;
 920                         break;
 921                 case    ODM_CMNINFO_PATCH_ID:
 922                         pDM_Odm->PatchID = (u1Byte)Value;
 923                         break;
 924                 case    ODM_CMNINFO_BINHCT_TEST:
 925                         pDM_Odm->bInHctTest = (BOOLEAN)Value;
 926                         break;
 927                 case    ODM_CMNINFO_BWIFI_TEST:
 928                         pDM_Odm->bWIFITest = (BOOLEAN)Value;
 929                         break;
 930                 case    ODM_CMNINFO_SMART_CONCURRENT:
 931                         pDM_Odm->bDualMacSmartConcurrent = (BOOLEAN )Value;
 932                         break;
 933                 case    ODM_CMNINFO_DOMAIN_CODE_2G:
 934                         pDM_Odm->odm_Regulation2_4G = (u1Byte)Value;
 935                         break;
 936                 case    ODM_CMNINFO_DOMAIN_CODE_5G:
 937                         pDM_Odm->odm_Regulation5G = (u1Byte)Value;
 938                         break;
 939
 940                 //To remove the compiler warning, must add an empty default statement to handle the other values.
 941                 default:
 942                         //do nothing
 943                         break;
 944
 945         }
 946
 947 }
 948
 949
 950 VOID
 951 ODM_CmnInfoHook(
 952         IN              PDM_ODM_T               pDM_Odm,
 953         IN              ODM_CMNINFO_E   CmnInfo,
 954         IN              PVOID                   pValue
 955         )
 956 {
 957         //
 958         // Hook call by reference pointer.
 959         //
 960         switch  (CmnInfo)
 961         {
 962                 //
 963                 // Dynamic call by reference pointer.
 964                 //
 965                 case    ODM_CMNINFO_MAC_PHY_MODE:
 966                         pDM_Odm->pMacPhyMode = (u1Byte *)pValue;
 967                         break;
 968
 969                 case    ODM_CMNINFO_TX_UNI:
 970                         pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue;
 971                         break;
 972
 973                 case    ODM_CMNINFO_RX_UNI:
 974                         pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue;
 975                         break;
 976
 977                 case    ODM_CMNINFO_WM_MODE:
 978                         pDM_Odm->pWirelessMode = (u1Byte *)pValue;
 979                         break;
 980
 981                 case    ODM_CMNINFO_BAND:
 982                         pDM_Odm->pBandType = (u1Byte *)pValue;
 983                         break;
 984
 985                 case    ODM_CMNINFO_SEC_CHNL_OFFSET:
 986                         pDM_Odm->pSecChOffset = (u1Byte *)pValue;
 987                         break;
 988
 989                 case    ODM_CMNINFO_SEC_MODE:
 990                         pDM_Odm->pSecurity = (u1Byte *)pValue;
 991                         break;
 992
 993                 case    ODM_CMNINFO_BW:
 994                         pDM_Odm->pBandWidth = (u1Byte *)pValue;
 995                         break;
 996
 997                 case    ODM_CMNINFO_CHNL:
 998                         pDM_Odm->pChannel = (u1Byte *)pValue;
 999                         break;
1000
1001                 case    ODM_CMNINFO_DMSP_GET_VALUE:
1002                         pDM_Odm->pbGetValueFromOtherMac = (BOOLEAN *)pValue;
1003                         break;
1004
1005                 case    ODM_CMNINFO_BUDDY_ADAPTOR:
1006                         pDM_Odm->pBuddyAdapter = (PADAPTER *)pValue;
1007                         break;
1008
1009                 case    ODM_CMNINFO_DMSP_IS_MASTER:
1010                         pDM_Odm->pbMasterOfDMSP = (BOOLEAN *)pValue;
1011                         break;
1012
1013                 case    ODM_CMNINFO_SCAN:
1014                         pDM_Odm->pbScanInProcess = (BOOLEAN *)pValue;
1015                         break;
1016
1017                 case    ODM_CMNINFO_POWER_SAVING:
1018                         pDM_Odm->pbPowerSaving = (BOOLEAN *)pValue;
1019                         break;
1020
1021                 case    ODM_CMNINFO_ONE_PATH_CCA:
1022                         pDM_Odm->pOnePathCCA = (u1Byte *)pValue;
1023                         break;
1024
1025                 case    ODM_CMNINFO_DRV_STOP:
1026                         pDM_Odm->pbDriverStopped =  (BOOLEAN *)pValue;
1027                         break;
1028
1029                 case    ODM_CMNINFO_PNP_IN:
1030                         pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep =  (BOOLEAN *)pValue;
1031                         break;
1032
1033                 case    ODM_CMNINFO_INIT_ON:
1034                         pDM_Odm->pinit_adpt_in_progress =  (BOOLEAN *)pValue;
1035                         break;
1036
1037                 case    ODM_CMNINFO_ANT_TEST:
1038                         pDM_Odm->pAntennaTest =  (u1Byte *)pValue;
1039                         break;
1040
1041                 case    ODM_CMNINFO_NET_CLOSED:
1042                         pDM_Odm->pbNet_closed = (BOOLEAN *)pValue;
1043                         break;
1044
1045                 case    ODM_CMNINFO_FORCED_RATE:
1046                         pDM_Odm->pForcedDataRate = (pu2Byte)pValue;
1047                         break;
1048
1049                 case  ODM_CMNINFO_FORCED_IGI_LB:
1050                         pDM_Odm->pu1ForcedIgiLb = (u1Byte *)pValue;
1051                         break;
1052
1053                 case    ODM_CMNINFO_MP_MODE:
1054                         pDM_Odm->mp_mode = (u1Byte *)pValue;
1055                         break;
1056
1057                 //case  ODM_CMNINFO_RTSTA_AID:
1058                 //      pDM_Odm->pAidMap =  (u1Byte *)pValue;
1059                 //      break;
1060
1061                 //case  ODM_CMNINFO_BT_COEXIST:
1062                 //      pDM_Odm->BTCoexist = (BOOLEAN *)pValue;
1063
1064                 //case  ODM_CMNINFO_STA_STATUS:
1065                         //pDM_Odm->pODM_StaInfo[] = (PSTA_INFO_T)pValue;
1066                         //break;
1067
1068                 //case  ODM_CMNINFO_PHY_STATUS:
1069                 //      pDM_Odm->pPhyInfo = (ODM_PHY_INFO *)pValue;
1070                 //      break;
1071
1072                 //case  ODM_CMNINFO_MAC_STATUS:
1073                 //      pDM_Odm->pMacInfo = (ODM_MAC_INFO *)pValue;
1074                 //      break;
1075                 //To remove the compiler warning, must add an empty default statement to handle the other values.
1076                 default:
1077                         //do nothing
1078                         break;
1079
1080         }
1081
1082 }
1083
1084
1085 VOID
1086 ODM_CmnInfoPtrArrayHook(
1087         IN              PDM_ODM_T               pDM_Odm,
1088         IN              ODM_CMNINFO_E   CmnInfo,
1089         IN              u2Byte                  Index,
1090         IN              PVOID                   pValue
1091         )
1092 {
1093         //
1094         // Hook call by reference pointer.
1095         //
1096         switch  (CmnInfo)
1097         {
1098                 //
1099                 // Dynamic call by reference pointer.
1100                 //
1101                 case    ODM_CMNINFO_STA_STATUS:
1102                         pDM_Odm->pODM_StaInfo[Index] = (PSTA_INFO_T)pValue;
1103                         break;
1104                 //To remove the compiler warning, must add an empty default statement to handle the other values.
1105                 default:
1106                         //do nothing
1107                         break;
1108         }
1109
1110 }
1111
1112
1113 //
1114 // Update Band/CHannel/.. The values are dynamic but non-per-packet.
1115 //
1116 VOID
1117 ODM_CmnInfoUpdate(
1118         IN              PDM_ODM_T               pDM_Odm,
1119         IN              u4Byte                  CmnInfo,
1120         IN              u8Byte                  Value
1121         )
1122 {
1123         //
1124         // This init variable may be changed in run time.
1125         //
1126         switch  (CmnInfo)
1127         {
1128                 case ODM_CMNINFO_LINK_IN_PROGRESS:
1129                         pDM_Odm->bLinkInProcess = (BOOLEAN)Value;
1130                         break;
1131
1132                 case    ODM_CMNINFO_ABILITY:
1133                         pDM_Odm->SupportAbility = (u4Byte)Value;
1134                         break;
1135
1136                 case    ODM_CMNINFO_RF_TYPE:
1137                         pDM_Odm->RFType = (u1Byte)Value;
1138                         break;
1139
1140                 case    ODM_CMNINFO_WIFI_DIRECT:
1141                         pDM_Odm->bWIFI_Direct = (BOOLEAN)Value;
1142                         break;
1143
1144                 case    ODM_CMNINFO_WIFI_DISPLAY:
1145                         pDM_Odm->bWIFI_Display = (BOOLEAN)Value;
1146                         break;
1147
1148                 case    ODM_CMNINFO_LINK:
1149                         pDM_Odm->bLinked = (BOOLEAN)Value;
1150                         break;
1151
1152                 case    ODM_CMNINFO_STATION_STATE:
1153                         pDM_Odm->bsta_state = (BOOLEAN)Value;
1154                         break;
1155
1156                 case    ODM_CMNINFO_RSSI_MIN:
1157                         pDM_Odm->RSSI_Min= (u1Byte)Value;
1158                         break;
1159
1160                 case    ODM_CMNINFO_DBG_COMP:
1161                         pDM_Odm->DebugComponents = Value;
1162                         break;
1163
1164                 case    ODM_CMNINFO_DBG_LEVEL:
1165                         pDM_Odm->DebugLevel = (u4Byte)Value;
1166                         break;
1167                 case    ODM_CMNINFO_RA_THRESHOLD_HIGH:
1168                         pDM_Odm->RateAdaptive.HighRSSIThresh = (u1Byte)Value;
1169                         break;
1170
1171                 case    ODM_CMNINFO_RA_THRESHOLD_LOW:
1172                         pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value;
1173                         break;
1174                 // The following is for BT HS mode and BT coexist mechanism.
1175                 case ODM_CMNINFO_BT_ENABLED:
1176                         pDM_Odm->bBtEnabled = (BOOLEAN)Value;
1177                         break;
1178
1179                 case ODM_CMNINFO_BT_HS_CONNECT_PROCESS:
1180                         pDM_Odm->bBtConnectProcess = (BOOLEAN)Value;
1181                         break;
1182
1183                 case ODM_CMNINFO_BT_HS_RSSI:
1184                         pDM_Odm->btHsRssi = (u1Byte)Value;
1185                         break;
1186
1187                 case    ODM_CMNINFO_BT_OPERATION:
1188                         pDM_Odm->bBtHsOperation = (BOOLEAN)Value;
1189                         break;
1190
1191                 case    ODM_CMNINFO_BT_LIMITED_DIG:
1192                         pDM_Odm->bBtLimitedDig = (BOOLEAN)Value;
1193                         break;
1194
1195                 case    ODM_CMNINFO_BT_DISABLE_EDCA:
1196                         pDM_Odm->bBtDisableEdcaTurbo = (BOOLEAN)Value;
1197                         break;
1198
1199 /*
1200                 case    ODM_CMNINFO_OP_MODE:
1201                         pDM_Odm->OPMode = (u1Byte)Value;
1202                         break;
1203
1204                 case    ODM_CMNINFO_WM_MODE:
1205                         pDM_Odm->WirelessMode = (u1Byte)Value;
1206                         break;
1207
1208                 case    ODM_CMNINFO_BAND:
1209                         pDM_Odm->BandType = (u1Byte)Value;
1210                         break;
1211
1212                 case    ODM_CMNINFO_SEC_CHNL_OFFSET:
1213                         pDM_Odm->SecChOffset = (u1Byte)Value;
1214                         break;
1215
1216                 case    ODM_CMNINFO_SEC_MODE:
1217                         pDM_Odm->Security = (u1Byte)Value;
1218                         break;
1219
1220                 case    ODM_CMNINFO_BW:
1221                         pDM_Odm->BandWidth = (u1Byte)Value;
1222                         break;
1223
1224                 case    ODM_CMNINFO_CHNL:
1225                         pDM_Odm->Channel = (u1Byte)Value;
1226                         break;
1227 */
1228                 default:
1229                         //do nothing
1230                         break;
1231         }
1232
1233
1234 }
1235
1236 VOID
1237 odm_CommonInfoSelfInit(
1238         IN              PDM_ODM_T               pDM_Odm
1239         )
1240 {
1241         pFAT_T                  pDM_FatTable = &pDM_Odm->DM_FatTable;
1242         pDM_Odm->bCckHighPower = (BOOLEAN) ODM_GetBBReg(pDM_Odm, ODM_REG(CCK_RPT_FORMAT,pDM_Odm), ODM_BIT(CCK_RPT_FORMAT,pDM_Odm));
1243         pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH,pDM_Odm), ODM_BIT(BB_RX_PATH,pDM_Odm));
1244 #if (DM_ODM_SUPPORT_TYPE != ODM_CE)
1245         pDM_Odm->pbNet_closed = &pDM_Odm->BOOLEAN_temp;
1246 #endif
1247
1248         ODM_InitDebugSetting(pDM_Odm);
1249
1250         if(pDM_Odm->SupportICType==ODM_RTL8723A)
1251         {
1252                 pDM_Odm->AntDivType = SW_ANTDIV;
1253         }
1254         else if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D))
1255         {
1256            #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1257                 pDM_Odm->AntDivType = HW_ANTDIV;
1258            #elif (defined(CONFIG_SW_ANTENNA_DIVERSITY))
1259                 pDM_Odm->AntDivType = SW_ANTDIV;
1260            #endif
1261         }
1262         pDM_Odm->TxRate = 0xFF;
1263 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1264 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
1265
1266         if(pDM_Odm->SupportICType==ODM_RTL8723B)
1267         {
1268                 if((!pDM_Odm->DM_SWAT_Table.ANTA_ON || !pDM_Odm->DM_SWAT_Table.ANTB_ON))
1269                         pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV);
1270         }
1271
1272 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
1273
1274         #if(defined(CONFIG_NOT_SUPPORT_ANTDIV))
1275                 pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV);
1276                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Disable AntDiv function] : Not Support 2.4G & 5G Antenna Diversity\n"));
1277         #elif(defined(CONFIG_2G5G_SUPPORT_ANTDIV))
1278                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : 2.4G & 5G Support Antenna Diversity Simultaneously \n"));
1279                 pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_2G|ODM_ANTDIV_5G);
1280                 if(pDM_Odm->SupportICType & ODM_ANTDIV_SUPPORT)
1281                         pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV;
1282                 if(*pDM_Odm->pBandType == ODM_BAND_5G )
1283                 {
1284                         #if ( defined(CONFIG_5G_CGCS_RX_DIVERSITY) )
1285                                 pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV;
1286                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n"));
1287                         #elif( defined(CONFIG_5G_CG_TRX_DIVERSITY) )
1288                                 pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV;
1289                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n"));
1290                         #elif( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) )
1291                                 pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV;
1292                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_SMART_ANTDIV\n"));
1293                         #endif
1294                 }
1295                 else    if(*pDM_Odm->pBandType == ODM_BAND_2_4G )
1296                 {
1297                         #if ( defined(CONFIG_2G_CGCS_RX_DIVERSITY) )
1298                                 pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV;
1299                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n"));
1300                         #elif( defined(CONFIG_2G_CG_TRX_DIVERSITY) )
1301                                 pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV;
1302                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_TRX_HW_ANTDIV\n"));
1303                         #elif( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) )
1304                                 pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV;
1305                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_SMART_ANTDIV\n"));
1306                         #endif
1307                 }
1308         #elif(defined(CONFIG_5G_SUPPORT_ANTDIV))
1309                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : Only 5G Support Antenna Diversity\n"));
1310                 pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_5G);
1311                 if(*pDM_Odm->pBandType == ODM_BAND_5G )
1312                 {
1313                         if(pDM_Odm->SupportICType & ODM_ANTDIV_5G_SUPPORT_IC)
1314                                 pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV;
1315                         #if ( defined(CONFIG_5G_CGCS_RX_DIVERSITY) )
1316                                 pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV;
1317                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n"));
1318                         #elif( defined(CONFIG_5G_CG_TRX_DIVERSITY) )
1319                                 pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV;
1320                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_TRX_HW_ANTDIV\n"));
1321                         #elif( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) )
1322                                 pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV;
1323                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 5G] : AntDiv Type = CG_SMART_ANTDIV\n"));
1324                         #endif
1325                 }
1326                 else if(*pDM_Odm->pBandType == ODM_BAND_2_4G )
1327                 {
1328                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Not Support 2G AntDivType\n"));
1329                         pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV);
1330                 }
1331         #elif(defined(CONFIG_2G_SUPPORT_ANTDIV))
1332                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Enable AntDiv function] : Only 2.4G Support Antenna Diversity\n"));
1333                 pDM_FatTable->AntDiv_2G_5G = (ODM_ANTDIV_2G);
1334                 if(*pDM_Odm->pBandType == ODM_BAND_2_4G )
1335                 {
1336                         if(pDM_Odm->SupportICType & ODM_ANTDIV_2G_SUPPORT_IC)
1337                                 pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV;
1338                         #if ( defined(CONFIG_2G_CGCS_RX_DIVERSITY) )
1339                                 pDM_Odm->AntDivType = CGCS_RX_HW_ANTDIV;
1340                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CGCS_RX_HW_ANTDIV\n"));
1341                         #elif( defined(CONFIG_2G_CG_TRX_DIVERSITY) )
1342                                 pDM_Odm->AntDivType = CG_TRX_HW_ANTDIV;
1343                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_TRX_HW_ANTDIV\n"));
1344                         #elif( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) )
1345                                 pDM_Odm->AntDivType = CG_TRX_SMART_ANTDIV;
1346                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ 2.4G] : AntDiv Type = CG_SMART_ANTDIV\n"));
1347                         #endif
1348                 }
1349                 else if(*pDM_Odm->pBandType == ODM_BAND_5G )
1350                 {
1351                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Not Support 5G AntDivType\n"));
1352                         pDM_Odm->SupportAbility &= ~(ODM_BB_ANT_DIV);
1353                 }
1354         #endif
1355 #endif //#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1356 #endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1357
1358 }
1359
1360 VOID
1361 odm_CommonInfoSelfUpdate(
1362         IN              PDM_ODM_T               pDM_Odm
1363         )
1364 {
1365         u1Byte  EntryCnt=0;
1366         u1Byte  i;
1367         PSTA_INFO_T     pEntry;
1368
1369 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1370
1371         PADAPTER        Adapter =  pDM_Odm->Adapter;
1372         PMGNT_INFO      pMgntInfo = &Adapter->MgntInfo;
1373
1374         pEntry = pDM_Odm->pODM_StaInfo[0];
1375         if(pMgntInfo->mAssoc)
1376         {
1377                 pEntry->bUsed=TRUE;
1378                 for (i=0; i<6; i++)
1379                         pEntry->MacAddr[i] = pMgntInfo->Bssid[i];
1380         }
1381         else
1382         {
1383                 pEntry->bUsed=FALSE;
1384                 for (i=0; i<6; i++)
1385                         pEntry->MacAddr[i] = 0;
1386         }
1387 #endif
1388
1389
1390         if(*(pDM_Odm->pBandWidth) == ODM_BW40M)
1391         {
1392                 if(*(pDM_Odm->pSecChOffset) == 1)
1393                         pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) -2;
1394                 else if(*(pDM_Odm->pSecChOffset) == 2)
1395                         pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) +2;
1396         }
1397         else
1398                 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel);
1399
1400         for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
1401         {
1402                 pEntry = pDM_Odm->pODM_StaInfo[i];
1403                 if(IS_STA_VALID(pEntry))
1404                         EntryCnt++;
1405         }
1406         if(EntryCnt == 1)
1407                 pDM_Odm->bOneEntryOnly = TRUE;
1408         else
1409                 pDM_Odm->bOneEntryOnly = FALSE;
1410 }
1411
1412 VOID
1413 odm_CmnInfoInit_Debug(
1414         IN              PDM_ODM_T               pDM_Odm
1415         )
1416 {
1417         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug==>\n"));
1418         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportPlatform=%d\n",pDM_Odm->SupportPlatform) );
1419         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility=0x%x\n",pDM_Odm->SupportAbility) );
1420         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface=%d\n",pDM_Odm->SupportInterface) );
1421         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType=0x%x\n",pDM_Odm->SupportICType) );
1422         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion=%d\n",pDM_Odm->CutVersion) );
1423         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("FabVersion=%d\n",pDM_Odm->FabVersion) );
1424         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RFType=%d\n",pDM_Odm->RFType) );
1425         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType=%d\n",pDM_Odm->BoardType) );
1426         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA=%d\n",pDM_Odm->ExtLNA) );
1427         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA=%d\n",pDM_Odm->ExtPA) );
1428         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW=%d\n",pDM_Odm->ExtTRSW) );
1429         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID=%d\n",pDM_Odm->PatchID) );
1430         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest=%d\n",pDM_Odm->bInHctTest) );
1431         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest=%d\n",pDM_Odm->bWIFITest) );
1432         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent=%d\n",pDM_Odm->bDualMacSmartConcurrent) );
1433
1434 }
1435
1436 VOID
1437 odm_CmnInfoHook_Debug(
1438         IN              PDM_ODM_T               pDM_Odm
1439         )
1440 {
1441         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoHook_Debug==>\n"));
1442         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumTxBytesUnicast=%llu\n",*(pDM_Odm->pNumTxBytesUnicast)) );
1443         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumRxBytesUnicast=%llu\n",*(pDM_Odm->pNumRxBytesUnicast)) );
1444         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pWirelessMode=0x%x\n",*(pDM_Odm->pWirelessMode)) );
1445         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecChOffset=%d\n",*(pDM_Odm->pSecChOffset)) );
1446         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecurity=%d\n",*(pDM_Odm->pSecurity)) );
1447         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBandWidth=%d\n",*(pDM_Odm->pBandWidth)) );
1448         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pChannel=%d\n",*(pDM_Odm->pChannel)) );
1449
1450         if(pDM_Odm->SupportICType==ODM_RTL8192D)
1451         {
1452                 if(pDM_Odm->pBandType)
1453                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBandType=%d\n",*(pDM_Odm->pBandType)) );
1454                 if(pDM_Odm->pMacPhyMode)
1455                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pMacPhyMode=%d\n",*(pDM_Odm->pMacPhyMode)) );
1456                 if(pDM_Odm->pBuddyAdapter)
1457                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbGetValueFromOtherMac=%d\n",*(pDM_Odm->pbGetValueFromOtherMac)) );
1458                 if(pDM_Odm->pBuddyAdapter)
1459                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBuddyAdapter=%p\n",*(pDM_Odm->pBuddyAdapter)) );
1460                 if(pDM_Odm->pbMasterOfDMSP)
1461                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbMasterOfDMSP=%d\n",*(pDM_Odm->pbMasterOfDMSP)) );
1462         }
1463         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbScanInProcess=%d\n",*(pDM_Odm->pbScanInProcess)) );
1464         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbPowerSaving=%d\n",*(pDM_Odm->pbPowerSaving)) );
1465
1466         if(pDM_Odm->SupportPlatform & (ODM_AP|ODM_ADSL))
1467                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("pOnePathCCA=%d\n",*(pDM_Odm->pOnePathCCA)) );
1468 }
1469
1470 VOID
1471 odm_CmnInfoUpdate_Debug(
1472         IN              PDM_ODM_T               pDM_Odm
1473         )
1474 {
1475         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoUpdate_Debug==>\n"));
1476         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Direct=%d\n",pDM_Odm->bWIFI_Direct) );
1477         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Display=%d\n",pDM_Odm->bWIFI_Display) );
1478         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked=%d\n",pDM_Odm->bLinked) );
1479         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min=%d\n",pDM_Odm->RSSI_Min) );
1480 }
1481
1482 VOID
1483 odm_BasicDbgMessage
1484 (
1485         IN              PDM_ODM_T               pDM_Odm
1486         )
1487 {
1488         PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
1489         pDIG_T  pDM_DigTable = &pDM_Odm->DM_DigTable;
1490
1491         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_BasicDbgMsg==>\n"));
1492         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked = %d, RSSI_Min = %d, CurrentIGI = 0x%x \n",
1493                 pDM_Odm->bLinked, pDM_Odm->RSSI_Min, pDM_DigTable->CurIGValue) );
1494         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("Cnt_Cck_fail = %d, Cnt_Ofdm_fail = %d, Total False Alarm = %d\n",
1495                 FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_all));
1496         ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RxRate = 0x%x, RSSI_A = %d, RSSI_B = %d\n",
1497                 pDM_Odm->RxRate, pDM_Odm->RSSI_A, pDM_Odm->RSSI_B));
1498         //ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_C = %d, RSSI_D = %d\n", pDM_Odm->RSSI_C, pDM_Odm->RSSI_D));
1499
1500 }
1501
1502 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1503 VOID
1504 ODM_InitAllWorkItems(IN PDM_ODM_T       pDM_Odm )
1505 {
1506 #if USE_WORKITEM
1507         PADAPTER                pAdapter = pDM_Odm->Adapter;
1508
1509         ODM_InitializeWorkItem( pDM_Odm,
1510                                                         &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem_8723B,
1511                                                         (RT_WORKITEM_CALL_BACK)ODM_SW_AntDiv_WorkitemCallback,
1512                                                         (PVOID)pAdapter,
1513                                                         "AntennaSwitchWorkitem");
1514
1515         ODM_InitializeWorkItem( pDM_Odm,
1516                                                         &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem,
1517                                                         (RT_WORKITEM_CALL_BACK)odm_SwAntDivChkAntSwitchWorkitemCallback,
1518                                                         (PVOID)pAdapter,
1519                                                         "AntennaSwitchWorkitem");
1520
1521
1522         ODM_InitializeWorkItem(
1523                 pDM_Odm,
1524                 &(pDM_Odm->PathDivSwitchWorkitem),
1525                 (RT_WORKITEM_CALL_BACK)odm_PathDivChkAntSwitchWorkitemCallback,
1526                 (PVOID)pAdapter,
1527                 "SWAS_WorkItem");
1528
1529         ODM_InitializeWorkItem(
1530                 pDM_Odm,
1531                 &(pDM_Odm->CCKPathDiversityWorkitem),
1532                 (RT_WORKITEM_CALL_BACK)odm_CCKTXPathDiversityWorkItemCallback,
1533                 (PVOID)pAdapter,
1534                 "CCKTXPathDiversityWorkItem");
1535
1536         ODM_InitializeWorkItem(
1537                 pDM_Odm,
1538                 &(pDM_Odm->MPT_DIGWorkitem),
1539                 (RT_WORKITEM_CALL_BACK)odm_MPT_DIGWorkItemCallback,
1540                 (PVOID)pAdapter,
1541                 "MPT_DIGWorkitem");
1542
1543         ODM_InitializeWorkItem(
1544                 pDM_Odm,
1545                 &(pDM_Odm->RaRptWorkitem),
1546                 (RT_WORKITEM_CALL_BACK)ODM_UpdateInitRateWorkItemCallback,
1547                 (PVOID)pAdapter,
1548                 "RaRptWorkitem");
1549
1550 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1551 #if (RTL8188E_SUPPORT == 1)
1552         ODM_InitializeWorkItem(
1553                 pDM_Odm,
1554                 &(pDM_Odm->FastAntTrainingWorkitem),
1555                 (RT_WORKITEM_CALL_BACK)odm_FastAntTrainingWorkItemCallback,
1556                 (PVOID)pAdapter,
1557                 "FastAntTrainingWorkitem");
1558 #endif
1559 #endif
1560         ODM_InitializeWorkItem(
1561                 pDM_Odm,
1562                 &(pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem),
1563                 (RT_WORKITEM_CALL_BACK)odm_PSD_RXHPWorkitemCallback,
1564                 (PVOID)pAdapter,
1565                 "PSDRXHP_WorkItem");
1566 #endif
1567 }
1568
1569 VOID
1570 ODM_FreeAllWorkItems(IN PDM_ODM_T       pDM_Odm )
1571 {
1572 #if USE_WORKITEM
1573         ODM_FreeWorkItem(       &(pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem_8723B));
1574
1575         ODM_FreeWorkItem(       &(pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem));
1576
1577         ODM_FreeWorkItem(&(pDM_Odm->PathDivSwitchWorkitem));
1578
1579         ODM_FreeWorkItem(&(pDM_Odm->CCKPathDiversityWorkitem));
1580
1581         ODM_FreeWorkItem(&(pDM_Odm->FastAntTrainingWorkitem));
1582
1583         ODM_FreeWorkItem(&(pDM_Odm->MPT_DIGWorkitem));
1584
1585         ODM_FreeWorkItem(&(pDM_Odm->RaRptWorkitem));
1586
1587         ODM_FreeWorkItem((&pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem));
1588 #endif
1589
1590 }
1591 #endif
1592
1593 /*
1594 VOID
1595 odm_FindMinimumRSSI(
1596         IN              PDM_ODM_T               pDM_Odm
1597         )
1598 {
1599         u4Byte  i;
1600         u1Byte  RSSI_Min = 0xFF;
1601
1602         for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
1603         {
1604 //              if(pDM_Odm->pODM_StaInfo[i] != NULL)
1605                 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) )
1606                 {
1607                         if(pDM_Odm->pODM_StaInfo[i]->RSSI_Ave < RSSI_Min)
1608                         {
1609                                 RSSI_Min = pDM_Odm->pODM_StaInfo[i]->RSSI_Ave;
1610                         }
1611                 }
1612         }
1613
1614         pDM_Odm->RSSI_Min = RSSI_Min;
1615
1616 }
1617
1618 VOID
1619 odm_IsLinked(
1620         IN              PDM_ODM_T               pDM_Odm
1621         )
1622 {
1623         u4Byte i;
1624         BOOLEAN Linked = FALSE;
1625
1626         for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
1627         {
1628                         if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) )
1629                         {
1630                                 Linked = TRUE;
1631                                 break;
1632                         }
1633
1634         }
1635
1636         pDM_Odm->bLinked = Linked;
1637 }
1638 */
1639
1640
1641 //3============================================================
1642 //3 DIG
1643 //3============================================================
1644 /*-----------------------------------------------------------------------------
1645  * Function:    odm_DIGInit()
1646  *
1647  * Overview:    Set DIG scheme init value.
1648  *
1649  * Input:               NONE
1650  *
1651  * Output:              NONE
1652  *
1653  * Return:              NONE
1654  *
1655  * Revised History:
1656  *      When            Who             Remark
1657  *
1658  *---------------------------------------------------------------------------*/
1659
1660 //Remove DIG by yuchen
1661
1662 //Remove DIG and FA check by Yu Chen
1663
1664
1665 //3============================================================
1666 //3 BB Power Save
1667 //3============================================================
1668
1669 //Remove BB power saving by Yuchen
1670
1671 //3============================================================
1672 //3 RATR MASK
1673 //3============================================================
1674 //3============================================================
1675 //3 Rate Adaptive
1676 //3============================================================
1677
1678 //Remove RAMask by RS_James
1679
1680 //3============================================================
1681 //3 Dynamic Tx Power
1682 //3============================================================
1683
1684 //Remove BY YuChen
1685
1686 //Remove  Rssimonitorcheck related function to odm_rssimonitorcheck.c
1687
1688
1689 VOID
1690 ODM_InitAllTimers(
1691         IN PDM_ODM_T    pDM_Odm
1692         )
1693 {
1694 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1695 #if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1)
1696         ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer_8723B,
1697         (RT_TIMER_CALL_BACK)ODM_SW_AntDiv_Callback, NULL, "SwAntennaSwitchTimer_8723B");
1698 #endif
1699 #endif
1700
1701 #if(defined(CONFIG_SW_ANTENNA_DIVERSITY))
1702         ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer,
1703                 (RT_TIMER_CALL_BACK)odm_SwAntDivChkAntSwitchCallback, NULL, "SwAntennaSwitchTimer");
1704 #endif
1705
1706 #if (!(DM_ODM_SUPPORT_TYPE == ODM_CE))
1707 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1708 #if (RTL8188E_SUPPORT == 1)
1709         ODM_InitializeTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer,
1710                 (RT_TIMER_CALL_BACK)odm_FastAntTrainingCallback, NULL, "FastAntTrainingTimer");
1711 #endif
1712 #endif
1713 #endif
1714
1715 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1716         ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer,
1717                 (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer");
1718         //
1719         //Path Diversity
1720         //Neil Chen--2011--06--16--  / 2012/02/23 MH Revise Arch.
1721         //
1722         ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer,
1723                 (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer");
1724
1725         ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer,
1726                 (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer");
1727
1728         ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer,
1729                 (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer");
1730
1731         ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer,
1732                 (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer");
1733 #endif
1734 }
1735
1736 VOID
1737 ODM_CancelAllTimers(
1738         IN PDM_ODM_T    pDM_Odm
1739         )
1740 {
1741 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1742         //
1743         // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in
1744         // win7 platform.
1745         //
1746         HAL_ADAPTER_STS_CHK(pDM_Odm)
1747 #endif
1748 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1749 #if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1)
1750         ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer_8723B);
1751 #endif
1752 #endif
1753
1754 #if(defined(CONFIG_SW_ANTENNA_DIVERSITY))
1755         ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer);
1756 #endif
1757
1758 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1759
1760 #if (RTL8188E_SUPPORT == 1)
1761         ODM_CancelTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer);
1762 #endif
1763         ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer);
1764         //
1765         //Path Diversity
1766         //Neil Chen--2011--06--16--  / 2012/02/23 MH Revise Arch.
1767         //
1768         ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer);
1769
1770         ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer);
1771
1772         ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1773
1774         ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer);
1775 #endif
1776 }
1777
1778
1779 VOID
1780 ODM_ReleaseAllTimers(
1781         IN PDM_ODM_T    pDM_Odm
1782         )
1783 {
1784 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1785 #if (RTL8723B_SUPPORT == 1)||(RTL8821A_SUPPORT == 1)
1786         ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer_8723B);
1787 #endif
1788 #endif
1789
1790 #if(defined(CONFIG_SW_ANTENNA_DIVERSITY))
1791         ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer);
1792 #endif
1793
1794 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1795
1796 #if (RTL8188E_SUPPORT == 1)
1797         ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->FastAntTrainingTimer);
1798 #endif
1799
1800         ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer);
1801         //
1802         //Path Diversity
1803         //Neil Chen--2011--06--16--  / 2012/02/23 MH Revise Arch.
1804         //
1805         ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer);
1806
1807         ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer);
1808
1809         ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1810
1811         ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer);
1812 #endif
1813 }
1814
1815
1816 //3============================================================
1817 //3 Tx Power Tracking
1818 //3============================================================
1819
1820 VOID
1821 odm_IQCalibrate(
1822                 IN      PDM_ODM_T       pDM_Odm
1823                 )
1824 {
1825         PADAPTER        Adapter = pDM_Odm->Adapter;
1826
1827         if(!IS_HARDWARE_TYPE_JAGUAR(Adapter))
1828                 return;
1829         else if(IS_HARDWARE_TYPE_8812AU(Adapter))
1830                 return;
1831 #if (RTL8821A_SUPPORT == 1)
1832         if(pDM_Odm->bLinked)
1833         {
1834                 if((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess))
1835                 {
1836                         pDM_Odm->preChannel = *pDM_Odm->pChannel;
1837                         pDM_Odm->LinkedInterval = 0;
1838                 }
1839
1840                 if(pDM_Odm->LinkedInterval < 3)
1841                         pDM_Odm->LinkedInterval++;
1842
1843                 if(pDM_Odm->LinkedInterval == 2)
1844                 {
1845                         // Mark out IQK flow to prevent tx stuck. by Maddest 20130306
1846                         // Open it verified by James 20130715
1847                         PHY_IQCalibrate_8821A(Adapter, FALSE);
1848                 }
1849         }
1850         else
1851                 pDM_Odm->LinkedInterval = 0;
1852 #endif
1853 }
1854
1855
1856 VOID
1857 odm_TXPowerTrackingInit(
1858         IN      PDM_ODM_T       pDM_Odm
1859         )
1860 {
1861 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1862         if(!(pDM_Odm->SupportICType & (ODM_RTL8814A|ODM_IC_11N_SERIES)))
1863                 return;
1864 #endif
1865
1866         odm_TXPowerTrackingThermalMeterInit(pDM_Odm);
1867 }
1868
1869 u1Byte
1870 getSwingIndex(
1871         IN      PDM_ODM_T       pDM_Odm
1872         )
1873 {
1874         PADAPTER                Adapter = pDM_Odm->Adapter;
1875         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
1876         u1Byte                  i = 0;
1877         u4Byte                  bbSwing;
1878         u4Byte                  swingTableSize;
1879         pu4Byte                         pSwingTable;
1880
1881         if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B ||
1882                 pDM_Odm->SupportICType == ODM_RTL8192E)
1883         {
1884                 bbSwing = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, 0xFFC00000);
1885
1886                 pSwingTable = OFDMSwingTable_New;
1887                 swingTableSize = OFDM_TABLE_SIZE;
1888         } else {
1889 #if ((RTL8812A_SUPPORT==1)||(RTL8821A_SUPPORT==1))
1890                 if (pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8821)
1891                 {
1892                         bbSwing = PHY_GetTxBBSwing_8812A(Adapter, pHalData->CurrentBandType, ODM_RF_PATH_A);
1893                         pSwingTable = TxScalingTable_Jaguar;
1894                         swingTableSize = TXSCALE_TABLE_SIZE;
1895                 }
1896                 else
1897 #endif
1898                 {
1899                         bbSwing = 0;
1900                         pSwingTable = OFDMSwingTable;
1901                         swingTableSize = OFDM_TABLE_SIZE;
1902                 }
1903         }
1904
1905         for (i = 0; i < swingTableSize; ++i) {
1906                 u4Byte tableValue = pSwingTable[i];
1907
1908                 if (tableValue >= 0x100000 )
1909                         tableValue >>= 22;
1910                 if (bbSwing == tableValue)
1911                         break;
1912         }
1913         return i;
1914 }
1915
1916 VOID
1917 odm_TXPowerTrackingThermalMeterInit(
1918         IN      PDM_ODM_T       pDM_Odm
1919         )
1920 {
1921         u1Byte defaultSwingIndex = getSwingIndex(pDM_Odm);
1922         u1Byte                  p = 0;
1923 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1924         PADAPTER                Adapter = pDM_Odm->Adapter;
1925         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
1926
1927         #if     MP_DRIVER != 1                                  //for mp driver, turn off txpwrtracking as default
1928         pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = pHalData->TxPowerTrackControl = TRUE;
1929         #endif
1930 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
1931         PADAPTER                        Adapter = pDM_Odm->Adapter;
1932         HAL_DATA_TYPE           *pHalData = GET_HAL_DATA(Adapter);
1933
1934
1935         if (pDM_Odm->SupportICType >= ODM_RTL8188E)
1936         {
1937                 pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE;
1938                 pDM_Odm->RFCalibrateInfo.TXPowercount = 0;
1939                 pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE;
1940
1941                 if ( *(pDM_Odm->mp_mode) != 1)
1942                         pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE;
1943                 else
1944                         pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _FALSE;
1945
1946                 MSG_8192C("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl);
1947         }
1948         else
1949         {
1950                 struct dm_priv  *pdmpriv = &pHalData->dmpriv;
1951
1952                 pdmpriv->bTXPowerTracking = _TRUE;
1953                 pdmpriv->TXPowercount = 0;
1954                 pdmpriv->bTXPowerTrackingInit = _FALSE;
1955                 //#if   (MP_DRIVER != 1)                //for mp driver, turn off txpwrtracking as default
1956
1957                 if (*(pDM_Odm->mp_mode) != 1)
1958                         pdmpriv->TxPowerTrackControl = _TRUE;
1959                 else
1960                         pdmpriv->TxPowerTrackControl = _FALSE;
1961
1962
1963                 //MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl);
1964         }
1965
1966 #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
1967         #ifdef RTL8188E_SUPPORT
1968         {
1969                 pDM_Odm->RFCalibrateInfo.bTXPowerTracking = _TRUE;
1970                 pDM_Odm->RFCalibrateInfo.TXPowercount = 0;
1971                 pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = _FALSE;
1972                 pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = _TRUE;
1973         }
1974         #endif
1975 #endif
1976
1977         //pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = TRUE;
1978         pDM_Odm->RFCalibrateInfo.ThermalValue = pHalData->EEPROMThermalMeter;
1979         pDM_Odm->RFCalibrateInfo.ThermalValue_IQK = pHalData->EEPROMThermalMeter;
1980         pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = pHalData->EEPROMThermalMeter;
1981
1982         // The index of "0 dB" in SwingTable.
1983         if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8723B ||
1984                 pDM_Odm->SupportICType == ODM_RTL8192E)
1985         {
1986                 pDM_Odm->DefaultOfdmIndex = (defaultSwingIndex >= OFDM_TABLE_SIZE) ? 30 : defaultSwingIndex;
1987                 pDM_Odm->DefaultCckIndex = 20;
1988         }
1989         else
1990         {
1991                 pDM_Odm->DefaultOfdmIndex = (defaultSwingIndex >= TXSCALE_TABLE_SIZE) ? 24 : defaultSwingIndex;
1992                 pDM_Odm->DefaultCckIndex = 24;
1993         }
1994
1995         pDM_Odm->BbSwingIdxCckBase = pDM_Odm->DefaultCckIndex;
1996         pDM_Odm->RFCalibrateInfo.CCK_index = pDM_Odm->DefaultCckIndex;
1997
1998         for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p)
1999         {
2000                 pDM_Odm->BbSwingIdxOfdmBase[p] = pDM_Odm->DefaultOfdmIndex;
2001                 pDM_Odm->RFCalibrateInfo.OFDM_index[p] = pDM_Odm->DefaultOfdmIndex;
2002                 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] = 0;
2003                 pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] = 0;
2004                 pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0;
2005         }
2006
2007 }
2008
2009
2010 VOID
2011 ODM_TXPowerTrackingCheck(
2012         IN              PDM_ODM_T               pDM_Odm
2013         )
2014 {
2015         //
2016         // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
2017         // at the same time. In the stage2/3, we need to prive universal interface and merge all
2018         // HW dynamic mechanism.
2019         //
2020         switch  (pDM_Odm->SupportPlatform)
2021         {
2022                 case    ODM_WIN:
2023                         odm_TXPowerTrackingCheckMP(pDM_Odm);
2024                         break;
2025
2026                 case    ODM_CE:
2027                         odm_TXPowerTrackingCheckCE(pDM_Odm);
2028                         break;
2029
2030                 case    ODM_AP:
2031                         odm_TXPowerTrackingCheckAP(pDM_Odm);
2032                         break;
2033
2034                 case    ODM_ADSL:
2035                         //odm_DIGAP(pDM_Odm);
2036                         break;
2037         }
2038
2039 }
2040
2041 VOID
2042 odm_TXPowerTrackingCheckCE(
2043         IN              PDM_ODM_T               pDM_Odm
2044         )
2045 {
2046 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
2047         PADAPTER        Adapter = pDM_Odm->Adapter;
2048         #if( (RTL8192C_SUPPORT==1) ||  (RTL8723A_SUPPORT==1) )
2049         if(IS_HARDWARE_TYPE_8192C(Adapter)){
2050                 rtl8192c_odm_CheckTXPowerTracking(Adapter);
2051                 return;
2052         }
2053         #endif
2054
2055         #if (RTL8192D_SUPPORT==1)
2056         if(IS_HARDWARE_TYPE_8192D(Adapter)){
2057                 #if (RTL8192D_EASY_SMART_CONCURRENT == 1)
2058                 if(!Adapter->bSlaveOfDMSP)
2059                 #endif
2060                         rtl8192d_odm_CheckTXPowerTracking(Adapter);
2061                 return;
2062         }
2063         #endif
2064
2065         #if(((RTL8188E_SUPPORT==1) ||  (RTL8812A_SUPPORT==1) ||  (RTL8821A_SUPPORT==1) ||  (RTL8192E_SUPPORT==1)  ||  (RTL8723B_SUPPORT==1)  ))
2066         if(!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK))
2067         {
2068                 return;
2069         }
2070
2071         if(!pDM_Odm->RFCalibrateInfo.TM_Trigger)                //at least delay 1 sec
2072         {
2073                 //pHalData->TxPowerCheckCnt++;  //cosa add for debug
2074                 if(IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter)||IS_HARDWARE_TYPE_8723B(Adapter))
2075                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_NEW, (BIT17 | BIT16), 0x03);
2076                 else
2077                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_T_METER_OLD, bRFRegOffsetMask, 0x60);
2078
2079                 //DBG_871X("Trigger Thermal Meter!!\n");
2080
2081                 pDM_Odm->RFCalibrateInfo.TM_Trigger = 1;
2082                 return;
2083         }
2084         else
2085         {
2086                 //DBG_871X("Schedule TxPowerTracking direct call!!\n");
2087                 ODM_TXPowerTrackingCallback_ThermalMeter(Adapter);
2088                 pDM_Odm->RFCalibrateInfo.TM_Trigger = 0;
2089         }
2090         #endif
2091 #endif
2092 }
2093
2094 VOID
2095 odm_TXPowerTrackingCheckMP(
2096         IN              PDM_ODM_T               pDM_Odm
2097         )
2098 {
2099 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2100         PADAPTER        Adapter = pDM_Odm->Adapter;
2101
2102         if (ODM_CheckPowerStatus(Adapter) == FALSE)
2103         {
2104                 RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>ODM_CheckPowerStatus() return FALSE\n"));
2105                 return;
2106         }
2107
2108         if(IS_HARDWARE_TYPE_8723A(Adapter))
2109                 return;
2110
2111         if(!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE)
2112                 odm_TXPowerTrackingThermalMeterCheck(Adapter);
2113         else {
2114                 RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("!Adapter->bSlaveOfDMSP || Adapter->DualMacSmartConcurrent == FALSE\n"));
2115         }
2116 #endif
2117
2118 }
2119
2120
2121 VOID
2122 odm_TXPowerTrackingCheckAP(
2123         IN              PDM_ODM_T               pDM_Odm
2124         )
2125 {
2126 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
2127         prtl8192cd_priv priv            = pDM_Odm->priv;
2128
2129         if ( (priv->pmib->dot11RFEntry.ther) && ((priv->up_time % priv->pshare->rf_ft_var.tpt_period) == 0)){
2130 #ifdef CONFIG_RTL_92D_SUPPORT
2131                 if (GET_CHIP_VER(priv)==VERSION_8192D){
2132                         tx_power_tracking_92D(priv);
2133                 } else
2134 #endif
2135                 {
2136 #ifdef CONFIG_RTL_92C_SUPPORT
2137                         tx_power_tracking(priv);
2138 #endif
2139                 }
2140         }
2141 #endif
2142
2143 }
2144
2145
2146
2147 //antenna mapping info
2148 // 1: right-side antenna
2149 // 2/0: left-side antenna
2150 //PDM_SWAT_Table->CCK_Ant1_Cnt /OFDM_Ant1_Cnt:  for right-side antenna:   Ant:1    RxDefaultAnt1
2151 //PDM_SWAT_Table->CCK_Ant2_Cnt /OFDM_Ant2_Cnt:  for left-side antenna:     Ant:0    RxDefaultAnt2
2152 // We select left antenna as default antenna in initial process, modify it as needed
2153 //
2154
2155 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2156
2157 VOID
2158 odm_TXPowerTrackingThermalMeterCheck(
2159         IN      PADAPTER                Adapter
2160         )
2161 {
2162 #ifndef AP_BUILD_WORKAROUND
2163         static u1Byte                   TM_Trigger = 0;
2164
2165         if(!(GET_HAL_DATA(Adapter)->DM_OutSrc.SupportAbility & ODM_RF_TX_PWR_TRACK))
2166         {
2167                 RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,
2168                         ("===>odm_TXPowerTrackingThermalMeterCheck(),pMgntInfo->bTXPowerTracking is FALSE, return!!\n"));
2169                 return;
2170         }
2171
2172         if(!TM_Trigger)         //at least delay 1 sec
2173         {
2174                 if(IS_HARDWARE_TYPE_8192D(Adapter))
2175                         PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_92D, BIT17 | BIT16, 0x03);
2176                 else if(IS_HARDWARE_TYPE_8188E(Adapter) || IS_HARDWARE_TYPE_JAGUAR(Adapter) || IS_HARDWARE_TYPE_8192E(Adapter) ||
2177                             IS_HARDWARE_TYPE_8723B(Adapter))
2178                         PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03);
2179                 else
2180                         PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60);
2181
2182                 RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Trigger Thermal Meter!!\n"));
2183
2184                 TM_Trigger = 1;
2185                 return;
2186         }
2187         else
2188         {
2189                 RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,("Schedule TxPowerTracking direct call!!\n"));
2190                 odm_TXPowerTrackingDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18.
2191                 TM_Trigger = 0;
2192         }
2193 #endif
2194 }
2195
2196 // Only for 8723A SW ANT DIV INIT--2012--07--17
2197 VOID
2198 odm_SwAntDivInit_NIC_8723A(
2199         IN      PDM_ODM_T               pDM_Odm)
2200 {
2201         pSWAT_T         pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
2202         PADAPTER                Adapter = pDM_Odm->Adapter;
2203
2204         u1Byte                  btAntNum=BT_GetPgAntNum(Adapter);
2205
2206         if(IS_HARDWARE_TYPE_8723A(Adapter))
2207         {
2208                 pDM_SWAT_Table->ANTA_ON =TRUE;
2209
2210                 // Set default antenna B status by PG
2211                 if(btAntNum == 2)
2212                         pDM_SWAT_Table->ANTB_ON = TRUE;
2213                 else if(btAntNum == 1)
2214                         pDM_SWAT_Table->ANTB_ON = FALSE;
2215                 else
2216                         pDM_SWAT_Table->ANTB_ON = TRUE;
2217         }
2218
2219 }
2220
2221 #endif //end #ifMP
2222
2223
2224
2225 //3============================================================
2226 //3 SW Antenna Diversity
2227 //3============================================================
2228 #if(defined(CONFIG_SW_ANTENNA_DIVERSITY))
2229 VOID
2230 odm_SwAntDivInit(
2231         IN              PDM_ODM_T               pDM_Odm
2232         )
2233 {
2234 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
2235         odm_SwAntDivInit_NIC(pDM_Odm);
2236 #elif(DM_ODM_SUPPORT_TYPE == ODM_AP)
2237         dm_SW_AntennaSwitchInit(pDM_Odm->priv);
2238 #endif
2239 }
2240
2241 VOID
2242 odm_SwAntDivInit_NIC(
2243         IN              PDM_ODM_T               pDM_Odm
2244         )
2245 {
2246         pSWAT_T         pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
2247
2248
2249 // Init SW ANT DIV mechanism for 8723AE/AU/AS
2250 // Neil Chen--2012--07--17---
2251 // CE/AP/ADSL no using SW ANT DIV for 8723A Series IC
2252 //#if (DM_ODM_SUPPORT_TYPE==ODM_WIN)
2253 #if (RTL8723A_SUPPORT==1)
2254         if(pDM_Odm->SupportICType == ODM_RTL8723A)
2255         {
2256                 odm_SwAntDivInit_NIC_8723A(pDM_Odm);
2257         }
2258 #endif
2259         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS:Init SW Antenna Switch\n"));
2260         pDM_SWAT_Table->RSSI_sum_A = 0;
2261         pDM_SWAT_Table->RSSI_cnt_A = 0;
2262         pDM_SWAT_Table->RSSI_sum_B = 0;
2263         pDM_SWAT_Table->RSSI_cnt_B = 0;
2264         pDM_SWAT_Table->CurAntenna = MAIN_ANT;
2265         pDM_SWAT_Table->PreAntenna = MAIN_ANT;
2266         pDM_SWAT_Table->try_flag = 0xff;
2267         pDM_SWAT_Table->PreRSSI = 0;
2268         pDM_SWAT_Table->SWAS_NoLink_State = 0;
2269         pDM_SWAT_Table->bTriggerAntennaSwitch = 0;
2270         pDM_SWAT_Table->SelectAntennaMap=0xAA;
2271         pDM_SWAT_Table->lastTxOkCnt = 0;
2272         pDM_SWAT_Table->lastRxOkCnt = 0;
2273         pDM_SWAT_Table->TXByteCnt_A = 0;
2274         pDM_SWAT_Table->TXByteCnt_B = 0;
2275         pDM_SWAT_Table->RXByteCnt_A = 0;
2276         pDM_SWAT_Table->RXByteCnt_B = 0;
2277         pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW;
2278         pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ODM_Read4Byte(pDM_Odm, 0x860);
2279
2280 }
2281
2282 //
2283 // 20100514 Joseph:
2284 // Add new function to reset the state of antenna diversity before link.
2285 //
2286 VOID
2287 ODM_SwAntDivResetBeforeLink(
2288         IN              PDM_ODM_T               pDM_Odm
2289         )
2290 {
2291
2292         pSWAT_T         pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
2293
2294         pDM_SWAT_Table->SWAS_NoLink_State = 0;
2295
2296 }
2297
2298 //
2299 // 20100514 Luke/Joseph:
2300 // Add new function to reset antenna diversity state after link.
2301 //
2302 VOID
2303 ODM_SwAntDivRestAfterLink(
2304         IN              PDM_ODM_T               pDM_Odm
2305         )
2306 {
2307         pSWAT_T         pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
2308         pFAT_T          pDM_FatTable = &pDM_Odm->DM_FatTable;
2309         u4Byte             i;
2310
2311         if(pDM_Odm->SupportICType == ODM_RTL8723A)
2312         {
2313             pDM_SWAT_Table->RSSI_cnt_A = 0;
2314             pDM_SWAT_Table->RSSI_cnt_B = 0;
2315             pDM_Odm->RSSI_test = FALSE;
2316             pDM_SWAT_Table->try_flag = 0xff;
2317             pDM_SWAT_Table->RSSI_Trying = 0;
2318             pDM_SWAT_Table->SelectAntennaMap=0xAA;
2319
2320         }
2321         else if(pDM_Odm->SupportICType & (ODM_RTL8723B|ODM_RTL8821))
2322         {
2323                 pDM_Odm->RSSI_test = FALSE;
2324                 pDM_SWAT_Table->try_flag = 0xff;
2325                 pDM_SWAT_Table->RSSI_Trying = 0;
2326                 pDM_SWAT_Table->Double_chk_flag= 0;
2327
2328                 pDM_FatTable->RxIdleAnt=MAIN_ANT;
2329
2330                 for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
2331                 {
2332                         pDM_FatTable->MainAnt_Sum[i] = 0;
2333                         pDM_FatTable->AuxAnt_Sum[i] = 0;
2334                         pDM_FatTable->MainAnt_Cnt[i] = 0;
2335                         pDM_FatTable->AuxAnt_Cnt[i] = 0;
2336                 }
2337
2338         }
2339 }
2340
2341 void
2342 odm_SwAntDetectInit(
2343         IN              PDM_ODM_T               pDM_Odm
2344         )
2345 {
2346         pSWAT_T         pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
2347 #if (RTL8723B_SUPPORT == 1)
2348         pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c = ODM_Read4Byte(pDM_Odm, rDPDT_control);
2349 #endif
2350         pDM_SWAT_Table->PreAntenna = MAIN_ANT;
2351         pDM_SWAT_Table->CurAntenna = MAIN_ANT;
2352         pDM_SWAT_Table->SWAS_NoLink_State = 0;
2353 }
2354
2355 VOID
2356 ODM_SwAntDivChkPerPktRssi(
2357         IN PDM_ODM_T    pDM_Odm,
2358         IN u1Byte               StationID,
2359         IN PODM_PHY_INFO_T pPhyInfo
2360         )
2361 {
2362         SWAT_T          *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
2363
2364         if(!(pDM_Odm->SupportAbility & (ODM_BB_ANT_DIV)))
2365                 return;
2366
2367 // temporary Fix 8723A MP SW ANT DIV Bug --NeilChen--2012--07--11
2368 #if (DM_ODM_SUPPORT_TYPE==ODM_WIN)
2369         if(pDM_Odm->SupportICType == ODM_RTL8723A)
2370         {
2371                 //if(StationID == pDM_SWAT_Table->RSSI_target)
2372                 //{
2373                 //1 RSSI for SW Antenna Switch
2374                 if(pDM_SWAT_Table->CurAntenna == MAIN_ANT)
2375                 {
2376                         pDM_SWAT_Table->RSSI_sum_A += pPhyInfo->RxPWDBAll;
2377                         pDM_SWAT_Table->RSSI_cnt_A++;
2378                 }
2379                 else
2380                 {
2381                         pDM_SWAT_Table->RSSI_sum_B += pPhyInfo->RxPWDBAll;
2382                         pDM_SWAT_Table->RSSI_cnt_B++;
2383
2384                 }
2385                 //}
2386         }
2387         else
2388         {
2389                 if(StationID == pDM_SWAT_Table->RSSI_target)
2390                 {
2391                         //1 RSSI for SW Antenna Switch
2392                         if(pDM_SWAT_Table->CurAntenna == MAIN_ANT)
2393                         {
2394                                 pDM_SWAT_Table->RSSI_sum_A += pPhyInfo->RxPWDBAll;
2395                                 pDM_SWAT_Table->RSSI_cnt_A++;
2396                         }
2397                         else
2398                         {
2399                                 pDM_SWAT_Table->RSSI_sum_B += pPhyInfo->RxPWDBAll;
2400                                 pDM_SWAT_Table->RSSI_cnt_B++;
2401
2402                         }
2403                 }
2404         }
2405 #else
2406         if(StationID == pDM_SWAT_Table->RSSI_target)
2407         {
2408                 //1 RSSI for SW Antenna Switch
2409                 if(pDM_SWAT_Table->CurAntenna == MAIN_ANT)
2410                 {
2411                         pDM_SWAT_Table->RSSI_sum_A += pPhyInfo->RxPWDBAll;
2412                         pDM_SWAT_Table->RSSI_cnt_A++;
2413                 }
2414                 else
2415                 {
2416                         pDM_SWAT_Table->RSSI_sum_B += pPhyInfo->RxPWDBAll;
2417                         pDM_SWAT_Table->RSSI_cnt_B++;
2418
2419                 }
2420         }
2421 #endif
2422 }
2423
2424 //
2425 VOID
2426 odm_SwAntDivChkAntSwitch(
2427         IN              PDM_ODM_T               pDM_Odm,
2428         IN              u1Byte                  Step
2429         )
2430 {
2431         //
2432         // For AP/ADSL use prtl8192cd_priv
2433         // For CE/NIC use PADAPTER
2434         //
2435         prtl8192cd_priv priv            = pDM_Odm->priv;
2436
2437         //
2438         // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
2439         // at the same time. In the stage2/3, we need to prive universal interface and merge all
2440         // HW dynamic mechanism.
2441         //
2442         switch  (pDM_Odm->SupportPlatform)
2443         {
2444                 case    ODM_WIN:
2445                         odm_SwAntDivChkAntSwitchNIC(pDM_Odm, Step);
2446                         break;
2447                 case    ODM_CE:
2448                         odm_SwAntDivChkAntSwitchNIC(pDM_Odm, Step);
2449                         break;
2450
2451                 case    ODM_AP:
2452                 case    ODM_ADSL:
2453 #if (DM_ODM_SUPPORT_TYPE & (ODM_AP |ODM_ADSL))
2454                         if (priv->pshare->rf_ft_var.antSw_enable && (priv->up_time % 4==1))
2455                                 dm_SW_AntennaSwitch(priv, SWAW_STEP_PEAK);
2456 #endif
2457                         break;
2458         }
2459
2460 }
2461
2462 //
2463 // 20100514 Luke/Joseph:
2464 // Add new function for antenna diversity after link.
2465 // This is the main function of antenna diversity after link.
2466 // This function is called in HalDmWatchDog() and ODM_SwAntDivChkAntSwitchCallback().
2467 // HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test.
2468 // In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing.
2469 // After 500ms, ODM_SwAntDivChkAntSwitchCallback() calls this function to compare the signal just
2470 // listened on the air with the RSSI of original antenna.
2471 // It chooses the antenna with better RSSI.
2472 // There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting
2473 // penalty to get next try.
2474
2475
2476 VOID
2477 ODM_SetAntenna(
2478         IN      PDM_ODM_T       pDM_Odm,
2479         IN      u1Byte          Antenna)
2480 {
2481         ODM_SetBBReg(pDM_Odm, 0x860, BIT8|BIT9, Antenna);
2482 }
2483
2484 VOID
2485 odm_SwAntDivChkAntSwitchNIC(
2486         IN              PDM_ODM_T               pDM_Odm,
2487         IN              u1Byte          Step
2488         )
2489 {
2490 #if ((RTL8192C_SUPPORT==1)||(RTL8723A_SUPPORT==1))
2491         //PMGNT_INFO            pMgntInfo = &(Adapter->MgntInfo);
2492         //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
2493
2494 #if (DM_ODM_SUPPORT_TYPE==ODM_WIN)
2495         PADAPTER                Adapter=pDM_Odm->Adapter;
2496 #endif
2497
2498         pSWAT_T         pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
2499         s4Byte                  curRSSI=100, RSSI_A, RSSI_B;
2500         u1Byte                  nextAntenna=AUX_ANT;
2501         //static u8Byte         lastTxOkCnt=0, lastRxOkCnt=0;
2502         u8Byte                  curTxOkCnt=0, curRxOkCnt=0;
2503         //static u8Byte         TXByteCnt_A=0, TXByteCnt_B=0, RXByteCnt_A=0, RXByteCnt_B=0;
2504         u8Byte                  CurByteCnt=0, PreByteCnt=0;
2505         //static u1Byte         TrafficLoad = TRAFFIC_LOW;
2506         u1Byte                  Score_A=0, Score_B=0;       //A: Main; B: AUX
2507         u1Byte                  i;
2508
2509         if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))
2510                 return;
2511
2512         if (pDM_Odm->SupportICType & (ODM_RTL8192D|ODM_RTL8188E))
2513                 return;
2514
2515         if((pDM_Odm->SupportICType == ODM_RTL8192C) &&(pDM_Odm->RFType == ODM_2T2R))
2516                 return;
2517
2518         if(pDM_Odm->SupportPlatform & ODM_WIN)
2519         {
2520                 if(*(pDM_Odm->pAntennaTest))
2521                         return;
2522         }
2523
2524         if((pDM_SWAT_Table->ANTA_ON == FALSE) ||(pDM_SWAT_Table->ANTB_ON == FALSE))
2525         {
2526                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
2527                                 ("odm_SwAntDivChkAntSwitch(): No AntDiv Mechanism, Antenna A or B is off\n"));
2528                 return;
2529         }
2530
2531         // Radio off: Status reset to default and return.
2532         if(*(pDM_Odm->pbPowerSaving)==TRUE) //pHalData->eRFPowerState==eRfOff
2533         {
2534                 ODM_SwAntDivRestAfterLink(pDM_Odm);
2535                 return;
2536         }
2537
2538
2539         // Handling step mismatch condition.
2540         // Peak step is not finished at last time. Recover the variable and check again.
2541         if(     Step != pDM_SWAT_Table->try_flag        )
2542         {
2543                 ODM_SwAntDivRestAfterLink(pDM_Odm);
2544         }
2545
2546 #if  (DM_ODM_SUPPORT_TYPE &( ODM_WIN| ODM_CE ))
2547
2548         if(pDM_SWAT_Table->try_flag == 0xff)
2549         {
2550                 pDM_SWAT_Table->RSSI_target = 0xff;
2551
2552                 #if(DM_ODM_SUPPORT_TYPE & ODM_CE)
2553                 {
2554                         u1Byte                  index = 0;
2555                         PSTA_INFO_T             pEntry = NULL;
2556
2557
2558                         for(index=0; index<ODM_ASSOCIATE_ENTRY_NUM; index++)
2559                         {
2560                                 pEntry =  pDM_Odm->pODM_StaInfo[index];
2561                                 if(IS_STA_VALID(pEntry) ) {
2562                                         break;
2563                                 }
2564                         }
2565                         if(pEntry == NULL)
2566                         {
2567                                 ODM_SwAntDivRestAfterLink(pDM_Odm);
2568                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n"));
2569                                 return;
2570                         }
2571                         else
2572                         {
2573                                 pDM_SWAT_Table->RSSI_target = index;
2574                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n"));
2575                         }
2576                 }
2577                 #elif (DM_ODM_SUPPORT_TYPE & ODM_WIN)
2578                 {
2579                         PADAPTER        pAdapter         =  pDM_Odm->Adapter;
2580                         PMGNT_INFO      pMgntInfo=&pAdapter->MgntInfo;
2581
2582                         // Select RSSI checking target
2583                         if(pMgntInfo->mAssoc && !ACTING_AS_AP(pAdapter))
2584                         {
2585                                 // Target: Infrastructure mode AP.
2586                                 //pDM_SWAT_Table->RSSI_target = NULL;
2587                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("odm_SwAntDivChkAntSwitch(): RSSI_target is DEF AP!\n"));
2588                         }
2589                         else
2590                         {
2591                                 u1Byte                  index = 0;
2592                                 PSTA_INFO_T             pEntry = NULL;
2593                                 PADAPTER                pTargetAdapter = NULL;
2594
2595                                 if(pMgntInfo->mIbss )
2596                                 {
2597                                         // Target: AP/IBSS peer.
2598                                         pTargetAdapter = pAdapter;
2599                                 }
2600                                 else
2601                                 {
2602                                         pTargetAdapter = GetFirstAPAdapter(pAdapter);
2603                                 }
2604
2605                                 if(pTargetAdapter != NULL)
2606                                 {
2607                                         for(index=0; index<ODM_ASSOCIATE_ENTRY_NUM; index++)
2608                                         {
2609
2610                                                 pEntry = AsocEntry_EnumStation(pTargetAdapter, index);
2611                                                 if(pEntry != NULL)
2612                                                 {
2613                                                         if(pEntry->bAssociated)
2614                                                                 break;
2615                                                 }
2616
2617                                         }
2618
2619                                 }
2620
2621                                 if(pEntry == NULL)
2622                                 {
2623                                         ODM_SwAntDivRestAfterLink(pDM_Odm);
2624                                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): No Link.\n"));
2625                                         return;
2626                                 }
2627                                 else
2628                                 {
2629                                         //pDM_SWAT_Table->RSSI_target = pEntry;
2630                                         pDM_SWAT_Table->RSSI_target = index;
2631                                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_SwAntDivChkAntSwitch(): RSSI_target is PEER STA\n"));
2632                                 }
2633                         }//end if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter))
2634
2635                 }
2636                 #endif
2637
2638                 pDM_SWAT_Table->RSSI_cnt_A = 0;
2639                 pDM_SWAT_Table->RSSI_cnt_B = 0;
2640                 pDM_SWAT_Table->try_flag = 0;
2641                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("odm_SwAntDivChkAntSwitch(): Set try_flag to 0 prepare for peak!\n"));
2642                 return;
2643         }
2644         else
2645         {
2646
2647 // To Fix 8723A SW ANT DIV Bug issue
2648 #if (DM_ODM_SUPPORT_TYPE==ODM_WIN)
2649                 if (pDM_Odm->SupportICType & ODM_RTL8723A)
2650                 {
2651                         curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pDM_SWAT_Table->lastTxOkCnt;
2652                         curRxOkCnt =Adapter->RxStats.NumRxBytesUnicast - pDM_SWAT_Table->lastRxOkCnt;
2653                         pDM_SWAT_Table->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast;
2654                         pDM_SWAT_Table->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast;
2655                 }
2656 #else
2657                 curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - pDM_SWAT_Table->lastTxOkCnt;
2658                 curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - pDM_SWAT_Table->lastRxOkCnt;
2659                 pDM_SWAT_Table->lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast);
2660                 pDM_SWAT_Table->lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast);
2661 #endif
2662                 if(pDM_SWAT_Table->try_flag == 1)
2663                 {
2664                         if(pDM_SWAT_Table->CurAntenna == MAIN_ANT)
2665                         {
2666                                 pDM_SWAT_Table->TXByteCnt_A += curTxOkCnt;
2667                                 pDM_SWAT_Table->RXByteCnt_A += curRxOkCnt;
2668                         }
2669                         else
2670                         {
2671                                 pDM_SWAT_Table->TXByteCnt_B += curTxOkCnt;
2672                                 pDM_SWAT_Table->RXByteCnt_B += curRxOkCnt;
2673                         }
2674
2675                         nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT;
2676                         pDM_SWAT_Table->RSSI_Trying--;
2677                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying));
2678                         if(pDM_SWAT_Table->RSSI_Trying == 0)
2679                         {
2680                                 CurByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (pDM_SWAT_Table->TXByteCnt_A+pDM_SWAT_Table->RXByteCnt_A) : (pDM_SWAT_Table->TXByteCnt_B+pDM_SWAT_Table->RXByteCnt_B);
2681                                 PreByteCnt = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? (pDM_SWAT_Table->TXByteCnt_B+pDM_SWAT_Table->RXByteCnt_B) : (pDM_SWAT_Table->TXByteCnt_A+pDM_SWAT_Table->RXByteCnt_A);
2682
2683                                 if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH)
2684                                         //CurByteCnt = PlatformDivision64(CurByteCnt, 9);
2685                                         PreByteCnt = PreByteCnt*9;
2686                                 else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW)
2687                                         //CurByteCnt = PlatformDivision64(CurByteCnt, 2);
2688                                         PreByteCnt = PreByteCnt*2;
2689
2690                                 if(pDM_SWAT_Table->RSSI_cnt_A > 0)
2691                                         RSSI_A = pDM_SWAT_Table->RSSI_sum_A/pDM_SWAT_Table->RSSI_cnt_A;
2692                                 else
2693                                         RSSI_A = 0;
2694                                 if(pDM_SWAT_Table->RSSI_cnt_B > 0)
2695                                         RSSI_B = pDM_SWAT_Table->RSSI_sum_B/pDM_SWAT_Table->RSSI_cnt_B;
2696                                 else
2697                                         RSSI_B = 0;
2698                                 curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B;
2699                                 pDM_SWAT_Table->PreRSSI =  (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_B : RSSI_A;
2700                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Luke:PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI));
2701                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: preAntenna= %s, curAntenna= %s \n",
2702                                 (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX")));
2703                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Luke:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n",
2704                                         RSSI_A, pDM_SWAT_Table->RSSI_cnt_A, RSSI_B, pDM_SWAT_Table->RSSI_cnt_B));
2705                         }
2706
2707                 }
2708                 else
2709                 {
2710
2711                         if(pDM_SWAT_Table->RSSI_cnt_A > 0)
2712                                 RSSI_A = pDM_SWAT_Table->RSSI_sum_A/pDM_SWAT_Table->RSSI_cnt_A;
2713                         else
2714                                 RSSI_A = 0;
2715                         if(pDM_SWAT_Table->RSSI_cnt_B > 0)
2716                                 RSSI_B = pDM_SWAT_Table->RSSI_sum_B/pDM_SWAT_Table->RSSI_cnt_B;
2717                         else
2718                                 RSSI_B = 0;
2719                         curRSSI = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? RSSI_A : RSSI_B;
2720                         pDM_SWAT_Table->PreRSSI =  (pDM_SWAT_Table->PreAntenna == MAIN_ANT)? RSSI_A : RSSI_B;
2721                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ekul:PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI));
2722                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: preAntenna= %s, curAntenna= %s \n",
2723                         (pDM_SWAT_Table->PreAntenna == MAIN_ANT?"MAIN":"AUX"), (pDM_SWAT_Table->CurAntenna == MAIN_ANT?"MAIN":"AUX")));
2724
2725                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ekul:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n",
2726                                 RSSI_A, pDM_SWAT_Table->RSSI_cnt_A, RSSI_B, pDM_SWAT_Table->RSSI_cnt_B));
2727                         //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt));
2728                         //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt));
2729                 }
2730
2731                 //1 Trying State
2732                 if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0))
2733                 {
2734
2735                         if(pDM_SWAT_Table->TestMode == TP_MODE)
2736                         {
2737                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: TestMode = TP_MODE"));
2738                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TRY:CurByteCnt = %lld,", CurByteCnt));
2739                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("TRY:PreByteCnt = %lld\n",PreByteCnt));
2740                                 if(CurByteCnt < PreByteCnt)
2741                                 {
2742                                         if(pDM_SWAT_Table->CurAntenna == MAIN_ANT)
2743                                                 pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1;
2744                                         else
2745                                                 pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1;
2746                                 }
2747                                 else
2748                                 {
2749                                         if(pDM_SWAT_Table->CurAntenna == MAIN_ANT)
2750                                                 pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1;
2751                                         else
2752                                                 pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1;
2753                                 }
2754                                 for (i= 0; i<8; i++)
2755                                 {
2756                                         if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1)
2757                                                 Score_A++;
2758                                         else
2759                                                 Score_B++;
2760                                 }
2761                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap));
2762                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Score_A=%d, Score_B=%d\n", Score_A, Score_B));
2763
2764                                 if(pDM_SWAT_Table->CurAntenna == MAIN_ANT)
2765                                 {
2766                                         nextAntenna = (Score_A > Score_B)?MAIN_ANT:AUX_ANT;
2767                                 }
2768                                 else
2769                                 {
2770                                         nextAntenna = (Score_B > Score_A)?AUX_ANT:MAIN_ANT;
2771                                 }
2772                                 //RT_TRACE(COMP_SWAS, DBG_LOUD, ("nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B"));
2773                                 //RT_TRACE(COMP_SWAS, DBG_LOUD, ("preAntenna= %s, curAntenna= %s \n",
2774                                 //(DM_SWAT_Table.PreAntenna == Antenna_A?"A":"B"), (DM_SWAT_Table.CurAntenna == Antenna_A?"A":"B")));
2775
2776                                 if(nextAntenna != pDM_SWAT_Table->CurAntenna)
2777                                 {
2778                                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Switch back to another antenna"));
2779                                 }
2780                                 else
2781                                 {
2782                                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: current anntena is good\n"));
2783                                 }
2784                         }
2785
2786                         if(pDM_SWAT_Table->TestMode == RSSI_MODE)
2787                         {
2788                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: TestMode = RSSI_MODE"));
2789                                 pDM_SWAT_Table->SelectAntennaMap=0xAA;
2790                                 if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna
2791                                 {
2792                                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Switch back to another antenna"));
2793                                         nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT;
2794                                 }
2795                                 else // current anntena is good
2796                                 {
2797                                         nextAntenna =pDM_SWAT_Table->CurAntenna;
2798                                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: current anntena is good\n"));
2799                                 }
2800                         }
2801                         pDM_SWAT_Table->try_flag = 0;
2802                         pDM_Odm->RSSI_test = FALSE;
2803                         pDM_SWAT_Table->RSSI_sum_A = 0;
2804                         pDM_SWAT_Table->RSSI_cnt_A = 0;
2805                         pDM_SWAT_Table->RSSI_sum_B = 0;
2806                         pDM_SWAT_Table->RSSI_cnt_B = 0;
2807                         pDM_SWAT_Table->TXByteCnt_A = 0;
2808                         pDM_SWAT_Table->TXByteCnt_B = 0;
2809                         pDM_SWAT_Table->RXByteCnt_A = 0;
2810                         pDM_SWAT_Table->RXByteCnt_B = 0;
2811
2812                 }
2813
2814                 //1 Normal State
2815                 else if(pDM_SWAT_Table->try_flag == 0)
2816                 {
2817                         if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH)
2818                         {
2819                                 if ((curTxOkCnt+curRxOkCnt) > 3750000)//if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000)
2820                                         pDM_SWAT_Table->TrafficLoad = TRAFFIC_HIGH;
2821                                 else
2822                                         pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW;
2823                         }
2824                         else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW)
2825                                 {
2826                                 if ((curTxOkCnt+curRxOkCnt) > 3750000) //if(PlatformDivision64(curTxOkCnt+curRxOkCnt, 2) > 1875000)
2827                                         pDM_SWAT_Table->TrafficLoad = TRAFFIC_HIGH;
2828                                 else
2829                                         pDM_SWAT_Table->TrafficLoad = TRAFFIC_LOW;
2830                         }
2831                         if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH)
2832                                 pDM_SWAT_Table->bTriggerAntennaSwitch = 0;
2833                         //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Normal:TrafficLoad = %llu\n", curTxOkCnt+curRxOkCnt));
2834
2835                         //Prepare To Try Antenna
2836                                         nextAntenna = (pDM_SWAT_Table->CurAntenna == MAIN_ANT)? AUX_ANT : MAIN_ANT;
2837                                         pDM_SWAT_Table->try_flag = 1;
2838                                         pDM_Odm->RSSI_test = TRUE;
2839                         if((curRxOkCnt+curTxOkCnt) > 1000)
2840                         {
2841                                 pDM_SWAT_Table->RSSI_Trying = 4;
2842                                 pDM_SWAT_Table->TestMode = TP_MODE;
2843                                 }
2844                                 else
2845                                 {
2846                                 pDM_SWAT_Table->RSSI_Trying = 2;
2847                                 pDM_SWAT_Table->TestMode = RSSI_MODE;
2848
2849                         }
2850                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Normal State -> Begin Trying!\n"));
2851
2852
2853                         pDM_SWAT_Table->RSSI_sum_A = 0;
2854                         pDM_SWAT_Table->RSSI_cnt_A = 0;
2855                         pDM_SWAT_Table->RSSI_sum_B = 0;
2856                         pDM_SWAT_Table->RSSI_cnt_B = 0;
2857                 }
2858         }
2859
2860         //1 4.Change TRX antenna
2861         if(nextAntenna != pDM_SWAT_Table->CurAntenna)
2862         {
2863                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("SWAS: Change TX Antenna!\n "));
2864                 //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, nextAntenna);
2865                 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2866                 ODM_SetAntenna(pDM_Odm,nextAntenna);
2867                 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
2868                 {
2869                         BOOLEAN bEnqueue;
2870                         bEnqueue = (pDM_Odm->SupportInterface ==  ODM_ITRF_PCIE)?FALSE :TRUE;
2871                         rtw_antenna_select_cmd(pDM_Odm->Adapter, nextAntenna, bEnqueue);
2872                 }
2873                 #endif
2874
2875         }
2876
2877         //1 5.Reset Statistics
2878         pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna;
2879         pDM_SWAT_Table->CurAntenna = nextAntenna;
2880         pDM_SWAT_Table->PreRSSI = curRSSI;
2881
2882         //1 6.Set next timer
2883         {
2884                 //PADAPTER              pAdapter = pDM_Odm->Adapter;
2885                 //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
2886
2887
2888         if(pDM_SWAT_Table->RSSI_Trying == 0)
2889                 return;
2890
2891         if(pDM_SWAT_Table->RSSI_Trying%2 == 0)
2892         {
2893                 if(pDM_SWAT_Table->TestMode == TP_MODE)
2894                 {
2895                         if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH)
2896                         {
2897                                 ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 10 ); //ms
2898
2899                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 10 ms\n"));
2900                         }
2901                         else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW)
2902                         {
2903                                 ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 50 ); //ms
2904                                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 50 ms\n"));
2905                         }
2906                 }
2907                 else
2908                 {
2909                         ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 500 ); //ms
2910                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n"));
2911                 }
2912         }
2913         else
2914         {
2915                 if(pDM_SWAT_Table->TestMode == TP_MODE)
2916                 {
2917                         if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_HIGH)
2918                                 ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 90 ); //ms
2919                         else if(pDM_SWAT_Table->TrafficLoad == TRAFFIC_LOW)
2920                                 ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 100 ); //ms
2921                 }
2922                 else
2923                         ODM_SetTimer(pDM_Odm,&pDM_SWAT_Table->SwAntennaSwitchTimer, 500 ); //ms
2924         }
2925         }
2926 #endif  // #if (DM_ODM_SUPPORT_TYPE  & (ODM_WIN|ODM_CE))
2927 #endif  // #if (RTL8192C_SUPPORT==1)
2928 }
2929
2930
2931 // Remove odm_SwAntDivSelectScanChnl() and odm_SwAntDivConstructScanChnl() to odm_PathDiv.c
2932
2933
2934 //
2935 // 20100514 Luke/Joseph:
2936 // Callback function for 500ms antenna test trying.
2937 //
2938 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2939 VOID
2940 odm_SwAntDivChkAntSwitchCallback(
2941         PRT_TIMER               pTimer
2942 )
2943 {
2944         PADAPTER                Adapter = (PADAPTER)pTimer->Adapter;
2945         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
2946         pSWAT_T         pDM_SWAT_Table = &pHalData->DM_OutSrc.DM_SWAT_Table;
2947
2948         #if DEV_BUS_TYPE==RT_PCI_INTERFACE
2949         #if USE_WORKITEM
2950         ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem);
2951         #else
2952         odm_SwAntDivChkAntSwitch(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE);
2953         #endif
2954         #else
2955         ODM_ScheduleWorkItem(&pDM_SWAT_Table->SwAntennaSwitchWorkitem);
2956         #endif
2957
2958 }
2959 VOID
2960 odm_SwAntDivChkAntSwitchWorkitemCallback(
2961     IN PVOID            pContext
2962     )
2963 {
2964
2965         PADAPTER                pAdapter = (PADAPTER)pContext;
2966         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
2967
2968         odm_SwAntDivChkAntSwitch(&pHalData->DM_OutSrc, SWAW_STEP_DETERMINE);
2969
2970 }
2971 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
2972 VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext)
2973 {
2974         PDM_ODM_T       pDM_Odm= (PDM_ODM_T)FunctionContext;
2975         PADAPTER        padapter = pDM_Odm->Adapter;
2976         if(padapter->net_closed == _TRUE)
2977             return;
2978         odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_DETERMINE);
2979 }
2980 #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
2981 VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext)
2982 {
2983         PDM_ODM_T       pDM_Odm= (PDM_ODM_T)FunctionContext;
2984         odm_SwAntDivChkAntSwitch(pDM_Odm, SWAW_STEP_DETERMINE);
2985 }
2986 #endif
2987
2988 #else //#if(defined(CONFIG_SW_ANTENNA_DIVERSITY))
2989
2990 VOID odm_SwAntDivInit(  IN              PDM_ODM_T               pDM_Odm ) {}
2991 VOID ODM_SwAntDivChkPerPktRssi(
2992         IN PDM_ODM_T    pDM_Odm,
2993         IN u1Byte               StationID,
2994         IN PODM_PHY_INFO_T pPhyInfo
2995         ) {}
2996 VOID odm_SwAntDivChkAntSwitch(
2997         IN              PDM_ODM_T               pDM_Odm,
2998         IN              u1Byte                  Step
2999         ) {}
3000 VOID ODM_SwAntDivResetBeforeLink(       IN              PDM_ODM_T               pDM_Odm ){}
3001 VOID ODM_SwAntDivRestAfterLink( IN              PDM_ODM_T               pDM_Odm ){}
3002 VOID odm_SwAntDetectInit(       IN              PDM_ODM_T               pDM_Odm){}
3003 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
3004 VOID odm_SwAntDivChkAntSwitchCallback(  PRT_TIMER               pTimer){}
3005 VOID odm_SwAntDivChkAntSwitchWorkitemCallback(    IN PVOID            pContext    ){}
3006 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
3007 VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext){}
3008 #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
3009 VOID odm_SwAntDivChkAntSwitchCallback(void *FunctionContext){}
3010 #endif
3011
3012 #endif //#if(defined(CONFIG_SW_ANTENNA_DIVERSITY))
3013
3014
3015
3016 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
3017 BOOLEAN
3018 ODM_SwAntDivCheckBeforeLink(
3019         IN              PDM_ODM_T               pDM_Odm
3020         )
3021 {
3022
3023 #if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM)
3024
3025         PADAPTER                Adapter = pDM_Odm->Adapter;
3026         HAL_DATA_TYPE*  pHalData = GET_HAL_DATA(Adapter);
3027         PMGNT_INFO              pMgntInfo = &Adapter->MgntInfo;
3028         pSWAT_T                 pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
3029         pFAT_T  pDM_FatTable = &pDM_Odm->DM_FatTable;
3030         s1Byte                  Score = 0;
3031         PRT_WLAN_BSS    pTmpBssDesc, pTestBssDesc;
3032         s4Byte                  power_diff = 0, power_target = 10;
3033         u1Byte                  index, counter = 0;
3034         static u1Byte           ScanChannel;
3035         u8Byte                  tStamp_diff = 0;
3036
3037
3038         if (pDM_Odm->Adapter == NULL)  //For BSOD when plug/unplug fast.  //By YJ,120413
3039         {       // The ODM structure is not initialized.
3040                 return FALSE;
3041         }
3042
3043         // Retrieve antenna detection registry info, added by Roger, 2012.11.27.
3044         if(!IS_ANT_DETECT_SUPPORT_RSSI(Adapter))
3045                         return FALSE;
3046
3047         // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF.
3048         PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK);
3049         if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect)
3050         {
3051                 PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK);
3052
3053                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
3054                                 ("ODM_SwAntDivCheckBeforeLink(): RFChangeInProgress(%x), eRFPowerState(%x)\n",
3055                                 pMgntInfo->RFChangeInProgress, pHalData->eRFPowerState));
3056
3057                 pDM_SWAT_Table->SWAS_NoLink_State = 0;
3058
3059                 return FALSE;
3060         }
3061         else
3062         {
3063                 PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK);
3064         }
3065         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("pDM_SWAT_Table->SWAS_NoLink_State = %d\n", pDM_SWAT_Table->SWAS_NoLink_State));
3066         //1 Run AntDiv mechanism "Before Link" part.
3067         if(pDM_SWAT_Table->SWAS_NoLink_State == 0)
3068         {
3069                 //1 Prepare to do Scan again to check current antenna state.
3070
3071                 // Set check state to next step.
3072                 pDM_SWAT_Table->SWAS_NoLink_State = 1;
3073
3074                 // Copy Current Scan list.
3075                 pMgntInfo->tmpNumBssDesc = pMgntInfo->NumBssDesc;
3076                 PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC);
3077
3078                 // Go back to scan function again.
3079                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Scan one more time\n"));
3080                 pMgntInfo->ScanStep=0;
3081                 pMgntInfo->bScanAntDetect = TRUE;
3082                 ScanChannel = odm_SwAntDivSelectScanChnl(Adapter);
3083
3084
3085                 if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821))
3086                 {
3087                         if(pDM_FatTable->RxIdleAnt == MAIN_ANT)
3088                                 ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT);
3089                         else
3090                                 ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT);
3091                         if(ScanChannel == 0)
3092                         {
3093                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
3094                                         ("ODM_SwAntDivCheckBeforeLink(): No AP List Avaiable, Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT"));
3095
3096                                 if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode))
3097                                 {
3098                                         pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt;
3099                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
3100                                 }
3101                                 else
3102                                 {
3103                                         pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt;
3104                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
3105                                 }
3106                                 return FALSE;
3107                         }
3108
3109                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
3110                                 ("ODM_SwAntDivCheckBeforeLink: Change to %s for testing.\n", ((pDM_FatTable->RxIdleAnt == MAIN_ANT)?"MAIN_ANT":"AUX_ANT")));
3111                 }
3112                 else if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8723B))
3113                 {
3114                         // Switch Antenna to another one.
3115                         pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna;
3116                         pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?AUX_ANT:MAIN_ANT;
3117
3118                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
3119                                 ("ODM_SwAntDivCheckBeforeLink: Change to Ant(%s) for testing.\n", (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX"));
3120                         //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna);
3121                         if(pDM_Odm->SupportICType == ODM_RTL8192C)
3122                         {
3123                                 pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8));
3124                                 ODM_SetBBReg(pDM_Odm,  rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860);
3125                         }
3126                         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
3127                         {
3128                                 pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c & 0xfffffffc) | (pDM_SWAT_Table->CurAntenna));
3129                                 ODM_SetBBReg(pDM_Odm,  rfe_ctrl_anta_src, 0xff, 0x77);
3130                                 ODM_SetBBReg(pDM_Odm,  rDPDT_control, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c);
3131                         }
3132                 }
3133
3134                 odm_SwAntDivConstructScanChnl(Adapter, ScanChannel);
3135                 PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5);
3136
3137                 return TRUE;
3138         }
3139         else
3140         {
3141                 //1 ScanComple() is called after antenna swiched.
3142                 //1 Check scan result and determine which antenna is going
3143                 //1 to be used.
3144
3145                 for(index = 0; index < pMgntInfo->tmpNumBssDesc; index++)
3146                 {
3147                         pTmpBssDesc = &(pMgntInfo->tmpbssDesc[index]); // Antenna 1
3148                         pTestBssDesc = &(pMgntInfo->bssDesc[index]); // Antenna 2
3149
3150                         if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0)
3151                         {
3152                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): ERROR!! This shall not happen.\n"));
3153                                 continue;
3154                         }
3155
3156                         if(pDM_Odm->SupportICType != ODM_RTL8723B)
3157                         {
3158                                 if(pTmpBssDesc->ChannelNumber == ScanChannel)
3159                                 {
3160                         if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower)
3161                         {
3162                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score++\n"));
3163                                                 RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen);
3164                                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower));
3165
3166                                 Score++;
3167                                 PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS));
3168                         }
3169                         else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower)
3170                         {
3171                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score--\n"));
3172                                                 RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen);
3173                                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower));
3174                                 Score--;
3175                         }
3176                                         else
3177                                         {
3178                                                 if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp < 5000)
3179                                                 {
3180                                                         RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen);
3181                                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower));
3182                                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("The 2nd Antenna didn't get this AP\n\n"));
3183                                                 }
3184                                         }
3185                                 }
3186                         }
3187                         else
3188                         {
3189                                 if(pTmpBssDesc->ChannelNumber == ScanChannel)
3190                                 {
3191                                         if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower)
3192                                         {
3193                                                 counter++;
3194                                                 power_diff = power_diff + (pTmpBssDesc->RecvSignalPower - pTestBssDesc->RecvSignalPower);
3195                                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower));
3196                                                 ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf);
3197                                                 ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf);
3198                                                 PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS));
3199                                         }
3200                                         else if(pTestBssDesc->RecvSignalPower > pTmpBssDesc->RecvSignalPower)
3201                                         {
3202                                                 counter++;
3203                                                 power_diff = power_diff + (pTestBssDesc->RecvSignalPower - pTmpBssDesc->RecvSignalPower);
3204                                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower));
3205                                                 ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf);
3206                                                 ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf)
3207                                         }
3208                                         else if(pTestBssDesc->bdTstamp > pTmpBssDesc->bdTstamp)
3209                                         {
3210                                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("time_diff: %lld\n", (pTestBssDesc->bdTstamp-pTmpBssDesc->bdTstamp)/1000));
3211                                                 if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp > 5000)
3212                                                 {
3213                                                         counter++;
3214                                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower));
3215                                                         ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf);
3216                                                         ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf)
3217                                                 }
3218                                         }
3219                                 }
3220                         }
3221                 }
3222
3223                 if(pDM_Odm->SupportICType == ODM_RTL8723B)
3224                 {
3225                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: %d power_diff: %d\n", counter, power_diff));
3226
3227                         if(counter != 0)
3228                                 power_diff = power_diff / counter;
3229
3230                         if(power_diff <= power_target && counter != 0)
3231                                 Score++;
3232                 }
3233
3234                 if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821))
3235                 {
3236                         if(pMgntInfo->NumBssDesc!=0 && Score<0)
3237                         {
3238                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
3239                                                         ("ODM_SwAntDivCheckBeforeLink(): Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
3240                         }
3241                         else
3242                         {
3243                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
3244                                                 ("ODM_SwAntDivCheckBeforeLink(): Remain Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT"));
3245
3246                                 if(pDM_FatTable->RxIdleAnt == MAIN_ANT)
3247                                         ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT);
3248                                 else
3249                                         ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT);
3250                         }
3251
3252                         if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode))
3253                         {
3254                                 pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt;
3255                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
3256                         }
3257                         else
3258                         {
3259                                 pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt;
3260                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
3261                         }
3262                 }
3263                 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
3264                 {
3265                         pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna;
3266                         pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c & 0xfffffffc) | (pDM_SWAT_Table->CurAntenna));
3267                         ODM_SetBBReg(pDM_Odm,  rfe_ctrl_anta_src, 0xff, 0x77);
3268                         ODM_SetBBReg(pDM_Odm,  rDPDT_control,bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c);
3269
3270                         if(counter != 0)
3271                         {
3272                                 if(pMgntInfo->NumBssDesc != 0 && Score > 0)
3273                                 {
3274                                         if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE)
3275                                         {
3276                                                 pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE;
3277                                                 pDM_Odm->DM_SWAT_Table.ANTB_ON = TRUE;
3278                                         }
3279                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Dual antenna\n"));
3280                                 }
3281                                 else
3282                                 {
3283                                         if(pDM_Odm->DM_SWAT_Table.ANTB_ON == TRUE)
3284                                         {
3285                                                 pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE;
3286                                                 pDM_Odm->DM_SWAT_Table.ANTB_ON = FALSE;
3287                                                 BT_SetBtCoexAntNum(Adapter, BT_COEX_ANT_TYPE_DETECTED, 1);
3288                                         }
3289                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n"));
3290                                 }
3291                         }
3292                         else
3293                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Igone result\n"));
3294                 }
3295                 else if(pDM_Odm->SupportICType == ODM_RTL8192C)
3296                 {
3297                         if(pMgntInfo->NumBssDesc!=0 && Score<=0)
3298                         {
3299                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
3300                                         ("ODM_SwAntDivCheckBeforeLink(): Using Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX"));
3301
3302                                 pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna;
3303                         }
3304                         else
3305                         {
3306                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
3307                                         ("ODM_SwAntDivCheckBeforeLink(): Remain Ant(%s)\n", (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"AUX":"MAIN"));
3308
3309                                 pDM_SWAT_Table->CurAntenna = pDM_SWAT_Table->PreAntenna;
3310
3311                                 //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, DM_SWAT_Table.CurAntenna);
3312                                 pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 = ((pDM_SWAT_Table->SWAS_NoLink_BK_Reg860 & 0xfffffcff) | (pDM_SWAT_Table->CurAntenna<<8));
3313                                 PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, pDM_SWAT_Table->SWAS_NoLink_BK_Reg860);
3314                         }
3315                 }
3316
3317                 // Check state reset to default and wait for next time.
3318                 pDM_SWAT_Table->SWAS_NoLink_State = 0;
3319                 pMgntInfo->bScanAntDetect = FALSE;
3320
3321                 return FALSE;
3322         }
3323
3324 #else
3325                 return  FALSE;
3326 #endif
3327
3328 return FALSE;
3329 }
3330
3331 #endif //#if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
3332
3333
3334 //3============================================================
3335 //3 SW Antenna Diversity
3336 //3============================================================
3337
3338 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
3339 VOID
3340 odm_InitHybridAntDiv_88C_92D(
3341         IN PDM_ODM_T    pDM_Odm
3342         )
3343 {
3344
3345 #if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL))
3346         struct rtl8192cd_priv *priv=pDM_Odm->priv;
3347 #endif
3348         SWAT_T                  *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
3349         u1Byte                  bTxPathSel=0;           //0:Path-A   1:Path-B
3350         u1Byte                  i;
3351
3352         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_InitHybridAntDiv==============>\n"));
3353
3354         //whether to do antenna diversity or not
3355 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)
3356         if(priv==NULL)  return;
3357         if(!priv->pshare->rf_ft_var.antHw_enable)
3358                 return;
3359
3360         #ifdef SW_ANT_SWITCH
3361         priv->pshare->rf_ft_var.antSw_enable =0;
3362         #endif
3363 #endif
3364
3365         if((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D))
3366                 return;
3367
3368
3369         bTxPathSel=(pDM_Odm->RFType==ODM_1T1R)?FALSE:TRUE;
3370
3371         ODM_SetBBReg(pDM_Odm,ODM_REG_BB_PWR_SAV1_11N, BIT23, 0); //No update ANTSEL during GNT_BT=1
3372         ODM_SetBBReg(pDM_Odm,ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); //TX atenna selection from tx_info
3373         ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PIN_11N, BIT23, 1); //enable LED[1:0] pin as ANTSEL
3374         ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_CTRL_11N, BIT8|BIT9, 0x01); // 0x01: left antenna, 0x02: right antenna
3375         // check HW setting: ANTSEL pin connection
3376         #if(DM_ODM_SUPPORT_TYPE==ODM_AP)
3377         ODM_Write2Byte(pDM_Odm,ODM_REG_RF_PIN_11N, (ODM_Read2Byte(pDM_Odm,0x804)&0xf0ff )| BIT(8) );    // b11-b8=0001,update RFPin setting
3378         #endif
3379
3380         // only AP support different path selection temperarly
3381         if(!bTxPathSel){                 //PATH-A
3382                 ODM_SetBBReg(pDM_Odm,ODM_REG_PIN_CTRL_11N, BIT8|BIT9, 0 ); // ANTSEL as HW control
3383                 ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PATH_11N, BIT13, 1);         //select TX ANTESEL from path A
3384         }
3385         else    {
3386                 ODM_SetBBReg(pDM_Odm,ODM_REG_PIN_CTRL_11N, BIT24|BIT25, 0 ); // ANTSEL as HW control
3387                 ODM_SetBBReg(pDM_Odm,ODM_REG_ANTSEL_PATH_11N, BIT13, 0);                 //select ANTESEL from path B
3388         }
3389
3390         //Set OFDM HW RX Antenna Diversity
3391         ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA1_11N, 0x7FF, 0x0c0); //Pwdb threshold=8dB
3392         ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA1_11N, BIT11, 0); //Switch to another antenna by checking pwdb threshold
3393         ODM_SetBBReg(pDM_Odm,ODM_REG_ANTDIV_PARA3_11N, BIT23, 1);       // Decide final antenna by comparing 2 antennas' pwdb
3394
3395         //Set CCK HW RX Antenna Diversity
3396         ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 0); //Antenna diversity decision period = 32 sample
3397         ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA2_11N, 0xf, 0xf); //Threshold for antenna diversity. Check another antenna power if input power < ANT_lim*4
3398         ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA3_11N, BIT13, 1); //polarity ana_A=1 and ana_B=0
3399         ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA4_11N, 0x1f, 0x8); //default antenna power = inpwr*(0.5 + r_ant_step/16)
3400
3401
3402         //Enable HW Antenna Diversity
3403         if(!bTxPathSel)                 //PATH-A
3404                 ODM_SetBBReg(pDM_Odm,ODM_REG_IGI_A_11N, BIT7,1);        // Enable Hardware antenna switch
3405         else
3406                 ODM_SetBBReg(pDM_Odm,ODM_REG_IGI_B_11N, BIT7,1);        // Enable Hardware antenna switch
3407         ODM_SetBBReg(pDM_Odm,ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 1);//Enable antenna diversity
3408
3409         pDM_SWAT_Table->CurAntenna=0;                   //choose left antenna as default antenna
3410         pDM_SWAT_Table->PreAntenna=0;
3411         for(i=0; i<ASSOCIATE_ENTRY_NUM ; i++)
3412         {
3413                 pDM_SWAT_Table->CCK_Ant1_Cnt[i] = 0;
3414                 pDM_SWAT_Table->CCK_Ant2_Cnt[i] = 0;
3415                 pDM_SWAT_Table->OFDM_Ant1_Cnt[i] = 0;
3416                 pDM_SWAT_Table->OFDM_Ant2_Cnt[i] = 0;
3417                 pDM_SWAT_Table->RSSI_Ant1_Sum[i] = 0;
3418                 pDM_SWAT_Table->RSSI_Ant2_Sum[i] = 0;
3419         }
3420         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_InitHybridAntDiv\n"));
3421 }
3422
3423
3424 VOID
3425 odm_InitHybridAntDiv(
3426         IN PDM_ODM_T    pDM_Odm
3427         )
3428 {
3429         if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))
3430         {
3431                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: Not Support HW AntDiv\n"));
3432                 return;
3433         }
3434
3435         if(pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D))
3436         {
3437 #if ((RTL8192C_SUPPORT == 1)||(RTL8192D_SUPPORT == 1))
3438                 odm_InitHybridAntDiv_88C_92D(pDM_Odm);
3439 #endif
3440         }
3441 }
3442
3443
3444 BOOLEAN
3445 odm_StaDefAntSel(
3446         IN PDM_ODM_T    pDM_Odm,
3447         IN u4Byte               OFDM_Ant1_Cnt,
3448         IN u4Byte               OFDM_Ant2_Cnt,
3449         IN u4Byte               CCK_Ant1_Cnt,
3450         IN u4Byte               CCK_Ant2_Cnt,
3451         OUT u1Byte              *pDefAnt
3452
3453         )
3454 {
3455 #if 1
3456         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_StaDefAntSelect==============>\n"));
3457
3458         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("OFDM_Ant1_Cnt:%d, OFDM_Ant2_Cnt:%d\n",OFDM_Ant1_Cnt,OFDM_Ant2_Cnt));
3459         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("CCK_Ant1_Cnt:%d, CCK_Ant2_Cnt:%d\n",CCK_Ant1_Cnt,CCK_Ant2_Cnt));
3460
3461
3462         if(((OFDM_Ant1_Cnt+OFDM_Ant2_Cnt)==0)&&((CCK_Ant1_Cnt + CCK_Ant2_Cnt) <10)){
3463                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_StaDefAntSelect Fail: No enough packet info!\n"));
3464                 return  FALSE;
3465         }
3466
3467         if(OFDM_Ant1_Cnt || OFDM_Ant2_Cnt )     {
3468                 //if RX OFDM packet number larger than 0
3469                 if(OFDM_Ant1_Cnt > OFDM_Ant2_Cnt)
3470                         (*pDefAnt)=1;
3471                 else
3472                         (*pDefAnt)=0;
3473         }
3474         // else if RX CCK packet number larger than 10
3475         else if((CCK_Ant1_Cnt + CCK_Ant2_Cnt) >=10 )
3476         {
3477                 if(CCK_Ant1_Cnt > (5*CCK_Ant2_Cnt))
3478                         (*pDefAnt)=1;
3479                 else if(CCK_Ant2_Cnt > (5*CCK_Ant1_Cnt))
3480                         (*pDefAnt)=0;
3481                 else if(CCK_Ant1_Cnt > CCK_Ant2_Cnt)
3482                         (*pDefAnt)=0;
3483                 else
3484                         (*pDefAnt)=1;
3485
3486         }
3487
3488         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("TxAnt = %s\n",((*pDefAnt)==1)?"Ant1":"Ant2"));
3489
3490 #endif
3491         //u4Byte antsel = ODM_GetBBReg(pDM_Odm, 0xc88, bMaskByte0);
3492         //(*pDefAnt)= (u1Byte) antsel;
3493
3494
3495
3496
3497         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_StaDefAntSelect\n"));
3498
3499         return TRUE;
3500
3501
3502 }
3503
3504
3505 VOID
3506 odm_SetRxIdleAnt(
3507         IN      PDM_ODM_T       pDM_Odm,
3508         IN      u1Byte  Ant,
3509         IN   BOOLEAN   bDualPath
3510 )
3511 {
3512         SWAT_T                  *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
3513
3514         //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_SetRxIdleAnt==============>\n"));
3515
3516         if(Ant != pDM_SWAT_Table->RxIdleAnt)
3517         {
3518         //for path-A
3519         if(Ant==1)
3520                         ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF, 0x65a9);   //right-side antenna
3521         else
3522                         ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF, 0x569a);   //left-side antenna
3523
3524         //for path-B
3525         if(bDualPath){
3526                 if(Ant==0)
3527                                 ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x65a9);   //right-side antenna
3528                 else
3529                                 ODM_SetBBReg(pDM_Odm,ODM_REG_RX_DEFUALT_A_11N, 0xFFFF0000, 0x569a);  //left-side antenna
3530                 }
3531         }
3532                 pDM_SWAT_Table->RxIdleAnt = Ant;
3533         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("RxIdleAnt: %s  Reg858=0x%x\n",(Ant==1)?"Ant1":"Ant2",(Ant==1)?0x65a9:0x569a));
3534
3535         //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============odm_SetRxIdleAnt\n"));
3536
3537         }
3538
3539 VOID
3540 ODM_AntselStatistics_88C(
3541         IN              PDM_ODM_T               pDM_Odm,
3542         IN              u1Byte                  MacId,
3543         IN              u4Byte                  PWDBAll,
3544         IN              BOOLEAN                 isCCKrate
3545 )
3546 {
3547         SWAT_T                  *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
3548
3549         if(pDM_SWAT_Table->antsel == 1)
3550         {
3551                 if(isCCKrate)
3552                         pDM_SWAT_Table->CCK_Ant1_Cnt[MacId]++;
3553                 else
3554                 {
3555                         pDM_SWAT_Table->OFDM_Ant1_Cnt[MacId]++;
3556                         pDM_SWAT_Table->RSSI_Ant1_Sum[MacId] += PWDBAll;
3557                 }
3558         }
3559         else
3560         {
3561                 if(isCCKrate)
3562                         pDM_SWAT_Table->CCK_Ant2_Cnt[MacId]++;
3563                 else
3564                 {
3565                         pDM_SWAT_Table->OFDM_Ant2_Cnt[MacId]++;
3566                         pDM_SWAT_Table->RSSI_Ant2_Sum[MacId] += PWDBAll;
3567                 }
3568         }
3569
3570 }
3571
3572
3573
3574
3575 #if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
3576 VOID
3577 ODM_SetTxAntByTxInfo_88C_92D(
3578         IN              PDM_ODM_T               pDM_Odm,
3579         IN              pu1Byte                 pDesc,
3580         IN              u1Byte                  macId
3581 )
3582 {
3583         SWAT_T                  *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
3584         u1Byte                  antsel;
3585
3586         if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV))
3587                 return;
3588
3589         if(pDM_SWAT_Table->RxIdleAnt == 1)
3590                 antsel=(pDM_SWAT_Table->TxAnt[macId] == 1)?0:1;
3591         else
3592                 antsel=(pDM_SWAT_Table->TxAnt[macId] == 1)?1:0;
3593
3594         SET_TX_DESC_ANTSEL_A_92C(pDesc, antsel);
3595         //SET_TX_DESC_ANTSEL_B_92C(pDesc, antsel);
3596         //ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("SET_TX_DESC_ANTSEL_A_92C=%d\n", pDM_SWAT_Table->TxAnt[macId]));
3597 }
3598 #elif(DM_ODM_SUPPORT_TYPE==ODM_CE)
3599 VOID
3600 ODM_SetTxAntByTxInfo_88C_92D(
3601         IN              PDM_ODM_T               pDM_Odm
3602 )
3603 {
3604
3605 }
3606 #elif(DM_ODM_SUPPORT_TYPE==ODM_AP)
3607 VOID
3608 ODM_SetTxAntByTxInfo_88C_92D(
3609         IN              PDM_ODM_T               pDM_Odm
3610 )
3611 {
3612
3613 }
3614 #endif
3615
3616 VOID
3617 odm_HwAntDiv_92C_92D(
3618         IN      PDM_ODM_T       pDM_Odm
3619 )
3620 {
3621         SWAT_T                  *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
3622         u4Byte                  RSSI_Min=0xFF, RSSI, RSSI_Ant1, RSSI_Ant2;
3623         u1Byte                  RxIdleAnt, i;
3624         BOOLEAN         bRet=FALSE;
3625         PSTA_INFO_T     pEntry;
3626
3627 #if (DM_ODM_SUPPORT_TYPE==ODM_AP)
3628         struct rtl8192cd_priv *priv=pDM_Odm->priv;
3629         //if test, return
3630         if(priv->pshare->rf_ft_var.CurAntenna & 0x80)
3631                 return;
3632 #endif
3633
3634         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv==============>\n"));
3635
3636         if(!(pDM_Odm->SupportAbility&ODM_BB_ANT_DIV))                                    //if don't support antenna diveristy
3637         {
3638                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv: Not supported!\n"));
3639                 return;
3640         }
3641
3642         if((pDM_Odm->SupportICType != ODM_RTL8192C) && (pDM_Odm->SupportICType != ODM_RTL8192D))
3643         {
3644                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: IC Type is not 92C or 92D\n"));
3645                 return;
3646         }
3647
3648 #if (DM_ODM_SUPPORT_TYPE&(ODM_WIN|ODM_CE))
3649         if(!pDM_Odm->bLinked)
3650         {
3651                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: bLinked is FALSE\n"));
3652                 return;
3653         }
3654 #endif
3655
3656         for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
3657         {
3658                 pEntry = pDM_Odm->pODM_StaInfo[i];
3659                 if(IS_STA_VALID(pEntry))
3660                 {
3661
3662                         RSSI_Ant1 = (pDM_SWAT_Table->OFDM_Ant1_Cnt[i] == 0)?0:(pDM_SWAT_Table->RSSI_Ant1_Sum[i]/pDM_SWAT_Table->OFDM_Ant1_Cnt[i]);
3663                         RSSI_Ant2 = (pDM_SWAT_Table->OFDM_Ant2_Cnt[i] == 0)?0:(pDM_SWAT_Table->RSSI_Ant2_Sum[i]/pDM_SWAT_Table->OFDM_Ant2_Cnt[i]);
3664
3665                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("RSSI_Ant1=%d,  RSSI_Ant2=%d\n", RSSI_Ant1, RSSI_Ant2));
3666
3667                         if(RSSI_Ant1 ||RSSI_Ant2)
3668                         {
3669 #if (DM_ODM_SUPPORT_TYPE==ODM_AP)
3670                                 if(pDM_Odm->pODM_StaInfo[i]->expire_to)
3671 #endif
3672                                 {
3673                                         RSSI = (RSSI_Ant1 < RSSI_Ant2) ? RSSI_Ant1 : RSSI_Ant2;
3674                                         if((!RSSI) || ( RSSI < RSSI_Min) ) {
3675                                                 pDM_SWAT_Table->TargetSTA = i;
3676                                                 RSSI_Min = RSSI;
3677                                         }
3678                                 }
3679         }
3680                         ///STA: found out default antenna
3681                         bRet=odm_StaDefAntSel(pDM_Odm,
3682                                                  pDM_SWAT_Table->OFDM_Ant1_Cnt[i],
3683                                                  pDM_SWAT_Table->OFDM_Ant2_Cnt[i],
3684                                                  pDM_SWAT_Table->CCK_Ant1_Cnt[i],
3685                                                  pDM_SWAT_Table->CCK_Ant2_Cnt[i],
3686                                                  &pDM_SWAT_Table->TxAnt[i]);
3687
3688                         //if Tx antenna selection: successful
3689                         if(bRet){
3690                                 pDM_SWAT_Table->RSSI_Ant1_Sum[i] = 0;
3691                                 pDM_SWAT_Table->RSSI_Ant2_Sum[i] = 0;
3692                                 pDM_SWAT_Table->OFDM_Ant1_Cnt[i] = 0;
3693                                 pDM_SWAT_Table->OFDM_Ant2_Cnt[i] = 0;
3694                                 pDM_SWAT_Table->CCK_Ant1_Cnt[i] = 0;
3695                                 pDM_SWAT_Table->CCK_Ant2_Cnt[i] = 0;
3696                         }
3697                 }
3698         }
3699
3700         //set RX Idle Ant
3701         RxIdleAnt = pDM_SWAT_Table->TxAnt[pDM_SWAT_Table->TargetSTA];
3702         odm_SetRxIdleAnt(pDM_Odm, RxIdleAnt, FALSE);
3703
3704 #if (DM_ODM_SUPPORT_TYPE==ODM_AP)
3705 #ifdef TX_SHORTCUT
3706         if (!priv->pmib->dot11OperationEntry.disable_txsc) {
3707                 plist = phead->next;
3708                 while(plist != phead)   {
3709                         pstat = list_entry(plist, struct stat_info, asoc_list);
3710                         if(pstat->expire_to) {
3711                                 for (i=0; i<TX_SC_ENTRY_NUM; i++) {
3712                                         struct tx_desc *pdesc= &(pstat->tx_sc_ent[i].hwdesc1);
3713                                         pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25)));
3714                                         if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1)
3715                                                 pdesc->Dword2 |= set_desc(BIT(24)|BIT(25));
3716                                         pdesc= &(pstat->tx_sc_ent[i].hwdesc2);
3717                                         pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25)));
3718                                         if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1)
3719                                                 pdesc->Dword2 |= set_desc(BIT(24)|BIT(25));
3720                                 }
3721                         }
3722
3723                         if (plist == plist->next)
3724                                 break;
3725                         plist = plist->next;
3726                 };
3727         }
3728 #endif
3729 #endif
3730
3731         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("<==============odm_HwAntDiv\n"));
3732
3733 }
3734
3735 VOID
3736 odm_HwAntDiv(
3737         IN      PDM_ODM_T       pDM_Odm
3738 )
3739 {
3740
3741         PADAPTER                pAdapter        = pDM_Odm->Adapter;
3742
3743 #if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
3744         if(pAdapter->MgntInfo.AntennaTest)
3745                 return;
3746 #endif
3747         if(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV))
3748         {
3749                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("Return: Not Support HW AntDiv\n"));
3750                 return;
3751         }
3752
3753         if(pDM_Odm->SupportICType & (ODM_RTL8192C | ODM_RTL8192D))
3754         {
3755 #if ((RTL8192C_SUPPORT == 1)||(RTL8192D_SUPPORT == 1))
3756                 odm_HwAntDiv_92C_92D(pDM_Odm);
3757 #endif
3758         }
3759 }
3760
3761
3762 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)
3763 #if 0
3764 VOID
3765 odm_HwAntDiv(
3766         IN      PDM_ODM_T       pDM_Odm
3767 )
3768 {
3769         struct rtl8192cd_priv *priv=pDM_Odm->priv;
3770         struct stat_info        *pstat, *pstat_min=NULL;
3771         struct list_head        *phead, *plist;
3772         int rssi_min= 0xff, i;
3773         u1Byte  idleAnt=priv->pshare->rf_ft_var.CurAntenna;
3774         u1Byte  nextAnt;
3775         BOOLEAN         bRet=FALSE;
3776
3777         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("odm_HwAntDiv==============>\n"));
3778
3779         if((!priv->pshare->rf_ft_var.antHw_enable) ||(!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)))
3780                 return;
3781
3782         //if test, return
3783         if(priv->pshare->rf_ft_var.CurAntenna & 0x80)
3784                 return;
3785
3786         phead = &priv->asoc_list;
3787         plist = phead->next;
3788         ////=========================
3789         //find mimum rssi sta
3790         ////=========================
3791         while(plist != phead)   {
3792                 pstat = list_entry(plist, struct stat_info, asoc_list);
3793                 if((pstat->expire_to) && (pstat->AntRSSI[0] || pstat->AntRSSI[1])) {
3794                         int rssi = (pstat->AntRSSI[0] < pstat->AntRSSI[1]) ? pstat->AntRSSI[0] : pstat->AntRSSI[1];
3795                         if((!pstat_min) || ( rssi < rssi_min) ) {
3796                                 pstat_min = pstat;
3797                                 rssi_min = rssi;
3798                         }
3799                 }
3800                 ///STA: found out default antenna
3801                 bRet=odm_StaDefAntSel(pDM_Odm,
3802                                                 pstat->hwRxAntSel[1],
3803                                                 pstat->hwRxAntSel[0],
3804                                                 pstat->cckPktCount[1],
3805                                                 pstat->cckPktCount[0],
3806                                                 &nextAnt
3807                                                 );
3808
3809                 //if default antenna selection: successful
3810                 if(bRet){
3811                         pstat->CurAntenna = nextAnt;
3812                         //update rssi
3813                         for(i=0; i<2; i++) {
3814                                 if(pstat->cckPktCount[i]==0 && pstat->hwRxAntSel[i]==0)
3815                                         pstat->AntRSSI[i] = 0;
3816                         }
3817                         if(pstat->AntRSSI[idleAnt]==0)
3818                                 pstat->AntRSSI[idleAnt] = pstat->AntRSSI[idleAnt^1];
3819                         // reset variables
3820                         pstat->hwRxAntSel[1] = pstat->hwRxAntSel[0] =0;
3821                         pstat->cckPktCount[1]= pstat->cckPktCount[0] =0;
3822                 }
3823
3824                 if (plist == plist->next)
3825                         break;
3826                 plist = plist->next;
3827
3828         };
3829         ////=========================
3830         //Choose  RX Idle antenna according to minmum rssi
3831         ////=========================
3832         if(pstat_min)   {
3833                 if(priv->pshare->rf_ft_var.CurAntenna!=pstat_min->CurAntenna)
3834                         odm_SetRxIdleAnt(pDM_Odm,pstat_min->CurAntenna,TRUE);
3835                 priv->pshare->rf_ft_var.CurAntenna = pstat_min->CurAntenna;
3836         }
3837
3838
3839 #ifdef TX_SHORTCUT
3840         if (!priv->pmib->dot11OperationEntry.disable_txsc) {
3841                 plist = phead->next;
3842                 while(plist != phead)   {
3843                         pstat = list_entry(plist, struct stat_info, asoc_list);
3844                         if(pstat->expire_to) {
3845                                 for (i=0; i<TX_SC_ENTRY_NUM; i++) {
3846                                         struct tx_desc *pdesc= &(pstat->tx_sc_ent[i].hwdesc1);
3847                                         pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25)));
3848                                         if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1)
3849                                                 pdesc->Dword2 |= set_desc(BIT(24)|BIT(25));
3850                                         pdesc= &(pstat->tx_sc_ent[i].hwdesc2);
3851                                         pdesc->Dword2 &= set_desc(~ (BIT(24)|BIT(25)));
3852                                         if((pstat->CurAntenna^priv->pshare->rf_ft_var.CurAntenna)&1)
3853                                                 pdesc->Dword2 |= set_desc(BIT(24)|BIT(25));
3854                                 }
3855                         }
3856
3857                         if (plist == plist->next)
3858                                 break;
3859                         plist = plist->next;
3860                 };
3861         }
3862 #endif
3863         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,"<==============odm_HwAntDiv\n");
3864 }
3865 #endif
3866
3867 u1Byte
3868 ODM_Diversity_AntennaSelect(
3869         IN      PDM_ODM_T       pDM_Odm,
3870         IN      u1Byte  *data
3871 )
3872 {
3873         struct rtl8192cd_priv *priv=pDM_Odm->priv;
3874
3875         int ant = _atoi(data, 16);
3876
3877         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("ODM_Diversity_AntennaSelect==============>\n"));
3878
3879         #ifdef PCIE_POWER_SAVING
3880         PCIeWakeUp(priv, POWER_DOWN_T0);
3881         #endif
3882
3883         if (ant==AUX_ANT || ant==MAIN_ANT)
3884         {
3885                 if ( !priv->pshare->rf_ft_var.antSw_select) {
3886                         ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) | BIT(8)| BIT(9) );  //  ANTSEL A as SW control
3887                         ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) & (~ BIT(7)));       // rx OFDM SW control
3888                         PHY_SetBBReg(priv, 0x860, 0x300, ant);
3889                 } else {
3890                         ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) | BIT(24)| BIT(25) ); // ANTSEL B as HW control
3891                         PHY_SetBBReg(priv, 0x864, 0x300, ant);
3892                         ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) & (~ BIT(7)));               // rx OFDM SW control
3893                 }
3894
3895                 ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) & (~ BIT(7)));       // rx CCK SW control
3896                 ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) & (~ BIT(21))); // select ant by tx desc
3897                 ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a);
3898
3899                 priv->pshare->rf_ft_var.antHw_enable = 0;
3900                 priv->pshare->rf_ft_var.CurAntenna  = (ant%2);
3901
3902                 #ifdef SW_ANT_SWITCH
3903                 priv->pshare->rf_ft_var.antSw_enable = 0;
3904                 priv->pshare->DM_SWAT_Table.CurAntenna = ant;
3905                 priv->pshare->RSSI_test =0;
3906                 #endif
3907         }
3908         else if(ant==0){
3909
3910                 if ( !priv->pshare->rf_ft_var.antSw_select)  {
3911                         ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) & ~(BIT(8)| BIT(9)) );
3912                         ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) | BIT(7));   // OFDM HW control
3913                 } else {
3914                         ODM_Write4Byte(pDM_Odm,0x870, ODM_Read4Byte(pDM_Odm,0x870) & ~(BIT(24)| BIT(25)) );
3915                         ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) | BIT(7));   // OFDM HW control
3916                 }
3917
3918                 ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) | BIT(7));   // CCK HW control
3919                 ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) | BIT(21) ); // by tx desc
3920                 priv->pshare->rf_ft_var.CurAntenna = 0;
3921                 ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a);
3922                 priv->pshare->rf_ft_var.antHw_enable = 1;
3923 #ifdef SW_ANT_SWITCH
3924                 priv->pshare->rf_ft_var.antSw_enable = 0;
3925                 priv->pshare->RSSI_test =0;
3926 #endif
3927         }
3928 #ifdef SW_ANT_SWITCH
3929         else if(ant==3) {
3930                 if(!priv->pshare->rf_ft_var.antSw_enable) {
3931
3932                         dm_SW_AntennaSwitchInit(priv);
3933                         ODM_Write4Byte(pDM_Odm,0x858, 0x569a569a);
3934                         priv->pshare->lastTxOkCnt = priv->net_stats.tx_bytes;
3935                         priv->pshare->lastRxOkCnt = priv->net_stats.rx_bytes;
3936                 }
3937                 if ( !priv->pshare->rf_ft_var.antSw_select)
3938                         ODM_Write1Byte(pDM_Odm,0xc50, ODM_Read1Byte(pDM_Odm,0xc50) & (~ BIT(7)));       // rx OFDM SW control
3939                 else
3940                         ODM_Write1Byte(pDM_Odm,0xc58, ODM_Read1Byte(pDM_Odm,0xc58) & (~ BIT(7)));       // rx OFDM SW control
3941
3942                 ODM_Write1Byte(pDM_Odm,0xa01, ODM_Read1Byte(pDM_Odm,0xa01) & (~ BIT(7)));               // rx CCK SW control
3943                 ODM_Write4Byte(pDM_Odm,0x80c, ODM_Read4Byte(pDM_Odm,0x80c) & (~ BIT(21)));      // select ant by tx desc
3944                 priv->pshare->rf_ft_var.antHw_enable = 0;
3945                 priv->pshare->rf_ft_var.antSw_enable = 1;
3946
3947         }
3948 #endif
3949         ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,ODM_DBG_LOUD,("<==============ODM_Diversity_AntennaSelect\n"));
3950
3951         return 1;
3952 }
3953 #endif
3954
3955 #else //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
3956
3957 VOID odm_InitHybridAntDiv(      IN PDM_ODM_T    pDM_Odm         ){}
3958 VOID odm_HwAntDiv(      IN      PDM_ODM_T       pDM_Odm){}
3959 #if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
3960 VOID ODM_SetTxAntByTxInfo_88C_92D(
3961         IN              PDM_ODM_T               pDM_Odm,
3962         IN              pu1Byte                 pDesc,
3963         IN              u1Byte                  macId
3964 ){}
3965 #elif(DM_ODM_SUPPORT_TYPE==ODM_CE)
3966 VOID ODM_SetTxAntByTxInfo_88C_92D(      IN              PDM_ODM_T               pDM_Odm){ }
3967 #elif(DM_ODM_SUPPORT_TYPE==ODM_AP)
3968 VOID ODM_SetTxAntByTxInfo_88C_92D(      IN              PDM_ODM_T               pDM_Odm){ }
3969 #endif
3970
3971 #endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
3972
3973
3974
3975 //============================================================
3976 //EDCA Turbo
3977 //============================================================
3978
3979 //Remove Edca by Yuchen
3980
3981
3982 #if( DM_ODM_SUPPORT_TYPE == ODM_WIN)
3983 //
3984 // 2011/07/26 MH Add an API for testing IQK fail case.
3985 //
3986 BOOLEAN
3987 ODM_CheckPowerStatus(
3988         IN      PADAPTER                Adapter)
3989 {
3990
3991         HAL_DATA_TYPE           *pHalData = GET_HAL_DATA(Adapter);
3992         PDM_ODM_T                       pDM_Odm = &pHalData->DM_OutSrc;
3993         RT_RF_POWER_STATE       rtState;
3994         PMGNT_INFO                      pMgntInfo       = &(Adapter->MgntInfo);
3995
3996         // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence.
3997         if (pMgntInfo->init_adpt_in_progress == TRUE)
3998         {
3999                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter"));
4000                 return  TRUE;
4001         }
4002
4003         //
4004         //      2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK.
4005         //
4006         Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
4007         if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff)
4008         {
4009                 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n",
4010                 Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState));
4011                 return  FALSE;
4012         }
4013         return  TRUE;
4014 }
4015 #endif
4016
4017 // need to ODM CE Platform
4018 //move to here for ANT detection mechanism using
4019
4020 #if ((DM_ODM_SUPPORT_TYPE == ODM_WIN)||(DM_ODM_SUPPORT_TYPE == ODM_CE))
4021 u4Byte
4022 GetPSDData(
4023         IN PDM_ODM_T    pDM_Odm,
4024         unsigned int    point,
4025         u1Byte initial_gain_psd)
4026 {
4027         //unsigned int  val, rfval;
4028         //int   psd_report;
4029         u4Byte  psd_report;
4030
4031         //HAL_DATA_TYPE         *pHalData = GET_HAL_DATA(Adapter);
4032         //Debug Message
4033         //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord);
4034         //DbgPrint("Reg908 = 0x%x\n",val);
4035         //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord);
4036         //rfval = PHY_QueryRFReg(Adapter, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask);
4037         //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval);
4038         //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n",
4039                 //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval);
4040
4041         //Set DCO frequency index, offset=(40MHz/SamplePts)*point
4042         ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point);
4043
4044         //Start PSD calculation, Reg808[22]=0->1
4045         ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1);
4046         //Need to wait for HW PSD report
4047         ODM_StallExecution(1000);
4048         ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0);
4049         //Read PSD report, Reg8B4[15:0]
4050         psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF;
4051
4052 #if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) && ( (RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX))
4053         psd_report = (u4Byte) (ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c);
4054 #else
4055         psd_report = (int) (20*log10((double)psd_report))+(int)(initial_gain_psd-0x1c);
4056 #endif
4057
4058         return psd_report;
4059
4060 }
4061
4062 u4Byte
4063 ConvertTo_dB(
4064         u4Byte  Value)
4065 {
4066         u1Byte i;
4067         u1Byte j;
4068         u4Byte dB;
4069
4070         Value = Value & 0xFFFF;
4071
4072         for (i=0;i<8;i++)
4073         {
4074                 if (Value <= dB_Invert_Table[i][11])
4075                 {
4076                         break;
4077                 }
4078         }
4079
4080         if (i >= 8)
4081         {
4082                 return (96);    // maximum 96 dB
4083         }
4084
4085         for (j=0;j<12;j++)
4086         {
4087                 if (Value <= dB_Invert_Table[i][j])
4088                 {
4089                         break;
4090                 }
4091         }
4092
4093         dB = i*12 + j + 1;
4094
4095         return (dB);
4096 }
4097
4098 #endif
4099
4100 //
4101 // LukeLee:
4102 // PSD function will be moved to FW in future IC, but now is only implemented in MP platform
4103 // So PSD function will not be incorporated to common ODM
4104 //
4105 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
4106
4107 #define AFH_PSD         1       //0:normal PSD scan, 1: only do 20 pts PSD
4108 #define MODE_40M                0       //0:20M, 1:40M
4109 #define PSD_TH2         3
4110 #define PSD_CHMIN               20   // Minimum channel number for BT AFH
4111 #define SIR_STEP_SIZE   3
4112 #define   Smooth_Size_1         5
4113 #define Smooth_TH_1     3
4114 #define   Smooth_Size_2         10
4115 #define Smooth_TH_2     4
4116 #define   Smooth_Size_3         20
4117 #define Smooth_TH_3     4
4118 #define   Smooth_Step_Size 5
4119 #define Adaptive_SIR    1
4120 //#if(RTL8723_FPGA_VERIFICATION == 1)
4121 //#define       PSD_RESCAN              1
4122 //#else
4123 //#define       PSD_RESCAN              4
4124 //#endif
4125 #define SCAN_INTERVAL   1500 //ms
4126 #define SYN_Length              5    // for 92D
4127
4128 #define LNA_Low_Gain_1                      0x64
4129 #define LNA_Low_Gain_2                      0x5A
4130 #define LNA_Low_Gain_3                      0x58
4131
4132 #define pw_th_10dB                                      0x0
4133 #define pw_th_16dB                                      0x3
4134
4135 #define FA_RXHP_TH1                           5000
4136 #define FA_RXHP_TH2                           1500
4137 #define FA_RXHP_TH3                             800
4138 #define FA_RXHP_TH4                             600
4139 #define FA_RXHP_TH5                             500
4140
4141 #define Idle_Mode                                       0
4142 #define High_TP_Mode                            1
4143 #define Low_TP_Mode                             2
4144
4145
4146 VOID
4147 odm_PSDMonitorInit(
4148         IN PDM_ODM_T    pDM_Odm)
4149 {
4150 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE)
4151         //HAL_DATA_TYPE         *pHalData = GET_HAL_DATA(Adapter);
4152         //PSD Monitor Setting
4153         //Which path in ADC/DAC is turnned on for PSD: both I/Q
4154         ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT10|BIT11, 0x3);
4155         //Ageraged number: 8
4156         ODM_SetBBReg(pDM_Odm, ODM_PSDREG, BIT12|BIT13, 0x1);
4157         pDM_Odm->bPSDinProcess = FALSE;
4158         pDM_Odm->bUserAssignLevel = FALSE;
4159         pDM_Odm->bPSDactive = FALSE;
4160         //pDM_Odm->bDMInitialGainEnable=TRUE;           //change the initialization to DIGinit
4161         //Set Debug Port
4162         //PHY_SetBBReg(Adapter, 0x908, bMaskDWord, 0x803);
4163         //PHY_SetBBReg(Adapter, 0xB34, bMaskByte0, 0x00); // pause PSD
4164         //PHY_SetBBReg(Adapter, 0xB38, bMaskByte0, 10); //rescan
4165         //PHY_SetBBReg(Adapter, 0xB38, bMaskByte2|bMaskByte3, 100); //interval
4166
4167         //PlatformSetTimer( Adapter, &pHalData->PSDTriggerTimer, 0); //ms
4168 #endif
4169 }
4170
4171 VOID
4172 PatchDCTone(
4173         IN      PDM_ODM_T       pDM_Odm,
4174         pu4Byte         PSD_report,
4175         u1Byte          initial_gain_psd
4176 )
4177 {
4178         //HAL_DATA_TYPE         *pHalData = GET_HAL_DATA(Adapter);
4179         //PADAPTER      pAdapter;
4180
4181         u4Byte  psd_report;
4182
4183         //2 Switch to CH11 to patch CH9 and CH13 DC tone
4184         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 11);
4185
4186         if(pDM_Odm->SupportICType== ODM_RTL8192D)
4187         {
4188                 if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP))
4189                 {
4190                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 11);
4191                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC);
4192                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038);
4193                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x77C1A);
4194                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x41289);
4195                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01840);
4196                 }
4197                 else
4198                 {
4199                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC);
4200                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038);
4201                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x77C1A);
4202                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x41289);
4203                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01840);
4204                 }
4205         }
4206
4207         //Ch9 DC tone patch
4208         psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd);
4209         PSD_report[50] = psd_report;
4210         //Ch13 DC tone patch
4211         psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd);
4212         PSD_report[70] = psd_report;
4213
4214         //2 Switch to CH3 to patch CH1 and CH5 DC tone
4215         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, 3);
4216
4217
4218         if(pDM_Odm->SupportICType==ODM_RTL8192D)
4219         {
4220                 if((*(pDM_Odm->pMacPhyMode) == ODM_SMSP)||(*(pDM_Odm->pMacPhyMode) == ODM_DMSP))
4221                 {
4222                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, 3);
4223                         //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x25, 0xfffff, 0x643BC);
4224                         //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x26, 0xfffff, 0xFC038);
4225                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, 0xfffff, 0x07C1A);
4226                         //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, 0xfffff, 0x61289);
4227                         //PHY_SetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, 0xfffff, 0x01C41);
4228                 }
4229                 else
4230                 {
4231                         //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x25, 0xfffff, 0x643BC);
4232                         //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x26, 0xfffff, 0xFC038);
4233                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, 0xfffff, 0x07C1A);
4234                         //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, 0xfffff, 0x61289);
4235                         //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, 0xfffff, 0x01C41);
4236                 }
4237         }
4238
4239         //Ch1 DC tone patch
4240         psd_report = GetPSDData(pDM_Odm, 96, initial_gain_psd);
4241         PSD_report[10] = psd_report;
4242         //Ch5 DC tone patch
4243         psd_report = GetPSDData(pDM_Odm, 32, initial_gain_psd);
4244         PSD_report[30] = psd_report;
4245
4246 }
4247
4248
4249 VOID
4250 GoodChannelDecision(
4251         PDM_ODM_T       pDM_Odm,
4252         pu4Byte         PSD_report,
4253         pu1Byte         PSD_bitmap,
4254         u1Byte          RSSI_BT,
4255         pu1Byte         PSD_bitmap_memory)
4256 {
4257         pRXHP_T                 pRX_HP_Table = &pDM_Odm->DM_RXHP_Table;
4258         //s4Byte        TH1 =  SSBT-0x15;    // modify TH by Neil Chen
4259         s4Byte  TH1= RSSI_BT+0x14;
4260         s4Byte  TH2 = RSSI_BT+85;
4261         //u2Byte    TH3;
4262 //      s4Byte  RegB34;
4263         u1Byte  bitmap, Smooth_size[3], Smooth_TH[3];
4264         //u1Byte        psd_bit;
4265         u4Byte  i,n,j, byte_idx, bit_idx, good_cnt, good_cnt_smoothing, Smooth_Interval[3];
4266         int             start_byte_idx,start_bit_idx,cur_byte_idx, cur_bit_idx,NOW_byte_idx ;
4267
4268 //      RegB34 = PHY_QueryBBReg(Adapter,0xB34, bMaskDWord)&0xFF;
4269
4270         if((pDM_Odm->SupportICType == ODM_RTL8192C)||(pDM_Odm->SupportICType == ODM_RTL8192D))
4271        {
4272             TH1 = RSSI_BT + 0x14;
4273         }
4274
4275         Smooth_size[0]=Smooth_Size_1;
4276         Smooth_size[1]=Smooth_Size_2;
4277         Smooth_size[2]=Smooth_Size_3;
4278         Smooth_TH[0]=Smooth_TH_1;
4279         Smooth_TH[1]=Smooth_TH_2;
4280         Smooth_TH[2]=Smooth_TH_3;
4281         Smooth_Interval[0]=16;
4282         Smooth_Interval[1]=15;
4283         Smooth_Interval[2]=13;
4284         good_cnt = 0;
4285         if(pDM_Odm->SupportICType==ODM_RTL8723A)
4286         {
4287                 //2 Threshold
4288
4289                 if(RSSI_BT >=41)
4290                         TH1 = 113;
4291                 else if(RSSI_BT >=38)   // >= -15dBm
4292                         TH1 = 105;                              //0x69
4293                 else if((RSSI_BT >=33)&(RSSI_BT <38))
4294                         TH1 = 99+(RSSI_BT-33);         //0x63
4295                 else if((RSSI_BT >=26)&(RSSI_BT<33))
4296                         TH1 = 99-(33-RSSI_BT)+2;     //0x5e
4297                 else if((RSSI_BT >=24)&(RSSI_BT<26))
4298                         TH1 = 88-((RSSI_BT-24)*3);   //0x58
4299                 else if((RSSI_BT >=18)&(RSSI_BT<24))
4300                         TH1 = 77+((RSSI_BT-18)*2);
4301                 else if((RSSI_BT >=14)&(RSSI_BT<18))
4302                         TH1 = 63+((RSSI_BT-14)*2);
4303                 else if((RSSI_BT >=8)&(RSSI_BT<14))
4304                         TH1 = 58+((RSSI_BT-8)*2);
4305                 else if((RSSI_BT >=3)&(RSSI_BT<8))
4306                         TH1 = 52+(RSSI_BT-3);
4307                 else
4308                         TH1 = 51;
4309         }
4310
4311         for (i = 0; i< 10; i++)
4312                 PSD_bitmap[i] = 0;
4313
4314
4315          // Add By Gary
4316        for (i=0; i<80; i++)
4317                 pRX_HP_Table->PSD_bitmap_RXHP[i] = 0;
4318         // End
4319
4320
4321
4322         if(pDM_Odm->SupportICType==ODM_RTL8723A)
4323         {
4324                 TH1 =TH1-SIR_STEP_SIZE;
4325         }
4326         while (good_cnt < PSD_CHMIN)
4327         {
4328                 good_cnt = 0;
4329                 if(pDM_Odm->SupportICType==ODM_RTL8723A)
4330                 {
4331                 if(TH1 ==TH2)
4332                         break;
4333                 if((TH1+SIR_STEP_SIZE) < TH2)
4334                         TH1 += SIR_STEP_SIZE;
4335                 else
4336                         TH1 = TH2;
4337                 }
4338                 else
4339                 {
4340                         if(TH1==(RSSI_BT+0x1E))
4341                              break;
4342                         if((TH1+2) < (RSSI_BT+0x1E))
4343                                 TH1+=3;
4344                         else
4345                                 TH1 = RSSI_BT+0x1E;
4346
4347                 }
4348                 ODM_RT_TRACE(pDM_Odm,COMP_PSD,DBG_LOUD,("PSD: decision threshold is: %d", TH1));
4349
4350                 for (i = 0; i< 80; i++)
4351                 {
4352                         if((s4Byte)(PSD_report[i]) < TH1)
4353                         {
4354                                 byte_idx = i / 8;
4355                                 bit_idx = i -8*byte_idx;
4356                                 bitmap = PSD_bitmap[byte_idx];
4357                                 PSD_bitmap[byte_idx] = bitmap | (u1Byte) (1 << bit_idx);
4358                         }
4359                 }
4360
4361 #if DBG
4362                 ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: before smoothing\n"));
4363                 for(n=0;n<10;n++)
4364                 {
4365                         //DbgPrint("PSD_bitmap[%u]=%x\n", n, PSD_bitmap[n]);
4366                         for (i = 0; i<8; i++)
4367                                 ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] =   %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i));
4368                 }
4369 #endif
4370
4371                 //1 Start of smoothing function
4372
4373                 for (j=0;j<3;j++)
4374                 {
4375                         start_byte_idx=0;
4376                         start_bit_idx=0;
4377                         for(n=0; n<Smooth_Interval[j]; n++)
4378                         {
4379                                 good_cnt_smoothing = 0;
4380                                 cur_bit_idx = start_bit_idx;
4381                                 cur_byte_idx = start_byte_idx;
4382                                 for ( i=0; i < Smooth_size[j]; i++)
4383                                 {
4384                                         NOW_byte_idx = cur_byte_idx + (i+cur_bit_idx)/8;
4385                                         if ( (PSD_bitmap[NOW_byte_idx]& BIT( (cur_bit_idx + i)%8)) != 0)
4386                                                 good_cnt_smoothing++;
4387
4388                                 }
4389
4390                                 if( good_cnt_smoothing < Smooth_TH[j] )
4391                                 {
4392                                         cur_bit_idx = start_bit_idx;
4393                                         cur_byte_idx = start_byte_idx;
4394                                         for ( i=0; i< Smooth_size[j] ; i++)
4395                                         {
4396                                                 NOW_byte_idx = cur_byte_idx + (i+cur_bit_idx)/8;
4397                                                 PSD_bitmap[NOW_byte_idx] = PSD_bitmap[NOW_byte_idx] & (~BIT( (cur_bit_idx + i)%8));
4398                                         }
4399                                 }
4400                                 start_bit_idx =  start_bit_idx + Smooth_Step_Size;
4401                                 while ( (start_bit_idx)  > 7 )
4402                                 {
4403                                         start_byte_idx= start_byte_idx+start_bit_idx/8;
4404                                         start_bit_idx = start_bit_idx%8;
4405                                 }
4406                         }
4407
4408                         ODM_RT_TRACE(   pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: after %u smoothing", j+1));
4409                         for(n=0;n<10;n++)
4410                         {
4411                                 for (i = 0; i<8; i++)
4412                                 {
4413                                         ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD_bitmap[%u] =   %d\n", 2402+n*8+i, (PSD_bitmap[n]&BIT(i))>>i));
4414
4415                                         if ( ((PSD_bitmap[n]&BIT(i))>>i) ==1)  //----- Add By Gary
4416                                         {
4417                                            pRX_HP_Table->PSD_bitmap_RXHP[8*n+i] = 1;
4418                                         }                                                  // ------end by Gary
4419                                 }
4420                         }
4421
4422                 }
4423
4424
4425                 good_cnt = 0;
4426                 for ( i = 0; i < 10; i++)
4427                 {
4428                         for (n = 0; n < 8; n++)
4429                                 if((PSD_bitmap[i]& BIT(n)) != 0)
4430                                         good_cnt++;
4431                 }
4432                 ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: good channel cnt = %u",good_cnt));
4433         }
4434
4435         //RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: SSBT=%d, TH2=%d, TH1=%d",SSBT,TH2,TH1));
4436         for (i = 0; i <10; i++)
4437                 ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD: PSD_bitmap[%u]=%x",i,PSD_bitmap[i]));
4438 /*
4439         //Update bitmap memory
4440         for(i = 0; i < 80; i++)
4441         {
4442                 byte_idx = i / 8;
4443                 bit_idx = i -8*byte_idx;
4444                 psd_bit = (PSD_bitmap[byte_idx] & BIT(bit_idx)) >> bit_idx;
4445                 bitmap = PSD_bitmap_memory[i];
4446                 PSD_bitmap_memory[i] = (bitmap << 1) |psd_bit;
4447         }
4448 */
4449 }
4450
4451
4452
4453 VOID
4454 odm_PSD_Monitor(
4455         PDM_ODM_T       pDM_Odm
4456 )
4457 {
4458         //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
4459         //PDM_ODM_T             pDM_Odm = &pHalData->DM_OutSrc;
4460
4461         unsigned int            pts, start_point, stop_point;
4462         u1Byte                  initial_gain ;
4463         static u1Byte           PSD_bitmap_memory[80], init_memory = 0;
4464         static u1Byte           psd_cnt=0;
4465         static u4Byte           PSD_report[80], PSD_report_tmp;
4466         static u8Byte           lastTxOkCnt=0, lastRxOkCnt=0;
4467         u1Byte                  H2C_PSD_DATA[5]={0,0,0,0,0};
4468         static u1Byte           H2C_PSD_DATA_last[5] ={0,0,0,0,0};
4469         u1Byte                  idx[20]={96,99,102,106,109,112,115,118,122,125,
4470                                         0,3,6,10,13,16,19,22,26,29};
4471         u1Byte                  n, i, channel, BBReset,tone_idx;
4472         u1Byte                  PSD_bitmap[10], SSBT=0,initial_gain_psd=0, RSSI_BT=0, initialGainUpper;
4473         s4Byte                          PSD_skip_start, PSD_skip_stop;
4474         u4Byte                  CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel;
4475         u4Byte                  ReScan, Interval, Is40MHz;
4476         u8Byte                  curTxOkCnt, curRxOkCnt;
4477         int                             cur_byte_idx, cur_bit_idx;
4478         PADAPTER                Adapter = pDM_Odm->Adapter;
4479         PMGNT_INFO              pMgntInfo = &Adapter->MgntInfo;
4480
4481         if( (*(pDM_Odm->pbScanInProcess)) ||
4482                 pDM_Odm->bLinkInProcess)
4483         {
4484                 if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE))
4485                 {
4486                         ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 1500); //ms
4487                         //psd_cnt=0;
4488                 }
4489                 return;
4490         }
4491
4492         if(pDM_Odm->bBtHsOperation)
4493         {
4494                 ReScan = 1;
4495                 Interval = SCAN_INTERVAL;
4496         }
4497         else
4498         {
4499         ReScan = PSD_RESCAN;
4500         Interval = SCAN_INTERVAL;
4501         }
4502
4503         //1 Initialization
4504         if(init_memory == 0)
4505         {
4506                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Init memory\n"));
4507                 for(i = 0; i < 80; i++)
4508                         PSD_bitmap_memory[i] = 0xFF; // channel is always good
4509                 init_memory = 1;
4510         }
4511         if(psd_cnt == 0)
4512         {
4513                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n"));
4514                 for(i = 0; i < 80; i++)
4515                         PSD_report[i] = 0;
4516         }
4517
4518         //1 Backup Current Settings
4519         CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask);
4520 /*
4521         if(pDM_Odm->SupportICType==ODM_RTL8192D)
4522         {
4523                 //2 Record Current synthesizer parameters based on current channel
4524                 if((*pDM_Odm->MacPhyMode92D == SINGLEMAC_SINGLEPHY)||(*pDM_Odm->MacPhyMode92D == DUALMAC_SINGLEPHY))
4525                 {
4526                         SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x25, bMaskDWord);
4527                         SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x26, bMaskDWord);
4528                         SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x27, bMaskDWord);
4529                         SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2B, bMaskDWord);
4530                         SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_B, 0x2C, bMaskDWord);
4531         }
4532                 else     // DualMAC_DualPHY 2G
4533                 {
4534                         SYN_RF25 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x25, bMaskDWord);
4535                         SYN_RF26 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x26, bMaskDWord);
4536                         SYN_RF27 = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x27, bMaskDWord);
4537                         SYN_RF2B = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2B, bMaskDWord);
4538                         SYN_RF2C = ODM_GetRFReg(Adapter, ODM_RF_PATH_A, 0x2C, bMaskDWord);
4539                 }
4540         }
4541 */
4542         //RXIQI = PHY_QueryBBReg(Adapter, 0xC14, bMaskDWord);
4543         RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord);
4544
4545         //RxIdleLowPwr = (PHY_QueryBBReg(Adapter, 0x818, bMaskDWord)&BIT28)>>28;
4546         RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28;
4547
4548         //2???
4549         if(CHNL_RUN_ABOVE_40MHZ(pMgntInfo))
4550                 Is40MHz = TRUE;
4551         else
4552                 Is40MHz = FALSE;
4553
4554         ODM_RT_TRACE(pDM_Odm,   ODM_COMP_PSD, DBG_LOUD,("PSD Scan Start\n"));
4555         //1 Turn off CCK
4556         //PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT24, 0);
4557         ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0);
4558         //1 Turn off TX
4559         //Pause TX Queue
4560         //PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0xFF);
4561         ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0xFF);
4562
4563         //Force RX to stop TX immediately
4564         //PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13);
4565
4566         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13);
4567         //1 Turn off RX
4568         //Rx AGC off  RegC70[0]=0, RegC7C[20]=0
4569         //PHY_SetBBReg(Adapter, 0xC70, BIT0, 0);
4570         //PHY_SetBBReg(Adapter, 0xC7C, BIT20, 0);
4571
4572         ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0);
4573         ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0);
4574
4575
4576         //Turn off CCA
4577         //PHY_SetBBReg(Adapter, 0xC14, bMaskDWord, 0x0);
4578         ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0);
4579
4580         //BB Reset
4581         //BBReset = PlatformEFIORead1Byte(Adapter, 0x02);
4582         BBReset = ODM_Read1Byte(pDM_Odm, 0x02);
4583
4584         //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset&(~BIT0));
4585         //PlatformEFIOWrite1Byte(Adapter, 0x02, BBReset|BIT0);
4586         ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess
4587         ODM_Write1Byte(pDM_Odm,  0x02, BBReset&(~BIT0));
4588         ODM_Write1Byte(pDM_Odm,  0x02, BBReset|BIT0);
4589         ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0);
4590
4591         //1 Leave RX idle low power
4592         //PHY_SetBBReg(Adapter, 0x818, BIT28, 0x0);
4593
4594         ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0);
4595         //1 Fix initial gain
4596         //if (IS_HARDWARE_TYPE_8723AE(Adapter))
4597         //RSSI_BT = pHalData->RSSI_BT;
4598        //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter)))      // Add by Gary
4599        //    RSSI_BT = RSSI_BT_new;
4600
4601         if((pDM_Odm->SupportICType==ODM_RTL8723A)&(pDM_Odm->SupportInterface==ODM_ITRF_PCIE))
4602         RSSI_BT=pDM_Odm->RSSI_BT;               //need to check C2H to pDM_Odm RSSI BT
4603
4604         if(RSSI_BT>=47)
4605                 RSSI_BT=47;
4606
4607         ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT));
4608
4609         if(pDM_Odm->SupportICType==ODM_RTL8723A)
4610         {
4611                //Neil add--2011--10--12
4612                 //2 Initial Gain index
4613                 if(RSSI_BT >=35)   // >= -15dBm
4614                         initial_gain_psd = RSSI_BT*2;
4615                 else if((RSSI_BT >=33)&(RSSI_BT<35))
4616                         initial_gain_psd = RSSI_BT*2+6;
4617                 else if((RSSI_BT >=24)&(RSSI_BT<33))
4618                         initial_gain_psd = 70-(33-RSSI_BT);
4619                 else if((RSSI_BT >=19)&(RSSI_BT<24))
4620                         initial_gain_psd = 64-((24-RSSI_BT)*4);
4621                 else if((RSSI_BT >=14)&(RSSI_BT<19))
4622                         initial_gain_psd = 44-((18-RSSI_BT)*2);
4623                 else if((RSSI_BT >=8)&(RSSI_BT<14))
4624                         initial_gain_psd = 35-(14-RSSI_BT);
4625                 else
4626                         initial_gain_psd = 0x1B;
4627         }
4628         else
4629         {
4630
4631                 //need to do
4632                 initial_gain_psd = pDM_Odm->RSSI_Min;    // PSD report based on RSSI
4633                 //}
4634         }
4635         //if(RSSI_BT<0x17)
4636         //      RSSI_BT +=3;
4637         //DbgPrint("PSD: RSSI_BT= %d\n", RSSI_BT);
4638         ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT));
4639
4640         //initialGainUpper = 0x5E;  //Modify by neil chen
4641
4642         if(pDM_Odm->bUserAssignLevel)
4643         {
4644                 pDM_Odm->bUserAssignLevel = FALSE;
4645                 initialGainUpper = 0x7f;
4646         }
4647         else
4648         {
4649                 initialGainUpper = 0x5E;
4650         }
4651
4652         /*
4653         if (initial_gain_psd < 0x1a)
4654                 initial_gain_psd = 0x1a;
4655         if (initial_gain_psd > initialGainUpper)
4656                 initial_gain_psd = initialGainUpper;
4657         */
4658
4659         //if(pDM_Odm->SupportICType==ODM_RTL8723A)
4660         SSBT = RSSI_BT  * 2 +0x3E;
4661
4662
4663         //if(IS_HARDWARE_TYPE_8723AE(Adapter))
4664         //      SSBT = RSSI_BT  * 2 +0x3E;
4665         //else if((IS_HARDWARE_TYPE_8192C(Adapter))||(IS_HARDWARE_TYPE_8192D(Adapter)))   // Add by Gary
4666         //{
4667         //      RSSI_BT = initial_gain_psd;
4668         //      SSBT = RSSI_BT;
4669         //}
4670         ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT));
4671         ODM_RT_TRACE(   pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd));
4672         //DbgPrint("PSD: SSBT= %d", SSBT);
4673         //need to do
4674         //pMgntInfo->bDMInitialGainEnable = FALSE;
4675         pDM_Odm->bDMInitialGainEnable = FALSE;
4676         initial_gain =(u1Byte) (ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F);
4677
4678         // make sure the initial gain is under the correct range.
4679         //initial_gain_psd &= 0x7f;
4680         ODM_Write_DIG(pDM_Odm, initial_gain_psd);
4681         //1 Turn off 3-wire
4682         ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF);
4683
4684         //pts value = 128, 256, 512, 1024
4685         pts = 128;
4686
4687         if(pts == 128)
4688         {
4689                 ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0);
4690                 start_point = 64;
4691                 stop_point = 192;
4692         }
4693         else if(pts == 256)
4694         {
4695                 ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1);
4696                 start_point = 128;
4697                 stop_point = 384;
4698         }
4699         else if(pts == 512)
4700         {
4701                 ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2);
4702                 start_point = 256;
4703                 stop_point = 768;
4704         }
4705         else
4706         {
4707                 ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3);
4708                 start_point = 512;
4709                 stop_point = 1536;
4710         }
4711
4712
4713 //3 Skip WLAN channels if WLAN busy
4714
4715         curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt;
4716         curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt;
4717         lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast);
4718         lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast);
4719
4720         PSD_skip_start=80;
4721         PSD_skip_stop = 0;
4722         wlan_channel = CurrentChannel & 0x0f;
4723
4724         ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz));
4725         if(pDM_Odm->SupportICType==ODM_RTL8723A)
4726         {
4727                 if(pDM_Odm->bBtHsOperation)
4728                 {
4729                         if(pDM_Odm->bLinked)
4730                         {
4731                                 if(Is40MHz)
4732                                 {
4733                                         PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2;  // Modify by Neil to add 10 chs to mask
4734                                         PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4;
4735                                 }
4736                                 else
4737                                 {
4738                                         PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10;  // Modify by Neil to add 10 chs to mask
4739                                         PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18;
4740                                 }
4741                         }
4742                         else
4743                         {
4744                                 // mask for 40MHz
4745                                 PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2;  // Modify by Neil to add 10 chs to mask
4746                                 PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4;
4747                         }
4748                         if(PSD_skip_start < 0)
4749                                 PSD_skip_start = 0;
4750                         if(PSD_skip_stop >80)
4751                                 PSD_skip_stop = 80;
4752                 }
4753                 else
4754                 {
4755                         if((curRxOkCnt+curTxOkCnt) > 5)
4756                         {
4757                                 if(Is40MHz)
4758                                 {
4759                                         PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-2;  // Modify by Neil to add 10 chs to mask
4760                                         PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+4;
4761                                 }
4762                                 else
4763                                 {
4764                                         PSD_skip_start = ((wlan_channel-1)*5 -Is40MHz*10)-10;  // Modify by Neil to add 10 chs to mask
4765                                         PSD_skip_stop = (PSD_skip_start + (1+Is40MHz)*20)+18;
4766                                 }
4767
4768                                 if(PSD_skip_start < 0)
4769                                         PSD_skip_start = 0;
4770                                 if(PSD_skip_stop >80)
4771                                         PSD_skip_stop = 80;
4772                         }
4773                 }
4774         }
4775 #if 0
4776         else
4777         {
4778                 if((curRxOkCnt+curTxOkCnt) > 1000)
4779                 {
4780                         PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10;
4781                         PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20;
4782                 }
4783         }
4784 #endif  //Reove RXHP Issue
4785         ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop));
4786
4787         for (n=0;n<80;n++)
4788         {
4789                 if((n%20)==0)
4790                 {
4791                         channel = (n/20)*4 + 1;
4792
4793                                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel);
4794                                 }
4795                 tone_idx = n%20;
4796                 if ((n>=PSD_skip_start) && (n<PSD_skip_stop))
4797                 {
4798                         PSD_report[n] = SSBT;
4799                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD,DBG_LOUD,("PSD:Tone %d skipped \n", n));
4800                 }
4801                 else
4802                 {
4803                         PSD_report_tmp =  GetPSDData(pDM_Odm, idx[tone_idx], initial_gain_psd);
4804
4805                         if ( PSD_report_tmp > PSD_report[n])
4806                                 PSD_report[n] = PSD_report_tmp;
4807
4808                 }
4809         }
4810
4811         PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd);
4812
4813        //----end
4814         //1 Turn on RX
4815         //Rx AGC on
4816         ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1);
4817         ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1);
4818         //CCK on
4819         ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1);
4820         //1 Turn on TX
4821         //Resume TX Queue
4822
4823         ODM_Write1Byte(pDM_Odm,REG_TXPAUSE, 0x00);
4824         //Turn on 3-wire
4825         ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0);
4826         //1 Restore Current Settings
4827         //Resume DIG
4828         pDM_Odm->bDMInitialGainEnable = TRUE;
4829
4830         ODM_Write_DIG(pDM_Odm, initial_gain);
4831
4832         // restore originl center frequency
4833         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel);
4834
4835         //Turn on CCA
4836         ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI);
4837         //Restore RX idle low power
4838         if(RxIdleLowPwr == TRUE)
4839                 ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1);
4840
4841         psd_cnt++;
4842         ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt));
4843         if (psd_cnt < ReScan)
4844                 ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, Interval);
4845         else
4846         {
4847                 psd_cnt = 0;
4848                 for(i=0;i<80;i++)
4849                         //DbgPrint("psd_report[%d]=     %d \n", 2402+i, PSD_report[i]);
4850                         RT_TRACE(       COMP_PSD, DBG_LOUD,("psd_report[%d]=     %d \n", 2402+i, PSD_report[i]));
4851
4852
4853                 GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory);
4854
4855                 if(pDM_Odm->SupportICType==ODM_RTL8723A)
4856                 {
4857                         cur_byte_idx=0;
4858                         cur_bit_idx=0;
4859
4860                         //2 Restore H2C PSD Data to Last Data
4861                         H2C_PSD_DATA_last[0] = H2C_PSD_DATA[0];
4862                         H2C_PSD_DATA_last[1] = H2C_PSD_DATA[1];
4863                         H2C_PSD_DATA_last[2] = H2C_PSD_DATA[2];
4864                         H2C_PSD_DATA_last[3] = H2C_PSD_DATA[3];
4865                         H2C_PSD_DATA_last[4] = H2C_PSD_DATA[4];
4866
4867
4868                         //2 Translate 80bit channel map to 40bit channel
4869                         for ( i=0;i<5;i++)
4870                         {
4871                                 for(n=0;n<8;n++)
4872                                 {
4873                                         cur_byte_idx = i*2 + n/4;
4874                                         cur_bit_idx = (n%4)*2;
4875                                         if ( ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx)) != 0) && ((PSD_bitmap[cur_byte_idx]& BIT(cur_bit_idx+1)) != 0))
4876                                                 H2C_PSD_DATA[i] = H2C_PSD_DATA[i] | (u1Byte) (1 << n);
4877                                 }
4878                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("H2C_PSD_DATA[%d]=0x%x\n" ,i, H2C_PSD_DATA[i]));
4879                         }
4880
4881                         //3 To Compare the difference
4882                         for ( i=0;i<5;i++)
4883                         {
4884                                 if(H2C_PSD_DATA[i] !=H2C_PSD_DATA_last[i])
4885                                 {
4886                                         FillH2CCmd(Adapter, H2C_92C_PSD_RESULT, 5, H2C_PSD_DATA);
4887                                         ODM_RT_TRACE(pDM_Odm, ODM_COMP_PSD, DBG_LOUD,("Need to Update the AFH Map \n"));
4888                                         break;
4889                                 }
4890                                 else
4891                                 {
4892                                         if(i==5)
4893                                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Not need to Update\n"));
4894                                 }
4895                         }
4896                         if(pDM_Odm->bBtHsOperation)
4897                         {
4898                                 ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 10000);
4899                                 ODM_RT_TRACE(   pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n"));
4900                         }
4901                         else
4902                         {
4903                                 ODM_SetTimer(pDM_Odm, &pDM_Odm->PSDTimer, 1500);
4904                                 ODM_RT_TRACE(   pDM_Odm,ODM_COMP_PSD, DBG_LOUD,("Leave dm_PSD_Monitor\n"));
4905                 }
4906         }
4907     }
4908 }
4909 /*
4910 //Neil for Get BT RSSI
4911 // Be Triggered by BT C2H CMD
4912 VOID
4913 ODM_PSDGetRSSI(
4914         IN      u1Byte  RSSI_BT)
4915 {
4916
4917
4918 }
4919
4920 */
4921
4922 VOID
4923 ODM_PSDMonitor(
4924         IN      PDM_ODM_T       pDM_Odm
4925         )
4926 {
4927         //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
4928
4929         //if(IS_HARDWARE_TYPE_8723AE(Adapter))
4930
4931         if(pDM_Odm->SupportICType == ODM_RTL8723A)   //may need to add other IC type
4932         {
4933                 if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE)
4934                 {
4935                         if(!pDM_Odm->bBtEnabled) //need to check upper layer connection
4936                         {
4937                                 pDM_Odm->bPSDactive=FALSE;
4938                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor, return for BT is disabled!!!\n"));
4939                                 return;
4940                         }
4941
4942                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_PSD, DBG_LOUD, ("odm_PSDMonitor\n"));
4943                 //{
4944                         pDM_Odm->bPSDinProcess = TRUE;
4945                         pDM_Odm->bPSDactive=TRUE;
4946                         odm_PSD_Monitor(pDM_Odm);
4947                         pDM_Odm->bPSDinProcess = FALSE;
4948                 }
4949         }
4950
4951 }
4952 VOID
4953 odm_PSDMonitorCallback(
4954         PRT_TIMER               pTimer
4955 )
4956 {
4957         PADAPTER                Adapter = (PADAPTER)pTimer->Adapter;
4958        HAL_DATA_TYPE    *pHalData = GET_HAL_DATA(Adapter);
4959
4960         PlatformScheduleWorkItem(&pHalData->PSDMonitorWorkitem);
4961 }
4962
4963 VOID
4964 odm_PSDMonitorWorkItemCallback(
4965     IN PVOID            pContext
4966     )
4967 {
4968         PADAPTER        Adapter = (PADAPTER)pContext;
4969         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
4970         PDM_ODM_T               pDM_Odm = &pHalData->DM_OutSrc;
4971
4972         ODM_PSDMonitor(pDM_Odm);
4973 }
4974
4975 //Remove by Yuchen (seperate to odm_DIG.c)
4976
4977  //cosa debug tool need to modify
4978
4979 VOID
4980 ODM_PSDDbgControl(
4981         IN      PADAPTER        Adapter,
4982         IN      u4Byte          mode,
4983         IN      u4Byte          btRssi
4984         )
4985 {
4986 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
4987         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
4988         PDM_ODM_T               pDM_Odm = &pHalData->DM_OutSrc;
4989
4990         ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD, (" Monitor mode=%d, btRssi=%d\n", mode, btRssi));
4991         if(mode)
4992         {
4993                 pDM_Odm->RSSI_BT = (u1Byte)btRssi;
4994                 pDM_Odm->bUserAssignLevel = TRUE;
4995                 ODM_SetTimer( pDM_Odm, &pDM_Odm->PSDTimer, 0); //ms
4996         }
4997         else
4998         {
4999                 ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer);
5000         }
5001 #endif
5002 }
5003
5004
5005 //#if(DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE)
5006
5007 void    odm_RXHPInit(
5008         IN              PDM_ODM_T               pDM_Odm)
5009 {
5010 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)|(DEV_BUS_TYPE == RT_USB_INTERFACE)
5011         pRXHP_T                 pRX_HP_Table  = &pDM_Odm->DM_RXHP_Table;
5012         u1Byte                  index;
5013
5014         pRX_HP_Table->RXHP_enable = TRUE;
5015         pRX_HP_Table->RXHP_flag = 0;
5016         pRX_HP_Table->PSD_func_trigger = 0;
5017         pRX_HP_Table->Pre_IGI = 0x20;
5018         pRX_HP_Table->Cur_IGI = 0x20;
5019         pRX_HP_Table->Cur_pw_th = pw_th_10dB;
5020         pRX_HP_Table->Pre_pw_th = pw_th_10dB;
5021         for(index=0; index<80; index++)
5022                 pRX_HP_Table->PSD_bitmap_RXHP[index] = 1;
5023
5024 #if(DEV_BUS_TYPE == RT_USB_INTERFACE)
5025         pRX_HP_Table->TP_Mode = Idle_Mode;
5026 #endif
5027 #endif
5028 }
5029
5030 void odm_RXHP(
5031         IN              PDM_ODM_T               pDM_Odm)
5032 {
5033 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN))
5034 #if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE)
5035         PADAPTER        Adapter =  pDM_Odm->Adapter;
5036         PMGNT_INFO      pMgntInfo = &(Adapter->MgntInfo);
5037         pDIG_T          pDM_DigTable = &pDM_Odm->DM_DigTable;
5038         pRXHP_T         pRX_HP_Table  = &pDM_Odm->DM_RXHP_Table;
5039        PFALSE_ALARM_STATISTICS          FalseAlmCnt = &(pDM_Odm->FalseAlmCnt);
5040
5041         u1Byte                  i, j, sum;
5042         u1Byte                  Is40MHz;
5043         s1Byte                  Intf_diff_idx, MIN_Intf_diff_idx = 16;
5044        s4Byte                   cur_channel;
5045        u1Byte                   ch_map_intf_5M[17] = {0};
5046        static u4Byte            FA_TH = 0;
5047         static u1Byte           psd_intf_flag = 0;
5048         static s4Byte           curRssi = 0;
5049        static s4Byte            preRssi = 0;
5050         static u1Byte           PSDTriggerCnt = 1;
5051
5052         u1Byte                  RX_HP_enable = (u1Byte)(ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, bMaskDWord)>>31);   // for debug!!
5053
5054 #if(DEV_BUS_TYPE == RT_USB_INTERFACE)
5055         static s8Byte           lastTxOkCnt = 0, lastRxOkCnt = 0;
5056        s8Byte                   curTxOkCnt, curRxOkCnt;
5057         s8Byte                  curTPOkCnt;
5058         s8Byte                  TP_Acc3, TP_Acc5;
5059         static s8Byte           TP_Buff[5] = {0};
5060         static u1Byte           pre_state = 0, pre_state_flag = 0;
5061         static u1Byte           Intf_HighTP_flag = 0, De_counter = 16;
5062         static u1Byte           TP_Degrade_flag = 0;
5063 #endif
5064         static u1Byte           LatchCnt = 0;
5065
5066         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8188E))
5067                 return;
5068         //AGC RX High Power Mode is only applied on 2G band in 92D!!!
5069         if(pDM_Odm->SupportICType == ODM_RTL8192D)
5070         {
5071                 if(*(pDM_Odm->pBandType) != ODM_BAND_2_4G)
5072                         return;
5073         }
5074
5075         if(!(pDM_Odm->SupportAbility==ODM_BB_RXHP))
5076                 return;
5077
5078
5079         //RX HP ON/OFF
5080         if(RX_HP_enable == 1)
5081                 pRX_HP_Table->RXHP_enable = FALSE;
5082         else
5083                 pRX_HP_Table->RXHP_enable = TRUE;
5084
5085         if(pRX_HP_Table->RXHP_enable == FALSE)
5086         {
5087                 if(pRX_HP_Table->RXHP_flag == 1)
5088                 {
5089                         pRX_HP_Table->RXHP_flag = 0;
5090                         psd_intf_flag = 0;
5091                 }
5092                 return;
5093         }
5094
5095 #if(DEV_BUS_TYPE == RT_USB_INTERFACE)
5096         //2 Record current TP for USB interface
5097         curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast)-lastTxOkCnt;
5098         curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast)-lastRxOkCnt;
5099         lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast);
5100         lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast);
5101
5102         curTPOkCnt = curTxOkCnt+curRxOkCnt;
5103         TP_Buff[0] = curTPOkCnt;    // current TP
5104         TP_Acc3 = PlatformDivision64((TP_Buff[1]+TP_Buff[2]+TP_Buff[3]), 3);
5105         TP_Acc5 = PlatformDivision64((TP_Buff[0]+TP_Buff[1]+TP_Buff[2]+TP_Buff[3]+TP_Buff[4]), 5);
5106
5107         if(TP_Acc5 < 1000)
5108                 pRX_HP_Table->TP_Mode = Idle_Mode;
5109         else if((1000 < TP_Acc5)&&(TP_Acc5 < 3750000))
5110                 pRX_HP_Table->TP_Mode = Low_TP_Mode;
5111         else
5112                 pRX_HP_Table->TP_Mode = High_TP_Mode;
5113
5114         ODM_RT_TRACE(pDM_Odm,   ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP TP Mode = %d\n", pRX_HP_Table->TP_Mode));
5115         // Since TP result would be sampled every 2 sec, it needs to delay 4sec to wait PSD processing.
5116         // When LatchCnt = 0, we would Get PSD result.
5117         if(TP_Degrade_flag == 1)
5118         {
5119                 LatchCnt--;
5120                 if(LatchCnt == 0)
5121                 {
5122                         TP_Degrade_flag = 0;
5123                 }
5124         }
5125         // When PSD function triggered by TP degrade 20%, and Interference Flag = 1
5126         // Set a De_counter to wait IGI = upper bound. If time is UP, the Interference flag will be pull down.
5127         if(Intf_HighTP_flag == 1)
5128         {
5129                 De_counter--;
5130                 if(De_counter == 0)
5131                 {
5132                         Intf_HighTP_flag = 0;
5133                         psd_intf_flag = 0;
5134                 }
5135         }
5136 #endif
5137
5138         //2 AGC RX High Power Mode by PSD only applied to STA Mode
5139         //3 NOT applied 1. Ad Hoc Mode.
5140         //3 NOT applied 2. AP Mode
5141         if ((pMgntInfo->mAssoc) && (!pMgntInfo->mIbss) && (!ACTING_AS_AP(Adapter)))
5142         {
5143                 Is40MHz = *(pDM_Odm->pBandWidth);
5144                 curRssi = pDM_Odm->RSSI_Min;
5145                 cur_channel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x0fff) & 0x0f;
5146                 ODM_RT_TRACE(pDM_Odm,   ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP RX HP flag = %d\n", pRX_HP_Table->RXHP_flag));
5147                 ODM_RT_TRACE(pDM_Odm,   ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP FA = %d\n", FalseAlmCnt->Cnt_all));
5148                 ODM_RT_TRACE(pDM_Odm,   ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP cur RSSI = %d, pre RSSI=%d\n", curRssi, preRssi));
5149                 ODM_RT_TRACE(pDM_Odm,   ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP current CH = %d\n", cur_channel));
5150                 ODM_RT_TRACE(pDM_Odm,   ODM_COMP_RXHP, ODM_DBG_LOUD, ("RXHP Is 40MHz = %d\n", Is40MHz));
5151         //2 PSD function would be triggered
5152         //3 1. Every 4 sec for PCIE
5153         //3 2. Before TP Mode (Idle TP<4kbps) for USB
5154         //3 3. After TP Mode (High TP) for USB
5155                 if((curRssi > 68) && (pRX_HP_Table->RXHP_flag == 0))    // Only RSSI>TH and RX_HP_flag=0 will Do PSD process
5156                 {
5157 #if (DEV_BUS_TYPE == RT_USB_INTERFACE)
5158                         //2 Before TP Mode ==> PSD would be trigger every 4 sec
5159                         if(pRX_HP_Table->TP_Mode == Idle_Mode)          //2.1 less wlan traffic <4kbps
5160                         {
5161 #endif
5162                                 if(PSDTriggerCnt == 1)
5163                                 {
5164                                         odm_PSD_RXHP(pDM_Odm);
5165                                         pRX_HP_Table->PSD_func_trigger = 1;
5166                                         PSDTriggerCnt = 0;
5167                                 }
5168                                 else
5169                                 {
5170                                         PSDTriggerCnt++;
5171                                 }
5172 #if(DEV_BUS_TYPE == RT_USB_INTERFACE)
5173                         }
5174                         //2 After TP Mode ==> Check if TP degrade larger than 20% would trigger PSD function
5175                         if(pRX_HP_Table->TP_Mode == High_TP_Mode)
5176                         {
5177                                 if((pre_state_flag == 0)&&(LatchCnt == 0))
5178                                 {
5179                                         // TP var < 5%
5180                                         if((((curTPOkCnt-TP_Acc3)*20)<(TP_Acc3))&&(((curTPOkCnt-TP_Acc3)*20)>(-TP_Acc3)))
5181                                         {
5182                                                 pre_state++;
5183                                                 if(pre_state == 3)      // hit pre_state condition => consecutive 3 times
5184                                                 {
5185                                                         pre_state_flag = 1;
5186                                                         pre_state = 0;
5187                                                 }
5188
5189                                         }
5190                                         else
5191                                         {
5192                                                 pre_state = 0;
5193                                         }
5194                                 }
5195                                 //3 If pre_state_flag=1 ==> start to monitor TP degrade 20%
5196                                 if(pre_state_flag == 1)
5197                                 {
5198                                         if(((TP_Acc3-curTPOkCnt)*5)>(TP_Acc3))      // degrade 20%
5199                                         {
5200                                                 odm_PSD_RXHP(pDM_Odm);
5201                                                 pRX_HP_Table->PSD_func_trigger = 1;
5202                                                 TP_Degrade_flag = 1;
5203                                                 LatchCnt = 2;
5204                                                 pre_state_flag = 0;
5205                                         }
5206                                         else if(((TP_Buff[2]-curTPOkCnt)*5)>TP_Buff[2])
5207                                         {
5208                                                 odm_PSD_RXHP(pDM_Odm);
5209                                                 pRX_HP_Table->PSD_func_trigger = 1;
5210                                                 TP_Degrade_flag = 1;
5211                                                 LatchCnt = 2;
5212                                                 pre_state_flag = 0;
5213                                         }
5214                                         else if(((TP_Buff[3]-curTPOkCnt)*5)>TP_Buff[3])
5215                                         {
5216                                                 odm_PSD_RXHP(pDM_Odm);
5217                                                 pRX_HP_Table->PSD_func_trigger = 1;
5218                                                 TP_Degrade_flag = 1;
5219                                                 LatchCnt = 2;
5220                                                 pre_state_flag = 0;
5221                                         }
5222                                 }
5223                         }
5224 #endif
5225 }
5226
5227 #if (DEV_BUS_TYPE == RT_USB_INTERFACE)
5228                 for (i=0;i<4;i++)
5229                 {
5230                         TP_Buff[4-i] = TP_Buff[3-i];
5231                 }
5232 #endif
5233                 //2 Update PSD bitmap according to PSD report
5234                 if((pRX_HP_Table->PSD_func_trigger == 1)&&(LatchCnt == 0))
5235                 {
5236                         //2 Separate 80M bandwidth into 16 group with smaller 5M BW.
5237                         for (i = 0 ; i < 16 ; i++)
5238                         {
5239                                 sum = 0;
5240                                 for(j = 0; j < 5 ; j++)
5241                                         sum += pRX_HP_Table->PSD_bitmap_RXHP[5*i + j];
5242
5243                                 if(sum < 5)
5244                                 {
5245                                         ch_map_intf_5M[i] = 1;  // interference flag
5246                                 }
5247                         }
5248                         //=============just for debug=========================
5249                         //for(i=0;i<16;i++)
5250                                 //DbgPrint("RX HP: ch_map_intf_5M[%d] = %d\n", i, ch_map_intf_5M[i]);
5251                         //===============================================
5252                         //2 Mask target channel 5M index
5253                         for(i = 0; i < (4+4*Is40MHz) ; i++)
5254                         {
5255                                 ch_map_intf_5M[cur_channel - (1+2*Is40MHz) + i] = 0;
5256                         }
5257
5258                         psd_intf_flag = 0;
5259                         for(i = 0; i < 16; i++)
5260                         {
5261                                 if(ch_map_intf_5M[i] == 1)
5262                         {
5263                                 psd_intf_flag = 1;            // interference is detected!!!
5264                                 break;
5265                                 }
5266                         }
5267
5268 #if (DEV_BUS_TYPE == RT_USB_INTERFACE)
5269                         if(pRX_HP_Table->TP_Mode!=Idle_Mode)
5270                         {
5271                                 if(psd_intf_flag == 1)     // to avoid psd_intf_flag always 1
5272                                 {
5273                                         Intf_HighTP_flag = 1;
5274                                         De_counter = 32;     // 0x1E -> 0x3E needs 32 times by each IGI step =1
5275                                 }
5276                         }
5277 #endif
5278                         ODM_RT_TRACE(pDM_Odm,   ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP psd_intf_flag = %d\n", psd_intf_flag));
5279                         //2 Distance between target channel and interference
5280                         for(i = 0; i < 16; i++)
5281                         {
5282                                 if(ch_map_intf_5M[i] == 1)
5283                                 {
5284                                         Intf_diff_idx = ((cur_channel+Is40MHz-(i+1))>0) ? (s1Byte)(cur_channel-2*Is40MHz-(i-2)) : (s1Byte)((i+1)-(cur_channel+2*Is40MHz));
5285                                 if(Intf_diff_idx < MIN_Intf_diff_idx)
5286                                                 MIN_Intf_diff_idx = Intf_diff_idx;    // the min difference index between interference and target
5287                                 }
5288                         }
5289                         ODM_RT_TRACE(pDM_Odm,   ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP MIN_Intf_diff_idx = %d\n", MIN_Intf_diff_idx));
5290                         //2 Choose False Alarm Threshold
5291                         switch (MIN_Intf_diff_idx){
5292                                 case 0:
5293                                 case 1:
5294                                 case 2:
5295                                 case 3:
5296                                         FA_TH = FA_RXHP_TH1;
5297                                 break;
5298                                 case 4:                         // CH5
5299                                 case 5:                         // CH6
5300                                         FA_TH = FA_RXHP_TH2;
5301                                 break;
5302                                 case 6:                         // CH7
5303                                 case 7:                         // CH8
5304                                         FA_TH = FA_RXHP_TH3;
5305                                         break;
5306                         case 8:                         // CH9
5307                                 case 9:                         //CH10
5308                                         FA_TH = FA_RXHP_TH4;
5309                                         break;
5310                                 case 10:
5311                                 case 11:
5312                                 case 12:
5313                                 case 13:
5314                                 case 14:
5315                                 case 15:
5316                                         FA_TH = FA_RXHP_TH5;
5317                                         break;
5318                 }
5319                         ODM_RT_TRACE(pDM_Odm,   ODM_COMP_RXHP, ODM_DBG_LOUD, ("RX HP FA_TH = %d\n", FA_TH));
5320                         pRX_HP_Table->PSD_func_trigger = 0;
5321                 }
5322                 //1 Monitor RSSI variation to choose the suitable IGI or Exit AGC RX High Power Mode
5323                 if(pRX_HP_Table->RXHP_flag == 1)
5324                 {
5325                 if ((curRssi > 80)&&(preRssi < 80))
5326                 {
5327                                 pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1;
5328                 }
5329                 else if ((curRssi < 80)&&(preRssi > 80))
5330                 {
5331                                 pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2;
5332                         }
5333                 else if ((curRssi > 72)&&(preRssi < 72))
5334                         {
5335                                 pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2;
5336                 }
5337                 else if ((curRssi < 72)&&( preRssi > 72))
5338                         {
5339                                 pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3;
5340                 }
5341                 else if (curRssi < 68)           //RSSI is NOT large enough!!==> Exit AGC RX High Power Mode
5342                 {
5343                                 pRX_HP_Table->Cur_pw_th = pw_th_10dB;
5344                                 pRX_HP_Table->RXHP_flag = 0;    // Back to Normal DIG Mode
5345                                 psd_intf_flag = 0;
5346                         }
5347                 }
5348                 else    // pRX_HP_Table->RXHP_flag == 0
5349                 {
5350                         //1 Decide whether to enter AGC RX High Power Mode
5351                         if ((curRssi > 70) && (psd_intf_flag == 1) && (FalseAlmCnt->Cnt_all > FA_TH) &&
5352                                 (pDM_DigTable->CurIGValue == pDM_DigTable->rx_gain_range_max))
5353                         {
5354                                 if (curRssi > 80)
5355                                 {
5356                                         pRX_HP_Table->Cur_IGI = LNA_Low_Gain_1;
5357                                 }
5358                                 else if (curRssi > 72)
5359                         {
5360                                 pRX_HP_Table->Cur_IGI = LNA_Low_Gain_2;
5361                                 }
5362                                 else
5363                                 {
5364                                         pRX_HP_Table->Cur_IGI = LNA_Low_Gain_3;
5365                                 }
5366                                 pRX_HP_Table->Cur_pw_th = pw_th_16dB;           //RegC54[9:8]=2'b11: to enter AGC Flow 3
5367                                 pRX_HP_Table->First_time_enter = TRUE;
5368                                 pRX_HP_Table->RXHP_flag = 1;    //      RXHP_flag=1: AGC RX High Power Mode, RXHP_flag=0: Normal DIG Mode
5369                         }
5370                 }
5371                 preRssi = curRssi;
5372                 odm_Write_RXHP(pDM_Odm);
5373         }
5374 #endif //#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN))
5375 #endif //#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) | (DEV_BUS_TYPE == RT_USB_INTERFACE)
5376 }
5377
5378 void odm_Write_RXHP(
5379         IN      PDM_ODM_T       pDM_Odm)
5380 {
5381         pRXHP_T         pRX_HP_Table = &pDM_Odm->DM_RXHP_Table;
5382         u4Byte          currentIGI;
5383
5384         if(pRX_HP_Table->Cur_IGI != pRX_HP_Table->Pre_IGI)
5385         {
5386                 ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI);
5387                 ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI);
5388         }
5389
5390         if(pRX_HP_Table->Cur_pw_th != pRX_HP_Table->Pre_pw_th)
5391 {
5392                 ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore2, BIT8|BIT9, pRX_HP_Table->Cur_pw_th);  // RegC54[9:8]=2'b11:  AGC Flow 3
5393         }
5394
5395         if(pRX_HP_Table->RXHP_flag == 0)
5396         {
5397                 pRX_HP_Table->Cur_IGI = 0x20;
5398         }
5399         else
5400         {
5401                 currentIGI = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0);
5402                 if(currentIGI<0x50)
5403                 {
5404                         ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI);
5405                         ODM_SetBBReg(pDM_Odm, rOFDM0_XBAGCCore1, bMaskByte0, pRX_HP_Table->Cur_IGI);
5406                 }
5407         }
5408         pRX_HP_Table->Pre_IGI = pRX_HP_Table->Cur_IGI;
5409         pRX_HP_Table->Pre_pw_th = pRX_HP_Table->Cur_pw_th;
5410
5411 }
5412
5413 VOID
5414 odm_PSD_RXHP(
5415         IN      PDM_ODM_T       pDM_Odm
5416 )
5417 {
5418         pRXHP_T                 pRX_HP_Table  = &pDM_Odm->DM_RXHP_Table;
5419         PADAPTER                Adapter =  pDM_Odm->Adapter;
5420         PMGNT_INFO              pMgntInfo = &(Adapter->MgntInfo);
5421         unsigned int            pts, start_point, stop_point, initial_gain ;
5422         static u1Byte           PSD_bitmap_memory[80], init_memory = 0;
5423         static u1Byte           psd_cnt=0;
5424         static u4Byte           PSD_report[80], PSD_report_tmp;
5425         static u8Byte           lastTxOkCnt=0, lastRxOkCnt=0;
5426         u1Byte                  idx[20]={96,99,102,106,109,112,115,118,122,125,
5427                                         0,3,6,10,13,16,19,22,26,29};
5428         u1Byte                  n, i, channel, BBReset,tone_idx;
5429         u1Byte                  PSD_bitmap[10]/*, SSBT=0*/,initial_gain_psd=0, RSSI_BT=0, initialGainUpper;
5430         s4Byte                          PSD_skip_start, PSD_skip_stop;
5431         u4Byte                  CurrentChannel, RXIQI, RxIdleLowPwr, wlan_channel;
5432         u4Byte                  ReScan, Interval, Is40MHz;
5433         u8Byte                  curTxOkCnt, curRxOkCnt;
5434         //--------------2G band synthesizer for 92D switch RF channel using-----------------
5435         u1Byte                  group_idx=0;
5436         u4Byte                  SYN_RF25=0, SYN_RF26=0, SYN_RF27=0, SYN_RF2B=0, SYN_RF2C=0;
5437         u4Byte                  SYN[5] = {0x25, 0x26, 0x27, 0x2B, 0x2C};    // synthesizer RF register for 2G channel
5438         u4Byte                  SYN_group[3][5] = {{0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840},     // For CH1,2,4,9,10.11.12   {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840}
5439                                                                             {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840},     // For CH3,13,14
5440                                                                             {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}};   // For Ch5,6,7,8
5441        //--------------------- Add by Gary for Debug setting ----------------------
5442         u1Byte                 RSSI_BT_new = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB9C, 0xFF);
5443        u1Byte                 rssi_ctrl = (u1Byte) ODM_GetBBReg(pDM_Odm, 0xB38, 0xFF);
5444        //---------------------------------------------------------------------
5445
5446         if(pMgntInfo->bScanInProgress)
5447         {
5448                 return;
5449         }
5450
5451         ReScan = PSD_RESCAN;
5452         Interval = SCAN_INTERVAL;
5453
5454
5455         //1 Initialization
5456         if(init_memory == 0)
5457         {
5458                 RT_TRACE(       COMP_PSD, DBG_LOUD,("Init memory\n"));
5459                 for(i = 0; i < 80; i++)
5460                         PSD_bitmap_memory[i] = 0xFF; // channel is always good
5461                 init_memory = 1;
5462         }
5463         if(psd_cnt == 0)
5464         {
5465                 RT_TRACE(COMP_PSD, DBG_LOUD,("Enter dm_PSD_Monitor\n"));
5466                 for(i = 0; i < 80; i++)
5467                         PSD_report[i] = 0;
5468         }
5469
5470         //1 Backup Current Settings
5471         CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask);
5472         if(pDM_Odm->SupportICType == ODM_RTL8192D)
5473         {
5474                 //2 Record Current synthesizer parameters based on current channel
5475                 if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP))
5476                 {
5477                         SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord);
5478                         SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord);
5479                         SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord);
5480                         SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord);
5481                         SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord);
5482         }
5483                 else     // DualMAC_DualPHY 2G
5484                 {
5485                         SYN_RF25 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord);
5486                         SYN_RF26 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord);
5487                         SYN_RF27 = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord);
5488                         SYN_RF2B = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord);
5489                         SYN_RF2C = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord);
5490                 }
5491         }
5492         RXIQI = ODM_GetBBReg(pDM_Odm, 0xC14, bMaskDWord);
5493         RxIdleLowPwr = (ODM_GetBBReg(pDM_Odm, 0x818, bMaskDWord)&BIT28)>>28;
5494         Is40MHz = *(pDM_Odm->pBandWidth);
5495         ODM_RT_TRACE(pDM_Odm,   COMP_PSD, DBG_LOUD,("PSD Scan Start\n"));
5496         //1 Turn off CCK
5497         ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0);
5498         //1 Turn off TX
5499         //Pause TX Queue
5500         ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF);
5501         //Force RX to stop TX immediately
5502         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_AC, bRFRegOffsetMask, 0x32E13);
5503         //1 Turn off RX
5504         //Rx AGC off  RegC70[0]=0, RegC7C[20]=0
5505         ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 0);
5506         ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 0);
5507         //Turn off CCA
5508         ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0);
5509         //BB Reset
5510         ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 1); //clock gated to prevent from AGC table mess
5511         BBReset = ODM_Read1Byte(pDM_Odm, 0x02);
5512         ODM_Write1Byte(pDM_Odm, 0x02, BBReset&(~BIT0));
5513         ODM_Write1Byte(pDM_Odm, 0x02, BBReset|BIT0);
5514         ODM_SetBBReg(pDM_Odm, 0x87C, BIT31, 0);
5515         //1 Leave RX idle low power
5516         ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0);
5517         //1 Fix initial gain
5518         RSSI_BT = RSSI_BT_new;
5519         RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT));
5520
5521         if(rssi_ctrl == 1)        // just for debug!!
5522                 initial_gain_psd = RSSI_BT_new;
5523         else
5524                 initial_gain_psd = pDM_Odm->RSSI_Min;    // PSD report based on RSSI
5525
5526         RT_TRACE(COMP_PSD, DBG_LOUD,("PSD: RSSI_BT= %d\n", RSSI_BT));
5527
5528         initialGainUpper = 0x54;
5529
5530         RSSI_BT = initial_gain_psd;
5531         //SSBT = RSSI_BT;
5532
5533         //RT_TRACE(     COMP_PSD, DBG_LOUD,("PSD: SSBT= %d\n", SSBT));
5534         RT_TRACE(       COMP_PSD, DBG_LOUD,("PSD: initial gain= 0x%x\n", initial_gain_psd));
5535
5536         pDM_Odm->bDMInitialGainEnable = FALSE;
5537         initial_gain = ODM_GetBBReg(pDM_Odm, 0xc50, bMaskDWord) & 0x7F;
5538         //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain_psd);
5539         ODM_Write_DIG(pDM_Odm, initial_gain_psd);
5540         //1 Turn off 3-wire
5541         ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0xF);
5542
5543         //pts value = 128, 256, 512, 1024
5544         pts = 128;
5545
5546         if(pts == 128)
5547         {
5548                 ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0);
5549                 start_point = 64;
5550                 stop_point = 192;
5551         }
5552         else if(pts == 256)
5553         {
5554                 ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x1);
5555                 start_point = 128;
5556                 stop_point = 384;
5557         }
5558         else if(pts == 512)
5559         {
5560                 ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x2);
5561                 start_point = 256;
5562                 stop_point = 768;
5563         }
5564         else
5565         {
5566                 ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x3);
5567                 start_point = 512;
5568                 stop_point = 1536;
5569         }
5570
5571
5572 //3 Skip WLAN channels if WLAN busy
5573         curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - lastTxOkCnt;
5574         curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - lastRxOkCnt;
5575         lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast);
5576         lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast);
5577
5578         PSD_skip_start=80;
5579         PSD_skip_stop = 0;
5580         wlan_channel = CurrentChannel & 0x0f;
5581
5582         RT_TRACE(COMP_PSD,DBG_LOUD,("PSD: current channel: %x, BW:%d \n", wlan_channel, Is40MHz));
5583
5584         if((curRxOkCnt+curTxOkCnt) > 1000)
5585         {
5586                 PSD_skip_start = (wlan_channel-1)*5 -Is40MHz*10;
5587                 PSD_skip_stop = PSD_skip_start + (1+Is40MHz)*20;
5588         }
5589
5590         RT_TRACE(COMP_PSD,DBG_LOUD,("PSD: Skip tone from %d to %d \n", PSD_skip_start, PSD_skip_stop));
5591
5592         for (n=0;n<80;n++)
5593         {
5594                 if((n%20)==0)
5595                 {
5596                         channel = (n/20)*4 + 1;
5597                         if(pDM_Odm->SupportICType == ODM_RTL8192D)
5598                         {
5599                                 switch(channel)
5600                                 {
5601                                         case 1:
5602                                         case 9:
5603                                                 group_idx = 0;
5604                                                 break;
5605                                         case 5:
5606                                                 group_idx = 2;
5607                                                 break;
5608                                         case 13:
5609                                                 group_idx = 1;
5610                                                 break;
5611                                 }
5612                                 if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP))
5613                 {
5614                                         for(i = 0; i < SYN_Length; i++)
5615                                                 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, SYN[i], bMaskDWord, SYN_group[group_idx][i]);
5616
5617                                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel);
5618                                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, 0x3FF, channel);
5619                                 }
5620                                 else  // DualMAC_DualPHY 2G
5621                         {
5622                                         for(i = 0; i < SYN_Length; i++)
5623                                                 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, SYN[i], bMaskDWord, SYN_group[group_idx][i]);
5624
5625                                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel);
5626                                 }
5627                         }
5628                         else
5629                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x3FF, channel);
5630                         }
5631                 tone_idx = n%20;
5632                 if ((n>=PSD_skip_start) && (n<PSD_skip_stop))
5633                 {
5634                         PSD_report[n] = initial_gain_psd;//SSBT;
5635                         ODM_RT_TRACE(pDM_Odm,COMP_PSD,DBG_LOUD,("PSD:Tone %d skipped \n", n));
5636                 }
5637                 else
5638                 {
5639                         PSD_report_tmp =  GetPSDData(pDM_Odm, idx[tone_idx], initial_gain_psd);
5640
5641                         if ( PSD_report_tmp > PSD_report[n])
5642                                 PSD_report[n] = PSD_report_tmp;
5643
5644                 }
5645         }
5646
5647         PatchDCTone(pDM_Odm, PSD_report, initial_gain_psd);
5648
5649        //----end
5650         //1 Turn on RX
5651         //Rx AGC on
5652         ODM_SetBBReg(pDM_Odm, 0xC70, BIT0, 1);
5653         ODM_SetBBReg(pDM_Odm, 0xC7C, BIT20, 1);
5654         //CCK on
5655         ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1);
5656         //1 Turn on TX
5657         //Resume TX Queue
5658         ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x00);
5659         //Turn on 3-wire
5660         ODM_SetBBReg(pDM_Odm, 0x88c, BIT20|BIT21|BIT22|BIT23, 0x0);
5661         //1 Restore Current Settings
5662         //Resume DIG
5663         pDM_Odm->bDMInitialGainEnable= TRUE;
5664         //ODM_SetBBReg(pDM_Odm, 0xc50, 0x7F, initial_gain);
5665         ODM_Write_DIG(pDM_Odm,(u1Byte) initial_gain);
5666         // restore originl center frequency
5667         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel);
5668         if(pDM_Odm->SupportICType == ODM_RTL8192D)
5669         {
5670                 if((*(pDM_Odm->pMacPhyMode)==ODM_SMSP)||(*(pDM_Odm->pMacPhyMode)==ODM_DMSP))
5671                 {
5672                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, RF_CHNLBW, bMaskDWord, CurrentChannel);
5673                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x25, bMaskDWord, SYN_RF25);
5674                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x26, bMaskDWord, SYN_RF26);
5675                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x27, bMaskDWord, SYN_RF27);
5676                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2B, bMaskDWord, SYN_RF2B);
5677                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_B, 0x2C, bMaskDWord, SYN_RF2C);
5678                 }
5679                 else     // DualMAC_DualPHY
5680                 {
5681                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x25, bMaskDWord, SYN_RF25);
5682                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x26, bMaskDWord, SYN_RF26);
5683                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x27, bMaskDWord, SYN_RF27);
5684                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2B, bMaskDWord, SYN_RF2B);
5685                         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2C, bMaskDWord, SYN_RF2C);
5686                 }
5687         }
5688         //Turn on CCA
5689         ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, RXIQI);
5690         //Restore RX idle low power
5691         if(RxIdleLowPwr == TRUE)
5692                 ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 1);
5693
5694         psd_cnt++;
5695         //gPrint("psd cnt=%d\n", psd_cnt);
5696         ODM_RT_TRACE(pDM_Odm,COMP_PSD, DBG_LOUD,("PSD:psd_cnt = %d \n",psd_cnt));
5697         if (psd_cnt < ReScan)
5698         {
5699                 ODM_SetTimer(pDM_Odm, &pRX_HP_Table->PSDTimer, Interval);  //ms
5700         }
5701         else
5702                         {
5703                 psd_cnt = 0;
5704                 for(i=0;i<80;i++)
5705                         RT_TRACE(       COMP_PSD, DBG_LOUD,("psd_report[%d]=     %d \n", 2402+i, PSD_report[i]));
5706                         //DbgPrint("psd_report[%d]=     %d \n", 2402+i, PSD_report[i]);
5707
5708                 GoodChannelDecision(pDM_Odm, PSD_report, PSD_bitmap,RSSI_BT, PSD_bitmap_memory);
5709
5710                         }
5711                 }
5712
5713 VOID
5714 odm_PSD_RXHPCallback(
5715         PRT_TIMER               pTimer
5716 )
5717 {
5718         PADAPTER                Adapter = (PADAPTER)pTimer->Adapter;
5719         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
5720         PDM_ODM_T               pDM_Odm = &pHalData->DM_OutSrc;
5721         pRXHP_T                 pRX_HP_Table  = &pDM_Odm->DM_RXHP_Table;
5722
5723 #if DEV_BUS_TYPE==RT_PCI_INTERFACE
5724         #if USE_WORKITEM
5725         ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem);
5726         #else
5727         odm_PSD_RXHP(pDM_Odm);
5728         #endif
5729 #else
5730         ODM_ScheduleWorkItem(&pRX_HP_Table->PSDTimeWorkitem);
5731 #endif
5732
5733         }
5734
5735 VOID
5736 odm_PSD_RXHPWorkitemCallback(
5737     IN PVOID            pContext
5738     )
5739 {
5740         PADAPTER        pAdapter = (PADAPTER)pContext;
5741         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
5742         PDM_ODM_T               pDM_Odm = &pHalData->DM_OutSrc;
5743
5744         odm_PSD_RXHP(pDM_Odm);
5745 }
5746
5747 #endif //#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
5748
5749 //Remove PathDiversity related function to odm_PathDiv.c
5750
5751 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))
5752
5753 VOID
5754 odm_PHY_SaveAFERegisters(
5755         IN      PDM_ODM_T       pDM_Odm,
5756         IN      pu4Byte         AFEReg,
5757         IN      pu4Byte         AFEBackup,
5758         IN      u4Byte          RegisterNum
5759         )
5760 {
5761         u4Byte  i;
5762
5763         //RT_DISP(FINIT, INIT_IQK, ("Save ADDA parameters.\n"));
5764         for( i = 0 ; i < RegisterNum ; i++){
5765                 AFEBackup[i] = ODM_GetBBReg(pDM_Odm, AFEReg[i], bMaskDWord);
5766         }
5767 }
5768
5769 VOID
5770 odm_PHY_ReloadAFERegisters(
5771         IN      PDM_ODM_T       pDM_Odm,
5772         IN      pu4Byte         AFEReg,
5773         IN      pu4Byte         AFEBackup,
5774         IN      u4Byte          RegiesterNum
5775         )
5776 {
5777         u4Byte  i;
5778
5779         //RT_DISP(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n"));
5780         for(i = 0 ; i < RegiesterNum; i++)
5781         {
5782
5783                 ODM_SetBBReg(pDM_Odm, AFEReg[i], bMaskDWord, AFEBackup[i]);
5784         }
5785 }
5786
5787 //
5788 // Description:
5789 //      Set Single/Dual Antenna default setting for products that do not do detection in advance.
5790 //
5791 // Added by Joseph, 2012.03.22
5792 //
5793 VOID
5794 ODM_SingleDualAntennaDefaultSetting(
5795         IN              PDM_ODM_T               pDM_Odm
5796         )
5797 {
5798         pSWAT_T         pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
5799         PADAPTER        pAdapter         =  pDM_Odm->Adapter;
5800         u1Byte btAntNum = 2;
5801 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
5802         btAntNum=BT_GetPgAntNum(pAdapter);
5803 #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE))
5804 #ifdef CONFIG_BT_COEXIST
5805         btAntNum = hal_btcoex_GetPgAntNum(pAdapter);
5806 #endif
5807 #endif
5808
5809         // Set default antenna A and B status
5810         if(btAntNum == 2)
5811         {
5812                 pDM_SWAT_Table->ANTA_ON=TRUE;
5813                 pDM_SWAT_Table->ANTB_ON=TRUE;
5814                 //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("Dual antenna\n"));
5815         }
5816 #ifdef CONFIG_BT_COEXIST
5817         else if(btAntNum == 1)
5818         {// Set antenna A as default
5819                 pDM_SWAT_Table->ANTA_ON=TRUE;
5820                 pDM_SWAT_Table->ANTB_ON=FALSE;
5821                 //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("Single antenna\n"));
5822         }
5823         else
5824         {
5825                 //RT_ASSERT(FALSE, ("Incorrect antenna number!!\n"));
5826         }
5827 #endif
5828 }
5829
5830
5831
5832 //2 8723A ANT DETECT
5833 //
5834 // Description:
5835 //      Implement IQK single tone for RF DPK loopback and BB PSD scanning.
5836 //      This function is cooperated with BB team Neil.
5837 //
5838 // Added by Roger, 2011.12.15
5839 //
5840 BOOLEAN
5841 ODM_SingleDualAntennaDetection(
5842         IN              PDM_ODM_T               pDM_Odm,
5843         IN              u1Byte                  mode
5844         )
5845 {
5846         PADAPTER        pAdapter         =  pDM_Odm->Adapter;
5847         pSWAT_T         pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
5848         u4Byte          CurrentChannel,RfLoopReg;
5849         u1Byte          n;
5850         u4Byte          Reg88c, Regc08, Reg874, Regc50, Reg948=0, Regb2c=0, Reg92c=0, AFE_rRx_Wait_CCA=0;
5851         u1Byte          initial_gain = 0x5a;
5852         u4Byte          PSD_report_tmp;
5853         u4Byte          AntA_report = 0x0, AntB_report = 0x0,AntO_report=0x0;
5854         BOOLEAN         bResult = TRUE;
5855         u4Byte          AFE_Backup[16];
5856         u4Byte          AFE_REG_8723A[16] = {
5857                                         rRx_Wait_CCA,   rTx_CCK_RFON,
5858                                         rTx_CCK_BBON,   rTx_OFDM_RFON,
5859                                         rTx_OFDM_BBON,  rTx_To_Rx,
5860                                         rTx_To_Tx,              rRx_CCK,
5861                                         rRx_OFDM,               rRx_Wait_RIFS,
5862                                         rRx_TO_Rx,              rStandby,
5863                                         rSleep,                 rPMPD_ANAEN,
5864                                         rFPGA0_XCD_SwitchControl, rBlue_Tooth};
5865
5866         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection()============> \n"));
5867
5868
5869         if(!(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C|ODM_RTL8723B)))
5870                 return bResult;
5871
5872         // Retrieve antenna detection registry info, added by Roger, 2012.11.27.
5873         if(!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(pAdapter))
5874                 return bResult;
5875
5876         if(pDM_Odm->SupportICType == ODM_RTL8192C)
5877         {
5878                 //Which path in ADC/DAC is turnned on for PSD: both I/Q
5879                 ODM_SetBBReg(pDM_Odm, 0x808, BIT10|BIT11, 0x3);
5880                 //Ageraged number: 8
5881                 ODM_SetBBReg(pDM_Odm, 0x808, BIT12|BIT13, 0x1);
5882                 //pts = 128;
5883                 ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0);
5884         }
5885
5886         //1 Backup Current RF/BB Settings
5887
5888         CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask);
5889         RfLoopReg = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask);
5890         if(!(pDM_Odm->SupportICType == ODM_RTL8723B))
5891         ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A);  // change to Antenna A
5892 #if (RTL8723B_SUPPORT == 1)
5893         else
5894         {
5895                 Reg92c = ODM_GetBBReg(pDM_Odm, 0x92c, bMaskDWord);
5896                 Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord);
5897                 Regb2c = ODM_GetBBReg(pDM_Odm, AGC_table_select, bMaskDWord);
5898                 ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x1);
5899                 ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, 0xff, 0x77);
5900                 ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0x3ff, 0x000);
5901                 ODM_SetBBReg(pDM_Odm, AGC_table_select, BIT31, 0x0);
5902         }
5903 #endif
5904         ODM_StallExecution(10);
5905
5906         //Store A Path Register 88c, c08, 874, c50
5907         Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord);
5908         Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord);
5909         Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord);
5910         Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord);
5911
5912         // Store AFE Registers
5913         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
5914         odm_PHY_SaveAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16);
5915         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
5916                 AFE_rRx_Wait_CCA = ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA,bMaskDWord);
5917
5918         //Set PSD 128 pts
5919         ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0);  //128 pts
5920
5921         // To SET CH1 to do
5922         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x7401);     //Channel 1
5923
5924         // AFE all on step
5925         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
5926         {
5927                 ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x6FDB25A4);
5928                 ODM_SetBBReg(pDM_Odm, rTx_CCK_RFON, bMaskDWord, 0x6FDB25A4);
5929                 ODM_SetBBReg(pDM_Odm, rTx_CCK_BBON, bMaskDWord, 0x6FDB25A4);
5930                 ODM_SetBBReg(pDM_Odm, rTx_OFDM_RFON, bMaskDWord, 0x6FDB25A4);
5931                 ODM_SetBBReg(pDM_Odm, rTx_OFDM_BBON, bMaskDWord, 0x6FDB25A4);
5932                 ODM_SetBBReg(pDM_Odm, rTx_To_Rx, bMaskDWord, 0x6FDB25A4);
5933                 ODM_SetBBReg(pDM_Odm, rTx_To_Tx, bMaskDWord, 0x6FDB25A4);
5934                 ODM_SetBBReg(pDM_Odm, rRx_CCK, bMaskDWord, 0x6FDB25A4);
5935                 ODM_SetBBReg(pDM_Odm, rRx_OFDM, bMaskDWord, 0x6FDB25A4);
5936                 ODM_SetBBReg(pDM_Odm, rRx_Wait_RIFS, bMaskDWord, 0x6FDB25A4);
5937                 ODM_SetBBReg(pDM_Odm, rRx_TO_Rx, bMaskDWord, 0x6FDB25A4);
5938                 ODM_SetBBReg(pDM_Odm, rStandby, bMaskDWord, 0x6FDB25A4);
5939                 ODM_SetBBReg(pDM_Odm, rSleep, bMaskDWord, 0x6FDB25A4);
5940                 ODM_SetBBReg(pDM_Odm, rPMPD_ANAEN, bMaskDWord, 0x6FDB25A4);
5941                 ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_SwitchControl, bMaskDWord, 0x6FDB25A4);
5942                 ODM_SetBBReg(pDM_Odm, rBlue_Tooth, bMaskDWord, 0x6FDB25A4);
5943         }
5944         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
5945         {
5946                 ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x01c00016);
5947         }
5948
5949         // 3 wire Disable
5950         ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0);
5951
5952         //BB IQK Setting
5953         ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4);
5954         ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000);
5955
5956         //IQK setting tone@ 4.34Mhz
5957         ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C);
5958         ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00);
5959
5960         //Page B init
5961         ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000);
5962         ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000);
5963         ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800);
5964         ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
5965         ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150008);
5966         ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150008);
5967         ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0);
5968
5969         //RF loop Setting
5970         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
5971         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0, 0xFFFFF, 0x50008);
5972
5973         //IQK Single tone start
5974         ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
5975         ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
5976         ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
5977
5978         ODM_StallExecution(10000);
5979
5980         // PSD report of antenna A
5981         PSD_report_tmp=0x0;
5982         for (n=0;n<2;n++)
5983         {
5984                 PSD_report_tmp =  GetPSDData(pDM_Odm, 14, initial_gain);
5985                 if(PSD_report_tmp >AntA_report)
5986                         AntA_report=PSD_report_tmp;
5987         }
5988
5989          // change to Antenna B
5990         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
5991                 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_B);
5992 #if (RTL8723B_SUPPORT == 1)
5993         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
5994                 ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x2);
5995 #endif
5996
5997         ODM_StallExecution(10);
5998
5999         // PSD report of antenna B
6000         PSD_report_tmp=0x0;
6001         for (n=0;n<2;n++)
6002         {
6003                 PSD_report_tmp =  GetPSDData(pDM_Odm, 14, initial_gain);
6004                 if(PSD_report_tmp > AntB_report)
6005                         AntB_report=PSD_report_tmp;
6006         }
6007
6008         // change to open case
6009         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
6010                 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, 0);  // change to Antenna A
6011 #if (RTL8723B_SUPPORT == 1)
6012         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
6013                 ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x0);
6014 #endif
6015
6016         ODM_StallExecution(10);
6017
6018         // PSD report of open case
6019         PSD_report_tmp=0x0;
6020         for (n=0;n<2;n++)
6021         {
6022                 PSD_report_tmp =  GetPSDData(pDM_Odm, 14, initial_gain);
6023                 if(PSD_report_tmp > AntO_report)
6024                         AntO_report=PSD_report_tmp;
6025         }
6026
6027         //Close IQK Single Tone function
6028         ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
6029
6030         //1 Return to antanna A
6031         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
6032                 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A);  // change to Antenna A
6033 #if (RTL8723B_SUPPORT == 1)
6034         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
6035         {
6036                 // external DPDT
6037                 ODM_SetBBReg(pDM_Odm, rDPDT_control, bMaskDWord, Reg92c);
6038
6039                 //internal S0/S1
6040                 ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948);
6041                 ODM_SetBBReg(pDM_Odm, AGC_table_select, bMaskDWord, Regb2c);
6042         }
6043 #endif
6044         ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c);
6045         ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08);
6046         ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874);
6047         ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40);
6048         ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50);
6049         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,CurrentChannel);
6050         ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask,RfLoopReg);
6051
6052         //Reload AFE Registers
6053         if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
6054         odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16);
6055         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
6056                 ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, AFE_rRx_Wait_CCA);
6057
6058         if(pDM_Odm->SupportICType == ODM_RTL8723A)
6059         {
6060                 //2 Test Ant B based on Ant A is ON
6061                 if(mode==ANTTESTB)
6062                 {
6063                         if(AntA_report >=       100)
6064                         {
6065                                 if(AntB_report > (AntA_report+1))
6066                                 {
6067                                         pDM_SWAT_Table->ANTB_ON=FALSE;
6068                                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n"));
6069                                 }
6070                                 else
6071                                 {
6072                                         pDM_SWAT_Table->ANTB_ON=TRUE;
6073                                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna is A and B\n"));
6074                                 }
6075                         }
6076                         else
6077                         {
6078                                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
6079                                 pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default
6080                                 bResult = FALSE;
6081                         }
6082                 }
6083                 //2 Test Ant A and B based on DPDT Open
6084                 else if(mode==ANTTESTALL)
6085                 {
6086                         if((AntO_report >=100) && (AntO_report <=118))
6087                         {
6088                                 if(AntA_report > (AntO_report+1))
6089                                 {
6090                                         pDM_SWAT_Table->ANTA_ON=FALSE;
6091                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is OFF\n"));
6092                                 }
6093                                 else
6094                                 {
6095                                         pDM_SWAT_Table->ANTA_ON=TRUE;
6096                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is ON\n"));
6097                                 }
6098
6099                                 if(AntB_report > (AntO_report+2))
6100                                 {
6101                                         pDM_SWAT_Table->ANTB_ON=FALSE;
6102                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is OFF\n"));
6103                                 }
6104                                 else
6105                                 {
6106                                         pDM_SWAT_Table->ANTB_ON=TRUE;
6107                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is ON\n"));
6108                                 }
6109
6110                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report));
6111                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report));
6112                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report));
6113
6114                                 pDM_Odm->AntDetectedInfo.bAntDetected= TRUE;
6115                                 pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report;
6116                                 pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report;
6117                                 pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report;
6118
6119                                 }
6120                         else
6121                                 {
6122                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n"));
6123                                 bResult = FALSE;
6124                         }
6125                 }
6126         }
6127         else if(pDM_Odm->SupportICType == ODM_RTL8192C)
6128         {
6129                 if(AntA_report >=       100)
6130                 {
6131                         if(AntB_report > (AntA_report+2))
6132                         {
6133                                 pDM_SWAT_Table->ANTA_ON=FALSE;
6134                                 pDM_SWAT_Table->ANTB_ON=TRUE;
6135                                 ODM_SetBBReg(pDM_Odm,  rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B);
6136                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna B\n"));
6137                         }
6138                         else if(AntA_report > (AntB_report+2))
6139                         {
6140                                 pDM_SWAT_Table->ANTA_ON=TRUE;
6141                                 pDM_SWAT_Table->ANTB_ON=FALSE;
6142                                 ODM_SetBBReg(pDM_Odm,  rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A);
6143                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n"));
6144                         }
6145                         else
6146                         {
6147                                 pDM_SWAT_Table->ANTA_ON=TRUE;
6148                                 pDM_SWAT_Table->ANTB_ON=TRUE;
6149                                 RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna \n"));
6150                         }
6151                 }
6152                 else
6153                 {
6154                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
6155                         pDM_SWAT_Table->ANTA_ON=TRUE; // Set Antenna A on as default
6156                         pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default
6157                         bResult = FALSE;
6158                 }
6159         }
6160         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
6161         {
6162                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report));
6163                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report));
6164                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report));
6165
6166                 //2 Test Ant B based on Ant A is ON
6167                 if(mode==ANTTESTB)
6168                 {
6169                         if(AntA_report >=100 && AntA_report <= 116)
6170                         {
6171                                 if(AntB_report >= (AntA_report+4) && AntB_report > 116)
6172                                 {
6173                                         pDM_SWAT_Table->ANTB_ON=FALSE;
6174                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n"));
6175                                 }
6176                                 else if(AntB_report >=100 && AntB_report <= 116)
6177                                 {
6178                                         pDM_SWAT_Table->ANTB_ON=TRUE;
6179                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna is A and B\n"));
6180                                 }
6181                                 else
6182                                 {
6183                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
6184                                         pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default
6185                                         bResult = FALSE;
6186                                 }
6187                         }
6188                         else
6189                         {
6190                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
6191                                 pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default
6192                                 bResult = FALSE;
6193                         }
6194                 }
6195                 //2 Test Ant A and B based on DPDT Open
6196                 else if(mode==ANTTESTALL)
6197                 {
6198                         if((AntA_report >= 100) && (AntB_report >= 100) && (AntA_report <= 120) && (AntB_report <= 120))
6199                         {
6200                                 if((AntA_report - AntB_report < 2) || (AntB_report - AntA_report < 2))
6201                                 {
6202                                         pDM_SWAT_Table->ANTA_ON=TRUE;
6203                                         pDM_SWAT_Table->ANTB_ON=TRUE;
6204                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Dual Antenna\n"));
6205                                 }
6206                                 else if(((AntA_report - AntB_report >= 2) && (AntA_report - AntB_report <= 4)) ||
6207                                         ((AntB_report - AntA_report >= 2) && (AntB_report - AntA_report <= 4)))
6208                                 {
6209                                         pDM_SWAT_Table->ANTA_ON=FALSE;
6210                                         pDM_SWAT_Table->ANTB_ON=FALSE;
6211                                         bResult = FALSE;
6212                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
6213                                 }
6214                                 else
6215                                 {
6216                                         pDM_SWAT_Table->ANTA_ON = TRUE;
6217                                         pDM_SWAT_Table->ANTB_ON=FALSE;
6218                                         ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Single Antenna A\n"));
6219                                 }
6220
6221                                 pDM_Odm->AntDetectedInfo.bAntDetected= TRUE;
6222                                 pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report;
6223                                 pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report;
6224                                 pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report;
6225
6226                         }
6227                         else
6228                         {
6229                                 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n"));
6230                                 bResult = FALSE;
6231                         }
6232                 }
6233         }
6234
6235         return bResult;
6236
6237 }
6238
6239
6240 #endif   // end odm_CE
6241
6242 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))
6243
6244 VOID
6245 odm_Set_RA_DM_ARFB_by_Noisy(
6246         IN      PDM_ODM_T       pDM_Odm
6247 )
6248 {
6249         //DbgPrint("DM_ARFB ====> \n");
6250         if (pDM_Odm->bNoisyState){
6251                 ODM_Write4Byte(pDM_Odm,0x430,0x00000000);
6252                 ODM_Write4Byte(pDM_Odm,0x434,0x05040200);
6253                 //DbgPrint("DM_ARFB ====> Noisy State\n");
6254         }
6255         else{
6256                 ODM_Write4Byte(pDM_Odm,0x430,0x02010000);
6257                 ODM_Write4Byte(pDM_Odm,0x434,0x07050403);
6258                 //DbgPrint("DM_ARFB ====> Clean State\n");
6259         }
6260
6261 }
6262
6263 VOID
6264 ODM_UpdateNoisyState(
6265         IN      PDM_ODM_T       pDM_Odm,
6266         IN      BOOLEAN         bNoisyStateFromC2H
6267         )
6268 {
6269         //DbgPrint("Get C2H Command! NoisyState=0x%x\n ", bNoisyStateFromC2H);
6270         if(pDM_Odm->SupportICType == ODM_RTL8821  || pDM_Odm->SupportICType == ODM_RTL8812  ||
6271            pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188E)
6272         {
6273                 pDM_Odm->bNoisyState = bNoisyStateFromC2H;
6274         }
6275         odm_Set_RA_DM_ARFB_by_Noisy(pDM_Odm);
6276 };
6277
6278 u4Byte
6279 Set_RA_DM_Ratrbitmap_by_Noisy(
6280         IN      PDM_ODM_T       pDM_Odm,
6281         IN      WIRELESS_MODE   WirelessMode,
6282         IN      u4Byte                  ratr_bitmap,
6283         IN      u1Byte                  rssi_level
6284 )
6285 {
6286         u4Byte ret_bitmap = ratr_bitmap;
6287         switch (WirelessMode)
6288         {
6289                 case WIRELESS_MODE_AC_24G :
6290                 case WIRELESS_MODE_AC_5G :
6291                 case WIRELESS_MODE_AC_ONLY:
6292                         if (pDM_Odm->bNoisyState){ // in Noisy State
6293                                 if (rssi_level==1)
6294                                         ret_bitmap&=0xfe3f0e08;
6295                                 else if (rssi_level==2)
6296                                         ret_bitmap&=0xff3f8f8c;
6297                                 else if (rssi_level==3)
6298                                         ret_bitmap&=0xffffffcc ;
6299                                 else
6300                                         ret_bitmap&=0xffffffff ;
6301                         }
6302                         else{                                   // in SNR State
6303                                 if (rssi_level==1){
6304                                         ret_bitmap&=0xfc3e0c08;
6305                                 }
6306                                 else if (rssi_level==2){
6307                                         ret_bitmap&=0xfe3f0e08;
6308                                 }
6309                                 else if (rssi_level==3){
6310                                         ret_bitmap&=0xffbfefcc;
6311                                 }
6312                                 else{
6313                                         ret_bitmap&=0x0fffffff;
6314                                 }
6315                         }
6316                         break;
6317                 case WIRELESS_MODE_B:
6318                 case WIRELESS_MODE_A:
6319                 case WIRELESS_MODE_G:
6320                 case WIRELESS_MODE_N_24G:
6321                 case WIRELESS_MODE_N_5G:
6322                         if (pDM_Odm->bNoisyState){
6323                                 if (rssi_level==1)
6324                                         ret_bitmap&=0x0f0e0c08;
6325                                 else if (rssi_level==2)
6326                                         ret_bitmap&=0x0f8f0e0c;
6327                                 else if (rssi_level==3)
6328                                         ret_bitmap&=0x0fefefcc ;
6329                                 else
6330                                         ret_bitmap&=0xffffffff ;
6331                         }
6332                         else{
6333                                 if (rssi_level==1){
6334                                         ret_bitmap&=0x0f8f0e08;
6335                                 }
6336                                 else if (rssi_level==2){
6337                                         ret_bitmap&=0x0fcf8f8c;
6338                                 }
6339                                 else if (rssi_level==3){
6340                                         ret_bitmap&=0x0fffffcc;
6341                                 }
6342                                 else{
6343                                         ret_bitmap&=0x0fffffff;
6344                                 }
6345                         }
6346                         break;
6347                 default:
6348                         break;
6349         }
6350         //DbgPrint("DM_RAMask ====> rssi_LV = %d, BITMAP = %x \n", rssi_level, ret_bitmap);
6351         return ret_bitmap;
6352
6353 }
6354
6355
6356
6357 VOID
6358 ODM_UpdateInitRate(
6359         IN      PDM_ODM_T       pDM_Odm,
6360         IN      u1Byte          Rate
6361         )
6362 {
6363         u1Byte                  p = 0;
6364
6365         ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Get C2H Command! Rate=0x%x\n", Rate));
6366
6367         if(pDM_Odm->SupportICType == ODM_RTL8821  || pDM_Odm->SupportICType == ODM_RTL8812  ||
6368            pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188E)
6369         {
6370                 pDM_Odm->TxRate = Rate;
6371 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
6372         #if DEV_BUS_TYPE==RT_PCI_INTERFACE
6373                 #if USE_WORKITEM
6374                 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
6375                 #else
6376                 if(pDM_Odm->SupportICType == ODM_RTL8821)
6377                 {
6378                         ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
6379                 }
6380                 else if(pDM_Odm->SupportICType == ODM_RTL8812)
6381                 {
6382                         for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++)
6383                         {
6384                                 ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0);
6385                         }
6386                 }
6387                 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
6388                 {
6389                         ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
6390                 }
6391                 else if(pDM_Odm->SupportICType == ODM_RTL8192E)
6392                 {
6393                         for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++)
6394                         {
6395                                 ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0);
6396                         }
6397                 }
6398                 else if(pDM_Odm->SupportICType == ODM_RTL8188E)
6399                 {
6400                         ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
6401                 }
6402                 #endif
6403         #else
6404                 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
6405         #endif
6406 #endif
6407         }
6408         else
6409                 return;
6410 }
6411
6412 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
6413 VOID
6414 ODM_UpdateInitRateWorkItemCallback(
6415     IN PVOID            pContext
6416     )
6417 {
6418         PADAPTER        Adapter = (PADAPTER)pContext;
6419         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(Adapter);
6420         PDM_ODM_T               pDM_Odm = &pHalData->DM_OutSrc;
6421
6422         u1Byte                  p = 0;
6423
6424         if(pDM_Odm->SupportICType == ODM_RTL8821)
6425         {
6426                 ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
6427         }
6428         else if(pDM_Odm->SupportICType == ODM_RTL8812)
6429         {
6430                 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++)    //DOn't know how to include &c
6431                 {
6432                         ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0);
6433                 }
6434         }
6435         else if(pDM_Odm->SupportICType == ODM_RTL8723B)
6436         {
6437                         ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
6438         }
6439         else if(pDM_Odm->SupportICType == ODM_RTL8192E)
6440         {
6441                 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++)    //DOn't know how to include &c
6442                 {
6443                         ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0);
6444                 }
6445         }
6446         else if(pDM_Odm->SupportICType == ODM_RTL8188E)
6447         {
6448                         ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
6449         }
6450 }
6451 #endif
6452 #endif
6453
6454 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
6455 /* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */
6456 void odm_dtc(PDM_ODM_T pDM_Odm)
6457 {
6458 #ifdef CONFIG_DM_RESP_TXAGC
6459         #define DTC_BASE            35  /* RSSI higher than this value, start to decade TX power */
6460         #define DTC_DWN_BASE       (DTC_BASE-5) /* RSSI lower than this value, start to increase TX power */
6461
6462         /* RSSI vs TX power step mapping: decade TX power */
6463         static const u8 dtc_table_down[]={
6464                 DTC_BASE,
6465                 (DTC_BASE+5),
6466                 (DTC_BASE+10),
6467                 (DTC_BASE+15),
6468                 (DTC_BASE+20),
6469                 (DTC_BASE+25)
6470         };
6471
6472         /* RSSI vs TX power step mapping: increase TX power */
6473         static const u8 dtc_table_up[]={
6474                 DTC_DWN_BASE,
6475                 (DTC_DWN_BASE-5),
6476                 (DTC_DWN_BASE-10),
6477                 (DTC_DWN_BASE-15),
6478                 (DTC_DWN_BASE-15),
6479                 (DTC_DWN_BASE-20),
6480                 (DTC_DWN_BASE-20),
6481                 (DTC_DWN_BASE-25),
6482                 (DTC_DWN_BASE-25),
6483                 (DTC_DWN_BASE-30),
6484                 (DTC_DWN_BASE-35)
6485         };
6486
6487         u8 i;
6488         u8 dtc_steps=0;
6489         u8 sign;
6490         u8 resp_txagc=0;
6491
6492         #if 0
6493         /* As DIG is disabled, DTC is also disable */
6494         if(!(pDM_Odm->SupportAbility & ODM_XXXXXX))
6495                 return;
6496         #endif
6497
6498         if (DTC_BASE < pDM_Odm->RSSI_Min) {
6499                 /* need to decade the CTS TX power */
6500                 sign = 1;
6501                 for (i=0;i<ARRAY_SIZE(dtc_table_down);i++)
6502                 {
6503                         if ((dtc_table_down[i] >= pDM_Odm->RSSI_Min) || (dtc_steps >= 6))
6504                                 break;
6505                         else
6506                                 dtc_steps++;
6507                 }
6508         }
6509 #if 0
6510         else if (DTC_DWN_BASE > pDM_Odm->RSSI_Min)
6511         {
6512                 /* needs to increase the CTS TX power */
6513                 sign = 0;
6514                 dtc_steps = 1;
6515                 for (i=0;i<ARRAY_SIZE(dtc_table_up);i++)
6516                 {
6517                         if ((dtc_table_up[i] <= pDM_Odm->RSSI_Min) || (dtc_steps>=10))
6518                                 break;
6519                         else
6520                                 dtc_steps++;
6521                 }
6522         }
6523 #endif
6524         else
6525         {
6526                 sign = 0;
6527                 dtc_steps = 0;
6528         }
6529
6530         resp_txagc = dtc_steps | (sign << 4);
6531         resp_txagc = resp_txagc | (resp_txagc << 5);
6532         ODM_Write1Byte(pDM_Odm, 0x06d9, resp_txagc);
6533
6534         DBG_871X("%s RSSI_Min:%u, set RESP_TXAGC to %s %u\n",
6535                 __func__, pDM_Odm->RSSI_Min, sign?"minus":"plus", dtc_steps);
6536 #endif /* CONFIG_RESP_TXAGC_ADJUST */
6537 }
6538
6539 #endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */
6540