1 /******************************************************************************
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3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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5 * This program is free software; you can redistribute it and/or modify it
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6 * under the terms of version 2 of the GNU General Public License as
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7 * published by the Free Software Foundation.
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9 * This program is distributed in the hope that it will be useful, but WITHOUT
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10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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14 * You should have received a copy of the GNU General Public License along with
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15 * this program; if not, write to the Free Software Foundation, Inc.,
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16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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19 ******************************************************************************/
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21 //============================================================
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23 //============================================================
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24 //#include "Mp_Precomp.h"
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25 #include "odm_precomp.h"
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31 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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32 #if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL))
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33 odm_EdcaParaInit(pDM_Odm);
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34 #elif (DM_ODM_SUPPORT_TYPE==ODM_WIN)
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35 PADAPTER Adapter = NULL;
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36 HAL_DATA_TYPE *pHalData = NULL;
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38 if(pDM_Odm->Adapter==NULL) {
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39 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EdcaTurboInit fail!!!\n"));
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43 Adapter=pDM_Odm->Adapter;
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44 pHalData=GET_HAL_DATA(Adapter);
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46 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE;
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47 pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE;
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48 pHalData->bIsAnyNonBEPkts = FALSE;
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50 #elif(DM_ODM_SUPPORT_TYPE==ODM_CE)
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51 PADAPTER Adapter = pDM_Odm->Adapter;
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52 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE;
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53 pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE;
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54 Adapter->recvpriv.bIsAnyNonBEPkts =FALSE;
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57 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VO PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VO_PARAM)));
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58 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VI PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VI_PARAM)));
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59 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM)));
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60 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BK PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BK_PARAM)));
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63 } // ODM_InitEdcaTurbo
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71 // For AP/ADSL use prtl8192cd_priv
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72 // For CE/NIC use PADAPTER
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76 // 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
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77 // at the same time. In the stage2/3, we need to prive universal interface and merge all
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78 // HW dynamic mechanism.
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80 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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81 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheck========================>\n"));
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83 if(!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))
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86 switch (pDM_Odm->SupportPlatform)
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90 #if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
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91 odm_EdcaTurboCheckMP(pDM_Odm);
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96 #if(DM_ODM_SUPPORT_TYPE==ODM_CE)
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97 odm_EdcaTurboCheckCE(pDM_Odm);
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104 #if ((DM_ODM_SUPPORT_TYPE == ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL))
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105 odm_IotEngine(pDM_Odm);
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109 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n"));
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111 } // odm_CheckEdcaTurbo
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113 #if(DM_ODM_SUPPORT_TYPE==ODM_CE)
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117 odm_EdcaTurboCheckCE(
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121 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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122 PADAPTER Adapter = pDM_Odm->Adapter;
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123 u32 EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer];
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124 u32 EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer];
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125 u32 ICType=pDM_Odm->SupportICType;
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127 u8 WirelessMode=0xFF; //invalid value
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130 u64 cur_tx_bytes = 0;
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131 u64 cur_rx_bytes = 0;
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132 u8 bbtchange = _FALSE;
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133 u8 bBiasOnRx = _FALSE;
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134 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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135 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter);
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136 struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv);
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137 struct recv_priv *precvpriv = &(Adapter->recvpriv);
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138 struct registry_priv *pregpriv = &Adapter->registrypriv;
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139 struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv);
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140 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
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142 if(pDM_Odm->bLinked != _TRUE)
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144 precvpriv->bIsAnyNonBEPkts = _FALSE;
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148 if ((pregpriv->wifi_spec == 1) )//|| (pmlmeinfo->HT_enable == 0))
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150 precvpriv->bIsAnyNonBEPkts = _FALSE;
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154 if(pDM_Odm->pWirelessMode!=NULL)
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155 WirelessMode=*(pDM_Odm->pWirelessMode);
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157 IOTPeer = pmlmeinfo->assoc_AP_vendor;
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159 if (IOTPeer >= HT_IOT_PEER_MAX)
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161 precvpriv->bIsAnyNonBEPkts = _FALSE;
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165 if( (pDM_Odm->SupportICType == ODM_RTL8192C) ||
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166 (pDM_Odm->SupportICType == ODM_RTL8723A) ||
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167 (pDM_Odm->SupportICType == ODM_RTL8188E))
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169 if((IOTPeer == HT_IOT_PEER_RALINK)||(IOTPeer == HT_IOT_PEER_ATHEROS))
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173 // Check if the status needs to be changed.
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174 if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) )
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176 cur_tx_bytes = pdvobjpriv->traffic_stat.cur_tx_bytes;
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177 cur_rx_bytes = pdvobjpriv->traffic_stat.cur_rx_bytes;
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179 //traffic, TX or RX
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182 if (cur_tx_bytes > (cur_rx_bytes << 2))
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183 { // Uplink TP is present.
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184 trafficIndex = UP_LINK;
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187 { // Balance TP is present.
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188 trafficIndex = DOWN_LINK;
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193 if (cur_rx_bytes > (cur_tx_bytes << 2))
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194 { // Downlink TP is present.
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195 trafficIndex = DOWN_LINK;
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198 { // Balance TP is present.
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199 trafficIndex = UP_LINK;
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203 //if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA))
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205 if(ICType==ODM_RTL8192D)
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208 if(pDM_Odm->RFType==ODM_2T2R)
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210 EDCA_BE_UL = 0x60a42b; //0x5ea42b;
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211 EDCA_BE_DL = 0x60a42b; //0x5ea42b;
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215 EDCA_BE_UL = 0x6ea42b;
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216 EDCA_BE_DL = 0x6ea42b;
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221 if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE) {
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222 if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) {
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223 EDCA_BE_UL = 0x60a42b;
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224 EDCA_BE_DL = 0x60a42b;
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228 EDCA_BE_UL = 0x6ea42b;
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229 EDCA_BE_DL = 0x6ea42b;
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234 //92D txop can't be set to 0x3e for cisco1250
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235 if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G))
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237 EDCA_BE_DL = edca_setting_DL[IOTPeer];
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238 EDCA_BE_UL = edca_setting_UL[IOTPeer];
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240 //merge from 92s_92c_merge temp brunch v2445 20120215
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241 else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B)))
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243 EDCA_BE_DL = edca_setting_DL_GMode[IOTPeer];
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245 else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A)))
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247 EDCA_BE_DL = 0xa630;
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249 else if(IOTPeer == HT_IOT_PEER_MARVELL)
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251 EDCA_BE_DL = edca_setting_DL[IOTPeer];
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252 EDCA_BE_UL = edca_setting_UL[IOTPeer];
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254 else if(IOTPeer == HT_IOT_PEER_ATHEROS)
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256 // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue.
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257 EDCA_BE_DL = edca_setting_DL[IOTPeer];
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260 if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8821)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE
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262 EDCA_BE_UL = 0x5ea42b;
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263 EDCA_BE_DL = 0x5ea42b;
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265 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x",EDCA_BE_UL,EDCA_BE_DL));
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268 if (trafficIndex == DOWN_LINK)
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269 edca_param = EDCA_BE_DL;
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271 edca_param = EDCA_BE_UL;
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273 rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
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275 pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex;
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278 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _TRUE;
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283 // Turn Off EDCA turbo here.
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284 // Restore original EDCA according to the declaration of AP.
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286 if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)
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288 rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE);
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289 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _FALSE;
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296 #elif(DM_ODM_SUPPORT_TYPE==ODM_WIN)
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298 odm_EdcaTurboCheckMP(
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303 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
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304 PADAPTER Adapter = pDM_Odm->Adapter;
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305 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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307 PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter);
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308 PADAPTER pExtAdapter = GetFirstExtAdapter(Adapter);//NULL;
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309 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
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310 PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos;
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311 //[Win7 Count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's Adapter is always Default. 2009.08.20, by Bohn
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312 u8Byte Ext_curTxOkCnt = 0;
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313 u8Byte Ext_curRxOkCnt = 0;
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314 //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn.
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315 u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE;
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317 // Keep past Tx/Rx packet count for RT-to-RT EDCA turbo.
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318 u8Byte curTxOkCnt = 0;
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319 u8Byte curRxOkCnt = 0;
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320 u4Byte EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer];
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321 u4Byte EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer];
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322 u4Byte EDCA_BE = 0x5ea42b;
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324 BOOLEAN *pbIsCurRDLState=NULL;
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325 BOOLEAN bLastIsCurRDLState=FALSE;
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326 BOOLEAN bBiasOnRx=FALSE;
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327 BOOLEAN bEdcaTurboOn=FALSE;
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328 u1Byte TxRate = 0xFF;
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331 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheckMP========================>"));
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332 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM)));
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334 ////===============================
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335 ////list paramter for different platform
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336 ////===============================
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337 bLastIsCurRDLState=pDM_Odm->DM_EDCA_Table.bIsCurRDLState;
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338 pbIsCurRDLState=&(pDM_Odm->DM_EDCA_Table.bIsCurRDLState);
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340 //2012/09/14 MH Add
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341 if (pMgntInfo->NumNonBePkt > pMgntInfo->RegEdcaThresh && !Adapter->MgntInfo.bWiFiConfg)
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342 pHalData->bIsAnyNonBEPkts = TRUE;
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344 pMgntInfo->NumNonBePkt = 0;
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346 // Caculate TX/RX TP:
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347 //curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pMgntInfo->lastTxOkCnt;
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348 //curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pMgntInfo->lastRxOkCnt;
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349 curTxOkCnt = Adapter->TxStats.NumTxBytesUnicast - pDM_Odm->lastTxOkCnt;
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350 curRxOkCnt = Adapter->RxStats.NumRxBytesUnicast - pDM_Odm->lastRxOkCnt;
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351 pDM_Odm->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast;
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352 pDM_Odm->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast;
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354 if(pExtAdapter == NULL)
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355 pExtAdapter = pDefaultAdapter;
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357 Ext_curTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->Ext_lastTxOkCnt;
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358 Ext_curRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->Ext_lastRxOkCnt;
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359 GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus);
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360 //For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn.
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361 if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY)
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363 curTxOkCnt = Ext_curTxOkCnt ;
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364 curRxOkCnt = Ext_curRxOkCnt ;
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367 IOTPeer=pMgntInfo->IOTPeer;
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368 bBiasOnRx=(pMgntInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)?TRUE:FALSE;
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369 bEdcaTurboOn=((!pHalData->bIsAnyNonBEPkts))?TRUE:FALSE;
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370 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bIsAnyNonBEPkts : 0x%lx \n",pHalData->bIsAnyNonBEPkts));
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373 ////===============================
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374 ////check if edca turbo is disabled
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375 ////===============================
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376 if(odm_IsEdcaTurboDisable(pDM_Odm))
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378 pHalData->bIsAnyNonBEPkts = FALSE;
\r
379 pMgntInfo->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast;
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380 pMgntInfo->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast;
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381 pMgntInfo->Ext_lastTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast;
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382 pMgntInfo->Ext_lastRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast;
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386 ////===============================
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387 ////remove iot case out
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388 ////===============================
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389 ODM_EdcaParaSelByIot(pDM_Odm, &EDCA_BE_UL, &EDCA_BE_DL);
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392 ////===============================
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393 ////Check if the status needs to be changed.
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394 ////===============================
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397 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",bEdcaTurboOn,bBiasOnRx));
\r
398 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curTxOkCnt : 0x%lx \n",curTxOkCnt));
\r
399 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curRxOkCnt : 0x%lx \n",curRxOkCnt));
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401 odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, TRUE, pbIsCurRDLState);
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403 odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, FALSE, pbIsCurRDLState);
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405 //modify by Guo.Mingzhi 2011-12-29
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406 EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL;
\r
407 if(IS_HARDWARE_TYPE_8821U(Adapter))
\r
409 if(pMgntInfo->RegTxDutyEnable)
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411 //2013.01.23 LukeLee: debug for 8811AU thermal issue (reduce Tx duty cycle)
\r
412 if(!pMgntInfo->ForcedDataRate) //auto rate
\r
414 if(pDM_Odm->TxRate != 0xFF)
\r
415 TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate);
\r
419 TxRate = (u1Byte) pMgntInfo->ForcedDataRate;
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422 value64 = (curRxOkCnt<<2);
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423 if(curTxOkCnt < value64) //Downlink
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424 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
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427 //DbgPrint("pDM_Odm->RFCalibrateInfo.ThermalValue = 0x%X\n", pDM_Odm->RFCalibrateInfo.ThermalValue);
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428 //if(pDM_Odm->RFCalibrateInfo.ThermalValue < pHalData->EEPROMThermalMeter)
\r
429 if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G))
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430 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
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435 case MGN_VHT1SS_MCS6:
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436 case MGN_VHT1SS_MCS5:
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441 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea42b);
\r
443 case MGN_VHT1SS_MCS4:
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446 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa42b);
\r
448 case MGN_VHT1SS_MCS3:
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451 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa47f);
\r
453 case MGN_VHT1SS_MCS2:
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456 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa57f);
\r
458 case MGN_VHT1SS_MCS1:
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462 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa77f);
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464 case MGN_VHT1SS_MCS0:
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467 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f);
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470 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
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478 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
\r
482 else if (IS_HARDWARE_TYPE_8812AU(Adapter)){
\r
483 if(pMgntInfo->RegTxDutyEnable)
\r
485 //2013.07.26 Wilson: debug for 8812AU thermal issue (reduce Tx duty cycle)
\r
486 // it;s the same issue as 8811AU
\r
487 if(!pMgntInfo->ForcedDataRate) //auto rate
\r
489 if(pDM_Odm->TxRate != 0xFF)
\r
490 TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate);
\r
494 TxRate = (u1Byte) pMgntInfo->ForcedDataRate;
\r
497 value64 = (curRxOkCnt<<2);
\r
498 if(curTxOkCnt < value64) //Downlink
\r
499 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
\r
502 //DbgPrint("pDM_Odm->RFCalibrateInfo.ThermalValue = 0x%X\n", pDM_Odm->RFCalibrateInfo.ThermalValue);
\r
503 //if(pDM_Odm->RFCalibrateInfo.ThermalValue < pHalData->EEPROMThermalMeter)
\r
504 if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G))
\r
505 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
\r
510 case MGN_VHT2SS_MCS9:
\r
511 case MGN_VHT1SS_MCS9:
\r
512 case MGN_VHT1SS_MCS8:
\r
515 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea44f);
\r
516 case MGN_VHT2SS_MCS8:
\r
517 case MGN_VHT1SS_MCS7:
\r
521 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa44f);
\r
522 case MGN_VHT2SS_MCS7:
\r
523 case MGN_VHT2SS_MCS6:
\r
524 case MGN_VHT1SS_MCS6:
\r
525 case MGN_VHT1SS_MCS5:
\r
529 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa630);
\r
531 case MGN_VHT2SS_MCS5:
\r
532 case MGN_VHT2SS_MCS4:
\r
533 case MGN_VHT1SS_MCS4:
\r
534 case MGN_VHT1SS_MCS3:
\r
540 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa730);
\r
542 case MGN_VHT2SS_MCS3:
\r
543 case MGN_VHT2SS_MCS2:
\r
544 case MGN_VHT2SS_MCS1:
\r
545 case MGN_VHT1SS_MCS2:
\r
546 case MGN_VHT1SS_MCS1:
\r
554 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa830);
\r
556 case MGN_VHT2SS_MCS0:
\r
557 case MGN_VHT1SS_MCS0:
\r
562 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f);
\r
565 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
\r
573 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
\r
577 ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
\r
579 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA Turbo on: EDCA_BE:0x%lx\n",EDCA_BE));
\r
581 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = TRUE;
\r
583 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx \n",EDCA_BE_DL,EDCA_BE_UL,EDCA_BE));
\r
588 // Turn Off EDCA turbo here.
\r
589 // Restore original EDCA according to the declaration of AP.
\r
590 if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)
\r
592 Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, AC0_BE) );
\r
594 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE;
\r
595 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Restore EDCA BE: 0x%lx \n",pDM_Odm->WMMEDCA_BE));
\r
603 //check if edca turbo is disabled
\r
605 odm_IsEdcaTurboDisable(
\r
609 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
\r
610 PADAPTER Adapter = pDM_Odm->Adapter;
\r
611 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
\r
612 u4Byte IOTPeer=pMgntInfo->IOTPeer;
\r
614 if(pDM_Odm->bBtDisableEdcaTurbo)
\r
616 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n"));
\r
620 if((!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))||
\r
621 (pDM_Odm->bWIFITest)||
\r
622 (IOTPeer>= HT_IOT_PEER_MAX))
\r
624 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable\n"));
\r
629 // 1. We do not turn on EDCA turbo mode for some AP that has IOT issue
\r
630 // 2. User may disable EDCA Turbo mode with OID settings.
\r
631 if(pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO){
\r
632 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("IOTAction:EdcaTurboDisable\n"));
\r
641 //add iot case here: for MP/CE
\r
643 ODM_EdcaParaSelByIot(
\r
645 OUT u4Byte *EDCA_BE_UL,
\r
646 OUT u4Byte *EDCA_BE_DL
\r
649 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
\r
650 PADAPTER Adapter = pDM_Odm->Adapter;
\r
651 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
\r
653 u4Byte ICType=pDM_Odm->SupportICType;
\r
654 u1Byte WirelessMode=0xFF; //invalid value
\r
655 u4Byte RFType=pDM_Odm->RFType;
\r
656 u4Byte IOTPeerSubType=0;
\r
658 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
\r
659 u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE;
\r
661 if(pDM_Odm->pWirelessMode!=NULL)
\r
662 WirelessMode=*(pDM_Odm->pWirelessMode);
\r
664 ///////////////////////////////////////////////////////////
\r
665 ////list paramter for different platform
\r
667 IOTPeer=pMgntInfo->IOTPeer;
\r
668 IOTPeerSubType=pMgntInfo->IOTPeerSubtype;
\r
669 GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus);
\r
672 if(ICType==ODM_RTL8192D)
\r
675 if(pDM_Odm->RFType==ODM_2T2R)
\r
677 (*EDCA_BE_UL) = 0x60a42b; //0x5ea42b;
\r
678 (*EDCA_BE_DL) = 0x60a42b; //0x5ea42b;
\r
683 (*EDCA_BE_UL) = 0x6ea42b;
\r
684 (*EDCA_BE_DL) = 0x6ea42b;
\r
688 ////============================
\r
689 /// IOT case for MP
\r
690 ////============================
\r
695 if(pDM_Odm->SupportInterface==ODM_ITRF_PCIE){
\r
696 if((ICType==ODM_RTL8192C)&&(pDM_Odm->RFType==ODM_2T2R)) {
\r
697 (*EDCA_BE_UL) = 0x60a42b;
\r
698 (*EDCA_BE_DL) = 0x60a42b;
\r
702 (*EDCA_BE_UL) = 0x6ea42b;
\r
703 (*EDCA_BE_DL) = 0x6ea42b;
\r
708 if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY)
\r
710 (*EDCA_BE_UL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[ExtAdapter->MgntInfo.IOTPeer];
\r
711 (*EDCA_BE_DL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[ExtAdapter->MgntInfo.IOTPeer];
\r
714 #if (INTEL_PROXIMITY_SUPPORT == 1)
\r
715 if(pMgntInfo->IntelClassModeInfo.bEnableCA == TRUE)
\r
717 (*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f;
\r
722 if((pMgntInfo->IOTAction & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP|HT_IOT_ACT_AMSDU_ENABLE)))
\r
723 {// To check whether we shall force turn on TXOP configuration.
\r
724 if(!((*EDCA_BE_UL) & 0xffff0000))
\r
725 (*EDCA_BE_UL) |= 0x005e0000; // Force TxOP limit to 0x005e for UL.
\r
726 if(!((*EDCA_BE_DL) & 0xffff0000))
\r
727 (*EDCA_BE_DL) |= 0x005e0000; // Force TxOP limit to 0x005e for DL.
\r
730 //92D txop can't be set to 0x3e for cisco1250
\r
731 if((ICType!=ODM_RTL8192D) && (IOTPeer== HT_IOT_PEER_CISCO) &&(WirelessMode==ODM_WM_N24G))
\r
733 (*EDCA_BE_DL) = edca_setting_DL[IOTPeer];
\r
734 (*EDCA_BE_UL) = edca_setting_UL[IOTPeer];
\r
736 //merge from 92s_92c_merge temp brunch v2445 20120215
\r
737 else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B)))
\r
739 (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer];
\r
741 else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A)))
\r
743 (*EDCA_BE_DL) = 0xa630;
\r
746 else if(IOTPeer == HT_IOT_PEER_MARVELL)
\r
748 (*EDCA_BE_DL) = edca_setting_DL[IOTPeer];
\r
749 (*EDCA_BE_UL) = edca_setting_UL[IOTPeer];
\r
751 else if(IOTPeer == HT_IOT_PEER_ATHEROS)
\r
753 // Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue.
\r
754 if(WirelessMode==ODM_WM_G)
\r
755 (*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer];
\r
757 (*EDCA_BE_DL) = edca_setting_DL[IOTPeer];
\r
759 if(ICType == ODM_RTL8821)
\r
760 (*EDCA_BE_DL) = 0x5ea630;
\r
765 if((ICType == ODM_RTL8192D)&&(IOTPeerSubType == HT_IOT_PEER_LINKSYS_E4200_V1)&&((WirelessMode==ODM_WM_N5G)))
\r
767 (*EDCA_BE_DL) = 0x432b;
\r
768 (*EDCA_BE_UL) = 0x432b;
\r
773 if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE
\r
775 (*EDCA_BE_UL) = 0x5ea42b;
\r
776 (*EDCA_BE_DL) = 0x5ea42b;
\r
778 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx",(*EDCA_BE_UL),(*EDCA_BE_DL)));
\r
781 // Revised for Atheros DIR-655 IOT issue to improve down link TP, added by Roger, 2013.03.22.
\r
782 if((ICType == ODM_RTL8723A) && (IOTPeerSubType== HT_IOT_PEER_ATHEROS_DIR655) &&
\r
783 (pMgntInfo->dot11CurrentChannelNumber == 6))
\r
785 (*EDCA_BE_DL) = 0xa92b;
\r
788 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx",(*EDCA_BE_UL),(*EDCA_BE_DL)));
\r
794 odm_EdcaChooseTrafficIdx(
\r
796 IN u8Byte cur_tx_bytes,
\r
797 IN u8Byte cur_rx_bytes,
\r
798 IN BOOLEAN bBiasOnRx,
\r
799 OUT BOOLEAN *pbIsCurRDLState
\r
802 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
\r
807 if(cur_tx_bytes>(cur_rx_bytes*4))
\r
809 *pbIsCurRDLState=FALSE;
\r
810 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Uplink Traffic\n "));
\r
815 *pbIsCurRDLState=TRUE;
\r
816 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n"));
\r
822 if(cur_rx_bytes>(cur_tx_bytes*4))
\r
824 *pbIsCurRDLState=TRUE;
\r
825 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Downlink Traffic\n"));
\r
830 *pbIsCurRDLState=FALSE;
\r
831 ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n"));
\r
840 #if((DM_ODM_SUPPORT_TYPE==ODM_AP)||(DM_ODM_SUPPORT_TYPE==ODM_ADSL))
\r
842 void odm_EdcaParaInit(
\r
846 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
\r
847 prtl8192cd_priv priv = pDM_Odm->priv;
\r
848 int mode=priv->pmib->dot11BssType.net_work_type;
\r
850 static unsigned int slot_time, sifs_time;
\r
851 struct ParaRecord EDCA[4];
\r
853 memset(EDCA, 0, 4*sizeof(struct ParaRecord));
\r
858 if (mode & (ODM_WM_N24G|ODM_WM_N5G))
\r
861 if (mode & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G|ODM_WM_A))
\r
865 #ifdef RTK_AC_SUPPORT //for 11ac logo, edit aifs time for cca test cases
\r
866 if(AC_SIGMA_MODE != AC_SIGMA_NONE)
\r
871 #if((defined(RTL_MANUAL_EDCA))&&(DM_ODM_SUPPORT_TYPE==ODM_AP))
\r
872 if( priv->pmib->dot11QosEntry.ManualEDCA ) {
\r
873 if( OPMODE & WIFI_AP_STATE )
\r
874 memcpy(EDCA, priv->pmib->dot11QosEntry.AP_manualEDCA, 4*sizeof(struct ParaRecord));
\r
876 memcpy(EDCA, priv->pmib->dot11QosEntry.STA_manualEDCA, 4*sizeof(struct ParaRecord));
\r
880 ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time));
\r
883 ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time));
\r
886 #endif //RTL_MANUAL_EDCA
\r
889 if(OPMODE & WIFI_AP_STATE)
\r
891 memcpy(EDCA, rtl_ap_EDCA, 2*sizeof(struct ParaRecord));
\r
893 if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G))
\r
894 memcpy(&EDCA[VI], &rtl_ap_EDCA[VI_AG], 2*sizeof(struct ParaRecord));
\r
896 memcpy(&EDCA[VI], &rtl_ap_EDCA[VI], 2*sizeof(struct ParaRecord));
\r
900 memcpy(EDCA, rtl_sta_EDCA, 2*sizeof(struct ParaRecord));
\r
902 if(mode & (ODM_WM_A|ODM_WM_G|ODM_WM_N24G|ODM_WM_N5G))
\r
903 memcpy(&EDCA[VI], &rtl_sta_EDCA[VI_AG], 2*sizeof(struct ParaRecord));
\r
905 memcpy(&EDCA[VI], &rtl_sta_EDCA[VI], 2*sizeof(struct ParaRecord));
\r
910 ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[VI].TXOPlimit<< 16) | (EDCA[VI].ECWmax<< 12) | (EDCA[VI].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time));
\r
914 #if (DM_ODM_SUPPORT_TYPE==ODM_AP)
\r
915 ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[VI].AIFSN* slot_time));
\r
916 #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL)
\r
917 ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + 2* slot_time));
\r
923 ODM_Write4Byte(pDM_Odm, ODM_EDCA_VO_PARAM, (EDCA[VO].TXOPlimit<< 16) | (EDCA[VO].ECWmax<< 12) | (EDCA[VO].ECWmin<< 8) | (sifs_time + EDCA[VO].AIFSN* slot_time));
\r
924 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (EDCA[BE].TXOPlimit<< 16) | (EDCA[BE].ECWmax<< 12) | (EDCA[BE].ECWmin<< 8) | (sifs_time + EDCA[BE].AIFSN* slot_time));
\r
925 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (EDCA[BK].TXOPlimit<< 16) | (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | (sifs_time + EDCA[BK].AIFSN* slot_time));
\r
927 #if defined(RTK_AC_SUPPORT) && defined(RTL_MANUAL_EDCA) //for 11ac logo, make BK worse to seperate with BE.
\r
928 if((AC_SIGMA_MODE != AC_SIGMA_NONE) && (priv->pmib->dot11QosEntry.ManualEDCA))
\r
930 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (EDCA[BK].TXOPlimit<< 16) | (EDCA[BK].ECWmax<< 12) | (EDCA[BK].ECWmin<< 8) | 0xa4 );
\r
934 // ODM_Write1Byte(pDM_Odm,ACMHWCTRL, 0x00);
\r
936 priv->pshare->iot_mode_enable = 0;
\r
937 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)
\r
938 if (priv->pshare->rf_ft_var.wifi_beq_iot)
\r
939 priv->pshare->iot_mode_VI_exist = 0;
\r
941 #ifdef WMM_VIBE_PRI
\r
942 priv->pshare->iot_mode_BE_exist = 0;
\r
945 #ifdef WMM_BEBK_PRI
\r
946 priv->pshare->iot_mode_BK_exist = 0;
\r
950 priv->pshare->BE_cwmax_enhance = 0;
\r
953 #elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL)
\r
954 priv->pshare->iot_mode_BE_exist = 0;
\r
956 priv->pshare->iot_mode_VO_exist = 0;
\r
960 ODM_ChooseIotMainSTA(
\r
962 IN PSTA_INFO_T pstat
\r
965 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
\r
966 prtl8192cd_priv priv = pDM_Odm->priv;
\r
967 BOOLEAN bhighTP_found_pstat=FALSE;
\r
969 if ((GET_ROOT(priv)->up_time % 2) == 0) {
\r
970 unsigned int tx_2s_avg = 0;
\r
971 unsigned int rx_2s_avg = 0;
\r
972 int i=0, aggReady=0;
\r
973 unsigned long total_sum = (priv->pshare->current_tx_bytes+priv->pshare->current_rx_bytes);
\r
974 int assoc_num = GET_ROOT(priv)->assoc_num;
\r
976 if (GET_ROOT(priv)->pmib->miscEntry.vap_enable){
\r
977 for (i=0; i<RTL8192CD_NUM_VWLAN; ++i)
\r
978 assoc_num += GET_ROOT(priv)->pvap_priv[i]-> assoc_num;
\r
981 #ifdef UNIVERSAL_REPEATER
\r
982 if (IS_DRV_OPEN(GET_VXD_PRIV(GET_ROOT(priv))))
\r
983 assoc_num += GET_VXD_PRIV(GET_ROOT(priv))-> assoc_num;
\r
986 if(GET_ROOT(priv)->pmib->dot11WdsInfo.wdsEnabled)
\r
991 pstat->current_tx_bytes += pstat->tx_byte_cnt;
\r
992 pstat->current_rx_bytes += pstat->rx_byte_cnt;
\r
994 if (total_sum != 0) {
\r
995 if (total_sum <= 1000000) {
\r
996 tx_2s_avg = (unsigned int)((pstat->current_tx_bytes*100) / total_sum);
\r
997 rx_2s_avg = (unsigned int)((pstat->current_rx_bytes*100) / total_sum);
\r
999 tx_2s_avg = (unsigned int)(pstat->current_tx_bytes / (total_sum / 100));
\r
1000 rx_2s_avg = (unsigned int)(pstat->current_rx_bytes / (total_sum / 100));
\r
1005 #if(DM_ODM_SUPPORT_TYPE==ODM_ADSL)
\r
1006 if (pstat->ht_cap_len) {
\r
1007 if ((tx_2s_avg + rx_2s_avg) >=25 ) {//50//
\r
1009 priv->pshare->highTP_found_pstat = pstat;
\r
1010 bhighTP_found_pstat=TRUE;
\r
1013 #elif(DM_ODM_SUPPORT_TYPE==ODM_AP)
\r
1014 for(i=0; i<8; i++)
\r
1015 aggReady += (pstat->ADDBA_ready[i]);
\r
1017 if ((pstat->ht_cap_len && (
\r
1018 #ifdef SUPPORT_TX_AMSDU
\r
1021 aggReady)) || (pstat->IOTPeer==HT_IOT_PEER_INTEL))
\r
1023 if ((assoc_num==1) || (tx_2s_avg + rx_2s_avg >= 25)) {
\r
1024 priv->pshare->highTP_found_pstat = pstat;
\r
1027 #ifdef CLIENT_MODE
\r
1028 if (OPMODE & WIFI_STATION_STATE) {
\r
1029 if ((tx_2s_avg + rx_2s_avg) >= 20)
\r
1030 priv->pshare->highTP_found_pstat = pstat;
\r
1037 pstat->current_tx_bytes = pstat->tx_byte_cnt;
\r
1038 pstat->current_rx_bytes = pstat->rx_byte_cnt;
\r
1041 return bhighTP_found_pstat;
\r
1047 ODM_IotEdcaSwitch(
\r
1048 IN PVOID pDM_VOID,
\r
1049 IN unsigned char enable
\r
1052 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
\r
1053 prtl8192cd_priv priv = pDM_Odm->priv;
\r
1054 int mode=priv->pmib->dot11BssType.net_work_type;
\r
1055 unsigned int slot_time = 20, sifs_time = 10, BE_TXOP = 47, VI_TXOP = 94;
\r
1056 unsigned int vi_cw_max = 4, vi_cw_min = 3, vi_aifs;
\r
1057 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1058 u32 be_edca, vi_edca;
\r
1062 #if (DM_ODM_SUPPORT_TYPE==ODM_AP)
\r
1063 if (!(!priv->pmib->dot11OperationEntry.wifi_specific ||
\r
1064 ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific))
\r
1065 #ifdef CLIENT_MODE
\r
1066 || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific))
\r
1072 #ifdef RTK_AC_SUPPORT //for 11ac logo, do not dynamic switch edca
\r
1073 if(AC_SIGMA_MODE != AC_SIGMA_NONE)
\r
1077 if ((mode & (ODM_WM_N24G|ODM_WM_N5G)) && (priv->pshare->ht_sta_num
\r
1079 || ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum)
\r
1084 if (mode & (ODM_WM_N24G|ODM_WM_N5G|ODM_WM_G|ODM_WM_A)) {
\r
1093 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1098 #if (DM_ODM_SUPPORT_TYPE==ODM_ADSL)
\r
1099 if (priv->pshare->iot_mode_VO_exist) {
\r
1100 // to separate AC_VI and AC_BE to avoid using the same EDCA settings
\r
1101 if (priv->pshare->iot_mode_BE_exist) {
\r
1109 vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time);
\r
1111 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1112 vi_edca = ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)| (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs;
\r
1114 ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)| (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs);
\r
1117 #elif (DM_ODM_SUPPORT_TYPE==ODM_AP)
\r
1118 if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific) {
\r
1119 if (priv->pshare->iot_mode_VO_exist) {
\r
1120 #ifdef WMM_VIBE_PRI
\r
1121 if (priv->pshare->iot_mode_BE_exist)
\r
1125 vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time);
\r
1136 vi_aifs = (sifs_time + ((OPMODE & WIFI_AP_STATE)?1:2) * slot_time);
\r
1139 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1140 vi_edca = ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)
\r
1141 | (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs;
\r
1143 ODM_Write4Byte(pDM_Odm, ODM_EDCA_VI_PARAM, ((VI_TXOP*(1-priv->pshare->iot_mode_VO_exist)) << 16)
\r
1144 | (vi_cw_max << 12) | (vi_cw_min << 8) | vi_aifs);
\r
1147 #ifdef WMM_BEBK_PRI
\r
1148 #ifdef CONFIG_RTL_88E_SUPPORT
\r
1149 if ((GET_CHIP_VER(priv) == VERSION_8188E) && priv->pshare->iot_mode_BK_exist) {
\r
1150 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1151 be_edca = (10 << 12) | (6 << 8) | 0x4f;
\r
1153 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, (10 << 12) | (6 << 8) | 0x4f);
\r
1158 #if defined(CONFIG_WLAN_HAL_8881A)
\r
1159 if (GET_CHIP_VER(priv) == VERSION_8881A)
\r
1160 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BK_PARAM, 0xa64f);
\r
1167 #if (DM_ODM_SUPPORT_TYPE==ODM_AP)
\r
1168 if (priv->pshare->rf_ft_var.wifi_beq_iot && priv->pshare->iot_mode_VI_exist) {
\r
1169 #if defined(CONFIG_RTL_88E_SUPPORT) || defined(CONFIG_RTL_8812_SUPPORT)
\r
1170 if (GET_CHIP_VER(priv) == VERSION_8188E || GET_CHIP_VER(priv) == VERSION_8812E) {
\r
1171 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1172 be_edca = (10 << 12) | (6 << 8) | 0x4f;
\r
1174 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (10 << 12) | (6 << 8) | 0x4f);
\r
1180 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1181 be_edca = (10 << 12) | (4 << 8) | 0x4f;
\r
1183 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (10 << 12) | (4 << 8) | 0x4f);
\r
1186 } else if(!enable)
\r
1187 #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL)
\r
1188 if(!enable) //if iot is disable ,maintain original BEQ PARAM
\r
1191 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1192 be_edca = (((OPMODE & WIFI_AP_STATE)?6:10) << 12) | (4 << 8)
\r
1193 | (sifs_time + 3 * slot_time);
\r
1196 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (((OPMODE & WIFI_AP_STATE)?6:10) << 12) | (4 << 8)
\r
1197 | (sifs_time + 3 * slot_time));
\r
1199 #ifdef CONFIG_PCI_HCI
\r
1200 // ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) | (DIS_TXOP_CFE));
\r
1206 unsigned int cw_max;
\r
1207 #ifdef LOW_TP_TXOP
\r
1208 unsigned int txop_close;
\r
1211 #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP))
\r
1212 cw_max = ((priv->pshare->BE_cwmax_enhance) ? 10 : 6);
\r
1213 txop_close = ((priv->pshare->rf_ft_var.low_tp_txop && priv->pshare->rf_ft_var.low_tp_txop_close) ? 1 : 0);
\r
1215 if(priv->pshare->txop_enlarge == 0xe) //if intel case
\r
1216 txop = (txop_close ? 0 : (BE_TXOP*2));
\r
1217 else //if other case
\r
1218 txop = (txop_close ? 0: (BE_TXOP*priv->pshare->txop_enlarge));
\r
1221 if((priv->pshare->txop_enlarge==0xe)||(priv->pshare->txop_enlarge==0xd))
\r
1224 txop=BE_TXOP*priv->pshare->txop_enlarge;
\r
1228 if (priv->pshare->ht_sta_num
\r
1230 || ((OPMODE & WIFI_AP_STATE) && (mode & (ODM_WM_N24G|ODM_WM_N5G)) &&
\r
1231 priv->pmib->dot11WdsInfo.wdsEnabled && priv->pmib->dot11WdsInfo.wdsNum)
\r
1236 if (priv->pshare->txop_enlarge == 0xe) {
\r
1237 // is intel client, use a different edca value
\r
1238 //ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop<< 16) | (cw_max<< 12) | (4 << 8) | 0x1f);
\r
1239 if (pDM_Odm->RFType==ODM_1T1R) {
\r
1240 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1241 be_edca = (txop << 16) | (5 << 12) | (3 << 8) | 0x1f;
\r
1243 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (5 << 12) | (3 << 8) | 0x1f);
\r
1247 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1248 be_edca = (txop << 16) | (8 << 12) | (5 << 8) | 0x1f;
\r
1250 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (8 << 12) | (5 << 8) | 0x1f);
\r
1254 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1257 #ifdef CONFIG_PCI_HCI
\r
1258 // ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) & ~(DIS_TXOP_CFE));
\r
1260 priv->pshare->txop_enlarge = 2;
\r
1262 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)
\r
1263 #ifndef LOW_TP_TXOP
\r
1264 else if (priv->pshare->txop_enlarge == 0xd) {
\r
1265 // is intel ralink, use a different edca value
\r
1266 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1267 be_edca = (txop << 16) | (6 << 12) | (5 << 8) | 0x2b;
\r
1269 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) | (6 << 12) | (5 << 8) | 0x2b);
\r
1271 priv->pshare->txop_enlarge = 2;
\r
1277 // if (txop == 0) {
\r
1278 //#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1279 // disable_cfe = 1;
\r
1281 //#ifdef CONFIG_PCI_HCI
\r
1282 // ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) | (DIS_TXOP_CFE));
\r
1286 if (pDM_Odm->RFType==ODM_2T2R) {
\r
1287 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1288 be_edca = (txop << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time);
\r
1290 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) |
\r
1291 (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time));
\r
1295 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP)
\r
1297 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1298 be_edca = (txop << 16) |
\r
1299 (((priv->pshare->BE_cwmax_enhance) ? 10 : 5) << 12) | (3 << 8) | (sifs_time + 2 * slot_time);
\r
1301 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) |
\r
1302 (((priv->pshare->BE_cwmax_enhance) ? 10 : 5) << 12) | (3 << 8) | (sifs_time + 2 * slot_time));
\r
1307 PSTA_INFO_T pstat = priv->pshare->highTP_found_pstat;
\r
1308 if ((GET_CHIP_VER(priv)==VERSION_8881A) && pstat && (pstat->IOTPeer == HT_IOT_PEER_HTC))
\r
1309 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, 0x642b);
\r
1311 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1312 be_edca = (txop << 16) | (5 << 12) | (3 << 8) | (sifs_time + 2 * slot_time);
\r
1314 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (txop << 16) |
\r
1315 (5 << 12) | (3 << 8) | (sifs_time + 2 * slot_time));
\r
1324 #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined LOW_TP_TXOP))
\r
1325 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1326 be_edca = (BE_TXOP << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time);
\r
1328 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time));
\r
1331 #if defined(CONFIG_RTL_8196D) || defined(CONFIG_RTL_8197DL) || defined(CONFIG_RTL_8196E) || (defined(CONFIG_RTL_8197D) && !defined(CONFIG_PORT0_EXT_GIGA))
\r
1332 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1333 be_edca = (BE_TXOP*2 << 16) | (cw_max << 12) | (5 << 8) | (sifs_time + 3 * slot_time);
\r
1335 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP*2 << 16) | (cw_max << 12) | (5 << 8) | (sifs_time + 3 * slot_time));
\r
1338 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1339 be_edca = (BE_TXOP*2 << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time);
\r
1341 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (BE_TXOP*2 << 16) | (cw_max << 12) | (4 << 8) | (sifs_time + 3 * slot_time));
\r
1345 if (priv->pshare->txop_enlarge == 0xe) {
\r
1346 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1349 #ifdef CONFIG_PCI_HCI
\r
1350 ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) & ~(DIS_TXOP_CFE));
\r
1353 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1356 #ifdef CONFIG_PCI_HCI
\r
1357 ODM_Write2Byte(pDM_Odm, RD_CTRL, ODM_Read2Byte(pDM_Odm, RD_CTRL) | (DIS_TXOP_CFE));
\r
1366 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
\r
1367 notify_IOT_EDCA_switch(priv, be_edca, vi_edca, disable_cfe);
\r
1377 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
\r
1378 struct rtl8192cd_priv *priv=pDM_Odm->priv;
\r
1379 PSTA_INFO_T pstat = NULL;
\r
1383 unsigned int switch_turbo = 0, avg_tp;
\r
1385 ////////////////////////////////////////////////////////
\r
1386 // if EDCA Turbo function is not supported or Manual EDCA Setting
\r
1388 ////////////////////////////////////////////////////////
\r
1389 if(!(pDM_Odm->SupportAbility&ODM_MAC_EDCA_TURBO)){
\r
1390 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO NOT SUPPORTED\n"));
\r
1394 #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined(RTL_MANUAL_EDCA) && defined(WIFI_WMM))
\r
1395 if(priv->pmib->dot11QosEntry.ManualEDCA){
\r
1396 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: MANUAL SETTING\n"));
\r
1401 #if !(DM_ODM_SUPPORT_TYPE &ODM_AP)
\r
1402 //////////////////////////////////////////////////////
\r
1403 //find high TP STA every 2s
\r
1404 //////////////////////////////////////////////////////
\r
1405 if ((GET_ROOT(priv)->up_time % 2) == 0)
\r
1406 priv->pshare->highTP_found_pstat==NULL;
\r
1409 phead = &priv->asoc_list;
\r
1410 plist = phead->next;
\r
1411 while(plist != phead) {
\r
1412 pstat = list_entry(plist, struct stat_info, asoc_list);
\r
1414 if(ODM_ChooseIotMainSTA(pDM_Odm, pstat)); //find the correct station
\r
1416 if (plist == plist->next) //the last plist
\r
1418 plist = plist->next;
\r
1423 for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++) {
\r
1424 pstat = pDM_Odm->pODM_StaInfo[i];
\r
1425 if(IS_STA_VALID(pstat) && (ODM_ChooseIotMainSTA(pDM_Odm, pstat))) //find the correct station
\r
1429 //////////////////////////////////////////////////////
\r
1430 //if highTP STA is not found, then return
\r
1431 //////////////////////////////////////////////////////
\r
1432 if(priv->pshare->highTP_found_pstat==NULL) {
\r
1433 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("ODM_MAC_EDCA_TURBO OFF: NO HT STA FOUND\n"));
\r
1438 pstat=priv->pshare->highTP_found_pstat;
\r
1440 if((pstat->tx_avarage + pstat->rx_avarage) < (1<<17)) // 1M bps
\r
1446 if (!priv->pmib->dot11OperationEntry.wifi_specific
\r
1447 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)
\r
1448 ||((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific))
\r
1449 #elif(DM_ODM_SUPPORT_TYPE==ODM_ADSL)
\r
1450 || (priv->pmib->dot11OperationEntry.wifi_specific == 2)
\r
1453 if (priv->pshare->iot_mode_enable &&
\r
1454 ((priv->pshare->phw->VO_pkt_count > 50) ||
\r
1455 (priv->pshare->phw->VI_pkt_count > 50) ||
\r
1456 (priv->pshare->phw->BK_pkt_count > 50))) {
\r
1457 priv->pshare->iot_mode_enable = 0;
\r
1459 #ifdef CONFIG_WLAN_HAL_8881A
\r
1460 if (GET_CHIP_VER(priv) == VERSION_8881A) {
\r
1461 RTL_W32(0x460, 0x03086666);
\r
1463 #endif //CONFIG_WLAN_HAL_8881A
\r
1464 } else if ((!priv->pshare->iot_mode_enable) &&
\r
1465 ((priv->pshare->phw->VO_pkt_count < 50) &&
\r
1466 (priv->pshare->phw->VI_pkt_count < 50) &&
\r
1467 (priv->pshare->phw->BK_pkt_count < 50))) {
\r
1468 priv->pshare->iot_mode_enable++;
\r
1470 //#ifdef CONFIG_WLAN_HAL_8881A
\r
1472 if (GET_CHIP_VER(priv) == VERSION_8881A) {
\r
1473 if (get_bonding_type_8881A()==BOND_8881AB) {
\r
1474 RTL_W32(0x460, 0x03086666);
\r
1477 RTL_W32(0x460, 0x0320ffff);
\r
1480 #endif //CONFIG_WLAN_HAL_8881A
\r
1485 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)
\r
1486 if ((OPMODE & WIFI_AP_STATE) && priv->pmib->dot11OperationEntry.wifi_specific)
\r
1487 #elif (DM_ODM_SUPPORT_TYPE==ODM_ADSL)
\r
1488 if (priv->pmib->dot11OperationEntry.wifi_specific)
\r
1491 if (!priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count > 50)) {
\r
1492 priv->pshare->iot_mode_VO_exist++;
\r
1494 } else if (priv->pshare->iot_mode_VO_exist && (priv->pshare->phw->VO_pkt_count < 50)) {
\r
1495 priv->pshare->iot_mode_VO_exist = 0;
\r
1498 #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI)))
\r
1499 if (priv->pshare->iot_mode_VO_exist) {
\r
1500 //printk("[%s %d] BE_pkt_count=%d\n", __FUNCTION__, __LINE__, priv->pshare->phw->BE_pkt_count);
\r
1501 if (!priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count > 250)) {
\r
1502 priv->pshare->iot_mode_BE_exist++;
\r
1504 } else if (priv->pshare->iot_mode_BE_exist && (priv->pshare->phw->BE_pkt_count < 250)) {
\r
1505 priv->pshare->iot_mode_BE_exist = 0;
\r
1511 #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_BEBK_PRI)))
\r
1512 if (priv->pshare->phw->BE_pkt_count) {
\r
1513 //printk("[%s %d] BK_pkt_count=%d\n", __FUNCTION__, __LINE__, priv->pshare->phw->BK_pkt_count);
\r
1514 if (!priv->pshare->iot_mode_BK_exist && (priv->pshare->phw->BK_pkt_count > 250)) {
\r
1515 priv->pshare->iot_mode_BK_exist++;
\r
1517 } else if (priv->pshare->iot_mode_BK_exist && (priv->pshare->phw->BK_pkt_count < 250)) {
\r
1518 priv->pshare->iot_mode_BK_exist = 0;
\r
1524 #if (DM_ODM_SUPPORT_TYPE==ODM_AP)
\r
1525 if (priv->pshare->rf_ft_var.wifi_beq_iot)
\r
1527 if (!priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count > 50)) {
\r
1528 priv->pshare->iot_mode_VI_exist++;
\r
1530 } else if (priv->pshare->iot_mode_VI_exist && (priv->pshare->phw->VI_rx_pkt_count < 50)) {
\r
1531 priv->pshare->iot_mode_VI_exist = 0;
\r
1538 else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower) {
\r
1539 if (priv->pshare->txop_enlarge) {
\r
1540 priv->pshare->txop_enlarge = 0;
\r
1541 if (priv->pshare->iot_mode_enable)
\r
1546 #if(defined(CLIENT_MODE) && (DM_ODM_SUPPORT_TYPE==ODM_AP))
\r
1547 if ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific))
\r
1549 if (priv->pshare->iot_mode_enable &&
\r
1550 (((priv->pshare->phw->VO_pkt_count > 50) ||
\r
1551 (priv->pshare->phw->VI_pkt_count > 50) ||
\r
1552 (priv->pshare->phw->BK_pkt_count > 50)) ||
\r
1553 (pstat && (!pstat->ADDBA_ready[0]) & (!pstat->ADDBA_ready[3]))))
\r
1555 priv->pshare->iot_mode_enable = 0;
\r
1558 else if ((!priv->pshare->iot_mode_enable) &&
\r
1559 (((priv->pshare->phw->VO_pkt_count < 50) &&
\r
1560 (priv->pshare->phw->VI_pkt_count < 50) &&
\r
1561 (priv->pshare->phw->BK_pkt_count < 50)) &&
\r
1562 (pstat && (pstat->ADDBA_ready[0] | pstat->ADDBA_ready[3]))))
\r
1564 priv->pshare->iot_mode_enable++;
\r
1570 priv->pshare->phw->VO_pkt_count = 0;
\r
1571 priv->pshare->phw->VI_pkt_count = 0;
\r
1572 priv->pshare->phw->BK_pkt_count = 0;
\r
1574 #if((DM_ODM_SUPPORT_TYPE==ODM_ADSL)||((DM_ODM_SUPPORT_TYPE==ODM_AP)&&(defined WMM_VIBE_PRI)))
\r
1575 priv->pshare->phw->BE_pkt_count = 0;
\r
1578 #if(DM_ODM_SUPPORT_TYPE==ODM_AP)
\r
1579 if (priv->pshare->rf_ft_var.wifi_beq_iot)
\r
1580 priv->pshare->phw->VI_rx_pkt_count = 0;
\r
1586 if ((priv->up_time % 2) == 0) {
\r
1588 * decide EDCA content for different chip vendor
\r
1591 #if(DM_ODM_SUPPORT_TYPE==ODM_ADSL)
\r
1592 if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2)
\r
1594 #elif(DM_ODM_SUPPORT_TYPE==ODM_AP)
\r
1595 if (QOS_ENABLE && (!priv->pmib->dot11OperationEntry.wifi_specific ||
\r
1596 ((OPMODE & WIFI_AP_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2))
\r
1597 #ifdef CLIENT_MODE
\r
1598 || ((OPMODE & WIFI_STATION_STATE) && (priv->pmib->dot11OperationEntry.wifi_specific == 2))
\r
1605 if (pstat && pstat->rssi >= priv->pshare->rf_ft_var.txop_enlarge_upper) {
\r
1606 #ifdef LOW_TP_TXOP
\r
1607 if (pstat->IOTPeer==HT_IOT_PEER_INTEL)
\r
1609 if (priv->pshare->txop_enlarge != 0xe)
\r
1611 priv->pshare->txop_enlarge = 0xe;
\r
1613 if (priv->pshare->iot_mode_enable)
\r
1617 else if (priv->pshare->txop_enlarge != 2)
\r
1619 priv->pshare->txop_enlarge = 2;
\r
1620 if (priv->pshare->iot_mode_enable)
\r
1624 if (priv->pshare->txop_enlarge != 2)
\r
1626 if (pstat->IOTPeer==HT_IOT_PEER_INTEL)
\r
1627 priv->pshare->txop_enlarge = 0xe;
\r
1628 else if (pstat->IOTPeer==HT_IOT_PEER_RALINK)
\r
1629 priv->pshare->txop_enlarge = 0xd;
\r
1630 else if (pstat->IOTPeer==HT_IOT_PEER_HTC)
\r
1631 priv->pshare->txop_enlarge = 0;
\r
1633 priv->pshare->txop_enlarge = 2;
\r
1635 if (priv->pshare->iot_mode_enable)
\r
1640 else if (!pstat || pstat->rssi < priv->pshare->rf_ft_var.txop_enlarge_lower)
\r
1642 if (priv->pshare->txop_enlarge) {
\r
1643 priv->pshare->txop_enlarge = 0;
\r
1644 if (priv->pshare->iot_mode_enable)
\r
1649 #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&&( defined LOW_TP_TXOP))
\r
1650 // for Intel IOT, need to enlarge CW MAX from 6 to 10
\r
1651 if (pstat && pstat->IOTPeer==HT_IOT_PEER_INTEL && (((pstat->tx_avarage+pstat->rx_avarage)>>10) <
\r
1652 priv->pshare->rf_ft_var.cwmax_enhance_thd))
\r
1654 if (!priv->pshare->BE_cwmax_enhance && priv->pshare->iot_mode_enable)
\r
1656 priv->pshare->BE_cwmax_enhance = 1;
\r
1660 if (priv->pshare->BE_cwmax_enhance) {
\r
1661 priv->pshare->BE_cwmax_enhance = 0;
\r
1668 priv->pshare->current_tx_bytes = 0;
\r
1669 priv->pshare->current_rx_bytes = 0;
\r
1671 if ((GET_CHIP_VER(priv) == VERSION_8881A)||(GET_CHIP_VER(priv) == VERSION_8192E)|| (GET_CHIP_VER(priv) == VERSION_8188E) ){
\r
1672 unsigned int uldl_tp = (priv->pshare->current_tx_bytes+priv->pshare->current_rx_bytes)>>17;
\r
1673 if((uldl_tp > 40) && (priv->pshare->agg_to!= 1)) {
\r
1674 RTL_W8(0x462, 0x08);
\r
1675 priv->pshare->agg_to = 1;
\r
1676 } else if((uldl_tp < 35) && (priv->pshare->agg_to !=0)) {
\r
1677 RTL_W8(0x462, 0x02);
\r
1678 priv->pshare->agg_to = 0;
\r
1683 #if((DM_ODM_SUPPORT_TYPE==ODM_AP)&& defined( SW_TX_QUEUE))
\r
1684 if(AMPDU_ENABLE) {
\r
1685 #ifdef TX_EARLY_MODE
\r
1686 if (GET_TX_EARLY_MODE) {
\r
1687 if (!GET_EM_SWQ_ENABLE &&
\r
1688 ((priv->assoc_num > 1) ||
\r
1689 (pstat && pstat->IOTPeer != HT_IOT_PEER_UNKNOWN))) {
\r
1690 if ((priv->pshare->em_tx_byte_cnt >> 17) > EM_TP_UP_BOUND)
\r
1691 priv->pshare->reach_tx_limit_cnt++;
\r
1693 priv->pshare->reach_tx_limit_cnt = 0;
\r
1695 if (priv->pshare->txop_enlarge && priv->pshare->reach_tx_limit_cnt) { //>= WAIT_TP_TIME//
\r
1696 GET_EM_SWQ_ENABLE = 1;
\r
1697 priv->pshare->reach_tx_limit_cnt = 0;
\r
1699 if (pstat->IOTPeer == HT_IOT_PEER_INTEL)
\r
1700 MAX_EM_QUE_NUM = 12;
\r
1701 else if (pstat->IOTPeer == HT_IOT_PEER_RALINK)
\r
1702 MAX_EM_QUE_NUM = 10;
\r
1707 else if (GET_EM_SWQ_ENABLE) {
\r
1708 if ((priv->pshare->em_tx_byte_cnt >> 17) < EM_TP_LOW_BOUND)
\r
1709 priv->pshare->reach_tx_limit_cnt++;
\r
1711 priv->pshare->reach_tx_limit_cnt = 0;
\r
1713 if (!priv->pshare->txop_enlarge || priv->pshare->reach_tx_limit_cnt >= WAIT_TP_TIME) {
\r
1714 GET_EM_SWQ_ENABLE = 0;
\r
1715 priv->pshare->reach_tx_limit_cnt = 0;
\r
1722 #if defined(CONFIG_WLAN_HAL_8881A) || defined(CONFIG_WLAN_HAL_8192EE) || defined(CONFIG_RTL_8812_SUPPORT)
\r
1723 if (pDM_Odm->SupportICType == ODM_RTL8881A || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8812) {
\r
1724 if (priv->assoc_num > 9)
\r
1726 if (priv->swq_txmac_chg >= priv->pshare->rf_ft_var.swq_en_highthd){
\r
1727 if ((priv->swq_decision == 0)){
\r
1729 if (priv->pshare->txop_enlarge == 0)
\r
1730 priv->pshare->txop_enlarge = 2;
\r
1731 priv->swq_decision = 1;
\r
1735 if ((switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0))
\r
1737 priv->pshare->txop_enlarge = 2;
\r
1742 else if(priv->swq_txmac_chg <= priv->pshare->rf_ft_var.swq_dis_lowthd){
\r
1743 priv->swq_decision = 0;
\r
1745 else if ((priv->swq_decision == 1) && (switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) {
\r
1746 priv->pshare->txop_enlarge = 2;
\r
1750 priv->swq_decision = 0;
\r
1752 } else if(CONFIG_WLAN_NOT_HAL_EXIST)
\r
1755 if (priv->assoc_num > 1)
\r
1757 if (priv->swq_txmac_chg >= priv->pshare->rf_ft_var.swq_en_highthd){
\r
1758 if ((priv->swq_decision == 0)){
\r
1760 if (priv->pshare->txop_enlarge == 0)
\r
1761 priv->pshare->txop_enlarge = 2;
\r
1762 priv->swq_decision = 1;
\r
1766 if ((switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0))
\r
1768 priv->pshare->txop_enlarge = 2;
\r
1773 else if(priv->swq_txmac_chg <= priv->pshare->rf_ft_var.swq_dis_lowthd){
\r
1774 priv->swq_decision = 0;
\r
1776 else if ((priv->swq_decision == 1) && (switch_turbo > 0) && (priv->pshare->txop_enlarge == 0) && (priv->pshare->iot_mode_enable != 0)) {
\r
1777 priv->pshare->txop_enlarge = 2;
\r
1781 //#if (defined CONFIG_RTL_819XD))
\r
1782 else if (priv->assoc_num == 1 && (priv->up_time % 2 == 0)
\r
1783 #if (DM_ODM_SUPPORT_TYPE==ODM_AP) && defined(TX_EARLY_MODE)
\r
1784 && (!GET_TX_EARLY_MODE || !GET_EM_SWQ_ENABLE)
\r
1787 if ((pstat) && (pstat->ADDBA_ready[0] | pstat->ADDBA_ready[3])) {
\r
1788 //int en_thd = 14417920>>(priv->up_time % 2);
\r
1789 avg_tp = (pstat->current_tx_bytes >> 17);
\r
1791 //if ((priv->swq_decision == 0) && (pstat->current_tx_bytes > en_thd) && (pstat->current_rx_bytes > en_thd) ) { //50Mbps
\r
1792 if ((priv->swq_decision == 0) && (avg_tp > TP_HIGH_WATER_MARK)) { //55Mbps
\r
1793 //printk("[%s:%d] swq_decision=1 current_tp: %d Mbps\n", __FUNCTION__, __LINE__, avg_tp);
\r
1794 priv->swq_decision = 1;
\r
1796 //else if ((priv->swq_decision == 1) && ((pstat->tx_avarage < 4587520) || (pstat->rx_avarage < 4587520))) { //35Mbps
\r
1797 else if ((priv->swq_decision == 1) && (avg_tp < TP_LOW_WATER_MARK)) { //35Mbps
\r
1798 //printk("[%s:%d] swq_decision=0 current_tp: %d Mbps\n", __FUNCTION__, __LINE__, avg_tp);
\r
1799 priv->swq_decision = 0;
\r
1802 priv->swq_decision = 0;
\r
1806 if( (priv->swq_decision == 1)
\r
1807 #if (DM_ODM_SUPPORT_TYPE==ODM_AP) && defined(TX_EARLY_MODE)
\r
1808 || (GET_EM_SWQ_ENABLE == 1)
\r
1812 priv->swqen_keeptime = priv->up_time;
\r
1815 priv->swqen_keeptime = 0;
\r
1821 #ifdef LOW_TP_TXOP
\r
1822 if ((!priv->pmib->dot11OperationEntry.wifi_specific || (priv->pmib->dot11OperationEntry.wifi_specific == 2))
\r
1824 if (switch_turbo || priv->pshare->rf_ft_var.low_tp_txop) {
\r
1825 unsigned int thd_tp;
\r
1826 unsigned char under_thd;
\r
1827 unsigned int curr_tp;
\r
1829 if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G| ODM_WM_G))
\r
1831 // Determine the upper bound throughput threshold.
\r
1832 if (priv->pmib->dot11BssType.net_work_type & (ODM_WM_N24G|ODM_WM_N5G)) {
\r
1833 if (priv->assoc_num && priv->assoc_num != priv->pshare->ht_sta_num)
\r
1834 thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g;
\r
1836 thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_n;
\r
1839 thd_tp = priv->pshare->rf_ft_var.low_tp_txop_thd_g;
\r
1841 // Determine to close txop.
\r
1842 #if defined(UNIVERSAL_REPEATER) || defined(MBSSID)
\r
1843 if(IS_STA_VALID(pstat))
\r
1845 struct rtl8192cd_priv *tmppriv;
\r
1846 struct aid_obj *aidarray;
\r
1847 aidarray = container_of(pstat, struct aid_obj, station);
\r
1848 tmppriv = aidarray->priv;
\r
1850 curr_tp = (unsigned int)(tmppriv->ext_stats.tx_avarage>>17) + (unsigned int)(tmppriv->ext_stats.rx_avarage>>17);
\r
1854 curr_tp = (unsigned int)(priv->ext_stats.tx_avarage>>17) + (unsigned int)(priv->ext_stats.rx_avarage>>17);
\r
1855 if (curr_tp <= thd_tp && curr_tp >= priv->pshare->rf_ft_var.low_tp_txop_thd_low)
\r
1865 if (switch_turbo)
\r
1867 priv->pshare->rf_ft_var.low_tp_txop_close = under_thd;
\r
1868 priv->pshare->rf_ft_var.low_tp_txop_count = 0;
\r
1870 else if (priv->pshare->iot_mode_enable && (priv->pshare->rf_ft_var.low_tp_txop_close != under_thd)) {
\r
1871 priv->pshare->rf_ft_var.low_tp_txop_count++;
\r
1872 if (priv->pshare->rf_ft_var.low_tp_txop_close) {
\r
1873 priv->pshare->rf_ft_var.low_tp_txop_count = priv->pshare->rf_ft_var.low_tp_txop_delay;
\r
1875 if (priv->pshare->rf_ft_var.low_tp_txop_count ==priv->pshare->rf_ft_var.low_tp_txop_delay)
\r
1878 priv->pshare->rf_ft_var.low_tp_txop_count = 0;
\r
1879 priv->pshare->rf_ft_var.low_tp_txop_close = under_thd;
\r
1885 priv->pshare->rf_ft_var.low_tp_txop_count = 0;
\r
1891 #ifdef WMM_DSCP_C42
\r
1892 if (switch_turbo) {
\r
1893 if (!priv->pshare->iot_mode_enable && !priv->pshare->aggrmax_change) {
\r
1894 RTL_W16(0x4ca, 0x0404);
\r
1895 priv->pshare->aggrmax_change = 1;
\r
1897 else if (priv->pshare->iot_mode_enable && priv->pshare->aggrmax_change) {
\r
1898 RTL_W16(0x4ca, priv->pshare->aggrmax_bak);
\r
1899 priv->pshare->aggrmax_change = 0;
\r
1903 #ifdef TX_EARLY_MODE
\r
1904 unsigned int em_tp = ((priv->ext_stats.tx_avarage>>17) + (priv->ext_stats.rx_avarage>>17));
\r
1906 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (0x5e << 16) | (4 << 12) | (3 << 8) | 0x19);
\r
1907 else //if (em_tp < 75)
\r
1908 ODM_Write4Byte(pDM_Odm, ODM_EDCA_BE_PARAM, (0x5e << 16) | (6 << 12) | (5 << 8) | 0x2b);
\r
1911 ODM_IotEdcaSwitch( pDM_Odm, priv->pshare->iot_mode_enable );
\r