1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
21 //============================================================
23 //============================================================
25 #include "Mp_Precomp.h"
26 #include "phydm_precomp.h"
29 const u2Byte dB_Invert_Table[8][12] = {
30 { 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4},
31 { 4, 5, 6, 6, 7, 8, 9, 10, 11, 13, 14, 16},
32 { 18, 20, 22, 25, 28, 32, 35, 40, 45, 50, 56, 63},
33 { 71, 79, 89, 100, 112, 126, 141, 158, 178, 200, 224, 251},
34 { 282, 316, 355, 398, 447, 501, 562, 631, 708, 794, 891, 1000},
35 { 1122, 1259, 1413, 1585, 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981},
36 { 4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000, 11220, 12589, 14125, 15849},
37 { 17783, 19953, 22387, 25119, 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535}};
40 //============================================================
41 // Local Function predefine.
42 //============================================================
54 odm_AntennaDiversityInit(
63 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
65 ODM_UpdateInitRateWorkItemCallback(
72 odm_GlobalAdapterCheck(
76 //Remove RAMask by RS_James
87 //Remove Edca by Yu Chen
91 odm_UpdatePowerTrainingState(
100 //============================================================
102 //============================================================
105 ODM_InitMpDriverStatus(
109 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
111 // Decide when compile time
113 pDM_Odm->mp_mode = TRUE;
115 pDM_Odm->mp_mode = FALSE;
118 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
120 PADAPTER Adapter = pDM_Odm->Adapter;
122 // Update information every period
123 pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode;
127 // MP mode is always false at AP side
128 pDM_Odm->mp_mode = FALSE;
134 ODM_UpdateMpDriverStatus(
138 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
142 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
143 PADAPTER Adapter = pDM_Odm->Adapter;
145 // Update information erery period
146 pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode;
156 odm_CommonInfoSelfInit(
160 pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
161 pDM_Odm->bCckHighPower = (BOOLEAN) ODM_GetBBReg(pDM_Odm, ODM_REG(CCK_RPT_FORMAT,pDM_Odm), ODM_BIT(CCK_RPT_FORMAT,pDM_Odm));
162 pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH,pDM_Odm), ODM_BIT(BB_RX_PATH,pDM_Odm));
163 #if (DM_ODM_SUPPORT_TYPE != ODM_CE)
164 pDM_Odm->pbNet_closed = &pDM_Odm->BOOLEAN_temp;
167 PHYDM_InitDebugSetting(pDM_Odm);
168 ODM_InitMpDriverStatus(pDM_Odm);
170 pDM_Odm->TxRate = 0xFF;
175 odm_CommonInfoSelfUpdate(
183 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
185 PADAPTER Adapter = pDM_Odm->Adapter;
186 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
188 pEntry = pDM_Odm->pODM_StaInfo[0];
189 if(pMgntInfo->mAssoc)
193 pEntry->MacAddr[i] = pMgntInfo->Bssid[i];
199 pEntry->MacAddr[i] = 0;
202 //STA mode is linked to AP
203 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[0]) && !ACTING_AS_AP(Adapter))
204 pDM_Odm->bsta_state = TRUE;
206 pDM_Odm->bsta_state = FALSE;
210 if(*(pDM_Odm->pBandWidth) == ODM_BW40M)
212 if(*(pDM_Odm->pSecChOffset) == 1)
213 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) -2;
214 else if(*(pDM_Odm->pSecChOffset) == 2)
215 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) +2;
218 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel);
220 for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
222 pEntry = pDM_Odm->pODM_StaInfo[i];
223 if(IS_STA_VALID(pEntry))
228 pDM_Odm->bOneEntryOnly = TRUE;
230 pDM_Odm->bOneEntryOnly = FALSE;
232 // Update MP driver status
233 ODM_UpdateMpDriverStatus(pDM_Odm);
237 odm_CommonInfoSelfReset(
241 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
242 pDM_Odm->PhyDbgInfo.NumQryBeaconPkt = 0;
248 IN PDM_ODM_T pDM_Odm,
249 IN u1Byte Structure_Type
253 PVOID pStruct = NULL;
255 switch (Structure_Type){
256 case PHYDM_FALSEALMCNT:
257 pStruct = &FalseAlmCnt;
261 pStruct = &DM_CfoTrack;
269 switch (Structure_Type){
270 case PHYDM_FALSEALMCNT:
271 pStruct = &(pDM_Odm->FalseAlmCnt);
275 pStruct = &(pDM_Odm->DM_CfoTrack);
291 #if (RTL8821A_SUPPORT == 1)
292 if(pDM_Odm->SupportICType & ODM_RTL8821)
293 odm_HWSetting_8821A(pDM_Odm);
299 // 2011/09/21 MH Add to describe different team necessary resource allocate??
307 odm_CommonInfoSelfInit(pDM_Odm);
308 odm_DIGInit(pDM_Odm);
309 Phydm_NHMCounterStatisticsInit(pDM_Odm);
310 Phydm_AdaptivityInit(pDM_Odm);
311 odm_RateAdaptiveMaskInit(pDM_Odm);
312 ODM_CfoTrackingInit(pDM_Odm);
313 ODM_EdcaTurboInit(pDM_Odm);
314 odm_RSSIMonitorInit(pDM_Odm);
315 odm_TXPowerTrackingInit(pDM_Odm);
316 odm_AntennaDiversityInit(pDM_Odm);
317 odm_AutoChannelSelectInit(pDM_Odm);
319 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
320 ODM_ClearTxPowerTrackingState(pDM_Odm);
321 odm_PathDiversityInit(pDM_Odm);
324 if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
326 odm_DynamicBBPowerSavingInit(pDM_Odm);
327 odm_DynamicTxPowerInit(pDM_Odm);
329 #if (RTL8188E_SUPPORT == 1)
330 if(pDM_Odm->SupportICType==ODM_RTL8188E)
332 odm_PrimaryCCA_Init(pDM_Odm);
333 ODM_RAInfo_Init_all(pDM_Odm);
337 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
339 #if (RTL8723B_SUPPORT == 1)
340 if(pDM_Odm->SupportICType == ODM_RTL8723B)
341 odm_SwAntDetectInit(pDM_Odm);
344 #if (RTL8192E_SUPPORT == 1)
345 if(pDM_Odm->SupportICType==ODM_RTL8192E)
346 odm_PrimaryCCA_Check_Init(pDM_Odm);
349 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
350 #if (RTL8723A_SUPPORT == 1)
351 if(pDM_Odm->SupportICType == ODM_RTL8723A)
352 odm_PSDMonitorInit(pDM_Odm);
355 #if (RTL8192D_SUPPORT == 1)
356 if(pDM_Odm->SupportICType==ODM_RTL8192D)
357 odm_PathDivInit_92D(pDM_Odm);
360 #if ((RTL8192C_SUPPORT == 1) || (RTL8192D_SUPPORT == 1))
361 if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D))
362 odm_RXHPInit(pDM_Odm);
376 #if (defined(CONFIG_HW_ANTENNA_DIVERSITY))
377 ODM_AntDivReset(pDM_Odm);
382 // 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM.
383 // You can not add any dummy function here, be care, you can only use DM structure
384 // to perform any new ODM_DM.
391 ODM_AsocEntry_Init(pDM_Odm);
392 odm_CommonInfoSelfUpdate(pDM_Odm);
393 phydm_BasicDbgMessage(pDM_Odm);
394 odm_HWSetting(pDM_Odm);
395 odm_FalseAlarmCounterStatistics(pDM_Odm);
396 odm_RSSIMonitorCheck(pDM_Odm);
398 if(*(pDM_Odm->pbPowerSaving) == TRUE)
400 odm_DIGbyRSSI_LPS(pDM_Odm);
401 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("DMWatchdog in power saving mode\n"));
405 Phydm_CheckAdaptivity(pDM_Odm);
406 odm_UpdatePowerTrainingState(pDM_Odm);
409 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
410 pDM_Odm->bAdaOn = Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue);
412 odm_CCKPacketDetectionThresh(pDM_Odm);
413 odm_RefreshRateAdaptiveMask(pDM_Odm);
414 odm_RefreshBasicRateMask(pDM_Odm);
415 odm_DynamicBBPowerSaving(pDM_Odm);
416 odm_EdcaTurboCheck(pDM_Odm);
417 odm_PathDiversity(pDM_Odm);
418 ODM_CfoTracking(pDM_Odm);
419 odm_DynamicTxPower(pDM_Odm);
420 odm_AntennaDiversity(pDM_Odm);
422 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
424 ODM_TXPowerTrackingCheck(pDM_Odm);
426 if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
427 odm_IQCalibrate(pDM_Odm);
430 if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
432 #if (RTL8192D_SUPPORT == 1)
433 if(pDM_Odm->SupportICType==ODM_RTL8192D)
434 ODM_DynamicEarlyMode(pDM_Odm);
437 #if (RTL8188E_SUPPORT == 1)
438 if(pDM_Odm->SupportICType==ODM_RTL8188E)
439 odm_DynamicPrimaryCCA(pDM_Odm);
442 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
444 #if (RTL8192E_SUPPORT == 1)
445 if(pDM_Odm->SupportICType==ODM_RTL8192E)
446 odm_DynamicPrimaryCCA_Check(pDM_Odm);
449 #if( DM_ODM_SUPPORT_TYPE == ODM_WIN)
450 #if ((RTL8192C_SUPPORT == 1) || (RTL8192D_SUPPORT == 1))
451 if(pDM_Odm->SupportICType & (ODM_RTL8192C|ODM_RTL8192D))
458 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
462 odm_CommonInfoSelfReset(pDM_Odm);
468 // Init /.. Fixed HW value. Only init time.
472 IN PDM_ODM_T pDM_Odm,
473 IN ODM_CMNINFO_E CmnInfo,
478 // This section is used for init value
485 case ODM_CMNINFO_ABILITY:
486 pDM_Odm->SupportAbility = (u4Byte)Value;
489 case ODM_CMNINFO_RF_TYPE:
490 pDM_Odm->RFType = (u1Byte)Value;
493 case ODM_CMNINFO_PLATFORM:
494 pDM_Odm->SupportPlatform = (u1Byte)Value;
497 case ODM_CMNINFO_INTERFACE:
498 pDM_Odm->SupportInterface = (u1Byte)Value;
501 case ODM_CMNINFO_MP_TEST_CHIP:
502 pDM_Odm->bIsMPChip= (u1Byte)Value;
505 case ODM_CMNINFO_IC_TYPE:
506 pDM_Odm->SupportICType = Value;
509 case ODM_CMNINFO_CUT_VER:
510 pDM_Odm->CutVersion = (u1Byte)Value;
513 case ODM_CMNINFO_FAB_VER:
514 pDM_Odm->FabVersion = (u1Byte)Value;
517 case ODM_CMNINFO_RFE_TYPE:
518 pDM_Odm->RFEType = (u1Byte)Value;
521 case ODM_CMNINFO_RF_ANTENNA_TYPE:
522 pDM_Odm->AntDivType= (u1Byte)Value;
525 case ODM_CMNINFO_BOARD_TYPE:
526 pDM_Odm->BoardType = (u1Byte)Value;
529 case ODM_CMNINFO_PACKAGE_TYPE:
530 pDM_Odm->PackageType = (u1Byte)Value;
533 case ODM_CMNINFO_EXT_LNA:
534 pDM_Odm->ExtLNA = (u1Byte)Value;
537 case ODM_CMNINFO_5G_EXT_LNA:
538 pDM_Odm->ExtLNA5G = (u1Byte)Value;
541 case ODM_CMNINFO_EXT_PA:
542 pDM_Odm->ExtPA = (u1Byte)Value;
545 case ODM_CMNINFO_5G_EXT_PA:
546 pDM_Odm->ExtPA5G = (u1Byte)Value;
549 case ODM_CMNINFO_GPA:
550 pDM_Odm->TypeGPA= (ODM_TYPE_GPA_E)Value;
552 case ODM_CMNINFO_APA:
553 pDM_Odm->TypeAPA= (ODM_TYPE_APA_E)Value;
555 case ODM_CMNINFO_GLNA:
556 pDM_Odm->TypeGLNA= (ODM_TYPE_GLNA_E)Value;
558 case ODM_CMNINFO_ALNA:
559 pDM_Odm->TypeALNA= (ODM_TYPE_ALNA_E)Value;
562 case ODM_CMNINFO_EXT_TRSW:
563 pDM_Odm->ExtTRSW = (u1Byte)Value;
565 case ODM_CMNINFO_PATCH_ID:
566 pDM_Odm->PatchID = (u1Byte)Value;
568 case ODM_CMNINFO_BINHCT_TEST:
569 pDM_Odm->bInHctTest = (BOOLEAN)Value;
571 case ODM_CMNINFO_BWIFI_TEST:
572 pDM_Odm->bWIFITest = (BOOLEAN)Value;
574 case ODM_CMNINFO_SMART_CONCURRENT:
575 pDM_Odm->bDualMacSmartConcurrent = (BOOLEAN )Value;
577 case ODM_CMNINFO_DOMAIN_CODE_2G:
578 pDM_Odm->odm_Regulation2_4G = (u1Byte)Value;
580 case ODM_CMNINFO_DOMAIN_CODE_5G:
581 pDM_Odm->odm_Regulation5G = (u1Byte)Value;
583 case ODM_CMNINFO_IQKFWOFFLOAD:
584 pDM_Odm->IQKFWOffload = (u1Byte)Value;
586 //To remove the compiler warning, must add an empty default statement to handle the other values.
598 IN PDM_ODM_T pDM_Odm,
599 IN ODM_CMNINFO_E CmnInfo,
604 // Hook call by reference pointer.
609 // Dynamic call by reference pointer.
611 case ODM_CMNINFO_MAC_PHY_MODE:
612 pDM_Odm->pMacPhyMode = (u1Byte *)pValue;
615 case ODM_CMNINFO_TX_UNI:
616 pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue;
619 case ODM_CMNINFO_RX_UNI:
620 pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue;
623 case ODM_CMNINFO_WM_MODE:
624 pDM_Odm->pWirelessMode = (u1Byte *)pValue;
627 case ODM_CMNINFO_BAND:
628 pDM_Odm->pBandType = (u1Byte *)pValue;
631 case ODM_CMNINFO_SEC_CHNL_OFFSET:
632 pDM_Odm->pSecChOffset = (u1Byte *)pValue;
635 case ODM_CMNINFO_SEC_MODE:
636 pDM_Odm->pSecurity = (u1Byte *)pValue;
640 pDM_Odm->pBandWidth = (u1Byte *)pValue;
643 case ODM_CMNINFO_CHNL:
644 pDM_Odm->pChannel = (u1Byte *)pValue;
647 case ODM_CMNINFO_DMSP_GET_VALUE:
648 pDM_Odm->pbGetValueFromOtherMac = (BOOLEAN *)pValue;
651 case ODM_CMNINFO_BUDDY_ADAPTOR:
652 pDM_Odm->pBuddyAdapter = (PADAPTER *)pValue;
655 case ODM_CMNINFO_DMSP_IS_MASTER:
656 pDM_Odm->pbMasterOfDMSP = (BOOLEAN *)pValue;
659 case ODM_CMNINFO_SCAN:
660 pDM_Odm->pbScanInProcess = (BOOLEAN *)pValue;
663 case ODM_CMNINFO_POWER_SAVING:
664 pDM_Odm->pbPowerSaving = (BOOLEAN *)pValue;
667 case ODM_CMNINFO_ONE_PATH_CCA:
668 pDM_Odm->pOnePathCCA = (u1Byte *)pValue;
671 case ODM_CMNINFO_DRV_STOP:
672 pDM_Odm->pbDriverStopped = (BOOLEAN *)pValue;
675 case ODM_CMNINFO_PNP_IN:
676 pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (BOOLEAN *)pValue;
679 case ODM_CMNINFO_INIT_ON:
680 pDM_Odm->pinit_adpt_in_progress = (BOOLEAN *)pValue;
683 case ODM_CMNINFO_ANT_TEST:
684 pDM_Odm->pAntennaTest = (u1Byte *)pValue;
687 case ODM_CMNINFO_NET_CLOSED:
688 pDM_Odm->pbNet_closed = (BOOLEAN *)pValue;
691 case ODM_CMNINFO_FORCED_RATE:
692 pDM_Odm->pForcedDataRate = (pu2Byte)pValue;
695 case ODM_CMNINFO_FORCED_IGI_LB:
696 pDM_Odm->pu1ForcedIgiLb = (u1Byte *)pValue;
699 case ODM_CMNINFO_P2P_LINK:
700 pDM_Odm->DM_DigTable.pbP2pLinkInProgress = (u1Byte *)pValue;
703 case ODM_CMNINFO_FCS_MODE:
704 pDM_Odm->pIsFcsModeEnable = (BOOLEAN *)pValue;
708 //case ODM_CMNINFO_RTSTA_AID:
709 // pDM_Odm->pAidMap = (u1Byte *)pValue;
712 //case ODM_CMNINFO_BT_COEXIST:
713 // pDM_Odm->BTCoexist = (BOOLEAN *)pValue;
715 //case ODM_CMNINFO_STA_STATUS:
716 //pDM_Odm->pODM_StaInfo[] = (PSTA_INFO_T)pValue;
719 //case ODM_CMNINFO_PHY_STATUS:
720 // pDM_Odm->pPhyInfo = (ODM_PHY_INFO *)pValue;
723 //case ODM_CMNINFO_MAC_STATUS:
724 // pDM_Odm->pMacInfo = (ODM_MAC_INFO *)pValue;
726 //To remove the compiler warning, must add an empty default statement to handle the other values.
737 ODM_CmnInfoPtrArrayHook(
738 IN PDM_ODM_T pDM_Odm,
739 IN ODM_CMNINFO_E CmnInfo,
745 // Hook call by reference pointer.
750 // Dynamic call by reference pointer.
752 case ODM_CMNINFO_STA_STATUS:
753 pDM_Odm->pODM_StaInfo[Index] = (PSTA_INFO_T)pValue;
755 //To remove the compiler warning, must add an empty default statement to handle the other values.
765 // Update Band/CHannel/.. The values are dynamic but non-per-packet.
769 IN PDM_ODM_T pDM_Odm,
775 // This init variable may be changed in run time.
779 case ODM_CMNINFO_LINK_IN_PROGRESS:
780 pDM_Odm->bLinkInProcess = (BOOLEAN)Value;
783 case ODM_CMNINFO_ABILITY:
784 pDM_Odm->SupportAbility = (u4Byte)Value;
787 case ODM_CMNINFO_RF_TYPE:
788 pDM_Odm->RFType = (u1Byte)Value;
791 case ODM_CMNINFO_WIFI_DIRECT:
792 pDM_Odm->bWIFI_Direct = (BOOLEAN)Value;
795 case ODM_CMNINFO_WIFI_DISPLAY:
796 pDM_Odm->bWIFI_Display = (BOOLEAN)Value;
799 case ODM_CMNINFO_LINK:
800 pDM_Odm->bLinked = (BOOLEAN)Value;
803 case ODM_CMNINFO_STATION_STATE:
804 pDM_Odm->bsta_state = (BOOLEAN)Value;
807 case ODM_CMNINFO_RSSI_MIN:
808 pDM_Odm->RSSI_Min= (u1Byte)Value;
811 case ODM_CMNINFO_DBG_COMP:
812 pDM_Odm->DebugComponents = Value;
815 case ODM_CMNINFO_DBG_LEVEL:
816 pDM_Odm->DebugLevel = (u4Byte)Value;
818 case ODM_CMNINFO_RA_THRESHOLD_HIGH:
819 pDM_Odm->RateAdaptive.HighRSSIThresh = (u1Byte)Value;
822 case ODM_CMNINFO_RA_THRESHOLD_LOW:
823 pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value;
825 // The following is for BT HS mode and BT coexist mechanism.
826 case ODM_CMNINFO_BT_ENABLED:
827 pDM_Odm->bBtEnabled = (BOOLEAN)Value;
830 case ODM_CMNINFO_BT_HS_CONNECT_PROCESS:
831 pDM_Odm->bBtConnectProcess = (BOOLEAN)Value;
834 case ODM_CMNINFO_BT_HS_RSSI:
835 pDM_Odm->btHsRssi = (u1Byte)Value;
838 case ODM_CMNINFO_BT_OPERATION:
839 pDM_Odm->bBtHsOperation = (BOOLEAN)Value;
842 case ODM_CMNINFO_BT_LIMITED_DIG:
843 pDM_Odm->bBtLimitedDig = (BOOLEAN)Value;
846 case ODM_CMNINFO_BT_DISABLE_EDCA:
847 pDM_Odm->bBtDisableEdcaTurbo = (BOOLEAN)Value;
851 #if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23
852 #ifdef UNIVERSAL_REPEATER
853 case ODM_CMNINFO_VXD_LINK:
854 pDM_Odm->VXD_bLinked= (BOOLEAN)Value;
859 case ODM_CMNINFO_OP_MODE:
860 pDM_Odm->OPMode = (u1Byte)Value;
863 case ODM_CMNINFO_WM_MODE:
864 pDM_Odm->WirelessMode = (u1Byte)Value;
867 case ODM_CMNINFO_BAND:
868 pDM_Odm->BandType = (u1Byte)Value;
871 case ODM_CMNINFO_SEC_CHNL_OFFSET:
872 pDM_Odm->SecChOffset = (u1Byte)Value;
875 case ODM_CMNINFO_SEC_MODE:
876 pDM_Odm->Security = (u1Byte)Value;
880 pDM_Odm->BandWidth = (u1Byte)Value;
883 case ODM_CMNINFO_CHNL:
884 pDM_Odm->Channel = (u1Byte)Value;
896 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
898 ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm )
901 PADAPTER pAdapter = pDM_Odm->Adapter;
903 ODM_InitializeWorkItem( pDM_Odm,
904 &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem_8723B,
905 (RT_WORKITEM_CALL_BACK)ODM_SW_AntDiv_WorkitemCallback,
907 "AntennaSwitchWorkitem");
909 ODM_InitializeWorkItem( pDM_Odm,
910 &pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem,
911 (RT_WORKITEM_CALL_BACK)odm_SwAntDivChkAntSwitchWorkitemCallback,
913 "AntennaSwitchWorkitem");
916 ODM_InitializeWorkItem(
918 &(pDM_Odm->PathDivSwitchWorkitem),
919 (RT_WORKITEM_CALL_BACK)odm_PathDivChkAntSwitchWorkitemCallback,
923 ODM_InitializeWorkItem(
925 &(pDM_Odm->CCKPathDiversityWorkitem),
926 (RT_WORKITEM_CALL_BACK)odm_CCKTXPathDiversityWorkItemCallback,
928 "CCKTXPathDiversityWorkItem");
930 ODM_InitializeWorkItem(
932 &(pDM_Odm->MPT_DIGWorkitem),
933 (RT_WORKITEM_CALL_BACK)odm_MPT_DIGWorkItemCallback,
937 ODM_InitializeWorkItem(
939 &(pDM_Odm->RaRptWorkitem),
940 (RT_WORKITEM_CALL_BACK)ODM_UpdateInitRateWorkItemCallback,
944 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
945 #if (RTL8188E_SUPPORT == 1)
946 ODM_InitializeWorkItem(
948 &(pDM_Odm->FastAntTrainingWorkitem),
949 (RT_WORKITEM_CALL_BACK)odm_FastAntTrainingWorkItemCallback,
951 "FastAntTrainingWorkitem");
954 ODM_InitializeWorkItem(
956 &(pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem),
957 (RT_WORKITEM_CALL_BACK)odm_PSD_RXHPWorkitemCallback,
964 ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm )
967 ODM_FreeWorkItem( &(pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem_8723B));
969 ODM_FreeWorkItem( &(pDM_Odm->DM_SWAT_Table.SwAntennaSwitchWorkitem));
971 ODM_FreeWorkItem(&(pDM_Odm->PathDivSwitchWorkitem));
973 ODM_FreeWorkItem(&(pDM_Odm->CCKPathDiversityWorkitem));
975 ODM_FreeWorkItem(&(pDM_Odm->FastAntTrainingWorkitem));
977 ODM_FreeWorkItem(&(pDM_Odm->MPT_DIGWorkitem));
979 ODM_FreeWorkItem(&(pDM_Odm->RaRptWorkitem));
981 ODM_FreeWorkItem((&pDM_Odm->DM_RXHP_Table.PSDTimeWorkitem));
994 u1Byte RSSI_Min = 0xFF;
996 for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
998 // if(pDM_Odm->pODM_StaInfo[i] != NULL)
999 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) )
1001 if(pDM_Odm->pODM_StaInfo[i]->RSSI_Ave < RSSI_Min)
1003 RSSI_Min = pDM_Odm->pODM_StaInfo[i]->RSSI_Ave;
1008 pDM_Odm->RSSI_Min = RSSI_Min;
1014 IN PDM_ODM_T pDM_Odm
1018 BOOLEAN Linked = FALSE;
1020 for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
1022 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) )
1030 pDM_Odm->bLinked = Linked;
1035 //3============================================================
1037 //3============================================================
1038 /*-----------------------------------------------------------------------------
1039 * Function: odm_DIGInit()
1041 * Overview: Set DIG scheme init value.
1052 *---------------------------------------------------------------------------*/
1054 //Remove DIG by yuchen
1056 //Remove DIG and FA check by Yu Chen
1059 //3============================================================
1061 //3============================================================
1063 //Remove BB power saving by Yuchen
1065 //3============================================================
1067 //3============================================================
1068 //3============================================================
1070 //3============================================================
1072 //Remove RAMask by RS_James
1074 //3============================================================
1075 //3 Dynamic Tx Power
1076 //3============================================================
1080 //Remove Rssimonitorcheck related function to odm_rssimonitorcheck.c
1085 IN PDM_ODM_T pDM_Odm
1088 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1089 ODM_AntDivTimers(pDM_Odm,INIT_ANTDIV_TIMMER);
1090 #elif(defined(CONFIG_SW_ANTENNA_DIVERSITY))
1091 ODM_InitializeTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer,
1092 (RT_TIMER_CALL_BACK)odm_SwAntDivChkAntSwitchCallback, NULL, "SwAntennaSwitchTimer");
1095 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1096 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PSDTimer,
1097 (RT_TIMER_CALL_BACK)dm_PSDMonitorCallback, NULL, "PSDTimer");
1100 //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch.
1102 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer,
1103 (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer");
1105 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer,
1106 (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer");
1108 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer,
1109 (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer");
1111 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer,
1112 (RT_TIMER_CALL_BACK)odm_PSD_RXHPCallback, NULL, "PSDRXHPTimer");
1117 ODM_CancelAllTimers(
1118 IN PDM_ODM_T pDM_Odm
1121 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1123 // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in
1126 HAL_ADAPTER_STS_CHK(pDM_Odm)
1129 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1130 ODM_AntDivTimers(pDM_Odm,CANCEL_ANTDIV_TIMMER);
1131 #elif(defined(CONFIG_SW_ANTENNA_DIVERSITY))
1132 ODM_CancelTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer);
1135 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1136 ODM_CancelTimer(pDM_Odm, &pDM_Odm->PSDTimer);
1139 //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch.
1141 ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer);
1143 ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer);
1145 ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1147 ODM_CancelTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer);
1153 ODM_ReleaseAllTimers(
1154 IN PDM_ODM_T pDM_Odm
1157 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1158 ODM_AntDivTimers(pDM_Odm,RELEASE_ANTDIV_TIMMER);
1159 #elif(defined(CONFIG_SW_ANTENNA_DIVERSITY))
1160 ODM_ReleaseTimer(pDM_Odm,&pDM_Odm->DM_SWAT_Table.SwAntennaSwitchTimer);
1163 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1165 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PSDTimer);
1168 //Neil Chen--2011--06--16-- / 2012/02/23 MH Revise Arch.
1170 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer);
1172 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer);
1174 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1176 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->DM_RXHP_Table.PSDTimer);
1181 //3============================================================
1182 //3 Tx Power Tracking
1183 //3============================================================
1187 IN PDM_ODM_T pDM_Odm
1190 PADAPTER Adapter = pDM_Odm->Adapter;
1192 #if( DM_ODM_SUPPORT_TYPE == ODM_WIN)
1193 if(*pDM_Odm->pIsFcsModeEnable)
1197 if(!IS_HARDWARE_TYPE_JAGUAR(Adapter))
1199 else if(IS_HARDWARE_TYPE_8812AU(Adapter))
1201 #if (RTL8821A_SUPPORT == 1)
1202 if(pDM_Odm->bLinked)
1204 if((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess))
1206 pDM_Odm->preChannel = *pDM_Odm->pChannel;
1207 pDM_Odm->LinkedInterval = 0;
1210 if(pDM_Odm->LinkedInterval < 3)
1211 pDM_Odm->LinkedInterval++;
1213 if(pDM_Odm->LinkedInterval == 2)
1215 // Mark out IQK flow to prevent tx stuck. by Maddest 20130306
1216 // Open it verified by James 20130715
1217 PHY_IQCalibrate_8821A(pDM_Odm, FALSE);
1221 pDM_Odm->LinkedInterval = 0;
1227 //antenna mapping info
1228 // 1: right-side antenna
1229 // 2/0: left-side antenna
1230 //PDM_SWAT_Table->CCK_Ant1_Cnt /OFDM_Ant1_Cnt: for right-side antenna: Ant:1 RxDefaultAnt1
1231 //PDM_SWAT_Table->CCK_Ant2_Cnt /OFDM_Ant2_Cnt: for left-side antenna: Ant:0 RxDefaultAnt2
1232 // We select left antenna as default antenna in initial process, modify it as needed
1235 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1237 // Only for 8723A SW ANT DIV INIT--2012--07--17
1239 odm_SwAntDivInit_NIC_8723A(
1240 IN PDM_ODM_T pDM_Odm)
1242 pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
1243 PADAPTER Adapter = pDM_Odm->Adapter;
1245 u1Byte btAntNum=BT_GetPgAntNum(Adapter);
1247 if(IS_HARDWARE_TYPE_8723A(Adapter))
1249 pDM_SWAT_Table->ANTA_ON =TRUE;
1251 // Set default antenna B status by PG
1253 pDM_SWAT_Table->ANTB_ON = TRUE;
1254 else if(btAntNum == 1)
1255 pDM_SWAT_Table->ANTB_ON = FALSE;
1257 pDM_SWAT_Table->ANTB_ON = TRUE;
1266 //3============================================================
1267 //3 SW Antenna Diversity
1268 //3============================================================
1271 odm_AntennaDiversityInit(
1272 IN PDM_ODM_T pDM_Odm
1275 if(pDM_Odm->mp_mode == TRUE)
1278 if(pDM_Odm->SupportICType & (ODM_OLD_IC_ANTDIV_SUPPORT))
1280 #if (RTL8192C_SUPPORT==1)
1281 ODM_OldIC_AntDiv_Init(pDM_Odm);
1286 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1287 ODM_AntDiv_Config(pDM_Odm);
1288 ODM_AntDivInit(pDM_Odm);
1294 odm_AntennaDiversity(
1295 IN PDM_ODM_T pDM_Odm
1298 if(pDM_Odm->mp_mode == TRUE)
1301 if(pDM_Odm->SupportICType & (ODM_OLD_IC_ANTDIV_SUPPORT))
1303 #if (RTL8192C_SUPPORT==1)
1304 ODM_OldIC_AntDiv(pDM_Odm);
1309 #if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
1310 ODM_AntDiv(pDM_Odm);
1317 odm_SwAntDetectInit(
1318 IN PDM_ODM_T pDM_Odm
1321 pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
1322 #if (RTL8723B_SUPPORT == 1)
1323 pDM_SWAT_Table->SWAS_NoLink_BK_Reg92c = ODM_Read4Byte(pDM_Odm, rDPDT_control);
1325 pDM_SWAT_Table->PreAntenna = MAIN_ANT;
1326 pDM_SWAT_Table->CurAntenna = MAIN_ANT;
1327 pDM_SWAT_Table->SWAS_NoLink_State = 0;
1331 //============================================================
1333 //============================================================
1335 //Remove Edca by Yuchen
1338 #if( DM_ODM_SUPPORT_TYPE == ODM_WIN)
1340 // 2011/07/26 MH Add an API for testing IQK fail case.
1343 ODM_CheckPowerStatus(
1344 IN PADAPTER Adapter)
1347 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1348 PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
1349 RT_RF_POWER_STATE rtState;
1350 PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
1352 // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence.
1353 if (pMgntInfo->init_adpt_in_progress == TRUE)
1355 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter"));
1360 // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK.
1362 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
1363 if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff)
1365 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n",
1366 Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState));
1373 // need to ODM CE Platform
1374 //move to here for ANT detection mechanism using
1376 #if ((DM_ODM_SUPPORT_TYPE == ODM_WIN)||(DM_ODM_SUPPORT_TYPE == ODM_CE))
1379 IN PDM_ODM_T pDM_Odm,
1381 u1Byte initial_gain_psd)
1383 //unsigned int val, rfval;
1387 //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1389 //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord);
1390 //DbgPrint("Reg908 = 0x%x\n",val);
1391 //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord);
1392 //rfval = PHY_QueryRFReg(Adapter, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask);
1393 //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval);
1394 //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n",
1395 //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval);
1397 //Set DCO frequency index, offset=(40MHz/SamplePts)*point
1398 ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point);
1400 //Start PSD calculation, Reg808[22]=0->1
1401 ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1);
1402 //Need to wait for HW PSD report
1403 ODM_StallExecution(1000);
1404 ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0);
1405 //Read PSD report, Reg8B4[15:0]
1406 psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF;
1408 #if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) && ( (RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX))
1409 psd_report = (u4Byte) (ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c);
1411 psd_report = (int) (20*log10((double)psd_report))+(int)(initial_gain_psd-0x1c);
1426 Value = Value & 0xFFFF;
1430 if (Value <= dB_Invert_Table[i][11])
1438 return (96); // maximum 96 dB
1443 if (Value <= dB_Invert_Table[i][j])
1457 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))
1460 odm_PHY_SaveAFERegisters(
1461 IN PDM_ODM_T pDM_Odm,
1463 IN pu4Byte AFEBackup,
1464 IN u4Byte RegisterNum
1469 //RT_DISP(FINIT, INIT_IQK, ("Save ADDA parameters.\n"));
1470 for( i = 0 ; i < RegisterNum ; i++){
1471 AFEBackup[i] = ODM_GetBBReg(pDM_Odm, AFEReg[i], bMaskDWord);
1476 odm_PHY_ReloadAFERegisters(
1477 IN PDM_ODM_T pDM_Odm,
1479 IN pu4Byte AFEBackup,
1480 IN u4Byte RegiesterNum
1485 //RT_DISP(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n"));
1486 for(i = 0 ; i < RegiesterNum; i++)
1489 ODM_SetBBReg(pDM_Odm, AFEReg[i], bMaskDWord, AFEBackup[i]);
1495 // Set Single/Dual Antenna default setting for products that do not do detection in advance.
1497 // Added by Joseph, 2012.03.22
1500 ODM_SingleDualAntennaDefaultSetting(
1501 IN PDM_ODM_T pDM_Odm
1504 pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
1505 PADAPTER pAdapter = pDM_Odm->Adapter;
1506 u1Byte btAntNum = 2;
1507 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
1508 btAntNum=BT_GetPgAntNum(pAdapter);
1509 #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE))
1510 #ifdef CONFIG_BT_COEXIST
1511 btAntNum = hal_btcoex_GetPgAntNum(pAdapter);
1515 // Set default antenna A and B status
1518 pDM_SWAT_Table->ANTA_ON=TRUE;
1519 pDM_SWAT_Table->ANTB_ON=TRUE;
1520 //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("Dual antenna\n"));
1522 #ifdef CONFIG_BT_COEXIST
1523 else if(btAntNum == 1)
1524 {// Set antenna A as default
1525 pDM_SWAT_Table->ANTA_ON=TRUE;
1526 pDM_SWAT_Table->ANTB_ON=FALSE;
1527 //RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("Single antenna\n"));
1531 //RT_ASSERT(FALSE, ("Incorrect antenna number!!\n"));
1538 //2 8723A ANT DETECT
1541 // Implement IQK single tone for RF DPK loopback and BB PSD scanning.
1542 // This function is cooperated with BB team Neil.
1544 // Added by Roger, 2011.12.15
1547 ODM_SingleDualAntennaDetection(
1548 IN PDM_ODM_T pDM_Odm,
1552 PADAPTER pAdapter = pDM_Odm->Adapter;
1553 pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
1554 u4Byte CurrentChannel,RfLoopReg;
1556 u4Byte Reg88c, Regc08, Reg874, Regc50, Reg948=0, Regb2c=0, Reg92c=0, AFE_rRx_Wait_CCA=0;
1557 u1Byte initial_gain = 0x5a;
1558 u4Byte PSD_report_tmp;
1559 u4Byte AntA_report = 0x0, AntB_report = 0x0,AntO_report=0x0;
1560 BOOLEAN bResult = TRUE;
1561 u4Byte AFE_Backup[16];
1562 u4Byte AFE_REG_8723A[16] = {
1563 rRx_Wait_CCA, rTx_CCK_RFON,
1564 rTx_CCK_BBON, rTx_OFDM_RFON,
1565 rTx_OFDM_BBON, rTx_To_Rx,
1567 rRx_OFDM, rRx_Wait_RIFS,
1568 rRx_TO_Rx, rStandby,
1569 rSleep, rPMPD_ANAEN,
1570 rFPGA0_XCD_SwitchControl, rBlue_Tooth};
1572 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection()============> \n"));
1575 if(!(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C|ODM_RTL8723B)))
1578 // Retrieve antenna detection registry info, added by Roger, 2012.11.27.
1579 if(!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(pAdapter))
1582 if(pDM_Odm->SupportICType == ODM_RTL8192C)
1584 //Which path in ADC/DAC is turnned on for PSD: both I/Q
1585 ODM_SetBBReg(pDM_Odm, 0x808, BIT10|BIT11, 0x3);
1586 //Ageraged number: 8
1587 ODM_SetBBReg(pDM_Odm, 0x808, BIT12|BIT13, 0x1);
1589 ODM_SetBBReg(pDM_Odm, 0x808, BIT14|BIT15, 0x0);
1592 //1 Backup Current RF/BB Settings
1594 CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask);
1595 RfLoopReg = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask);
1596 if(!(pDM_Odm->SupportICType == ODM_RTL8723B))
1597 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); // change to Antenna A
1598 #if (RTL8723B_SUPPORT == 1)
1601 Reg92c = ODM_GetBBReg(pDM_Odm, 0x92c, bMaskDWord);
1602 Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord);
1603 Regb2c = ODM_GetBBReg(pDM_Odm, AGC_table_select, bMaskDWord);
1604 ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x1);
1605 ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, 0xff, 0x77);
1606 ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0x3ff, 0x000);
1607 ODM_SetBBReg(pDM_Odm, AGC_table_select, BIT31, 0x0);
1610 ODM_StallExecution(10);
1612 //Store A Path Register 88c, c08, 874, c50
1613 Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord);
1614 Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord);
1615 Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord);
1616 Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord);
1618 // Store AFE Registers
1619 if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1620 odm_PHY_SaveAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16);
1621 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1622 AFE_rRx_Wait_CCA = ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA,bMaskDWord);
1625 ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pts
1628 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x7401); //Channel 1
1631 if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1633 ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x6FDB25A4);
1634 ODM_SetBBReg(pDM_Odm, rTx_CCK_RFON, bMaskDWord, 0x6FDB25A4);
1635 ODM_SetBBReg(pDM_Odm, rTx_CCK_BBON, bMaskDWord, 0x6FDB25A4);
1636 ODM_SetBBReg(pDM_Odm, rTx_OFDM_RFON, bMaskDWord, 0x6FDB25A4);
1637 ODM_SetBBReg(pDM_Odm, rTx_OFDM_BBON, bMaskDWord, 0x6FDB25A4);
1638 ODM_SetBBReg(pDM_Odm, rTx_To_Rx, bMaskDWord, 0x6FDB25A4);
1639 ODM_SetBBReg(pDM_Odm, rTx_To_Tx, bMaskDWord, 0x6FDB25A4);
1640 ODM_SetBBReg(pDM_Odm, rRx_CCK, bMaskDWord, 0x6FDB25A4);
1641 ODM_SetBBReg(pDM_Odm, rRx_OFDM, bMaskDWord, 0x6FDB25A4);
1642 ODM_SetBBReg(pDM_Odm, rRx_Wait_RIFS, bMaskDWord, 0x6FDB25A4);
1643 ODM_SetBBReg(pDM_Odm, rRx_TO_Rx, bMaskDWord, 0x6FDB25A4);
1644 ODM_SetBBReg(pDM_Odm, rStandby, bMaskDWord, 0x6FDB25A4);
1645 ODM_SetBBReg(pDM_Odm, rSleep, bMaskDWord, 0x6FDB25A4);
1646 ODM_SetBBReg(pDM_Odm, rPMPD_ANAEN, bMaskDWord, 0x6FDB25A4);
1647 ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_SwitchControl, bMaskDWord, 0x6FDB25A4);
1648 ODM_SetBBReg(pDM_Odm, rBlue_Tooth, bMaskDWord, 0x6FDB25A4);
1650 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1652 ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x01c00016);
1656 ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0);
1659 ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4);
1660 ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000);
1662 //IQK setting tone@ 4.34Mhz
1663 ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C);
1664 ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00);
1667 ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000);
1668 ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000);
1669 ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800);
1670 ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
1671 ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150008);
1672 ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150008);
1673 ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0);
1676 if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1677 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x0, 0xFFFFF, 0x50008);
1679 //IQK Single tone start
1680 ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x808000);
1681 ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
1682 ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
1684 ODM_StallExecution(10000);
1686 // PSD report of antenna A
1690 PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain);
1691 if(PSD_report_tmp >AntA_report)
1692 AntA_report=PSD_report_tmp;
1695 // change to Antenna B
1696 if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1697 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_B);
1698 #if (RTL8723B_SUPPORT == 1)
1699 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1700 ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x2);
1703 ODM_StallExecution(10);
1705 // PSD report of antenna B
1709 PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain);
1710 if(PSD_report_tmp > AntB_report)
1711 AntB_report=PSD_report_tmp;
1714 // change to open case
1715 if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1716 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, 0); // change to Antenna A
1717 #if (RTL8723B_SUPPORT == 1)
1718 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1719 ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x0);
1722 ODM_StallExecution(10);
1724 // PSD report of open case
1728 PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain);
1729 if(PSD_report_tmp > AntO_report)
1730 AntO_report=PSD_report_tmp;
1733 //Close IQK Single Tone function
1734 ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskH3Bytes, 0x000000);
1736 //1 Return to antanna A
1737 if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1738 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); // change to Antenna A
1739 #if (RTL8723B_SUPPORT == 1)
1740 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1743 ODM_SetBBReg(pDM_Odm, rDPDT_control, bMaskDWord, Reg92c);
1746 ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948);
1747 ODM_SetBBReg(pDM_Odm, AGC_table_select, bMaskDWord, Regb2c);
1750 ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c);
1751 ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08);
1752 ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874);
1753 ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40);
1754 ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50);
1755 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,CurrentChannel);
1756 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask,RfLoopReg);
1758 //Reload AFE Registers
1759 if(pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8192C))
1760 odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16);
1761 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1762 ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, AFE_rRx_Wait_CCA);
1764 if(pDM_Odm->SupportICType == ODM_RTL8723A)
1766 //2 Test Ant B based on Ant A is ON
1769 if(AntA_report >= 100)
1771 if(AntB_report > (AntA_report+1))
1773 pDM_SWAT_Table->ANTB_ON=FALSE;
1774 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n"));
1778 pDM_SWAT_Table->ANTB_ON=TRUE;
1779 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna is A and B\n"));
1784 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
1785 pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default
1789 //2 Test Ant A and B based on DPDT Open
1790 else if(mode==ANTTESTALL)
1792 if((AntO_report >=100) && (AntO_report <=118))
1794 if(AntA_report > (AntO_report+1))
1796 pDM_SWAT_Table->ANTA_ON=FALSE;
1797 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is OFF\n"));
1801 pDM_SWAT_Table->ANTA_ON=TRUE;
1802 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant A is ON\n"));
1805 if(AntB_report > (AntO_report+2))
1807 pDM_SWAT_Table->ANTB_ON=FALSE;
1808 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is OFF\n"));
1812 pDM_SWAT_Table->ANTB_ON=TRUE;
1813 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Ant B is ON\n"));
1816 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report));
1817 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report));
1818 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report));
1820 pDM_Odm->AntDetectedInfo.bAntDetected= TRUE;
1821 pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report;
1822 pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report;
1823 pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report;
1828 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n"));
1833 else if(pDM_Odm->SupportICType == ODM_RTL8192C)
1835 if(AntA_report >= 100)
1837 if(AntB_report > (AntA_report+2))
1839 pDM_SWAT_Table->ANTA_ON=FALSE;
1840 pDM_SWAT_Table->ANTB_ON=TRUE;
1841 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B);
1842 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna B\n"));
1844 else if(AntA_report > (AntB_report+2))
1846 pDM_SWAT_Table->ANTA_ON=TRUE;
1847 pDM_SWAT_Table->ANTB_ON=FALSE;
1848 ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A);
1849 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n"));
1853 pDM_SWAT_Table->ANTA_ON=TRUE;
1854 pDM_SWAT_Table->ANTB_ON=TRUE;
1855 RT_TRACE(COMP_ANTENNA, DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna \n"));
1860 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
1861 pDM_SWAT_Table->ANTA_ON=TRUE; // Set Antenna A on as default
1862 pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default
1866 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
1868 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report));
1869 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report));
1870 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report));
1872 //2 Test Ant B based on Ant A is ON
1875 if(AntA_report >=100 && AntA_report <= 116)
1877 if(AntB_report >= (AntA_report+4) && AntB_report > 116)
1879 pDM_SWAT_Table->ANTB_ON=FALSE;
1880 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Single Antenna A\n"));
1882 else if(AntB_report >=100 && AntB_report <= 116)
1884 pDM_SWAT_Table->ANTB_ON=TRUE;
1885 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Dual Antenna is A and B\n"));
1889 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
1890 pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default
1896 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
1897 pDM_SWAT_Table->ANTB_ON=FALSE; // Set Antenna B off as default
1901 //2 Test Ant A and B based on DPDT Open
1902 else if(mode==ANTTESTALL)
1904 if((AntA_report >= 100) && (AntB_report >= 100) && (AntA_report <= 120) && (AntB_report <= 120))
1906 if((AntA_report - AntB_report < 2) || (AntB_report - AntA_report < 2))
1908 pDM_SWAT_Table->ANTA_ON=TRUE;
1909 pDM_SWAT_Table->ANTB_ON=TRUE;
1910 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Dual Antenna\n"));
1912 else if(((AntA_report - AntB_report >= 2) && (AntA_report - AntB_report <= 4)) ||
1913 ((AntB_report - AntA_report >= 2) && (AntB_report - AntA_report <= 4)))
1915 pDM_SWAT_Table->ANTA_ON=FALSE;
1916 pDM_SWAT_Table->ANTB_ON=FALSE;
1918 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
1922 pDM_SWAT_Table->ANTA_ON = TRUE;
1923 pDM_SWAT_Table->ANTB_ON=FALSE;
1924 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Single Antenna A\n"));
1927 pDM_Odm->AntDetectedInfo.bAntDetected= TRUE;
1928 pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report;
1929 pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report;
1930 pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report;
1935 ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n"));
1946 #endif // end odm_CE
1948 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN| ODM_CE))
1951 odm_Set_RA_DM_ARFB_by_Noisy(
1952 IN PDM_ODM_T pDM_Odm
1955 //DbgPrint("DM_ARFB ====> \n");
1956 if (pDM_Odm->bNoisyState){
1957 ODM_Write4Byte(pDM_Odm,0x430,0x00000000);
1958 ODM_Write4Byte(pDM_Odm,0x434,0x05040200);
1959 //DbgPrint("DM_ARFB ====> Noisy State\n");
1962 ODM_Write4Byte(pDM_Odm,0x430,0x02010000);
1963 ODM_Write4Byte(pDM_Odm,0x434,0x07050403);
1964 //DbgPrint("DM_ARFB ====> Clean State\n");
1970 ODM_UpdateNoisyState(
1971 IN PDM_ODM_T pDM_Odm,
1972 IN BOOLEAN bNoisyStateFromC2H
1975 //DbgPrint("Get C2H Command! NoisyState=0x%x\n ", bNoisyStateFromC2H);
1976 if(pDM_Odm->SupportICType == ODM_RTL8821 || pDM_Odm->SupportICType == ODM_RTL8812 ||
1977 pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188E)
1979 pDM_Odm->bNoisyState = bNoisyStateFromC2H;
1981 odm_Set_RA_DM_ARFB_by_Noisy(pDM_Odm);
1985 Set_RA_DM_Ratrbitmap_by_Noisy(
1986 IN PDM_ODM_T pDM_Odm,
1987 IN WIRELESS_MODE WirelessMode,
1988 IN u4Byte ratr_bitmap,
1989 IN u1Byte rssi_level
1992 u4Byte ret_bitmap = ratr_bitmap;
1993 switch (WirelessMode)
1995 case WIRELESS_MODE_AC_24G :
1996 case WIRELESS_MODE_AC_5G :
1997 case WIRELESS_MODE_AC_ONLY:
1998 if (pDM_Odm->bNoisyState){ // in Noisy State
2000 ret_bitmap&=0xfe3f0e08;
2001 else if (rssi_level==2)
2002 ret_bitmap&=0xff3f8f8c;
2003 else if (rssi_level==3)
2004 ret_bitmap&=0xffffffcc ;
2006 ret_bitmap&=0xffffffff ;
2008 else{ // in SNR State
2010 ret_bitmap&=0xfc3e0c08;
2012 else if (rssi_level==2){
2013 ret_bitmap&=0xfe3f0e08;
2015 else if (rssi_level==3){
2016 ret_bitmap&=0xffbfefcc;
2019 ret_bitmap&=0x0fffffff;
2023 case WIRELESS_MODE_B:
2024 case WIRELESS_MODE_A:
2025 case WIRELESS_MODE_G:
2026 case WIRELESS_MODE_N_24G:
2027 case WIRELESS_MODE_N_5G:
2028 if (pDM_Odm->bNoisyState){
2030 ret_bitmap&=0x0f0e0c08;
2031 else if (rssi_level==2)
2032 ret_bitmap&=0x0f8f0e0c;
2033 else if (rssi_level==3)
2034 ret_bitmap&=0x0fefefcc ;
2036 ret_bitmap&=0xffffffff ;
2040 ret_bitmap&=0x0f8f0e08;
2042 else if (rssi_level==2){
2043 ret_bitmap&=0x0fcf8f8c;
2045 else if (rssi_level==3){
2046 ret_bitmap&=0x0fffffcc;
2049 ret_bitmap&=0x0fffffff;
2056 //DbgPrint("DM_RAMask ====> rssi_LV = %d, BITMAP = %x \n", rssi_level, ret_bitmap);
2065 IN PDM_ODM_T pDM_Odm,
2071 ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("Get C2H Command! Rate=0x%x\n", Rate));
2073 if(pDM_Odm->SupportICType == ODM_RTL8821 || pDM_Odm->SupportICType == ODM_RTL8812 ||
2074 pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8188E)
2076 pDM_Odm->TxRate = Rate;
2077 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2078 #if DEV_BUS_TYPE==RT_PCI_INTERFACE
2080 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
2082 if(pDM_Odm->SupportICType == ODM_RTL8821)
2084 ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2086 else if(pDM_Odm->SupportICType == ODM_RTL8812)
2088 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++)
2090 ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0);
2093 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
2095 ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2097 else if(pDM_Odm->SupportICType == ODM_RTL8192E)
2099 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++)
2101 ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0);
2104 else if(pDM_Odm->SupportICType == ODM_RTL8188E)
2106 ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2110 PlatformScheduleWorkItem(&pDM_Odm->RaRptWorkitem);
2118 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2120 ODM_UpdateInitRateWorkItemCallback(
2124 PADAPTER Adapter = (PADAPTER)pContext;
2125 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
2126 PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
2130 if(pDM_Odm->SupportICType == ODM_RTL8821)
2132 ODM_TxPwrTrackSetPwr8821A(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2134 else if(pDM_Odm->SupportICType == ODM_RTL8812)
2136 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8812A; p++) //DOn't know how to include &c
2138 ODM_TxPwrTrackSetPwr8812A(pDM_Odm, MIX_MODE, p, 0);
2141 else if(pDM_Odm->SupportICType == ODM_RTL8723B)
2143 ODM_TxPwrTrackSetPwr_8723B(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2145 else if(pDM_Odm->SupportICType == ODM_RTL8192E)
2147 for (p = ODM_RF_PATH_A; p < MAX_PATH_NUM_8192E; p++) //DOn't know how to include &c
2149 ODM_TxPwrTrackSetPwr92E(pDM_Odm, MIX_MODE, p, 0);
2152 else if(pDM_Odm->SupportICType == ODM_RTL8188E)
2154 ODM_TxPwrTrackSetPwr88E(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, 0);
2161 // ODM multi-port consideration, added by Roger, 2013.10.01.
2165 IN PDM_ODM_T pDM_Odm
2168 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2169 PADAPTER pLoopAdapter = GetDefaultAdapter(pDM_Odm->Adapter);
2170 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pLoopAdapter);
2171 PDM_ODM_T pDM_OutSrc = &pHalData->DM_OutSrc;
2172 u1Byte TotalAssocEntryNum = 0;
2176 ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, 0, &pLoopAdapter->MgntInfo.DefaultPort[0]);
2177 pLoopAdapter->MgntInfo.DefaultPort[0].MultiPortStationIdx = TotalAssocEntryNum;
2179 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
2180 TotalAssocEntryNum +=1;
2184 for (index = 0; index <ASSOCIATE_ENTRY_NUM; index++)
2186 ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, TotalAssocEntryNum+index, &pLoopAdapter->MgntInfo.AsocEntry[index]);
2187 pLoopAdapter->MgntInfo.AsocEntry[index].MultiPortStationIdx = TotalAssocEntryNum+index;
2190 TotalAssocEntryNum+= index;
2191 if(IS_HARDWARE_TYPE_8188E((pDM_Odm->Adapter)))
2192 pLoopAdapter->RASupport = TRUE;
2193 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
2198 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
2199 /* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */
2200 void odm_dtc(PDM_ODM_T pDM_Odm)
2202 #ifdef CONFIG_DM_RESP_TXAGC
2203 #define DTC_BASE 35 /* RSSI higher than this value, start to decade TX power */
2204 #define DTC_DWN_BASE (DTC_BASE-5) /* RSSI lower than this value, start to increase TX power */
2206 /* RSSI vs TX power step mapping: decade TX power */
2207 static const u8 dtc_table_down[]={
2216 /* RSSI vs TX power step mapping: increase TX power */
2217 static const u8 dtc_table_up[]={
2237 /* As DIG is disabled, DTC is also disable */
2238 if(!(pDM_Odm->SupportAbility & ODM_XXXXXX))
2242 if (DTC_BASE < pDM_Odm->RSSI_Min) {
2243 /* need to decade the CTS TX power */
2245 for (i=0;i<ARRAY_SIZE(dtc_table_down);i++)
2247 if ((dtc_table_down[i] >= pDM_Odm->RSSI_Min) || (dtc_steps >= 6))
2254 else if (DTC_DWN_BASE > pDM_Odm->RSSI_Min)
2256 /* needs to increase the CTS TX power */
2259 for (i=0;i<ARRAY_SIZE(dtc_table_up);i++)
2261 if ((dtc_table_up[i] <= pDM_Odm->RSSI_Min) || (dtc_steps>=10))
2274 resp_txagc = dtc_steps | (sign << 4);
2275 resp_txagc = resp_txagc | (resp_txagc << 5);
2276 ODM_Write1Byte(pDM_Odm, 0x06d9, resp_txagc);
2278 DBG_871X("%s RSSI_Min:%u, set RESP_TXAGC to %s %u\n",
2279 __func__, pDM_Odm->RSSI_Min, sign?"minus":"plus", dtc_steps);
2280 #endif /* CONFIG_RESP_TXAGC_ADJUST */
2283 #endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */
2286 odm_UpdatePowerTrainingState(
2287 IN PDM_ODM_T pDM_Odm
2290 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
2291 PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PHYDM_FALSEALMCNT);
2292 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
2295 if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN))
2298 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState()============>\n"));
2299 pDM_Odm->bChangeState = FALSE;
2302 if(pDM_Odm->ForcePowerTrainingState)
2304 if(pDM_Odm->ForcePowerTrainingState == 1 && !pDM_Odm->bDisablePowerTraining)
2306 pDM_Odm->bChangeState = TRUE;
2307 pDM_Odm->bDisablePowerTraining = TRUE;
2309 else if(pDM_Odm->ForcePowerTrainingState == 2 && pDM_Odm->bDisablePowerTraining)
2311 pDM_Odm->bChangeState = TRUE;
2312 pDM_Odm->bDisablePowerTraining = FALSE;
2315 pDM_Odm->PT_score = 0;
2316 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
2317 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
2318 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): ForcePowerTrainingState = %d\n",
2319 pDM_Odm->ForcePowerTrainingState));
2323 if(!pDM_Odm->bLinked)
2327 if((pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE))
2329 pDM_Odm->PT_score = 0;
2330 pDM_Odm->bChangeState = TRUE;
2331 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
2332 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
2333 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): First Connect\n"));
2338 if(pDM_Odm->NHM_cnt_0 >= 215)
2340 else if(pDM_Odm->NHM_cnt_0 >= 190)
2341 score = 1; // unknow state
2346 RX_Pkt_Cnt = (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM) + (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK);
2348 if((FalseAlmCnt->Cnt_CCA_all > 31 && RX_Pkt_Cnt > 31) && (FalseAlmCnt->Cnt_CCA_all >= RX_Pkt_Cnt))
2350 if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 1)) <= FalseAlmCnt->Cnt_CCA_all)
2352 else if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 2)) <= FalseAlmCnt->Cnt_CCA_all)
2357 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): RX_Pkt_Cnt = %d, Cnt_CCA_all = %d\n",
2358 RX_Pkt_Cnt, FalseAlmCnt->Cnt_CCA_all));
2360 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NumQryPhyStatusOFDM = %d, NumQryPhyStatusCCK = %d\n",
2361 (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM), (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK)));
2362 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NHM_cnt_0 = %d, score = %d\n",
2363 pDM_Odm->NHM_cnt_0, score));
2366 pDM_Odm->PT_score = (score << 4) + (pDM_Odm->PT_score>>1) + (pDM_Odm->PT_score>>2);
2367 score = (pDM_Odm->PT_score + 32) >> 6;
2368 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): PT_score = %d, score after smoothing = %d\n",
2369 pDM_Odm->PT_score, score));
2374 if(pDM_Odm->bDisablePowerTraining)
2376 pDM_Odm->bChangeState = TRUE;
2377 pDM_Odm->bDisablePowerTraining = FALSE;
2378 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n"));
2380 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Enable Power Training\n"));
2384 if(!pDM_Odm->bDisablePowerTraining)
2386 pDM_Odm->bChangeState = TRUE;
2387 pDM_Odm->bDisablePowerTraining = TRUE;
2388 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n"));
2390 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Disable Power Training\n"));
2393 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
2394 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;