4557d158ce99455add825101bd699ecc5f6e9370
[firefly-linux-kernel-4.4.55.git] / drivers / net / wireless / rockchip_wlan / rtl8723bu / hal / OUTSRC / phydm_EdcaTurboCheck.h
1 /******************************************************************************\r
2  *\r
3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
4  *                                        \r
5  * This program is free software; you can redistribute it and/or modify it\r
6  * under the terms of version 2 of the GNU General Public License as\r
7  * published by the Free Software Foundation.\r
8  *\r
9  * This program is distributed in the hope that it will be useful, but WITHOUT\r
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
12  * more details.\r
13  *\r
14  * You should have received a copy of the GNU General Public License along with\r
15  * this program; if not, write to the Free Software Foundation, Inc.,\r
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
17  *\r
18  *\r
19  ******************************************************************************/\r
20  \r
21 #ifndef __PHYDMEDCATURBOCHECK_H__\r
22 #define    __PHYDMEDCATURBOCHECK_H__\r
23 \r
24 #define EDCATURBO_VERSION       "1.0"\r
25 \r
26 typedef struct _EDCA_TURBO_\r
27 {\r
28         BOOLEAN bCurrentTurboEDCA;\r
29         BOOLEAN bIsCurRDLState;\r
30 \r
31         #if(DM_ODM_SUPPORT_TYPE == ODM_CE       )\r
32         u4Byte  prv_traffic_idx; // edca turbo\r
33         #endif\r
34 \r
35 }EDCA_T,*pEDCA_T;\r
36 \r
37 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
38 static u4Byte edca_setting_UL[HT_IOT_PEER_MAX] = \r
39 // UNKNOWN              REALTEK_90      REALTEK_92SE    BROADCOM                RALINK          ATHEROS         CISCO           MERU        MARVELL     92U_AP          SELF_AP(DownLink/Tx)\r
40 { 0x5e4322,             0xa44f,                 0x5e4322,               0x5ea32b,               0x5ea422,       0x5ea322,       0x3ea430,       0x5ea42b, 0x5ea44f,     0x5e4322,       0x5e4322};\r
41 \r
42 \r
43 static u4Byte edca_setting_DL[HT_IOT_PEER_MAX] = \r
44 // UNKNOWN              REALTEK_90      REALTEK_92SE    BROADCOM                RALINK          ATHEROS         CISCO           MERU,       MARVELL     92U_AP          SELF_AP(UpLink/Rx)\r
45 { 0xa44f,               0x5ea44f,       0x5e4322,               0x5ea42b,               0xa44f,                 0xa630,                 0x5ea630,       0x5ea42b, 0xa44f,               0xa42b,         0xa42b};\r
46 \r
47 static u4Byte edca_setting_DL_GMode[HT_IOT_PEER_MAX] = \r
48 // UNKNOWN              REALTEK_90      REALTEK_92SE    BROADCOM                RALINK          ATHEROS         CISCO           MERU,       MARVELL     92U_AP          SELF_AP\r
49 { 0x4322,               0xa44f,                 0x5e4322,               0xa42b,                         0x5e4322,       0x4322,                 0xa42b,         0x5ea42b, 0xa44f,               0x5e4322,       0x5ea42b};\r
50 \r
51 \r
52 //============================================================\r
53 // EDCA Paramter for AP/ADSL   by Mingzhi 2011-11-22\r
54 //============================================================\r
55 #elif (DM_ODM_SUPPORT_TYPE &ODM_ADSL)\r
56 enum qos_prio { BK, BE, VI, VO, VI_AG, VO_AG };\r
57 \r
58 static const struct ParaRecord rtl_ap_EDCA[] =\r
59 {\r
60 //ACM,AIFSN, ECWmin, ECWmax, TXOplimit\r
61      {0,     7,      4,      10,     0},            //BK\r
62      {0,     3,      4,      6,      0},             //BE\r
63      {0,     1,      3,      4,      188},         //VI\r
64      {0,     1,      2,      3,      102},         //VO\r
65      {0,     1,      3,      4,      94},          //VI_AG\r
66      {0,     1,      2,      3,      47},          //VO_AG\r
67 };\r
68 \r
69 static const struct ParaRecord rtl_sta_EDCA[] =\r
70 {\r
71 //ACM,AIFSN, ECWmin, ECWmax, TXOplimit\r
72      {0,     7,      4,      10,     0},\r
73      {0,     3,      4,      10,     0},\r
74      {0,     2,      3,      4,      188},\r
75      {0,     2,      2,      3,      102},\r
76      {0,     2,      3,      4,      94},\r
77      {0,     2,      2,      3,      47},\r
78 };\r
79 #endif\r
80 \r
81 \r
82 #if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))\r
83 #ifdef WIFI_WMM\r
84 VOID\r
85 ODM_IotEdcaSwitch(\r
86         IN              PVOID                                   pDM_VOID,\r
87         IN      unsigned char           enable\r
88         );\r
89 #endif\r
90 \r
91 BOOLEAN\r
92 ODM_ChooseIotMainSTA(\r
93         IN              PVOID                                   pDM_VOID,\r
94         IN      PSTA_INFO_T             pstat\r
95         );\r
96 #endif\r
97 \r
98 VOID\r
99 odm_EdcaTurboCheck(\r
100         IN      PVOID           pDM_VOID\r
101         );\r
102 VOID\r
103 ODM_EdcaTurboInit(\r
104         IN      PVOID           pDM_VOID\r
105 );\r
106 \r
107 #if(DM_ODM_SUPPORT_TYPE==ODM_WIN)\r
108 VOID\r
109 odm_EdcaTurboCheckMP(\r
110         IN      PVOID           pDM_VOID\r
111         );\r
112 \r
113 //check if edca turbo is disabled\r
114 BOOLEAN\r
115 odm_IsEdcaTurboDisable(\r
116         IN      PVOID           pDM_VOID\r
117 );\r
118 //choose edca paramter for special IOT case\r
119 VOID \r
120 ODM_EdcaParaSelByIot(\r
121         IN              PVOID                                   pDM_VOID,\r
122         OUT     u4Byte          *EDCA_BE_UL,\r
123         OUT u4Byte              *EDCA_BE_DL\r
124         );\r
125 //check if it is UL or DL\r
126 VOID\r
127 odm_EdcaChooseTrafficIdx( \r
128         IN      PVOID           pDM_VOID,\r
129         IN      u8Byte                          cur_tx_bytes,  \r
130         IN      u8Byte                          cur_rx_bytes, \r
131         IN      BOOLEAN                 bBiasOnRx,\r
132         OUT BOOLEAN             *pbIsCurRDLState\r
133         );\r
134 \r
135 #elif (DM_ODM_SUPPORT_TYPE==ODM_CE)\r
136 VOID\r
137 odm_EdcaTurboCheckCE(\r
138         IN      PVOID           pDM_VOID\r
139         );\r
140 #else\r
141 VOID \r
142 odm_IotEngine(\r
143         IN      PVOID           pDM_VOID\r
144         );\r
145 \r
146 VOID\r
147 odm_EdcaParaInit(\r
148         IN      PVOID           pDM_VOID\r
149         );\r
150 #endif\r
151 \r
152 #endif\r