drivers/net/wireless/rockchip_wlan/rtl8723bu/include/rtw_pwrctrl.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #ifndef __RTW_PWRCTRL_H_
  21 #define __RTW_PWRCTRL_H_
  22
  23
  24 #define FW_PWR0 0
  25 #define FW_PWR1         1
  26 #define FW_PWR2         2
  27 #define FW_PWR3         3
  28
  29
  30 #define HW_PWR0 7
  31 #define HW_PWR1         6
  32 #define HW_PWR2         2
  33 #define HW_PWR3 0
  34 #define HW_PWR4 8
  35
  36 #define FW_PWRMSK       0x7
  37
  38
  39 #define XMIT_ALIVE      BIT(0)
  40 #define RECV_ALIVE      BIT(1)
  41 #define CMD_ALIVE       BIT(2)
  42 #define EVT_ALIVE       BIT(3)
  43 #ifdef CONFIG_BT_COEXIST
  44 #define BTCOEX_ALIVE    BIT(4)
  45 #endif // CONFIG_BT_COEXIST
  46
  47
  48 enum Power_Mgnt
  49 {
  50         PS_MODE_ACTIVE  = 0     ,
  51         PS_MODE_MIN                     ,
  52         PS_MODE_MAX                     ,
  53         PS_MODE_DTIM                    ,       //PS_MODE_SELF_DEFINED
  54         PS_MODE_VOIP                    ,
  55         PS_MODE_UAPSD_WMM       ,
  56         PS_MODE_UAPSD                   ,
  57         PS_MODE_IBSS                    ,
  58         PS_MODE_WWLAN           ,
  59         PM_Radio_Off                    ,
  60         PM_Card_Disable         ,
  61         PS_MODE_NUM,
  62 };
  63
  64 #ifdef CONFIG_PNO_SUPPORT
  65 #define MAX_PNO_LIST_COUNT 16
  66 #define MAX_SCAN_LIST_COUNT 14  //2.4G only
  67 #define MAX_HIDDEN_AP 8         //8 hidden AP
  68 #endif
  69
  70 /*
  71         BIT[2:0] = HW state
  72         BIT[3] = Protocol PS state,   0: register active state , 1: register sleep state
  73         BIT[4] = sub-state
  74 */
  75
  76 #define PS_DPS                          BIT(0)
  77 #define PS_LCLK                         (PS_DPS)
  78 #define PS_RF_OFF                       BIT(1)
  79 #define PS_ALL_ON                       BIT(2)
  80 #define PS_ST_ACTIVE            BIT(3)
  81
  82 #define PS_ISR_ENABLE           BIT(4)
  83 #define PS_IMR_ENABLE           BIT(5)
  84 #define PS_ACK                          BIT(6)
  85 #define PS_TOGGLE                       BIT(7)
  86
  87 #define PS_STATE_MASK           (0x0F)
  88 #define PS_STATE_HW_MASK        (0x07)
  89 #define PS_SEQ_MASK                     (0xc0)
  90
  91 #define PS_STATE(x)             (PS_STATE_MASK & (x))
  92 #define PS_STATE_HW(x)  (PS_STATE_HW_MASK & (x))
  93 #define PS_SEQ(x)               (PS_SEQ_MASK & (x))
  94
  95 #define PS_STATE_S0             (PS_DPS)
  96 #define PS_STATE_S1             (PS_LCLK)
  97 #define PS_STATE_S2             (PS_RF_OFF)
  98 #define PS_STATE_S3             (PS_ALL_ON)
  99 #define PS_STATE_S4             ((PS_ST_ACTIVE) | (PS_ALL_ON))
 100
 101
 102 #define PS_IS_RF_ON(x)  ((x) & (PS_ALL_ON))
 103 #define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE))
 104 #define CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
 105
 106
 107 struct reportpwrstate_parm {
 108         unsigned char mode;
 109         unsigned char state; //the CPWM value
 110         unsigned short rsvd;
 111 };
 112
 113
 114 typedef _sema _pwrlock;
 115
 116
 117 __inline static void _init_pwrlock(_pwrlock *plock)
 118 {
 119         _rtw_init_sema(plock, 1);
 120 }
 121
 122 __inline static void _free_pwrlock(_pwrlock *plock)
 123 {
 124         _rtw_free_sema(plock);
 125 }
 126
 127
 128 __inline static void _enter_pwrlock(_pwrlock *plock)
 129 {
 130         _rtw_down_sema(plock);
 131 }
 132
 133
 134 __inline static void _exit_pwrlock(_pwrlock *plock)
 135 {
 136         _rtw_up_sema(plock);
 137 }
 138
 139 #define LPS_DELAY_TIME  1*HZ // 1 sec
 140
 141 #define EXE_PWR_NONE    0x01
 142 #define EXE_PWR_IPS             0x02
 143 #define EXE_PWR_LPS             0x04
 144
 145 // RF state.
 146 typedef enum _rt_rf_power_state
 147 {
 148         rf_on,          // RF is on after RFSleep or RFOff
 149         rf_sleep,       // 802.11 Power Save mode
 150         rf_off,         // HW/SW Radio OFF or Inactive Power Save
 151         //=====Add the new RF state above this line=====//
 152         rf_max
 153 }rt_rf_power_state;
 154
 155 // RF Off Level for IPS or HW/SW radio off
 156 #define RT_RF_OFF_LEVL_ASPM                     BIT(0)  // PCI ASPM
 157 #define RT_RF_OFF_LEVL_CLK_REQ          BIT(1)  // PCI clock request
 158 #define RT_RF_OFF_LEVL_PCI_D3                   BIT(2)  // PCI D3 mode
 159 #define RT_RF_OFF_LEVL_HALT_NIC         BIT(3)  // NIC halt, re-initialize hw parameters
 160 #define RT_RF_OFF_LEVL_FREE_FW          BIT(4)  // FW free, re-download the FW
 161 #define RT_RF_OFF_LEVL_FW_32K           BIT(5)  // FW in 32k
 162 #define RT_RF_PS_LEVEL_ALWAYS_ASPM      BIT(6)  // Always enable ASPM and Clock Req in initialization.
 163 #define RT_RF_LPS_DISALBE_2R                    BIT(30) // When LPS is on, disable 2R if no packet is received or transmittd.
 164 #define RT_RF_LPS_LEVEL_ASPM                    BIT(31) // LPS with ASPM
 165
 166 #define RT_IN_PS_LEVEL(ppsc, _PS_FLAG)          ((ppsc->cur_ps_level & _PS_FLAG) ? _TRUE : _FALSE)
 167 #define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG)       (ppsc->cur_ps_level &= (~(_PS_FLAG)))
 168 #define RT_SET_PS_LEVEL(ppsc, _PS_FLAG)         (ppsc->cur_ps_level |= _PS_FLAG)
 169
 170 // ASPM OSC Control bit, added by Roger, 2013.03.29.
 171 #define RT_PCI_ASPM_OSC_IGNORE          0        // PCI ASPM ignore OSC control in default
 172 #define RT_PCI_ASPM_OSC_ENABLE          BIT0 // PCI ASPM controlled by OS according to ACPI Spec 5.0
 173 #define RT_PCI_ASPM_OSC_DISABLE         BIT1 // PCI ASPM controlled by driver or BIOS, i.e., force enable ASPM
 174
 175
 176 enum _PS_BBRegBackup_ {
 177         PSBBREG_RF0 = 0,
 178         PSBBREG_RF1,
 179         PSBBREG_RF2,
 180         PSBBREG_AFE0,
 181         PSBBREG_TOTALCNT
 182 };
 183
 184 enum { // for ips_mode
 185         IPS_NONE=0,
 186         IPS_NORMAL,
 187         IPS_LEVEL_2,
 188         IPS_NUM
 189 };
 190
 191 // Design for pwrctrl_priv.ips_deny, 32 bits for 32 reasons at most
 192 typedef enum _PS_DENY_REASON
 193 {
 194         PS_DENY_DRV_INITIAL = 0,
 195         PS_DENY_SCAN,
 196         PS_DENY_JOIN,
 197         PS_DENY_DISCONNECT,
 198         PS_DENY_SUSPEND,
 199         PS_DENY_IOCTL,
 200         PS_DENY_MGNT_TX,
 201         PS_DENY_DRV_REMOVE = 30,
 202         PS_DENY_OTHERS = 31
 203 } PS_DENY_REASON;
 204
 205 #ifdef CONFIG_PNO_SUPPORT
 206 typedef struct pno_nlo_info
 207 {
 208         u32 fast_scan_period;                           //Fast scan period
 209         u8      ssid_num;                               //number of entry
 210         u8      hidden_ssid_num;
 211         u32     slow_scan_period;                       //slow scan period
 212         u32     fast_scan_iterations;                   //Fast scan iterations
 213         u8      ssid_length[MAX_PNO_LIST_COUNT];        //SSID Length Array
 214         u8      ssid_cipher_info[MAX_PNO_LIST_COUNT];   //Cipher information for security
 215         u8      ssid_channel_info[MAX_PNO_LIST_COUNT];  //channel information
 216         u8      loc_probe_req[MAX_HIDDEN_AP];           //loc_probeReq
 217 }pno_nlo_info_t;
 218
 219 typedef struct pno_ssid {
 220         u32             SSID_len;
 221         u8              SSID[32];
 222 } pno_ssid_t;
 223
 224 typedef struct pno_ssid_list {
 225         pno_ssid_t      node[MAX_PNO_LIST_COUNT];
 226 }pno_ssid_list_t;
 227
 228 typedef struct pno_scan_channel_info
 229 {
 230         u8      channel;
 231         u8      tx_power;
 232         u8      timeout;
 233         u8      active;                         //set 1 means active scan, or pasivite scan.
 234 }pno_scan_channel_info_t;
 235
 236 typedef struct pno_scan_info
 237 {
 238         u8      enableRFE;                      //Enable RFE
 239         u8      period_scan_time;               //exclusive with fast_scan_period and slow_scan_period
 240         u8      periodScan;                     //exclusive with fast_scan_period and slow_scan_period
 241         u8      orig_80_offset;                 //original channel 80 offset
 242         u8      orig_40_offset;                 //original channel 40 offset
 243         u8      orig_bw;                        //original bandwidth
 244         u8      orig_ch;                        //original channel
 245         u8      channel_num;                    //number of channel
 246         u64     rfe_type;                       //rfe_type && 0x00000000000000ff
 247         pno_scan_channel_info_t ssid_channel_info[MAX_SCAN_LIST_COUNT];
 248 }pno_scan_info_t;
 249 #endif //CONFIG_PNO_SUPPORT
 250
 251 struct pwrctrl_priv
 252 {
 253         _pwrlock        lock;
 254         _pwrlock        check_32k_lock;
 255         volatile u8 rpwm; // requested power state for fw
 256         volatile u8 cpwm; // fw current power state. updated when 1. read from HCPWM 2. driver lowers power level
 257         volatile u8 tog; // toggling
 258         volatile u8 cpwm_tog; // toggling
 259
 260         u8      pwr_mode;
 261         u8      smart_ps;
 262         u8      bcn_ant_mode;
 263         u8      dtim;
 264
 265         u32     alives;
 266         _workitem cpwm_event;
 267 #ifdef CONFIG_LPS_RPWM_TIMER
 268         u8 brpwmtimeout;
 269         _workitem rpwmtimeoutwi;
 270         _timer pwr_rpwm_timer;
 271 #endif // CONFIG_LPS_RPWM_TIMER
 272         u8      bpower_saving; //for LPS/IPS
 273
 274         u8      b_hw_radio_off;
 275         u8      reg_rfoff;
 276         u8      reg_pdnmode; //powerdown mode
 277         u32     rfoff_reason;
 278
 279         //RF OFF Level
 280         u32     cur_ps_level;
 281         u32     reg_rfps_level;
 282
 283         uint    ips_enter_cnts;
 284         uint    ips_leave_cnts;
 285         uint    lps_enter_cnts;
 286         uint    lps_leave_cnts;
 287
 288         u8      ips_mode;
 289         u8      ips_org_mode;
 290         u8      ips_mode_req; // used to accept the mode setting request, will update to ipsmode later
 291         uint bips_processing;
 292         u32 ips_deny_time; /* will deny IPS when system time is smaller than this */
 293         u8 pre_ips_type;// 0: default flow, 1: carddisbale flow
 294
 295         // ps_deny: if 0, power save is free to go; otherwise deny all kinds of power save.
 296         // Use PS_DENY_REASON to decide reason.
 297         // Don't access this variable directly without control function,
 298         // and this variable should be protected by lock.
 299         u32 ps_deny;
 300
 301         u8 ps_processing; /* temporarily used to mark whether in rtw_ps_processor */
 302
 303         u8 fw_psmode_iface_id;
 304         u8      bLeisurePs;
 305         u8      LpsIdleCount;
 306         u8      power_mgnt;
 307         u8      org_power_mgnt;
 308         u8      bFwCurrentInPSMode;
 309         u32     DelayLPSLastTimeStamp;
 310         s32             pnp_current_pwr_state;
 311         u8              pnp_bstop_trx;
 312
 313
 314         u8              bInternalAutoSuspend;
 315         u8              bInSuspend;
 316 #ifdef  CONFIG_BT_COEXIST
 317         u8              bAutoResume;
 318         u8              autopm_cnt;
 319 #endif
 320         u8              bSupportRemoteWakeup;
 321         u8              wowlan_wake_reason;
 322         u8              wowlan_ap_mode;
 323         u8              wowlan_mode;
 324         u8              wowlan_p2p_mode;
 325         u8              wowlan_pno_enable;
 326 #ifdef CONFIG_WOWLAN
 327         u8              wowlan_pattern;
 328         u8              wowlan_magic;
 329         u8              wowlan_unicast;
 330         u8              wowlan_pattern_idx;
 331         u8              wowlan_from_cmd;
 332 #ifdef CONFIG_PNO_SUPPORT
 333         u8              pno_in_resume;
 334         u8              pno_inited;
 335         pno_nlo_info_t  *pnlo_info;
 336         pno_scan_info_t *pscan_info;
 337         pno_ssid_list_t *pno_ssid_list;
 338 #endif
 339         u32             wowlan_pattern_context[8][5];
 340         u64             wowlan_fw_iv;
 341 #endif // CONFIG_WOWLAN
 342         _timer  pwr_state_check_timer;
 343         int             pwr_state_check_interval;
 344         u8              pwr_state_check_cnts;
 345
 346         int             ps_flag; /* used by autosuspend */
 347
 348         rt_rf_power_state       rf_pwrstate;//cur power state, only for IPS
 349         //rt_rf_power_state     current_rfpwrstate;
 350         rt_rf_power_state       change_rfpwrstate;
 351
 352         u8              bHWPowerdown; /* power down mode selection. 0:radio off, 1:power down */
 353         u8              bHWPwrPindetect; /* come from registrypriv.hwpwrp_detect. enable power down function. 0:disable, 1:enable */
 354         u8              bkeepfwalive;
 355         u8              brfoffbyhw;
 356         unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
 357
 358         #ifdef CONFIG_RESUME_IN_WORKQUEUE
 359         struct workqueue_struct *rtw_workqueue;
 360         _workitem resume_work;
 361         #endif
 362
 363         #ifdef CONFIG_HAS_EARLYSUSPEND
 364         struct early_suspend early_suspend;
 365         u8 do_late_resume;
 366         #endif //CONFIG_HAS_EARLYSUSPEND
 367
 368         #ifdef CONFIG_ANDROID_POWER
 369         android_early_suspend_t early_suspend;
 370         u8 do_late_resume;
 371         #endif
 372
 373         #ifdef CONFIG_INTEL_PROXIM
 374         u8      stored_power_mgnt;
 375         #endif
 376 };
 377
 378 #define rtw_get_ips_mode_req(pwrctl) \
 379         (pwrctl)->ips_mode_req
 380
 381 #define rtw_ips_mode_req(pwrctl, ips_mode) \
 382         (pwrctl)->ips_mode_req = (ips_mode)
 383
 384 #define RTW_PWR_STATE_CHK_INTERVAL 2000
 385
 386 #define _rtw_set_pwr_state_check_timer(pwrctl, ms) \
 387         do { \
 388                 /*DBG_871X("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __FUNCTION__, (pwrctl), (ms));*/ \
 389                 _set_timer(&(pwrctl)->pwr_state_check_timer, (ms)); \
 390         } while(0)
 391
 392 #define rtw_set_pwr_state_check_timer(pwrctl) \
 393         _rtw_set_pwr_state_check_timer((pwrctl), (pwrctl)->pwr_state_check_interval)
 394
 395 extern void rtw_init_pwrctrl_priv(_adapter *adapter);
 396 extern void rtw_free_pwrctrl_priv(_adapter * adapter);
 397
 398 #ifdef CONFIG_LPS_LCLK
 399 s32 rtw_register_task_alive(PADAPTER, u32 task);
 400 void rtw_unregister_task_alive(PADAPTER, u32 task);
 401 extern s32 rtw_register_tx_alive(PADAPTER padapter);
 402 extern void rtw_unregister_tx_alive(PADAPTER padapter);
 403 extern s32 rtw_register_rx_alive(PADAPTER padapter);
 404 extern void rtw_unregister_rx_alive(PADAPTER padapter);
 405 extern s32 rtw_register_cmd_alive(PADAPTER padapter);
 406 extern void rtw_unregister_cmd_alive(PADAPTER padapter);
 407 extern s32 rtw_register_evt_alive(PADAPTER padapter);
 408 extern void rtw_unregister_evt_alive(PADAPTER padapter);
 409 extern void cpwm_int_hdl(PADAPTER padapter, struct reportpwrstate_parm *preportpwrstate);
 410 extern void LPS_Leave_check(PADAPTER padapter);
 411 #endif
 412
 413 extern void LeaveAllPowerSaveMode(PADAPTER Adapter);
 414 extern void LeaveAllPowerSaveModeDirect(PADAPTER Adapter);
 415 #ifdef CONFIG_IPS
 416 void _ips_enter(_adapter * padapter);
 417 void ips_enter(_adapter * padapter);
 418 int _ips_leave(_adapter * padapter);
 419 int ips_leave(_adapter * padapter);
 420 #endif
 421
 422 void rtw_ps_processor(_adapter*padapter);
 423
 424 #ifdef CONFIG_AUTOSUSPEND
 425 int autoresume_enter(_adapter* padapter);
 426 #endif
 427 #ifdef SUPPORT_HW_RFOFF_DETECTED
 428 rt_rf_power_state RfOnOffDetect(IN      PADAPTER pAdapter );
 429 #endif
 430
 431
 432 int rtw_fw_ps_state(PADAPTER padapter);
 433
 434 #ifdef CONFIG_LPS
 435 s32 LPS_RF_ON_check(PADAPTER padapter, u32 delay_ms);
 436 void LPS_Enter(PADAPTER padapter, const char *msg);
 437 void LPS_Leave(PADAPTER padapter, const char *msg);
 438 void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets);
 439 void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg);
 440 void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable);
 441 void rtw_set_rpwm(_adapter * padapter, u8 val8);
 442 #endif
 443
 444 #ifdef CONFIG_RESUME_IN_WORKQUEUE
 445 void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv);
 446 #endif //CONFIG_RESUME_IN_WORKQUEUE
 447
 448 #if defined(CONFIG_HAS_EARLYSUSPEND ) || defined(CONFIG_ANDROID_POWER)
 449 bool rtw_is_earlysuspend_registered(struct pwrctrl_priv *pwrpriv);
 450 bool rtw_is_do_late_resume(struct pwrctrl_priv *pwrpriv);
 451 void rtw_set_do_late_resume(struct pwrctrl_priv *pwrpriv, bool enable);
 452 void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv);
 453 void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv);
 454 #else
 455 #define rtw_is_earlysuspend_registered(pwrpriv) _FALSE
 456 #define rtw_is_do_late_resume(pwrpriv) _FALSE
 457 #define rtw_set_do_late_resume(pwrpriv, enable) do {} while (0)
 458 #define rtw_register_early_suspend(pwrpriv) do {} while (0)
 459 #define rtw_unregister_early_suspend(pwrpriv) do {} while (0)
 460 #endif /* CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER */
 461
 462 u8 rtw_interface_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id,u8* val);
 463 void rtw_set_ips_deny(_adapter *padapter, u32 ms);
 464 int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller);
 465 #define rtw_pwr_wakeup(adapter) _rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __FUNCTION__)
 466 #define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) _rtw_pwr_wakeup(adapter, ips_deffer_ms, __FUNCTION__)
 467 int rtw_pm_set_ips(_adapter *padapter, u8 mode);
 468 int rtw_pm_set_lps(_adapter *padapter, u8 mode);
 469
 470 void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason);
 471 void rtw_ps_deny_cancel(PADAPTER padapter, PS_DENY_REASON reason);
 472 u32 rtw_ps_deny_get(PADAPTER padapter);
 473
 474 #endif  //__RTL871X_PWRCTRL_H_
 475