1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
22 #include <drv_types.h>
25 #include "../hal/efuse/efuse_mask.h"
27 /*------------------------Define local variable------------------------------*/
28 u8 fakeEfuseBank = {0};
29 u32 fakeEfuseUsedBytes = {0};
30 u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE] = {0};
31 u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN] = {0};
32 u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN] = {0};
34 u32 BTEfuseUsedBytes = {0};
35 u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
36 u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN] = {0};
37 u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN] = {0};
39 u32 fakeBTEfuseUsedBytes = {0};
40 u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
41 u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN] = {0};
42 u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN] = {0};
44 u8 maskfileBuffer[64];
45 /*------------------------Define local variable------------------------------*/
46 BOOLEAN rtw_file_efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
49 int c = (Offset % 16) / 2;
52 if (pAdapter->registrypriv.boffefusemask)
55 if (c < 4) /* Upper double word */
56 result = (maskfileBuffer[r] & (0x10 << c));
58 result = (maskfileBuffer[r] & (0x01 << (c - 4)));
60 return (result > 0) ? 0 : 1;
63 BOOLEAN efuse_IsMasked(PADAPTER pAdapter, u16 Offset)
65 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
67 if (pAdapter->registrypriv.boffefusemask)
70 #if DEV_BUS_TYPE == RT_USB_INTERFACE
71 #if defined(CONFIG_RTL8188E)
72 if (IS_HARDWARE_TYPE_8188E(pAdapter))
73 return (IS_MASKED(8188E, _MUSB, Offset)) ? TRUE : FALSE;
75 #if defined(CONFIG_RTL8812A)
76 if (IS_HARDWARE_TYPE_8812(pAdapter))
77 return (IS_MASKED(8812A, _MUSB, Offset)) ? TRUE : FALSE;
79 #if defined(CONFIG_RTL8821A)
81 if (IS_HARDWARE_TYPE_8811AU(pAdapter))
82 return (IS_MASKED(8811A, _MUSB, Offset)) ? TRUE : FALSE;
84 if (IS_HARDWARE_TYPE_8821(pAdapter))
85 return (IS_MASKED(8821A, _MUSB, Offset)) ? TRUE : FALSE;
87 #if defined(CONFIG_RTL8192E)
88 if (IS_HARDWARE_TYPE_8192E(pAdapter))
89 return (IS_MASKED(8192E, _MUSB, Offset)) ? TRUE : FALSE;
91 #if defined(CONFIG_RTL8723B)
92 if (IS_HARDWARE_TYPE_8723B(pAdapter))
93 return (IS_MASKED(8723B, _MUSB, Offset)) ? TRUE : FALSE;
95 #if defined(CONFIG_RTL8703B)
96 if (IS_HARDWARE_TYPE_8703B(pAdapter))
97 return (IS_MASKED(8703B, _MUSB, Offset)) ? TRUE : FALSE;
99 #if defined(CONFIG_RTL8814A)
100 if (IS_HARDWARE_TYPE_8814A(pAdapter))
101 return (IS_MASKED(8814A, _MUSB, Offset)) ? TRUE : FALSE;
103 #if defined(CONFIG_RTL8188F)
104 if (IS_HARDWARE_TYPE_8188F(pAdapter))
105 return (IS_MASKED(8188F, _MUSB, Offset)) ? TRUE : FALSE;
107 #if defined(CONFIG_RTL8822B)
108 if (IS_HARDWARE_TYPE_8822B(pAdapter))
109 return (IS_MASKED(8822B, _MUSB, Offset)) ? TRUE : FALSE;
111 #if defined(CONFIG_RTL8723D)
112 if (IS_HARDWARE_TYPE_8723D(pAdapter))
113 return (IS_MASKED(8723D, _MUSB, Offset)) ? TRUE : FALSE;
116 /*#if defined(CONFIG_RTL8821C)
117 if (IS_HARDWARE_TYPE_8821C(pAdapter))
118 return (IS_MASKED(8821C,_MUSB,Offset)) ? TRUE : FALSE;
121 #elif DEV_BUS_TYPE == RT_PCI_INTERFACE
122 #if defined(CONFIG_RTL8188E)
123 if (IS_HARDWARE_TYPE_8188E(pAdapter))
124 return (IS_MASKED(8188E, _MPCIE, Offset)) ? TRUE : FALSE;
126 #if defined(CONFIG_RTL8192E)
127 if (IS_HARDWARE_TYPE_8192E(pAdapter))
128 return (IS_MASKED(8192E, _MPCIE, Offset)) ? TRUE : FALSE;
130 #if defined(CONFIG_RTL8812A)
131 if (IS_HARDWARE_TYPE_8812(pAdapter))
132 return (IS_MASKED(8812A, _MPCIE, Offset)) ? TRUE : FALSE;
134 #if defined(CONFIG_RTL8821A)
135 if (IS_HARDWARE_TYPE_8821(pAdapter))
136 return (IS_MASKED(8821A, _MPCIE, Offset)) ? TRUE : FALSE;
138 #if defined(CONFIG_RTL8723B)
139 if (IS_HARDWARE_TYPE_8723B(pAdapter))
140 return (IS_MASKED(8723B, _MPCIE, Offset)) ? TRUE : FALSE;
142 #if defined(CONFIG_RTL8814A)
143 if (IS_HARDWARE_TYPE_8814A(pAdapter))
144 return (IS_MASKED(8814A, _MPCIE, Offset)) ? TRUE : FALSE;
146 #if defined(CONFIG_RTL8822B)
147 if (IS_HARDWARE_TYPE_8822B(pAdapter))
148 return (IS_MASKED(8822B, _MPCIE, Offset)) ? TRUE : FALSE;
151 #elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
152 #ifdef CONFIG_RTL8188E_SDIO
153 if (IS_HARDWARE_TYPE_8188E(pAdapter))
154 return (IS_MASKED(8188E, _MSDIO, Offset)) ? TRUE : FALSE;
156 #ifdef CONFIG_RTL8188F_SDIO
157 if (IS_HARDWARE_TYPE_8188F(pAdapter))
158 return (IS_MASKED(8188F, _MSDIO, Offset)) ? TRUE : FALSE;
160 #if defined(CONFIG_RTL8821C)
161 if (IS_HARDWARE_TYPE_8821C(pAdapter))
162 return (IS_MASKED(8821C, _MSDIO, Offset)) ? TRUE : FALSE;
164 #if defined(CONFIG_RTL8822B)
165 if (IS_HARDWARE_TYPE_8822B(pAdapter))
166 return (IS_MASKED(8822B, _MSDIO, Offset)) ? TRUE : FALSE;
173 void rtw_efuse_mask_array(PADAPTER pAdapter, u8 *pArray)
175 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
177 #if DEV_BUS_TYPE == RT_USB_INTERFACE
178 #if defined(CONFIG_RTL8188E)
179 if (IS_HARDWARE_TYPE_8188E(pAdapter))
180 GET_MASK_ARRAY(8188E, _MUSB, pArray);
182 #if defined(CONFIG_RTL8812A)
183 if (IS_HARDWARE_TYPE_8812(pAdapter))
184 GET_MASK_ARRAY(8812A, _MUSB, pArray);
186 #if defined(CONFIG_RTL8821A)
187 if (IS_HARDWARE_TYPE_8821(pAdapter))
188 GET_MASK_ARRAY(8821A, _MUSB, pArray);
190 #if defined(CONFIG_RTL8192E)
191 if (IS_HARDWARE_TYPE_8192E(pAdapter))
192 GET_MASK_ARRAY(8192E, _MUSB, pArray);
194 #if defined(CONFIG_RTL8723B)
195 if (IS_HARDWARE_TYPE_8723B(pAdapter))
196 GET_MASK_ARRAY(8723B, _MUSB, pArray);
198 #if defined(CONFIG_RTL8703B)
199 if (IS_HARDWARE_TYPE_8703B(pAdapter))
200 GET_MASK_ARRAY(8703B, _MUSB, pArray);
202 #if defined(CONFIG_RTL8188F)
203 if (IS_HARDWARE_TYPE_8188F(pAdapter))
204 GET_MASK_ARRAY(8188F, _MUSB, pArray);
206 #if defined(CONFIG_RTL8814A)
207 if (IS_HARDWARE_TYPE_8814A(pAdapter))
208 GET_MASK_ARRAY(8814A, _MUSB, pArray);
210 #if defined(CONFIG_RTL8822B)
211 if (IS_HARDWARE_TYPE_8822B(pAdapter))
212 GET_MASK_ARRAY(8822B, _MUSB, pArray);
214 /*#if defined(CONFIG_RTL8821C)
215 if (IS_HARDWARE_TYPE_8821C(pAdapter))
216 GET_MASK_ARRAY(8821C,_MUSB,pArray);
218 #elif DEV_BUS_TYPE == RT_PCI_INTERFACE
219 #if defined(CONFIG_RTL8188E)
220 if (IS_HARDWARE_TYPE_8188E(pAdapter))
221 GET_MASK_ARRAY(8188E, _MPCIE, pArray);
223 #if defined(CONFIG_RTL8192E)
224 if (IS_HARDWARE_TYPE_8192E(pAdapter))
225 GET_MASK_ARRAY(8192E, _MPCIE, pArray);
227 #if defined(CONFIG_RTL8812A)
228 if (IS_HARDWARE_TYPE_8812(pAdapter))
229 GET_MASK_ARRAY(8812A, _MPCIE, pArray);
231 #if defined(CONFIG_RTL8821A)
232 if (IS_HARDWARE_TYPE_8821(pAdapter))
233 GET_MASK_ARRAY(8821A, _MPCIE, pArray);
235 #if defined(CONFIG_RTL8723B)
236 if (IS_HARDWARE_TYPE_8723B(pAdapter))
237 GET_MASK_ARRAY(8723B, _MPCIE, pArray);
239 #if defined(CONFIG_RTL8814A)
240 if (IS_HARDWARE_TYPE_8814A(pAdapter))
241 GET_MASK_ARRAY(8814A, _MPCIE, pArray);
243 #if defined(CONFIG_RTL8822B)
244 if (IS_HARDWARE_TYPE_8822B(pAdapter))
245 GET_MASK_ARRAY(8822B, _MPCIE, pArray);
247 #elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
248 #if defined(CONFIG_RTL8188E)
249 if (IS_HARDWARE_TYPE_8188E(pAdapter))
250 GET_MASK_ARRAY(8188E, _MSDIO, pArray);
252 #if defined(CONFIG_RTL8188F)
253 if (IS_HARDWARE_TYPE_8188F(pAdapter))
254 GET_MASK_ARRAY(8188F, _MSDIO, pArray);
256 #if defined(CONFIG_RTL8821C)
257 if (IS_HARDWARE_TYPE_8821C(pAdapter))
258 GET_MASK_ARRAY(8821C , _MSDIO, pArray);
260 #if defined(CONFIG_RTL8822B)
261 if (IS_HARDWARE_TYPE_8822B(pAdapter))
262 GET_MASK_ARRAY(8822B , _MSDIO, pArray);
264 #endif /*#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE*/
267 u16 rtw_get_efuse_mask_arraylen(PADAPTER pAdapter)
269 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
271 #if DEV_BUS_TYPE == RT_USB_INTERFACE
272 #if defined(CONFIG_RTL8188E)
273 if (IS_HARDWARE_TYPE_8188E(pAdapter))
274 return GET_MASK_ARRAY_LEN(8188E, _MUSB);
276 #if defined(CONFIG_RTL8812A)
277 if (IS_HARDWARE_TYPE_8812(pAdapter))
278 return GET_MASK_ARRAY_LEN(8812A, _MUSB);
280 #if defined(CONFIG_RTL8821A)
281 if (IS_HARDWARE_TYPE_8821(pAdapter))
282 return GET_MASK_ARRAY_LEN(8821A, _MUSB);
284 #if defined(CONFIG_RTL8192E)
285 if (IS_HARDWARE_TYPE_8192E(pAdapter))
286 return GET_MASK_ARRAY_LEN(8192E, _MUSB);
288 #if defined(CONFIG_RTL8723B)
289 if (IS_HARDWARE_TYPE_8723B(pAdapter))
290 return GET_MASK_ARRAY_LEN(8723B, _MUSB);
292 #if defined(CONFIG_RTL8703B)
293 if (IS_HARDWARE_TYPE_8703B(pAdapter))
294 return GET_MASK_ARRAY_LEN(8703B, _MUSB);
296 #if defined(CONFIG_RTL8188F)
297 if (IS_HARDWARE_TYPE_8188F(pAdapter))
298 return GET_MASK_ARRAY_LEN(8188F, _MUSB);
300 #if defined(CONFIG_RTL8814A)
301 if (IS_HARDWARE_TYPE_8814A(pAdapter))
302 return GET_MASK_ARRAY_LEN(8814A, _MUSB);
304 #if defined(CONFIG_RTL8822B)
305 if (IS_HARDWARE_TYPE_8822B(pAdapter))
306 return GET_MASK_ARRAY_LEN(8822B, _MUSB);
308 /*#if defined(CONFIG_RTL8821C)
309 if (IS_HARDWARE_TYPE_8821C(pAdapter))
310 return GET_MASK_ARRAY_LEN(8821C,_MUSB);
312 #elif DEV_BUS_TYPE == RT_PCI_INTERFACE
313 #if defined(CONFIG_RTL8188E)
314 if (IS_HARDWARE_TYPE_8188E(pAdapter))
315 return GET_MASK_ARRAY_LEN(8188E, _MPCIE);
317 #if defined(CONFIG_RTL8192E)
318 if (IS_HARDWARE_TYPE_8192E(pAdapter))
319 return GET_MASK_ARRAY_LEN(8192E, _MPCIE);
321 #if defined(CONFIG_RTL8812A)
322 if (IS_HARDWARE_TYPE_8812(pAdapter))
323 return GET_MASK_ARRAY_LEN(8812A, _MPCIE);
325 #if defined(CONFIG_RTL8821A)
326 if (IS_HARDWARE_TYPE_8821(pAdapter))
327 return GET_MASK_ARRAY_LEN(8821A, _MPCIE);
329 #if defined(CONFIG_RTL8723B)
330 if (IS_HARDWARE_TYPE_8723B(pAdapter))
331 return GET_MASK_ARRAY_LEN(8723B, _MPCIE);
333 #if defined(CONFIG_RTL8814A)
334 if (IS_HARDWARE_TYPE_8814A(pAdapter))
335 return GET_MASK_ARRAY_LEN(8814A, _MPCIE);
337 #if defined(CONFIG_RTL8822B)
338 if (IS_HARDWARE_TYPE_8822B(pAdapter))
339 return GET_MASK_ARRAY_LEN(8822B, _MPCIE);
341 #elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
342 #if defined(CONFIG_RTL8188E)
343 if (IS_HARDWARE_TYPE_8188E(pAdapter))
344 return GET_MASK_ARRAY_LEN(8188E, _MSDIO);
346 #if defined(CONFIG_RTL8188F)
347 if (IS_HARDWARE_TYPE_8188F(pAdapter))
348 return GET_MASK_ARRAY_LEN(8188F, _MSDIO);
350 #if defined(CONFIG_RTL8821C)
351 if (IS_HARDWARE_TYPE_8821C(pAdapter))
352 return GET_MASK_ARRAY_LEN(8821C, _MSDIO);
354 #if defined(CONFIG_RTL8822B)
355 if (IS_HARDWARE_TYPE_8822B(pAdapter))
356 return GET_MASK_ARRAY_LEN(8822B, _MSDIO);
362 u8 rtw_efuse_mask_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data)
365 u16 mapLen = 0, i = 0;
367 EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE);
369 ret = rtw_efuse_map_read(padapter, addr, cnts , data);
371 if (padapter->registrypriv.boffefusemask == 0) {
373 for (i = 0; i < cnts; i++) {
374 if (padapter->registrypriv.bFileMaskEfuse == _TRUE) {
375 if (rtw_file_efuse_IsMasked(padapter, addr + i)) /*use file efuse mask.*/
378 /*RTW_INFO(" %s , data[%d] = %x\n", __func__, i, data[i]);*/
379 if (efuse_IsMasked(padapter, addr + i)) {
381 /*RTW_INFO(" %s ,mask data[%d] = %x\n", __func__, i, data[i]);*/
393 #include "../../hal/hal_halmac.h"
395 void Efuse_PowerSwitch(PADAPTER adapter, u8 write, u8 pwrstate)
399 void BTEfuse_PowerSwitch(PADAPTER adapter, u8 write, u8 pwrstate)
403 u8 efuse_GetCurrentSize(PADAPTER adapter, u16 *size)
410 u16 efuse_GetMaxSize(PADAPTER adapter)
412 struct dvobj_priv *d;
416 d = adapter_to_dvobj(adapter);
417 err = rtw_halmac_get_physical_efuse_size(d, &size);
424 u16 efuse_GetavailableSize(PADAPTER adapter)
426 struct dvobj_priv *d;
430 d = adapter_to_dvobj(adapter);
431 err = rtw_halmac_get_available_efuse_size(d, &size);
439 u8 efuse_bt_GetCurrentSize(PADAPTER adapter, u16 *usesize)
444 efuse_map = rtw_malloc(EFUSE_BT_MAP_LEN);
445 if (efuse_map == NULL) {
446 RTW_DBG("%s: malloc FAIL\n", __FUNCTION__);
450 /* for get bt phy efuse last use byte */
451 hal_ReadEFuse_BT_logic_map(adapter, 0x00, EFUSE_BT_MAP_LEN, efuse_map);
452 *usesize = fakeBTEfuseUsedBytes;
455 rtw_mfree(efuse_map, EFUSE_BT_MAP_LEN);
460 u16 efuse_bt_GetMaxSize(PADAPTER adapter)
462 return EFUSE_BT_REAL_CONTENT_LEN;
465 void EFUSE_GetEfuseDefinition(PADAPTER adapter, u8 efusetype, u8 type, void *out, BOOLEAN test)
467 struct dvobj_priv *d;
471 d = adapter_to_dvobj(adapter);
473 if (adapter->hal_func.EFUSEGetEfuseDefinition) {
474 adapter->hal_func.EFUSEGetEfuseDefinition(adapter, efusetype, type, out, test);
478 if (EFUSE_WIFI == efusetype) {
480 case TYPE_EFUSE_MAP_LEN:
481 rtw_halmac_get_logical_efuse_size(d, &v32);
482 *(u16 *)out = (u16)v32;
485 case TYPE_EFUSE_REAL_CONTENT_LEN:
486 rtw_halmac_get_physical_efuse_size(d, &v32);
487 *(u16 *)out = (u16)v32;
490 } else if (EFUSE_BT == efusetype) {
492 case TYPE_EFUSE_MAP_LEN:
493 *(u16 *)out = EFUSE_BT_MAP_LEN;
496 case TYPE_EFUSE_REAL_CONTENT_LEN:
497 *(u16 *)out = EFUSE_BT_REAL_CONTENT_LEN;
504 * read/write raw efuse data
506 u8 rtw_efuse_access(PADAPTER adapter, u8 write, u16 addr, u16 cnts, u8 *data)
508 struct dvobj_priv *d;
514 d = adapter_to_dvobj(adapter);
515 err = rtw_halmac_get_physical_efuse_size(d, &size);
517 size = EFUSE_MAX_SIZE;
519 if ((addr + cnts) > size)
522 if (_TRUE == write) {
523 err = rtw_halmac_write_physical_efuse(d, addr, cnts, data);
528 efuse = rtw_zmalloc(size);
531 err = rtw_halmac_read_physical_efuse_map(d, efuse, size);
533 rtw_mfree(efuse, size);
537 _rtw_memcpy(data, efuse + addr, cnts);
538 rtw_mfree(efuse, size);
540 err = rtw_halmac_read_physical_efuse(d, addr, cnts, data);
549 static inline void dump_buf(u8 *buf, u32 len)
553 RTW_INFO("-----------------Len %d----------------\n", len);
554 for (i = 0; i < len; i++)
555 printk("%2.2x-", *(buf + i));
560 * read/write raw efuse data
562 u8 rtw_efuse_bt_access(PADAPTER adapter, u8 write, u16 addr, u16 cnts, u8 *data)
564 struct dvobj_priv *d;
570 d = adapter_to_dvobj(adapter);
572 size = EFUSE_BT_REAL_CONTENT_LEN;
574 if ((addr + cnts) > size)
577 if (_TRUE == write) {
578 err = rtw_halmac_write_bt_physical_efuse(d, addr, cnts, data);
580 RTW_ERR("%s: rtw_halmac_write_bt_physical_efuse fail!\n", __FUNCTION__);
583 RTW_INFO("%s: rtw_halmac_write_bt_physical_efuse OK! data 0x%x\n", __FUNCTION__, *data);
585 efuse = rtw_zmalloc(size);
588 err = rtw_halmac_read_bt_physical_efuse_map(d, efuse, size);
591 RTW_ERR("%s: rtw_halmac_read_bt_physical_efuse_map fail!\n", __FUNCTION__);
592 rtw_mfree(efuse, size);
595 dump_buf(efuse + addr, cnts);
597 _rtw_memcpy(data, efuse + addr, cnts);
599 RTW_INFO("%s: rtw_halmac_read_bt_physical_efuse_map ok! data 0x%x\n", __FUNCTION__, *data);
600 rtw_mfree(efuse, size);
607 u8 rtw_efuse_map_read(PADAPTER adapter, u16 addr, u16 cnts, u8 *data)
609 struct dvobj_priv *d;
615 d = adapter_to_dvobj(adapter);
616 err = rtw_halmac_get_logical_efuse_size(d, &size);
620 /* size error handle */
621 if ((addr + cnts) > size) {
629 efuse = rtw_zmalloc(size);
632 err = rtw_halmac_read_logical_efuse_map(d, efuse, size);
634 rtw_mfree(efuse, size);
638 _rtw_memcpy(data, efuse + addr, cnts);
639 rtw_mfree(efuse, size);
641 err = rtw_halmac_read_logical_efuse(d, addr, cnts, data);
649 u8 rtw_efuse_map_write(PADAPTER adapter, u16 addr, u16 cnts, u8 *data)
651 struct dvobj_priv *d;
655 u8 mask_buf[64] = "";
656 u16 mask_len = sizeof(u8) * rtw_get_efuse_mask_arraylen(adapter);
658 d = adapter_to_dvobj(adapter);
659 err = rtw_halmac_get_logical_efuse_size(d, &size);
663 if ((addr + cnts) > size)
666 efuse = rtw_zmalloc(size);
670 err = rtw_halmac_read_logical_efuse_map(d, efuse, size);
672 rtw_mfree(efuse, size);
676 _rtw_memcpy(efuse + addr, data, cnts);
678 if (adapter->registrypriv.boffefusemask == 0) {
679 RTW_INFO("Use mask Array Len: %d\n", mask_len);
682 if (adapter->registrypriv.bFileMaskEfuse == _TRUE)
683 _rtw_memcpy(mask_buf, maskfileBuffer, mask_len);
685 rtw_efuse_mask_array(adapter, mask_buf);
687 err = rtw_halmac_write_logical_efuse_map(d, efuse, size, mask_buf, mask_len);
689 err = rtw_halmac_write_logical_efuse_map(d, efuse, size, NULL, 0);
691 _rtw_memset(mask_buf, 0xFF, sizeof(mask_buf));
692 RTW_INFO("Efuse mask off\n");
693 err = rtw_halmac_write_logical_efuse_map(d, efuse, size, mask_buf, size/16);
697 rtw_mfree(efuse, size);
701 rtw_mfree(efuse, size);
706 int Efuse_PgPacketRead(PADAPTER adapter, u8 offset, u8 *data, BOOLEAN test)
711 int Efuse_PgPacketWrite(PADAPTER adapter, u8 offset, u8 word_en, u8 *data, BOOLEAN test)
716 u8 rtw_BT_efuse_map_read(PADAPTER adapter, u16 addr, u16 cnts, u8 *data)
718 hal_ReadEFuse_BT_logic_map(adapter,addr, cnts, data);
723 u8 rtw_BT_efuse_map_write(PADAPTER adapter, u16 addr, u16 cnts, u8 *data)
725 #define RT_ASSERT_RET(expr) \
727 printk("Assertion failed! %s at ......\n", #expr); \
728 printk(" ......%s,%s, line=%d\n",__FILE__, __FUNCTION__, __LINE__); \
734 u8 newdata[PGPKT_DATA_SIZE];
735 s32 i = 0, j = 0, idx;
739 if ((addr + cnts) > mapLen)
742 RT_ASSERT_RET(PGPKT_DATA_SIZE == 8); /* have to be 8 byte alignment */
743 RT_ASSERT_RET((mapLen & 0x7) == 0); /* have to be PGPKT_DATA_SIZE alignment for memcpy */
745 map = rtw_zmalloc(mapLen);
749 ret = rtw_BT_efuse_map_read(adapter, 0, mapLen, map);
752 RTW_INFO("OFFSET\tVALUE(hex)\n");
753 for (i = 0; i < mapLen; i += 16) { /* set 512 because the iwpriv's extra size have limit 0x7FF */
754 RTW_INFO("0x%03x\t", i);
755 for (j = 0; j < 8; j++)
756 RTW_INFO("%02X ", map[i + j]);
759 RTW_INFO("%02X ", map[i + j]);
765 offset = (addr >> 3);
768 j = (addr + idx) & 0x7;
769 _rtw_memcpy(newdata, &map[offset << 3], PGPKT_DATA_SIZE);
770 for (i = j; i < PGPKT_DATA_SIZE && idx < cnts; i++, idx++) {
771 if (data[idx] != map[addr + idx]) {
772 word_en &= ~BIT(i >> 1);
773 newdata[i] = data[idx];
777 if (word_en != 0xF) {
778 ret = EfusePgPacketWrite_BT(adapter, offset, word_en, newdata, _FALSE);
779 RTW_INFO("offset=%x\n", offset);
780 RTW_INFO("word_en=%x\n", word_en);
781 RTW_INFO("%s: data=", __FUNCTION__);
782 for (i = 0; i < PGPKT_DATA_SIZE; i++)
783 RTW_INFO("0x%02X ", newdata[i]);
791 rtw_mfree(map, mapLen);
795 VOID hal_ReadEFuse_BT_logic_map(
803 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
804 PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal;
806 u8 *efuseTbl, *phyefuse;
809 u8 efuseHeader, efuseExtHdr, efuseData;
816 /* Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. */
818 if ((_offset + _size_byte) > EFUSE_BT_MAP_LEN) {
819 RTW_INFO("%s: Invalid offset(%#x) with read bytes(%#x)!!\n", __FUNCTION__, _offset, _size_byte);
823 efuseTbl = rtw_malloc(EFUSE_BT_MAP_LEN);
824 phyefuse = rtw_malloc(EFUSE_BT_REAL_CONTENT_LEN);
825 if (efuseTbl == NULL || phyefuse == NULL) {
826 RTW_INFO("%s: efuseTbl or phyefuse malloc fail!\n", __FUNCTION__);
830 /* 0xff will be efuse default value instead of 0x00. */
831 _rtw_memset(efuseTbl, 0xFF, EFUSE_BT_MAP_LEN);
832 _rtw_memset(phyefuse, 0xFF, EFUSE_BT_REAL_CONTENT_LEN);
834 if (rtw_efuse_bt_access(padapter, _FALSE, 0, EFUSE_BT_REAL_CONTENT_LEN, phyefuse))
835 dump_buf(phyefuse, EFUSE_BT_REAL_BANK_CONTENT_LEN);
838 for (bank = 1; bank <= total; bank++) { /* 8723d Max bake 0~2 */
841 while (AVAILABLE_EFUSE_ADDR(eFuse_Addr)) {
842 /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseHeader, bPseudoTest); */
843 efuseHeader = phyefuse[eFuse_Addr++];
845 if (efuseHeader == 0xFF)
847 RTW_INFO("%s: efuse[%#X]=0x%02x (header)\n", __FUNCTION__, (((bank - 1) * EFUSE_BT_REAL_CONTENT_LEN) + eFuse_Addr - 1), efuseHeader);
849 /* Check PG header for section num. */
850 if (EXT_HEADER(efuseHeader)) { /* extended header */
851 offset = GET_HDR_OFFSET_2_0(efuseHeader);
852 RTW_INFO("%s: extended header offset_2_0=0x%X\n", __FUNCTION__, offset);
854 /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); */
855 efuseExtHdr = phyefuse[eFuse_Addr++];
857 RTW_INFO("%s: efuse[%#X]=0x%02x (ext header)\n", __FUNCTION__, (((bank - 1) * EFUSE_BT_REAL_CONTENT_LEN) + eFuse_Addr - 1), efuseExtHdr);
858 if (ALL_WORDS_DISABLED(efuseExtHdr))
861 offset |= ((efuseExtHdr & 0xF0) >> 1);
862 wden = (efuseExtHdr & 0x0F);
864 offset = ((efuseHeader >> 4) & 0x0f);
865 wden = (efuseHeader & 0x0f);
868 if (offset < EFUSE_BT_MAX_SECTION) {
871 /* Get word enable value from PG header */
872 RTW_INFO("%s: Offset=%d Worden=%#X\n", __FUNCTION__, offset, wden);
874 addr = offset * PGPKT_DATA_SIZE;
875 for (i = 0; i < EFUSE_MAX_WORD_UNIT; i++) {
876 /* Check word enable condition in the section */
877 if (!(wden & (0x01 << i))) {
879 /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); */
880 efuseData = phyefuse[eFuse_Addr++];
882 RTW_INFO("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr - 1, efuseData);
883 efuseTbl[addr] = efuseData;
886 /* ReadEFuseByte(padapter, eFuse_Addr++, &efuseData, bPseudoTest); */
887 efuseData = phyefuse[eFuse_Addr++];
889 RTW_INFO("%s: efuse[%#X]=0x%02X\n", __FUNCTION__, eFuse_Addr - 1, efuseData);
890 efuseTbl[addr + 1] = efuseData;
895 RTW_INFO("%s: offset(%d) is illegal!!\n", __FUNCTION__, offset);
896 eFuse_Addr += Efuse_CalculateWordCnts(wden) * 2;
900 if ((eFuse_Addr - 1) < total) {
901 RTW_INFO("%s: bank(%d) data end at %#x\n", __FUNCTION__, bank, eFuse_Addr - 1);
906 /* switch bank back to bank 0 for later BT and wifi use. */
907 //hal_EfuseSwitchToBank(padapter, 0, bPseudoTest);
909 /* Copy from Efuse map to output pointer memory!!! */
910 for (i = 0; i < _size_byte; i++)
911 pbuf[i] = efuseTbl[_offset + i];
912 /* Calculate Efuse utilization */
913 total = EFUSE_BT_REAL_BANK_CONTENT_LEN;
915 used = eFuse_Addr - 1;
918 efuse_usage = (u8)((used * 100) / total);
922 fakeBTEfuseUsedBytes = used;
923 RTW_INFO("%s: BTEfuseUsed last Bytes = %#x\n", __FUNCTION__, fakeBTEfuseUsedBytes);
927 rtw_mfree(efuseTbl, EFUSE_BT_MAP_LEN);
929 rtw_mfree(phyefuse, EFUSE_BT_REAL_BANK_CONTENT_LEN);
933 static u8 hal_EfusePartialWriteCheck(
937 PPGPKT_STRUCT pTargetPkt,
940 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
941 PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal;
943 u16 startAddr = 0, efuse_max_available_len = EFUSE_BT_REAL_BANK_CONTENT_LEN, efuse_max = EFUSE_BT_REAL_BANK_CONTENT_LEN;
946 startAddr = (u16)fakeBTEfuseUsedBytes;
948 startAddr %= efuse_max;
949 RTW_INFO("%s: startAddr=%#X\n", __FUNCTION__, startAddr);
952 if (startAddr >= efuse_max_available_len) {
954 RTW_INFO("%s: startAddr(%d) >= efuse_max_available_len(%d)\n",
955 __FUNCTION__, startAddr, efuse_max_available_len);
958 if (rtw_efuse_bt_access(padapter, _FALSE, startAddr, 1, &efuse_data)&& (efuse_data != 0xFF)) {
960 RTW_INFO("%s: Something Wrong! last bytes(%#X=0x%02X) is not 0xFF\n",
961 __FUNCTION__, startAddr, efuse_data);
964 /* not used header, 0xff */
966 /* RTW_INFO("%s: Started from unused header offset=%d\n", __FUNCTION__, startAddr)); */
976 static u8 hal_EfusePgPacketWrite2ByteHeader(
980 PPGPKT_STRUCT pTargetPkt,
983 u16 efuse_addr, efuse_max_available_len = EFUSE_BT_REAL_BANK_CONTENT_LEN;
984 u8 pg_header = 0, tmp_header = 0;
987 /* RTW_INFO("%s\n", __FUNCTION__); */
990 if (efuse_addr >= efuse_max_available_len) {
991 RTW_INFO("%s: addr(%d) over avaliable(%d)!!\n", __FUNCTION__, efuse_addr, efuse_max_available_len);
995 pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F;
996 /* RTW_INFO("%s: pg_header=0x%x\n", __FUNCTION__, pg_header); */
1000 rtw_efuse_bt_access(padapter, _TRUE, efuse_addr, 1, &pg_header);
1001 rtw_efuse_bt_access(padapter, _FALSE, efuse_addr, 1, &tmp_header);
1003 if (tmp_header != 0xFF)
1005 if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) {
1006 RTW_INFO("%s: Repeat over limit for pg_header!!\n", __FUNCTION__);
1011 if (tmp_header != pg_header) {
1012 RTW_ERR("%s: PG Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header);
1016 /* to write ext_header */
1018 pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en;
1021 rtw_efuse_bt_access(padapter, _TRUE, efuse_addr, 1, &pg_header);
1022 rtw_efuse_bt_access(padapter, _FALSE, efuse_addr, 1, &tmp_header);
1024 if (tmp_header != 0xFF)
1026 if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) {
1027 RTW_INFO("%s: Repeat over limit for ext_header!!\n", __FUNCTION__);
1032 if (tmp_header != pg_header) { /* offset PG fail */
1033 RTW_ERR("%s: PG EXT Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header);
1037 *pAddr = efuse_addr;
1043 static u8 hal_EfusePgPacketWrite1ByteHeader(
1047 PPGPKT_STRUCT pTargetPkt,
1051 u8 pg_header = 0, tmp_header = 0;
1052 u16 efuse_addr = *pAddr;
1056 /* RTW_INFO("%s\n", __FUNCTION__); */
1057 pg_header = ((pTargetPkt->offset << 4) & 0xf0) | pTargetPkt->word_en;
1060 rtw_efuse_bt_access(pAdapter, _TRUE, efuse_addr, 1, &pg_header);
1061 rtw_efuse_bt_access(pAdapter, _FALSE, efuse_addr, 1, &tmp_header);
1063 if (tmp_header != 0xFF)
1065 if (repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) {
1066 RTW_INFO("%s: Repeat over limit for pg_header!!\n", __FUNCTION__);
1071 if (tmp_header != pg_header) {
1072 RTW_ERR("%s: PG Header Fail!!(pg=0x%02X read=0x%02X)\n", __FUNCTION__, pg_header, tmp_header);
1076 *pAddr = efuse_addr;
1081 static u8 hal_EfusePgPacketWriteHeader(
1085 PPGPKT_STRUCT pTargetPkt,
1090 if (pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE)
1091 bRet = hal_EfusePgPacketWrite2ByteHeader(padapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
1093 bRet = hal_EfusePgPacketWrite1ByteHeader(padapter, efuseType, pAddr, pTargetPkt, bPseudoTest);
1100 Hal_EfuseWordEnableDataWrite(
1108 u16 start_addr = efuse_addr;
1109 u8 badworden = 0x0F;
1110 u8 tmpdata[PGPKT_DATA_SIZE];
1113 /* RTW_INFO("%s: efuse_addr=%#x word_en=%#x\n", __FUNCTION__, efuse_addr, word_en); */
1114 _rtw_memset(tmpdata, 0xFF, PGPKT_DATA_SIZE);
1116 if (!(word_en & BIT(0))) {
1117 tmpaddr = start_addr;
1118 rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[0]);
1119 rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[1]);
1120 rtw_efuse_bt_access(padapter, _FALSE, tmpaddr, 1, &tmpdata[0]);
1121 rtw_efuse_bt_access(padapter, _FALSE, tmpaddr + 1, 1, &tmpdata[1]);
1122 if ((data[0] != tmpdata[0]) || (data[1] != tmpdata[1]))
1123 badworden &= (~BIT(0));
1125 if (!(word_en & BIT(1))) {
1126 tmpaddr = start_addr;
1127 rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[2]);
1128 rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[3]);
1129 rtw_efuse_bt_access(padapter, _FALSE, tmpaddr, 1, &tmpdata[2]);
1130 rtw_efuse_bt_access(padapter, _FALSE, tmpaddr + 1, 1, &tmpdata[3]);
1131 if ((data[2] != tmpdata[2]) || (data[3] != tmpdata[3]))
1132 badworden &= (~BIT(1));
1134 if (!(word_en & BIT(2))) {
1135 tmpaddr = start_addr;
1136 rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[4]);
1137 rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[5]);
1138 rtw_efuse_bt_access(padapter, _FALSE, tmpaddr, 1, &tmpdata[4]);
1139 rtw_efuse_bt_access(padapter, _FALSE, tmpaddr + 1, 1, &tmpdata[5]);
1140 if ((data[4] != tmpdata[4]) || (data[5] != tmpdata[5]))
1141 badworden &= (~BIT(2));
1143 if (!(word_en & BIT(3))) {
1144 tmpaddr = start_addr;
1145 rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[6]);
1146 rtw_efuse_bt_access(padapter, _TRUE, start_addr++, 1, &data[7]);
1147 rtw_efuse_bt_access(padapter, _FALSE, tmpaddr, 1, &tmpdata[6]);
1148 rtw_efuse_bt_access(padapter, _FALSE, tmpaddr + 1, 1, &tmpdata[7]);
1150 if ((data[6] != tmpdata[6]) || (data[7] != tmpdata[7]))
1151 badworden &= (~BIT(3));
1158 hal_EfuseConstructPGPkt(
1162 PPGPKT_STRUCT pTargetPkt)
1164 _rtw_memset(pTargetPkt->data, 0xFF, PGPKT_DATA_SIZE);
1165 pTargetPkt->offset = offset;
1166 pTargetPkt->word_en = word_en;
1167 efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data);
1168 pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en);
1172 hal_EfusePgPacketWriteData(
1176 PPGPKT_STRUCT pTargetPkt,
1182 efuse_addr = *pAddr;
1183 badworden = Hal_EfuseWordEnableDataWrite(pAdapter, efuse_addr + 1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest);
1184 if (badworden != 0x0F) {
1185 RTW_INFO("%s: Fail!!\n", __FUNCTION__);
1188 RTW_INFO("%s: OK!!\n", __FUNCTION__);
1193 /* ***********************************************************
1194 * Efuse related code
1195 * *********************************************************** */
1197 hal_EfuseSwitchToBank(
1204 #ifdef HAL_EFUSE_MEMORY
1205 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
1206 PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal;
1210 RTW_INFO("%s: Efuse switch bank to %d\n", __FUNCTION__, bank);
1212 #ifdef HAL_EFUSE_MEMORY
1213 pEfuseHal->fakeEfuseBank = bank;
1215 fakeEfuseBank = bank;
1219 value32 = rtw_read32(padapter, 0x34);
1223 value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
1226 value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0);
1229 value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1);
1232 value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2);
1235 value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0);
1239 rtw_write32(padapter, 0x34, value32);
1246 #define EFUSE_CTRL 0x30 /* E-Fuse Control. */
1248 /* 11/16/2008 MH Read one byte from real Efuse. */
1251 IN PADAPTER pAdapter,
1254 IN BOOLEAN bPseudoTest)
1259 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
1261 if (IS_HARDWARE_TYPE_8723B(pAdapter) ||
1262 (IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->version_id))) ||
1263 (IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->version_id))
1265 /* <20130121, Kordan> For SMIC EFUSE specificatoin. */
1266 /* 0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) */
1267 /* phy_set_mac_reg(pAdapter, 0x34, BIT11, 0); */
1268 rtw_write16(pAdapter, 0x34, rtw_read16(pAdapter, 0x34) & (~BIT11));
1271 /* -----------------e-fuse reg ctrl --------------------------------- */
1273 rtw_write8(pAdapter, EFUSE_CTRL + 1, (u8)(addr & 0xff));
1274 rtw_write8(pAdapter, EFUSE_CTRL + 2, ((u8)((addr >> 8) & 0x03)) |
1275 (rtw_read8(pAdapter, EFUSE_CTRL + 2) & 0xFC));
1277 /* rtw_write8(pAdapter, EFUSE_CTRL+3, 0x72); */ /* read cmd */
1278 /* Write bit 32 0 */
1279 readbyte = rtw_read8(pAdapter, EFUSE_CTRL + 3);
1280 rtw_write8(pAdapter, EFUSE_CTRL + 3, (readbyte & 0x7f));
1282 while (!(0x80 & rtw_read8(pAdapter, EFUSE_CTRL + 3)) && (tmpidx < 1000)) {
1287 *data = rtw_read8(pAdapter, EFUSE_CTRL);
1292 RTW_INFO("%s: [ERROR] addr=0x%x bResult=%d time out 1s !!!\n", __FUNCTION__, addr, bResult);
1293 RTW_INFO("%s: [ERROR] EFUSE_CTRL =0x%08x !!!\n", __FUNCTION__, rtw_read32(pAdapter, EFUSE_CTRL));
1301 hal_EfuseGetCurrentSize_BT(
1305 #ifdef HAL_EFUSE_MEMORY
1306 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
1307 PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal;
1312 u8 hoffset = 0, hworden = 0;
1313 u8 efuse_data, word_cnts = 0;
1315 u8 bContinual = _TRUE;
1318 btusedbytes = fakeBTEfuseUsedBytes;
1320 efuse_addr = (u16)((btusedbytes % EFUSE_BT_REAL_BANK_CONTENT_LEN));
1321 startBank = (u8)(1 + (btusedbytes / EFUSE_BT_REAL_BANK_CONTENT_LEN));
1323 RTW_INFO("%s: start from bank=%d addr=0x%X\n", __FUNCTION__, startBank, efuse_addr);
1324 retU2 = EFUSE_BT_REAL_CONTENT_LEN - EFUSE_PROTECT_BYTES_BANK;
1326 for (bank = startBank; bank < 3; bank++) {
1327 if (hal_EfuseSwitchToBank(padapter, bank, bPseudoTest) == _FALSE) {
1328 RTW_ERR("%s: switch bank(%d) Fail!!\n", __FUNCTION__, bank);
1329 /* bank = EFUSE_MAX_BANK; */
1333 /* only when bank is switched we have to reset the efuse_addr. */
1334 if (bank != startBank)
1338 while (AVAILABLE_EFUSE_ADDR(efuse_addr)) {
1339 if (rtw_efuse_bt_access(padapter, _FALSE, efuse_addr, 1, &efuse_data) == _FALSE) {
1340 RTW_ERR("%s: efuse_OneByteRead Fail! addr=0x%X !!\n", __FUNCTION__, efuse_addr);
1341 /* bank = EFUSE_MAX_BANK; */
1344 RTW_INFO("%s: efuse_OneByteRead ! addr=0x%X !efuse_data=0x%X! bank =%d\n", __FUNCTION__, efuse_addr, efuse_data, bank);
1346 if (efuse_data == 0xFF)
1349 if (EXT_HEADER(efuse_data)) {
1350 hoffset = GET_HDR_OFFSET_2_0(efuse_data);
1352 rtw_efuse_bt_access(padapter, _FALSE, efuse_addr, 1, &efuse_data);
1353 RTW_INFO("%s: efuse_OneByteRead EXT_HEADER ! addr=0x%X !efuse_data=0x%X! bank =%d\n", __FUNCTION__, efuse_addr, efuse_data, bank);
1355 if (ALL_WORDS_DISABLED(efuse_data)) {
1360 /* hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); */
1361 hoffset |= ((efuse_data & 0xF0) >> 1);
1362 hworden = efuse_data & 0x0F;
1364 hoffset = (efuse_data >> 4) & 0x0F;
1365 hworden = efuse_data & 0x0F;
1368 RTW_INFO(FUNC_ADPT_FMT": Offset=%d Worden=%#X\n",
1369 FUNC_ADPT_ARG(padapter), hoffset, hworden);
1371 word_cnts = Efuse_CalculateWordCnts(hworden);
1372 /* read next header */
1373 efuse_addr += (word_cnts * 2) + 1;
1375 /* Check if we need to check next bank efuse */
1376 if (efuse_addr < retU2)
1377 break;/* don't need to check next bank. */
1379 retU2 = ((bank - 1) * EFUSE_BT_REAL_BANK_CONTENT_LEN) + efuse_addr;
1381 fakeBTEfuseUsedBytes = retU2;
1382 RTW_INFO("%s: CurrentSize=%d\n", __FUNCTION__, retU2);
1388 hal_BT_EfusePgCheckAvailableAddr(
1392 u16 max_available = EFUSE_BT_REAL_CONTENT_LEN - EFUSE_PROTECT_BYTES_BANK;
1393 u16 current_size = 0;
1395 RTW_INFO("%s: max_available=%d\n", __FUNCTION__, max_available);
1396 current_size = hal_EfuseGetCurrentSize_BT(pAdapter, bPseudoTest);
1397 if (current_size >= max_available) {
1398 RTW_INFO("%s: Error!! current_size(%d)>max_available(%d)\n", __FUNCTION__, current_size, max_available);
1404 u8 EfusePgPacketWrite_BT(
1411 PGPKT_STRUCT targetPkt;
1413 u8 efuseType = EFUSE_BT;
1415 if (!hal_BT_EfusePgCheckAvailableAddr(pAdapter, bPseudoTest))
1418 hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt);
1420 if (!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
1423 if (!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
1426 if (!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest))
1433 #else /* !RTW_HALMAC */
1434 /* ------------------------------------------------------------------------------ */
1435 #define REG_EFUSE_CTRL 0x0030
1436 #define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */
1437 /* ------------------------------------------------------------------------------ */
1439 VOID efuse_PreUpdateAction(
1443 #if defined(CONFIG_RTL8812A)
1444 if (IS_HARDWARE_TYPE_8812AU(pAdapter)) {
1445 /* <20131115, Kordan> Turn off Rx to prevent from being busy when writing the EFUSE. (Asked by Chunchu.)*/
1446 BackupRegs[0] = phy_query_mac_reg(pAdapter, REG_RCR, bMaskDWord);
1447 BackupRegs[1] = phy_query_mac_reg(pAdapter, REG_RXFLTMAP0, bMaskDWord);
1448 BackupRegs[2] = phy_query_mac_reg(pAdapter, REG_RXFLTMAP0+4, bMaskDWord);
1449 BackupRegs[3] = phy_query_mac_reg(pAdapter, REG_AFE_MISC, bMaskDWord);
1451 PlatformEFIOWrite4Byte(pAdapter, REG_RCR, 0x1);
1452 PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0, 0);
1453 PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+1, 0);
1454 PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+2, 0);
1455 PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+3, 0);
1456 PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+4, 0);
1457 PlatformEFIOWrite1Byte(pAdapter, REG_RXFLTMAP0+5, 0);
1459 /* <20140410, Kordan> 0x11 = 0x4E, lower down LX_SPS0 voltage. (Asked by Chunchu)*/
1460 phy_set_mac_reg(pAdapter, REG_AFE_MISC, bMaskByte1, 0x4E);
1465 VOID efuse_PostUpdateAction(
1469 #if defined(CONFIG_RTL8812A)
1470 if (IS_HARDWARE_TYPE_8812AU(pAdapter)) {
1471 /* <20131115, Kordan> Turn on Rx and restore the registers. (Asked by Chunchu.)*/
1472 phy_set_mac_reg(pAdapter, REG_RCR, bMaskDWord, BackupRegs[0]);
1473 phy_set_mac_reg(pAdapter, REG_RXFLTMAP0, bMaskDWord, BackupRegs[1]);
1474 phy_set_mac_reg(pAdapter, REG_RXFLTMAP0+4, bMaskDWord, BackupRegs[2]);
1475 phy_set_mac_reg(pAdapter, REG_AFE_MISC, bMaskDWord, BackupRegs[3]);
1482 Efuse_Read1ByteFromFakeContent(
1483 IN PADAPTER pAdapter,
1487 Efuse_Read1ByteFromFakeContent(
1488 IN PADAPTER pAdapter,
1492 if (Offset >= EFUSE_MAX_HW_SIZE)
1494 /* DbgPrint("Read fake content, offset = %d\n", Offset); */
1495 if (fakeEfuseBank == 0)
1496 *Value = fakeEfuseContent[Offset];
1498 *Value = fakeBTEfuseContent[fakeEfuseBank - 1][Offset];
1503 Efuse_Write1ByteToFakeContent(
1504 IN PADAPTER pAdapter,
1508 Efuse_Write1ByteToFakeContent(
1509 IN PADAPTER pAdapter,
1513 if (Offset >= EFUSE_MAX_HW_SIZE)
1515 if (fakeEfuseBank == 0)
1516 fakeEfuseContent[Offset] = Value;
1518 fakeBTEfuseContent[fakeEfuseBank - 1][Offset] = Value;
1522 /*-----------------------------------------------------------------------------
1523 * Function: Efuse_PowerSwitch
1525 * Overview: When we want to enable write operation, we should change to
1526 * pwr on state. When we stop write, we should switch to 500k mode
1527 * and disable LDO 2.5V.
1537 * 11/17/2008 MHC Create Version 0.
1539 *---------------------------------------------------------------------------*/
1542 IN PADAPTER pAdapter,
1546 pAdapter->hal_func.EfusePowerSwitch(pAdapter, bWrite, PwrState);
1550 BTEfuse_PowerSwitch(
1551 IN PADAPTER pAdapter,
1555 if (pAdapter->hal_func.BTEfusePowerSwitch)
1556 pAdapter->hal_func.BTEfusePowerSwitch(pAdapter, bWrite, PwrState);
1559 /*-----------------------------------------------------------------------------
1560 * Function: efuse_GetCurrentSize
1562 * Overview: Get current efuse size!!!
1572 * 11/16/2008 MHC Create Version 0.
1574 *---------------------------------------------------------------------------*/
1576 Efuse_GetCurrentSize(
1577 IN PADAPTER pAdapter,
1579 IN BOOLEAN bPseudoTest)
1583 ret = pAdapter->hal_func.EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest);
1590 * Execute E-Fuse read byte operation.
1591 * Refered from SD1 Richard.
1594 * 1. Boot from E-Fuse and successfully auto-load.
1595 * 2. PASSIVE_LEVEL (USB interface)
1597 * Created by Roger, 2008.10.21.
1604 IN BOOLEAN bPseudoTest)
1609 /* u32 start=rtw_get_current_time(); */
1612 Efuse_Read1ByteFromFakeContent(Adapter, _offset, pbuf);
1615 if (IS_HARDWARE_TYPE_8723B(Adapter)) {
1616 /* <20130121, Kordan> For SMIC S55 EFUSE specificatoin. */
1617 /* 0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) */
1618 phy_set_mac_reg(Adapter, EFUSE_TEST, BIT11, 0);
1621 rtw_write8(Adapter, EFUSE_CTRL + 1, (_offset & 0xff));
1622 readbyte = rtw_read8(Adapter, EFUSE_CTRL + 2);
1623 rtw_write8(Adapter, EFUSE_CTRL + 2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc));
1625 /* Write bit 32 0 */
1626 readbyte = rtw_read8(Adapter, EFUSE_CTRL + 3);
1627 rtw_write8(Adapter, EFUSE_CTRL + 3, (readbyte & 0x7f));
1629 /* Check bit 32 read-ready */
1631 value32 = rtw_read32(Adapter, EFUSE_CTRL);
1632 /* while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10)) */
1633 while (!(((value32 >> 24) & 0xff) & 0x80) && (retry < 10000)) {
1634 value32 = rtw_read32(Adapter, EFUSE_CTRL);
1638 /* 20100205 Joseph: Add delay suggested by SD1 Victor. */
1639 /* This fix the problem that Efuse read error in high temperature condition. */
1640 /* Designer says that there shall be some delay after ready bit is set, or the */
1641 /* result will always stay on last data we read. */
1643 value32 = rtw_read32(Adapter, EFUSE_CTRL);
1645 *pbuf = (u8)(value32 & 0xff);
1646 /* RTW_INFO("ReadEFuseByte _offset:%08u, in %d ms\n",_offset ,rtw_get_passing_time_ms(start)); */
1652 * 1. Execute E-Fuse read byte operation according as map offset and
1653 * save to E-Fuse table.
1654 * 2. Refered from SD1 Richard.
1657 * 1. Boot from E-Fuse and successfully auto-load.
1658 * 2. PASSIVE_LEVEL (USB interface)
1660 * Created by Roger, 2008.10.21.
1662 * 2008/12/12 MH 1. Reorganize code flow and reserve bytes. and add description.
1663 * 2. Add efuse utilization collect.
1664 * 2008/12/22 MH Read Efuse must check if we write section 1 data again!!! Sec1
1665 * write addr must be after sec5.
1675 IN BOOLEAN bPseudoTest
1684 IN BOOLEAN bPseudoTest
1687 Adapter->hal_func.ReadEFuse(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest);
1691 EFUSE_GetEfuseDefinition(
1692 IN PADAPTER pAdapter,
1696 IN BOOLEAN bPseudoTest
1699 pAdapter->hal_func.EFUSEGetEfuseDefinition(pAdapter, efuseType, type, pOut, bPseudoTest);
1703 /* 11/16/2008 MH Read one byte from real Efuse. */
1706 IN PADAPTER pAdapter,
1709 IN BOOLEAN bPseudoTest)
1714 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
1716 /* RTW_INFO("===> EFUSE_OneByteRead(), addr = %x\n", addr); */
1717 /* RTW_INFO("===> EFUSE_OneByteRead() start, 0x34 = 0x%X\n", rtw_read32(pAdapter, EFUSE_TEST)); */
1720 bResult = Efuse_Read1ByteFromFakeContent(pAdapter, addr, data);
1724 if (IS_HARDWARE_TYPE_8723B(pAdapter) ||
1725 (IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->version_id))) ||
1726 (IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->version_id))
1728 /* <20130121, Kordan> For SMIC EFUSE specificatoin. */
1729 /* 0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) */
1730 /* phy_set_mac_reg(pAdapter, 0x34, BIT11, 0); */
1731 rtw_write16(pAdapter, 0x34, rtw_read16(pAdapter, 0x34) & (~BIT11));
1734 /* -----------------e-fuse reg ctrl --------------------------------- */
1736 rtw_write8(pAdapter, EFUSE_CTRL + 1, (u8)(addr & 0xff));
1737 rtw_write8(pAdapter, EFUSE_CTRL + 2, ((u8)((addr >> 8) & 0x03)) |
1738 (rtw_read8(pAdapter, EFUSE_CTRL + 2) & 0xFC));
1740 /* rtw_write8(pAdapter, EFUSE_CTRL+3, 0x72); */ /* read cmd */
1741 /* Write bit 32 0 */
1742 readbyte = rtw_read8(pAdapter, EFUSE_CTRL + 3);
1743 rtw_write8(pAdapter, EFUSE_CTRL + 3, (readbyte & 0x7f));
1745 while (!(0x80 & rtw_read8(pAdapter, EFUSE_CTRL + 3)) && (tmpidx < 1000)) {
1750 *data = rtw_read8(pAdapter, EFUSE_CTRL);
1755 RTW_INFO("%s: [ERROR] addr=0x%x bResult=%d time out 1s !!!\n", __FUNCTION__, addr, bResult);
1756 RTW_INFO("%s: [ERROR] EFUSE_CTRL =0x%08x !!!\n", __FUNCTION__, rtw_read32(pAdapter, EFUSE_CTRL));
1762 /* 11/16/2008 MH Write one byte to reald Efuse. */
1765 IN PADAPTER pAdapter,
1768 IN BOOLEAN bPseudoTest)
1771 u8 bResult = _FALSE;
1773 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
1775 /* RTW_INFO("===> EFUSE_OneByteWrite(), addr = %x data=%x\n", addr, data); */
1776 /* RTW_INFO("===> EFUSE_OneByteWrite() start, 0x34 = 0x%X\n", rtw_read32(pAdapter, EFUSE_TEST)); */
1779 bResult = Efuse_Write1ByteToFakeContent(pAdapter, addr, data);
1783 Efuse_PowerSwitch(pAdapter, _TRUE, _TRUE);
1785 /* -----------------e-fuse reg ctrl --------------------------------- */
1789 efuseValue = rtw_read32(pAdapter, EFUSE_CTRL);
1790 efuseValue |= (BIT21 | BIT31);
1791 efuseValue &= ~(0x3FFFF);
1792 efuseValue |= ((addr << 8 | data) & 0x3FFFF);
1794 /* <20130227, Kordan> 8192E MP chip A-cut had better not set 0x34[11] until B-Cut. */
1795 if (IS_HARDWARE_TYPE_8723B(pAdapter) ||
1796 (IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->version_id))) ||
1797 (IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->version_id))
1799 /* <20130121, Kordan> For SMIC EFUSE specificatoin. */
1800 /* 0x34[11]: SW force PGMEN input of efuse to high. (for the bank selected by 0x34[9:8]) */
1801 /* phy_set_mac_reg(pAdapter, 0x34, BIT11, 1); */
1802 rtw_write16(pAdapter, 0x34, rtw_read16(pAdapter, 0x34) | (BIT11));
1803 rtw_write32(pAdapter, EFUSE_CTRL, 0x90600000 | ((addr << 8 | data)));
1805 rtw_write32(pAdapter, EFUSE_CTRL, efuseValue);
1809 while ((0x80 & rtw_read8(pAdapter, EFUSE_CTRL + 3)) && (tmpidx < 100)) {
1818 RTW_INFO("%s: [ERROR] addr=0x%x ,efuseValue=0x%x ,bResult=%d time out 1s !!!\n",
1819 __FUNCTION__, addr, efuseValue, bResult);
1820 RTW_INFO("%s: [ERROR] EFUSE_CTRL =0x%08x !!!\n", __FUNCTION__, rtw_read32(pAdapter, EFUSE_CTRL));
1823 /* disable Efuse program enable */
1824 if (IS_HARDWARE_TYPE_8723B(pAdapter) ||
1825 (IS_HARDWARE_TYPE_8192E(pAdapter) && (!IS_A_CUT(pHalData->version_id))) ||
1826 (IS_VENDOR_8188E_I_CUT_SERIES(pAdapter)) || (IS_CHIP_VENDOR_SMIC(pHalData->version_id))
1828 phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT(11), 0);
1830 Efuse_PowerSwitch(pAdapter, _TRUE, _FALSE);
1836 Efuse_PgPacketRead(IN PADAPTER pAdapter,
1839 IN BOOLEAN bPseudoTest)
1843 ret = pAdapter->hal_func.Efuse_PgPacketRead(pAdapter, offset, data, bPseudoTest);
1849 Efuse_PgPacketWrite(IN PADAPTER pAdapter,
1853 IN BOOLEAN bPseudoTest)
1857 ret = pAdapter->hal_func.Efuse_PgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest);
1864 Efuse_PgPacketWrite_BT(IN PADAPTER pAdapter,
1868 IN BOOLEAN bPseudoTest)
1872 ret = pAdapter->hal_func.Efuse_PgPacketWrite_BT(pAdapter, offset, word_en, data, bPseudoTest);
1879 Efuse_WordEnableDataWrite(IN PADAPTER pAdapter,
1883 IN BOOLEAN bPseudoTest)
1887 ret = pAdapter->hal_func.Efuse_WordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest);
1892 static u8 efuse_read8(PADAPTER padapter, u16 address, u8 *value)
1894 return efuse_OneByteRead(padapter, address, value, _FALSE);
1897 static u8 efuse_write8(PADAPTER padapter, u16 address, u8 *value)
1899 return efuse_OneByteWrite(padapter, address, *value, _FALSE);
1903 * read/wirte raw efuse data
1905 u8 rtw_efuse_access(PADAPTER padapter, u8 bWrite, u16 start_addr, u16 cnts, u8 *data)
1908 u16 real_content_len = 0, max_available_size = 0;
1910 u8(*rw8)(PADAPTER, u16, u8 *);
1911 u32 backupRegs[4] = {0};
1914 EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&real_content_len, _FALSE);
1915 EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE);
1917 if (start_addr > real_content_len)
1920 if (_TRUE == bWrite) {
1921 if ((start_addr + cnts) > max_available_size)
1923 rw8 = &efuse_write8;
1927 efuse_PreUpdateAction(padapter, backupRegs);
1929 Efuse_PowerSwitch(padapter, bWrite, _TRUE);
1931 /* e-fuse one byte read / write */
1932 for (i = 0; i < cnts; i++) {
1933 if (start_addr >= real_content_len) {
1938 res = rw8(padapter, start_addr++, data++);
1943 Efuse_PowerSwitch(padapter, bWrite, _FALSE);
1945 efuse_PostUpdateAction(padapter, backupRegs);
1949 /* ------------------------------------------------------------------------------ */
1950 u16 efuse_GetMaxSize(PADAPTER padapter)
1955 EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_size, _FALSE);
1958 /* ------------------------------------------------------------------------------ */
1959 u8 efuse_GetCurrentSize(PADAPTER padapter, u16 *size)
1961 Efuse_PowerSwitch(padapter, _FALSE, _TRUE);
1962 *size = Efuse_GetCurrentSize(padapter, EFUSE_WIFI, _FALSE);
1963 Efuse_PowerSwitch(padapter, _FALSE, _FALSE);
1967 /* ------------------------------------------------------------------------------ */
1968 u16 efuse_bt_GetMaxSize(PADAPTER padapter)
1973 EFUSE_GetEfuseDefinition(padapter, EFUSE_BT , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_size, _FALSE);
1977 u8 efuse_bt_GetCurrentSize(PADAPTER padapter, u16 *size)
1979 Efuse_PowerSwitch(padapter, _FALSE, _TRUE);
1980 *size = Efuse_GetCurrentSize(padapter, EFUSE_BT, _FALSE);
1981 Efuse_PowerSwitch(padapter, _FALSE, _FALSE);
1986 u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data)
1990 EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE);
1992 if ((addr + cnts) > mapLen)
1995 Efuse_PowerSwitch(padapter, _FALSE, _TRUE);
1997 efuse_ReadEFuse(padapter, EFUSE_WIFI, addr, cnts, data, _FALSE);
1999 Efuse_PowerSwitch(padapter, _FALSE, _FALSE);
2004 u8 rtw_BT_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data)
2008 EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE);
2010 if ((addr + cnts) > mapLen)
2013 Efuse_PowerSwitch(padapter, _FALSE, _TRUE);
2015 efuse_ReadEFuse(padapter, EFUSE_BT, addr, cnts, data, _FALSE);
2017 Efuse_PowerSwitch(padapter, _FALSE, _FALSE);
2022 /* ------------------------------------------------------------------------------ */
2023 u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data)
2025 #define RT_ASSERT_RET(expr) \
2027 printk("Assertion failed! %s at ......\n", #expr); \
2028 printk(" ......%s,%s, line=%d\n",__FILE__, __FUNCTION__, __LINE__); \
2034 u8 newdata[PGPKT_DATA_SIZE];
2035 s32 i, j, idx, chk_total_byte;
2037 u16 mapLen = 0, startAddr = 0, efuse_max_available_len = 0;
2038 u32 backupRegs[4] = {0};
2039 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
2040 PEFUSE_HAL pEfuseHal = &pHalData->EfuseHal;
2043 EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE);
2044 EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &efuse_max_available_len, _FALSE);
2046 if ((addr + cnts) > mapLen)
2049 RT_ASSERT_RET(PGPKT_DATA_SIZE == 8); /* have to be 8 byte alignment */
2050 RT_ASSERT_RET((mapLen & 0x7) == 0); /* have to be PGPKT_DATA_SIZE alignment for memcpy */
2052 map = rtw_zmalloc(mapLen);
2056 _rtw_memset(map, 0xFF, mapLen);
2058 ret = rtw_efuse_map_read(padapter, 0, mapLen, map);
2062 if (padapter->registrypriv.boffefusemask == 0) {
2063 for (i = 0; i < cnts; i++) {
2064 if (padapter->registrypriv.bFileMaskEfuse == _TRUE) {
2065 if (rtw_file_efuse_IsMasked(padapter, addr + i)) /*use file efuse mask. */
2066 data[i] = map[addr + i];
2068 if (efuse_IsMasked(padapter, addr + i))
2069 data[i] = map[addr + i];
2071 RTW_INFO("%s , data[%d] = %x, map[addr+i]= %x\n", __func__, i, data[i], map[addr + i]);
2074 /*Efuse_PowerSwitch(padapter, _TRUE, _TRUE);*/
2078 offset = (addr >> 3);
2080 while (idx < cnts) {
2082 j = (addr + idx) & 0x7;
2083 for (i = j; i < PGPKT_DATA_SIZE && idx < cnts; i++, idx++) {
2084 if (data[idx] != map[addr + idx])
2085 word_en &= ~BIT(i >> 1);
2088 if (word_en != 0xF) {
2089 chk_total_byte += Efuse_CalculateWordCnts(word_en) * 2;
2091 if (offset >= EFUSE_MAX_SECTION_BASE) /* Over EFUSE_MAX_SECTION 16 for 2 ByteHeader */
2092 chk_total_byte += 2;
2094 chk_total_byte += 1;
2100 RTW_INFO("Total PG bytes Count = %d\n", chk_total_byte);
2101 rtw_hal_get_hwreg(padapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr);
2103 if (startAddr == 0) {
2104 startAddr = Efuse_GetCurrentSize(padapter, EFUSE_WIFI, _FALSE);
2105 RTW_INFO("%s: Efuse_GetCurrentSize startAddr=%#X\n", __func__, startAddr);
2107 RTW_DBG("%s: startAddr=%#X\n", __func__, startAddr);
2109 if ((startAddr + chk_total_byte) >= efuse_max_available_len) {
2110 RTW_INFO("%s: startAddr(0x%X) + PG data len %d >= efuse_max_available_len(0x%X)\n",
2111 __func__, startAddr, chk_total_byte, efuse_max_available_len);
2116 efuse_PreUpdateAction(padapter, backupRegs);
2119 offset = (addr >> 3);
2120 while (idx < cnts) {
2122 j = (addr + idx) & 0x7;
2123 _rtw_memcpy(newdata, &map[offset << 3], PGPKT_DATA_SIZE);
2124 for (i = j; i < PGPKT_DATA_SIZE && idx < cnts; i++, idx++) {
2125 if (data[idx] != map[addr + idx]) {
2126 word_en &= ~BIT(i >> 1);
2127 newdata[i] = data[idx];
2128 #ifdef CONFIG_RTL8723B
2129 if (addr + idx == 0x8) {
2130 if (IS_C_CUT(pHalData->version_id) || IS_B_CUT(pHalData->version_id)) {
2131 if (pHalData->adjuseVoltageVal == 6) {
2132 newdata[i] = map[addr + idx];
2133 RTW_INFO(" %s ,\n adjuseVoltageVal = %d ,newdata[%d] = %x\n", __func__, pHalData->adjuseVoltageVal, i, newdata[i]);
2141 if (word_en != 0xF) {
2142 ret = Efuse_PgPacketWrite(padapter, offset, word_en, newdata, _FALSE);
2143 RTW_INFO("offset=%x\n", offset);
2144 RTW_INFO("word_en=%x\n", word_en);
2146 for (i = 0; i < PGPKT_DATA_SIZE; i++)
2147 RTW_INFO("data=%x \t", newdata[i]);
2155 /*Efuse_PowerSwitch(padapter, _TRUE, _FALSE);*/
2157 efuse_PostUpdateAction(padapter, backupRegs);
2161 rtw_mfree(map, mapLen);
2167 u8 rtw_BT_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data)
2169 #define RT_ASSERT_RET(expr) \
2171 printk("Assertion failed! %s at ......\n", #expr); \
2172 printk(" ......%s,%s, line=%d\n",__FILE__, __FUNCTION__, __LINE__); \
2178 u8 newdata[PGPKT_DATA_SIZE];
2179 s32 i = 0, j = 0, idx;
2183 EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE);
2185 if ((addr + cnts) > mapLen)
2188 RT_ASSERT_RET(PGPKT_DATA_SIZE == 8); /* have to be 8 byte alignment */
2189 RT_ASSERT_RET((mapLen & 0x7) == 0); /* have to be PGPKT_DATA_SIZE alignment for memcpy */
2191 map = rtw_zmalloc(mapLen);
2195 ret = rtw_BT_efuse_map_read(padapter, 0, mapLen, map);
2198 RTW_INFO("OFFSET\tVALUE(hex)\n");
2199 for (i = 0; i < 1024; i += 16) { /* set 512 because the iwpriv's extra size have limit 0x7FF */
2200 RTW_INFO("0x%03x\t", i);
2201 for (j = 0; j < 8; j++)
2202 RTW_INFO("%02X ", map[i + j]);
2205 RTW_INFO("%02X ", map[i + j]);
2209 Efuse_PowerSwitch(padapter, _TRUE, _TRUE);
2212 offset = (addr >> 3);
2213 while (idx < cnts) {
2215 j = (addr + idx) & 0x7;
2216 _rtw_memcpy(newdata, &map[offset << 3], PGPKT_DATA_SIZE);
2217 for (i = j; i < PGPKT_DATA_SIZE && idx < cnts; i++, idx++) {
2218 if (data[idx] != map[addr + idx]) {
2219 word_en &= ~BIT(i >> 1);
2220 newdata[i] = data[idx];
2224 if (word_en != 0xF) {
2225 RTW_INFO("offset=%x\n", offset);
2226 RTW_INFO("word_en=%x\n", word_en);
2227 RTW_INFO("%s: data=", __FUNCTION__);
2228 for (i = 0; i < PGPKT_DATA_SIZE; i++)
2229 RTW_INFO("0x%02X ", newdata[i]);
2231 ret = Efuse_PgPacketWrite_BT(padapter, offset, word_en, newdata, _FALSE);
2239 Efuse_PowerSwitch(padapter, _TRUE, _FALSE);
2243 rtw_mfree(map, mapLen);
2248 /*-----------------------------------------------------------------------------
2249 * Function: Efuse_ReadAllMap
2251 * Overview: Read All Efuse content
2261 * 11/11/2008 MHC Create Version 0.
2263 *---------------------------------------------------------------------------*/
2266 IN PADAPTER pAdapter,
2269 IN BOOLEAN bPseudoTest);
2272 IN PADAPTER pAdapter,
2275 IN BOOLEAN bPseudoTest)
2279 Efuse_PowerSwitch(pAdapter, _FALSE, _TRUE);
2281 EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, bPseudoTest);
2283 efuse_ReadEFuse(pAdapter, efuseType, 0, mapLen, Efuse, bPseudoTest);
2285 Efuse_PowerSwitch(pAdapter, _FALSE, _FALSE);
2288 /*-----------------------------------------------------------------------------
2289 * Function: efuse_ShadowRead1Byte
2290 * efuse_ShadowRead2Byte
2291 * efuse_ShadowRead4Byte
2293 * Overview: Read from efuse init map by one/two/four bytes !!!!!
2303 * 11/12/2008 MHC Create Version 0.
2305 *---------------------------------------------------------------------------*/
2307 efuse_ShadowRead1Byte(
2308 IN PADAPTER pAdapter,
2312 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
2314 *Value = pHalData->efuse_eeprom_data[Offset];
2316 } /* EFUSE_ShadowRead1Byte */
2318 /* ---------------Read Two Bytes */
2320 efuse_ShadowRead2Byte(
2321 IN PADAPTER pAdapter,
2325 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
2327 *Value = pHalData->efuse_eeprom_data[Offset];
2328 *Value |= pHalData->efuse_eeprom_data[Offset + 1] << 8;
2330 } /* EFUSE_ShadowRead2Byte */
2332 /* ---------------Read Four Bytes */
2334 efuse_ShadowRead4Byte(
2335 IN PADAPTER pAdapter,
2339 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
2341 *Value = pHalData->efuse_eeprom_data[Offset];
2342 *Value |= pHalData->efuse_eeprom_data[Offset + 1] << 8;
2343 *Value |= pHalData->efuse_eeprom_data[Offset + 2] << 16;
2344 *Value |= pHalData->efuse_eeprom_data[Offset + 3] << 24;
2346 } /* efuse_ShadowRead4Byte */
2349 /*-----------------------------------------------------------------------------
2350 * Function: efuse_ShadowWrite1Byte
2351 * efuse_ShadowWrite2Byte
2352 * efuse_ShadowWrite4Byte
2354 * Overview: Write efuse modify map by one/two/four byte.
2364 * 11/12/2008 MHC Create Version 0.
2366 *---------------------------------------------------------------------------*/
2369 efuse_ShadowWrite1Byte(
2370 IN PADAPTER pAdapter,
2373 #endif /* PLATFORM */
2375 efuse_ShadowWrite1Byte(
2376 IN PADAPTER pAdapter,
2380 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
2382 pHalData->efuse_eeprom_data[Offset] = Value;
2384 } /* efuse_ShadowWrite1Byte */
2386 /* ---------------Write Two Bytes */
2388 efuse_ShadowWrite2Byte(
2389 IN PADAPTER pAdapter,
2394 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
2397 pHalData->efuse_eeprom_data[Offset] = Value & 0x00FF;
2398 pHalData->efuse_eeprom_data[Offset + 1] = Value >> 8;
2400 } /* efuse_ShadowWrite1Byte */
2402 /* ---------------Write Four Bytes */
2404 efuse_ShadowWrite4Byte(
2405 IN PADAPTER pAdapter,
2409 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
2411 pHalData->efuse_eeprom_data[Offset] = (u8)(Value & 0x000000FF);
2412 pHalData->efuse_eeprom_data[Offset + 1] = (u8)((Value >> 8) & 0x0000FF);
2413 pHalData->efuse_eeprom_data[Offset + 2] = (u8)((Value >> 16) & 0x00FF);
2414 pHalData->efuse_eeprom_data[Offset + 3] = (u8)((Value >> 24) & 0xFF);
2416 } /* efuse_ShadowWrite1Byte */
2419 /*-----------------------------------------------------------------------------
2420 * Function: EFUSE_ShadowRead
2422 * Overview: Read from efuse init map !!!!!
2432 * 11/12/2008 MHC Create Version 0.
2434 *---------------------------------------------------------------------------*/
2437 IN PADAPTER pAdapter,
2443 efuse_ShadowRead1Byte(pAdapter, Offset, (u8 *)Value);
2445 efuse_ShadowRead2Byte(pAdapter, Offset, (u16 *)Value);
2447 efuse_ShadowRead4Byte(pAdapter, Offset, (u32 *)Value);
2449 } /* EFUSE_ShadowRead */
2451 /*-----------------------------------------------------------------------------
2452 * Function: EFUSE_ShadowWrite
2454 * Overview: Write efuse modify map for later update operation to use!!!!!
2464 * 11/12/2008 MHC Create Version 0.
2466 *---------------------------------------------------------------------------*/
2469 IN PADAPTER pAdapter,
2475 IN PADAPTER pAdapter,
2480 #if (MP_DRIVER == 0)
2483 if (pAdapter->registrypriv.mp_mode == 0)
2488 efuse_ShadowWrite1Byte(pAdapter, Offset, (u8)Value);
2490 efuse_ShadowWrite2Byte(pAdapter, Offset, (u16)Value);
2492 efuse_ShadowWrite4Byte(pAdapter, Offset, (u32)Value);
2494 } /* EFUSE_ShadowWrite */
2498 IN PADAPTER pAdapter
2502 IN PADAPTER pAdapter
2507 _rtw_memset((PVOID)&fakeEfuseContent[0], 0xff, EFUSE_MAX_HW_SIZE);
2508 _rtw_memset((PVOID)&fakeEfuseInitMap[0], 0xff, EFUSE_MAX_MAP_LEN);
2509 _rtw_memset((PVOID)&fakeEfuseModifiedMap[0], 0xff, EFUSE_MAX_MAP_LEN);
2511 for (i = 0; i < EFUSE_MAX_BT_BANK; i++)
2512 _rtw_memset((PVOID)&BTEfuseContent[i][0], EFUSE_MAX_HW_SIZE, 0xff);
2513 _rtw_memset((PVOID)&BTEfuseInitMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
2514 _rtw_memset((PVOID)&BTEfuseModifiedMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
2516 for (i = 0; i < EFUSE_MAX_BT_BANK; i++)
2517 _rtw_memset((PVOID)&fakeBTEfuseContent[i][0], 0xff, EFUSE_MAX_HW_SIZE);
2518 _rtw_memset((PVOID)&fakeBTEfuseInitMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
2519 _rtw_memset((PVOID)&fakeBTEfuseModifiedMap[0], 0xff, EFUSE_BT_MAX_MAP_LEN);
2521 #endif /* !RTW_HALMAC */
2522 /* 11/16/2008 MH Add description. Get current efuse area enabled word!!. */
2524 Efuse_CalculateWordCnts(IN u8 word_en)
2527 if (!(word_en & BIT(0)))
2528 word_cnts++; /* 0 : write enable */
2529 if (!(word_en & BIT(1)))
2531 if (!(word_en & BIT(2)))
2533 if (!(word_en & BIT(3)))
2538 /*-----------------------------------------------------------------------------
2539 * Function: efuse_WordEnableDataRead
2541 * Overview: Read allowed word in current efuse section data.
2551 * 11/16/2008 MHC Create Version 0.
2552 * 11/21/2008 MHC Fix Write bug when we only enable late word.
2554 *---------------------------------------------------------------------------*/
2556 efuse_WordEnableDataRead(IN u8 word_en,
2560 if (!(word_en & BIT(0))) {
2561 targetdata[0] = sourdata[0];
2562 targetdata[1] = sourdata[1];
2564 if (!(word_en & BIT(1))) {
2565 targetdata[2] = sourdata[2];
2566 targetdata[3] = sourdata[3];
2568 if (!(word_en & BIT(2))) {
2569 targetdata[4] = sourdata[4];
2570 targetdata[5] = sourdata[5];
2572 if (!(word_en & BIT(3))) {
2573 targetdata[6] = sourdata[6];
2574 targetdata[7] = sourdata[7];
2578 /*-----------------------------------------------------------------------------
2579 * Function: EFUSE_ShadowMapUpdate
2581 * Overview: Transfer current EFUSE content to shadow init and modify map.
2591 * 11/13/2008 MHC Create Version 0.
2593 *---------------------------------------------------------------------------*/
2594 void EFUSE_ShadowMapUpdate(
2595 IN PADAPTER pAdapter,
2597 IN BOOLEAN bPseudoTest)
2599 PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
2602 u8 *efuse_map = NULL;
2606 mapLen = EEPROM_MAX_SIZE;
2607 efuse_map = pHalData->efuse_eeprom_data;
2608 /* efuse default content is 0xFF */
2609 _rtw_memset(efuse_map, 0xFF, EEPROM_MAX_SIZE);
2611 EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, bPseudoTest);
2613 RTW_WARN("%s: <ERROR> fail to get efuse size!\n", __FUNCTION__);
2614 mapLen = EEPROM_MAX_SIZE;
2616 if (mapLen > EEPROM_MAX_SIZE) {
2617 RTW_WARN("%s: <ERROR> size of efuse data(%d) is large than expected(%d)!\n",
2618 __FUNCTION__, mapLen, EEPROM_MAX_SIZE);
2619 mapLen = EEPROM_MAX_SIZE;
2622 if (pHalData->bautoload_fail_flag == _FALSE) {
2623 err = rtw_halmac_read_logical_efuse_map(adapter_to_dvobj(pAdapter), efuse_map, mapLen);
2625 RTW_ERR("%s: <ERROR> fail to get efuse map!\n", __FUNCTION__);
2627 #else /* !RTW_HALMAC */
2628 EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, bPseudoTest);
2630 if (pHalData->bautoload_fail_flag == _TRUE)
2631 _rtw_memset(pHalData->efuse_eeprom_data, 0xFF, mapLen);
2633 #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
2634 if (_SUCCESS != retriveAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pHalData->efuse_eeprom_data)) {
2637 Efuse_ReadAllMap(pAdapter, efuseType, pHalData->efuse_eeprom_data, bPseudoTest);
2639 #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
2640 storeAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pHalData->efuse_eeprom_data);
2645 /* PlatformMoveMemory((PVOID)&pHalData->EfuseMap[EFUSE_MODIFY_MAP][0], */
2646 /* (PVOID)&pHalData->EfuseMap[EFUSE_INIT_MAP][0], mapLen); */
2647 #endif /* !RTW_HALMAC */
2649 rtw_dump_cur_efuse(pAdapter);
2650 } /* EFUSE_ShadowMapUpdate */
2652 const u8 _mac_hidden_max_bw_to_hal_bw_cap[MAC_HIDDEN_MAX_BW_NUM] = {
2655 (BW_CAP_160M | BW_CAP_80M | BW_CAP_40M | BW_CAP_20M | BW_CAP_10M | BW_CAP_5M),
2657 (BW_CAP_10M | BW_CAP_5M),
2658 (BW_CAP_20M | BW_CAP_10M | BW_CAP_5M),
2659 (BW_CAP_40M | BW_CAP_20M | BW_CAP_10M | BW_CAP_5M),
2660 (BW_CAP_80M | BW_CAP_40M | BW_CAP_20M | BW_CAP_10M | BW_CAP_5M),
2663 const u8 _mac_hidden_proto_to_hal_proto_cap[MAC_HIDDEN_PROTOCOL_NUM] = {
2666 (PROTO_CAP_11N | PROTO_CAP_11G | PROTO_CAP_11B),
2667 (PROTO_CAP_11AC | PROTO_CAP_11N | PROTO_CAP_11G | PROTO_CAP_11B),
2670 u8 mac_hidden_wl_func_to_hal_wl_func(u8 func)
2675 wl_func |= WL_FUNC_MIRACAST;
2677 wl_func |= WL_FUNC_P2P;
2679 wl_func |= WL_FUNC_TDLS;
2681 wl_func |= WL_FUNC_FTM;
2686 #ifdef PLATFORM_LINUX
2687 #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
2688 /* #include <rtw_eeprom.h> */
2690 int isAdaptorInfoFileValid(void)
2695 int storeAdaptorInfoFile(char *path, u8 *efuse_data)
2699 if (path && efuse_data) {
2700 ret = rtw_store_to_file(path, efuse_data, EEPROM_MAX_SIZE_512);
2701 if (ret == EEPROM_MAX_SIZE)
2706 RTW_INFO("%s NULL pointer\n", __FUNCTION__);
2712 int retriveAdaptorInfoFile(char *path, u8 *efuse_data)
2718 if (path && efuse_data) {
2720 ret = rtw_retrieve_from_file(path, efuse_data, EEPROM_MAX_SIZE);
2722 if (ret == EEPROM_MAX_SIZE)
2728 if (isAdaptorInfoFileValid())
2735 RTW_INFO("%s NULL pointer\n", __FUNCTION__);
2740 #endif /* CONFIG_ADAPTOR_INFO_CACHING_FILE */
2742 u8 rtw_efuse_file_read(PADAPTER padapter, u8 *filepatch, u8 *buf, u32 len)
2744 char *ptmpbuf = NULL, *ptr;
2750 ptmpbuf = rtw_zmalloc(bufsize);
2751 if (ptmpbuf == NULL)
2754 count = rtw_retrieve_from_file(filepatch, ptmpbuf, bufsize);
2756 rtw_mfree(ptmpbuf, bufsize);
2757 RTW_ERR("%s, filepatch %s, size=%d, FAIL!!\n", __FUNCTION__, filepatch, count);
2764 while ((j < len) && (i < count)) {
2765 if (ptmpbuf[i] == '\0')
2768 ptr = strpbrk(&ptmpbuf[i], " \t\n\r");
2770 if (ptr == &ptmpbuf[i]) {
2775 /* Add string terminating null */
2778 ptr = &ptmpbuf[count-1];
2781 err = sscanf(&ptmpbuf[i], "%hhx", &val8);
2783 RTW_WARN("Something wrong to parse efuse file, string=%s\n", &ptmpbuf[i]);
2786 RTW_DBG("i=%d, j=%d, 0x%02x\n", i, j, buf[j]);
2790 i = ptr - ptmpbuf + 1;
2793 rtw_mfree(ptmpbuf, bufsize);
2794 RTW_INFO("%s, filepatch %s, size=%d, done\n", __FUNCTION__, filepatch, count);
2798 #ifdef CONFIG_EFUSE_CONFIG_FILE
2799 u32 rtw_read_efuse_from_file(const char *path, u8 *buf, int map_size)
2808 u8 *file_data = NULL;
2809 u32 file_size, read_size, pos = 0;
2812 if (rtw_is_file_readable_with_size(path, &file_size) != _TRUE) {
2813 RTW_PRINT("%s %s is not readable\n", __func__, path);
2817 file_data = rtw_vmalloc(file_size);
2819 RTW_ERR("%s rtw_vmalloc(%d) fail\n", __func__, file_size);
2823 read_size = rtw_retrieve_from_file(path, file_data, file_size);
2824 if (read_size == 0) {
2825 RTW_ERR("%s read from %s fail\n", __func__, path);
2829 map = rtw_vmalloc(map_size);
2831 RTW_ERR("%s rtw_vmalloc(%d) fail\n", __func__, map_size);
2834 _rtw_memset(map, 0xff, map_size);
2836 temp[2] = 0; /* end of string '\0' */
2838 for (i = 0 ; i < map_size ; i++) {
2842 if (pos >= read_size) {
2846 c = file_data[pos++];
2848 /* bypass spece or eol or null before first hex digit */
2849 if (temp_i == 0 && (is_eol(c) == _TRUE || is_space(c) == _TRUE || is_null(c) == _TRUE))
2852 if (IsHexDigit(c) == _FALSE) {
2853 RTW_ERR("%s invalid 8-bit hex format for offset:0x%03x\n", __func__, i);
2861 if (sscanf(temp, "%hhx", &map[i]) != 1) {
2862 RTW_ERR("%s sscanf fail for offset:0x%03x\n", __func__, i);
2871 RTW_ERR("%s incomplete 8-bit hex format for offset:0x%03x\n", __func__, i);
2878 RTW_PRINT("efuse file:%s, 0x%03x byte content read\n", path, i);
2880 _rtw_memcpy(buf, map, map_size);
2886 rtw_vmfree(file_data, file_size);
2888 rtw_vmfree(map, map_size);
2893 u32 rtw_read_macaddr_from_file(const char *path, u8 *buf)
2900 u32 read_size, pos = 0;
2903 if (rtw_is_file_readable(path) != _TRUE) {
2904 RTW_PRINT("%s %s is not readable\n", __func__, path);
2908 read_size = rtw_retrieve_from_file(path, file_data, 17);
2909 if (read_size != 17) {
2910 RTW_ERR("%s read from %s fail\n", __func__, path);
2914 temp[2] = 0; /* end of string '\0' */
2916 for (i = 0 ; i < ETH_ALEN ; i++) {
2917 if (IsHexDigit(file_data[i * 3]) == _FALSE || IsHexDigit(file_data[i * 3 + 1]) == _FALSE) {
2918 RTW_ERR("%s invalid 8-bit hex format for address offset:%u\n", __func__, i);
2922 if (i < ETH_ALEN - 1 && file_data[i * 3 + 2] != ':') {
2923 RTW_ERR("%s invalid separator after address offset:%u\n", __func__, i);
2927 temp[0] = file_data[i * 3];
2928 temp[1] = file_data[i * 3 + 1];
2929 if (sscanf(temp, "%hhx", &addr[i]) != 1) {
2930 RTW_ERR("%s sscanf fail for address offset:0x%03x\n", __func__, i);
2935 _rtw_memcpy(buf, addr, ETH_ALEN);
2937 RTW_PRINT("wifi_mac file: %s\n", path);
2938 #ifdef CONFIG_RTW_DEBUG
2939 RTW_INFO(MAC_FMT"\n", MAC_ARG(buf));
2947 #endif /* CONFIG_EFUSE_CONFIG_FILE */
2949 #endif /* PLATFORM_LINUX */