drivers/net/wireless/rockchip_wlan/rtl8723cs/core/rtw_mp.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #define _RTW_MP_C_
  21 #include <drv_types.h>
  22 #ifdef PLATFORM_FREEBSD
  23         #include <sys/unistd.h>         /* for RFHIGHPID */
  24 #endif
  25
  26 #include "../hal/phydm/phydm_precomp.h"
  27 #if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A)
  28         #include <rtw_bt_mp.h>
  29 #endif
  30
  31 #ifdef CONFIG_MP_VHT_HW_TX_MODE
  32 #define CEILING_POS(X) ((X - (int)(X)) > 0 ? (int)(X + 1) : (int)(X))
  33 #define CEILING_NEG(X) ((X - (int)(X)) < 0 ? (int)(X - 1) : (int)(X))
  34 #define ceil(X) (((X) > 0) ? CEILING_POS(X) : CEILING_NEG(X))
  35
  36 int rtfloor(float x)
  37 {
  38         int i = x - 2;
  39         while
  40         (++i <= x - 1)
  41                 ;
  42         return i;
  43 }
  44 #endif
  45
  46 #ifdef CONFIG_MP_INCLUDED
  47 u32 read_macreg(_adapter *padapter, u32 addr, u32 sz)
  48 {
  49         u32 val = 0;
  50
  51         switch (sz) {
  52         case 1:
  53                 val = rtw_read8(padapter, addr);
  54                 break;
  55         case 2:
  56                 val = rtw_read16(padapter, addr);
  57                 break;
  58         case 4:
  59                 val = rtw_read32(padapter, addr);
  60                 break;
  61         default:
  62                 val = 0xffffffff;
  63                 break;
  64         }
  65
  66         return val;
  67
  68 }
  69
  70 void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz)
  71 {
  72         switch (sz) {
  73         case 1:
  74                 rtw_write8(padapter, addr, (u8)val);
  75                 break;
  76         case 2:
  77                 rtw_write16(padapter, addr, (u16)val);
  78                 break;
  79         case 4:
  80                 rtw_write32(padapter, addr, val);
  81                 break;
  82         default:
  83                 break;
  84         }
  85
  86 }
  87
  88 u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask)
  89 {
  90         return rtw_hal_read_bbreg(padapter, addr, bitmask);
  91 }
  92
  93 void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val)
  94 {
  95         rtw_hal_write_bbreg(padapter, addr, bitmask, val);
  96 }
  97
  98 u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask)
  99 {
 100         return rtw_hal_read_rfreg(padapter, rfpath, addr, bitmask);
 101 }
 102
 103 void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val)
 104 {
 105         rtw_hal_write_rfreg(padapter, rfpath, addr, bitmask, val);
 106 }
 107
 108 u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr)
 109 {
 110         return _read_rfreg(padapter, rfpath, addr, bRFRegOffsetMask);
 111 }
 112
 113 void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val)
 114 {
 115         _write_rfreg(padapter, rfpath, addr, bRFRegOffsetMask, val);
 116 }
 117
 118 static void _init_mp_priv_(struct mp_priv *pmp_priv)
 119 {
 120         WLAN_BSSID_EX *pnetwork;
 121
 122         _rtw_memset(pmp_priv, 0, sizeof(struct mp_priv));
 123
 124         pmp_priv->mode = MP_OFF;
 125
 126         pmp_priv->channel = 1;
 127         pmp_priv->bandwidth = CHANNEL_WIDTH_20;
 128         pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
 129         pmp_priv->rateidx = RATE_1M;
 130         pmp_priv->txpoweridx = 0x2A;
 131
 132         pmp_priv->antenna_tx = ANTENNA_A;
 133         pmp_priv->antenna_rx = ANTENNA_AB;
 134
 135         pmp_priv->check_mp_pkt = 0;
 136
 137         pmp_priv->tx_pktcount = 0;
 138
 139         pmp_priv->rx_bssidpktcount = 0;
 140         pmp_priv->rx_pktcount = 0;
 141         pmp_priv->rx_crcerrpktcount = 0;
 142
 143         pmp_priv->network_macaddr[0] = 0x00;
 144         pmp_priv->network_macaddr[1] = 0xE0;
 145         pmp_priv->network_macaddr[2] = 0x4C;
 146         pmp_priv->network_macaddr[3] = 0x87;
 147         pmp_priv->network_macaddr[4] = 0x66;
 148         pmp_priv->network_macaddr[5] = 0x55;
 149
 150         pmp_priv->bSetRxBssid = _FALSE;
 151         pmp_priv->bRTWSmbCfg = _FALSE;
 152         pmp_priv->bloopback = _FALSE;
 153
 154         pmp_priv->bloadefusemap = _FALSE;
 155
 156         pnetwork = &pmp_priv->mp_network.network;
 157         _rtw_memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN);
 158
 159         pnetwork->Ssid.SsidLength = 8;
 160         _rtw_memcpy(pnetwork->Ssid.Ssid, "mp_871x", pnetwork->Ssid.SsidLength);
 161
 162         pmp_priv->tx.payload = 2;
 163 #ifdef CONFIG_80211N_HT
 164         pmp_priv->tx.attrib.ht_en = 1;
 165 #endif
 166
 167 }
 168
 169 #ifdef PLATFORM_WINDOWS
 170 #if 0
 171 void mp_wi_callback(
 172         IN NDIS_WORK_ITEM       *pwk_item,
 173         IN PVOID                        cntx
 174 )
 175 {
 176         _adapter *padapter = (_adapter *)cntx;
 177         struct mp_priv *pmppriv = &padapter->mppriv;
 178         struct mp_wi_cntx       *pmp_wi_cntx = &pmppriv->wi_cntx;
 179
 180         /*  Execute specified action. */
 181         if (pmp_wi_cntx->curractfunc != NULL) {
 182                 LARGE_INTEGER   cur_time;
 183                 ULONGLONG start_time, end_time;
 184                 NdisGetCurrentSystemTime(&cur_time);    /*  driver version */
 185                 start_time = cur_time.QuadPart / 10; /*  The return value is in microsecond */
 186
 187                 pmp_wi_cntx->curractfunc(padapter);
 188
 189                 NdisGetCurrentSystemTime(&cur_time);    /*  driver version */
 190                 end_time = cur_time.QuadPart / 10; /*  The return value is in microsecond */
 191
 192         }
 193
 194         NdisAcquireSpinLock(&(pmp_wi_cntx->mp_wi_lock));
 195         pmp_wi_cntx->bmp_wi_progress = _FALSE;
 196         NdisReleaseSpinLock(&(pmp_wi_cntx->mp_wi_lock));
 197
 198         if (pmp_wi_cntx->bmpdrv_unload)
 199                 NdisSetEvent(&(pmp_wi_cntx->mp_wi_evt));
 200
 201 }
 202 #endif
 203
 204 static int init_mp_priv_by_os(struct mp_priv *pmp_priv)
 205 {
 206         struct mp_wi_cntx *pmp_wi_cntx;
 207
 208         if (pmp_priv == NULL)
 209                 return _FAIL;
 210
 211         pmp_priv->rx_testcnt = 0;
 212         pmp_priv->rx_testcnt1 = 0;
 213         pmp_priv->rx_testcnt2 = 0;
 214
 215         pmp_priv->tx_testcnt = 0;
 216         pmp_priv->tx_testcnt1 = 0;
 217
 218         pmp_wi_cntx = &pmp_priv->wi_cntx
 219                       pmp_wi_cntx->bmpdrv_unload = _FALSE;
 220         pmp_wi_cntx->bmp_wi_progress = _FALSE;
 221         pmp_wi_cntx->curractfunc = NULL;
 222
 223         return _SUCCESS;
 224 }
 225 #endif
 226
 227 #ifdef PLATFORM_LINUX
 228 static int init_mp_priv_by_os(struct mp_priv *pmp_priv)
 229 {
 230         int i, res;
 231         struct mp_xmit_frame *pmp_xmitframe;
 232
 233         if (pmp_priv == NULL)
 234                 return _FAIL;
 235
 236         _rtw_init_queue(&pmp_priv->free_mp_xmitqueue);
 237
 238         pmp_priv->pallocated_mp_xmitframe_buf = NULL;
 239         pmp_priv->pallocated_mp_xmitframe_buf = rtw_zmalloc(NR_MP_XMITFRAME * sizeof(struct mp_xmit_frame) + 4);
 240         if (pmp_priv->pallocated_mp_xmitframe_buf == NULL) {
 241                 res = _FAIL;
 242                 goto _exit_init_mp_priv;
 243         }
 244
 245         pmp_priv->pmp_xmtframe_buf = pmp_priv->pallocated_mp_xmitframe_buf + 4 - ((SIZE_PTR)(pmp_priv->pallocated_mp_xmitframe_buf) & 3);
 246
 247         pmp_xmitframe = (struct mp_xmit_frame *)pmp_priv->pmp_xmtframe_buf;
 248
 249         for (i = 0; i < NR_MP_XMITFRAME; i++) {
 250                 _rtw_init_listhead(&pmp_xmitframe->list);
 251                 rtw_list_insert_tail(&pmp_xmitframe->list, &pmp_priv->free_mp_xmitqueue.queue);
 252
 253                 pmp_xmitframe->pkt = NULL;
 254                 pmp_xmitframe->frame_tag = MP_FRAMETAG;
 255                 pmp_xmitframe->padapter = pmp_priv->papdater;
 256
 257                 pmp_xmitframe++;
 258         }
 259
 260         pmp_priv->free_mp_xmitframe_cnt = NR_MP_XMITFRAME;
 261
 262         res = _SUCCESS;
 263
 264 _exit_init_mp_priv:
 265
 266         return res;
 267 }
 268 #endif
 269
 270 static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter)
 271 {
 272         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
 273
 274         struct pkt_attrib *pattrib;
 275
 276         /* init xmitframe attribute */
 277         pattrib = &pmptx->attrib;
 278         _rtw_memset(pattrib, 0, sizeof(struct pkt_attrib));
 279         _rtw_memset(pmptx->desc, 0, TXDESC_SIZE);
 280
 281         pattrib->ether_type = 0x8712;
 282 #if 0
 283         _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN);
 284         _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
 285 #endif
 286         _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN);
 287
 288         /*      pattrib->dhcp_pkt = 0;
 289          *      pattrib->pktlen = 0; */
 290         pattrib->ack_policy = 0;
 291         /*      pattrib->pkt_hdrlen = ETH_HLEN; */
 292         pattrib->hdrlen = WLAN_HDR_A3_LEN;
 293         pattrib->subtype = WIFI_DATA;
 294         pattrib->priority = 0;
 295         pattrib->qsel = pattrib->priority;
 296         /*      do_queue_select(padapter, pattrib); */
 297         pattrib->nr_frags = 1;
 298         pattrib->encrypt = 0;
 299         pattrib->bswenc = _FALSE;
 300         pattrib->qos_en = _FALSE;
 301
 302         pattrib->pktlen = 1500;
 303
 304 #ifdef CONFIG_80211AC_VHT
 305         if (pHalData->rf_type == RF_1T1R)
 306                 pattrib->raid = RATEID_IDX_VHT_1SS;
 307         else if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_2T4R)
 308                 pattrib->raid = RATEID_IDX_VHT_2SS;
 309         else if (pHalData->rf_type == RF_3T3R)
 310                 pattrib->raid = RATEID_IDX_VHT_3SS;
 311         else
 312                 pattrib->raid = RATEID_IDX_BGN_40M_1SS;
 313 #endif
 314 }
 315
 316 s32 init_mp_priv(PADAPTER padapter)
 317 {
 318         struct mp_priv *pmppriv = &padapter->mppriv;
 319         PHAL_DATA_TYPE pHalData;
 320
 321         pHalData = GET_HAL_DATA(padapter);
 322
 323         _init_mp_priv_(pmppriv);
 324         pmppriv->papdater = padapter;
 325         pmppriv->mp_dm = 0;
 326         pmppriv->tx.stop = 1;
 327         pmppriv->bSetTxPower = 0;               /*for  manually set tx power*/
 328         pmppriv->bTxBufCkFail = _FALSE;
 329         pmppriv->pktInterval = 0;
 330         pmppriv->pktLength = 1000;
 331
 332         mp_init_xmit_attrib(&pmppriv->tx, padapter);
 333
 334         switch (padapter->registrypriv.rf_config) {
 335         case RF_1T1R:
 336                 pmppriv->antenna_tx = ANTENNA_A;
 337                 pmppriv->antenna_rx = ANTENNA_A;
 338                 break;
 339         case RF_1T2R:
 340         default:
 341                 pmppriv->antenna_tx = ANTENNA_A;
 342                 pmppriv->antenna_rx = ANTENNA_AB;
 343                 break;
 344         case RF_2T2R:
 345         case RF_2T2R_GREEN:
 346                 pmppriv->antenna_tx = ANTENNA_AB;
 347                 pmppriv->antenna_rx = ANTENNA_AB;
 348                 break;
 349         case RF_2T4R:
 350                 pmppriv->antenna_tx = ANTENNA_BC;
 351                 pmppriv->antenna_rx = ANTENNA_ABCD;
 352                 break;
 353         }
 354
 355         pHalData->AntennaRxPath = pmppriv->antenna_rx;
 356         pHalData->antenna_tx_path = pmppriv->antenna_tx;
 357
 358         return _SUCCESS;
 359 }
 360
 361 void free_mp_priv(struct mp_priv *pmp_priv)
 362 {
 363         if (pmp_priv->pallocated_mp_xmitframe_buf) {
 364                 rtw_mfree(pmp_priv->pallocated_mp_xmitframe_buf, 0);
 365                 pmp_priv->pallocated_mp_xmitframe_buf = NULL;
 366         }
 367         pmp_priv->pmp_xmtframe_buf = NULL;
 368 }
 369
 370
 371 static VOID PHY_IQCalibrate_default(
 372         IN      PADAPTER        pAdapter,
 373         IN      BOOLEAN bReCovery
 374 )
 375 {
 376         RTW_INFO("%s\n", __func__);
 377 }
 378
 379 static VOID PHY_LCCalibrate_default(
 380         IN      PADAPTER        pAdapter
 381 )
 382 {
 383         RTW_INFO("%s\n", __func__);
 384 }
 385
 386 static VOID PHY_SetRFPathSwitch_default(
 387         IN      PADAPTER        pAdapter,
 388         IN      BOOLEAN         bMain
 389 )
 390 {
 391         RTW_INFO("%s\n", __func__);
 392 }
 393
 394
 395 void mpt_InitHWConfig(PADAPTER Adapter)
 396 {
 397         if (IS_HARDWARE_TYPE_8723B(Adapter)) {
 398                 /* TODO: <20130114, Kordan> The following setting is only for DPDT and Fixed board type. */
 399                 /* TODO:  A better solution is configure it according EFUSE during the run-time. */
 400
 401                 phy_set_mac_reg(Adapter, 0x64, BIT20, 0x0);             /* 0x66[4]=0             */
 402                 phy_set_mac_reg(Adapter, 0x64, BIT24, 0x0);             /* 0x66[8]=0 */
 403                 phy_set_mac_reg(Adapter, 0x40, BIT4, 0x0);              /* 0x40[4]=0             */
 404                 phy_set_mac_reg(Adapter, 0x40, BIT3, 0x1);              /* 0x40[3]=1             */
 405                 phy_set_mac_reg(Adapter, 0x4C, BIT24, 0x1);             /* 0x4C[24:23]=10 */
 406                 phy_set_mac_reg(Adapter, 0x4C, BIT23, 0x0);             /* 0x4C[24:23]=10 */
 407                 phy_set_bb_reg(Adapter, 0x944, BIT1 | BIT0, 0x3);       /* 0x944[1:0]=11         */
 408                 phy_set_bb_reg(Adapter, 0x930, bMaskByte0, 0x77);/* 0x930[7:0]=77         */
 409                 phy_set_mac_reg(Adapter, 0x38, BIT11, 0x1);/* 0x38[11]=1 */
 410
 411                 /* TODO: <20130206, Kordan> The default setting is wrong, hard-coded here. */
 412                 phy_set_mac_reg(Adapter, 0x778, 0x3, 0x3);                                      /* Turn off hardware PTA control (Asked by Scott) */
 413                 phy_set_mac_reg(Adapter, 0x64, bMaskDWord, 0x36000000);/* Fix BT S0/S1 */
 414                 phy_set_mac_reg(Adapter, 0x948, bMaskDWord, 0x0);               /* Fix BT can't Tx */
 415
 416                 /* <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou) */
 417                 phy_set_bb_reg(Adapter, 0xA00, BIT8, 0x0);                      /*0xA01[0] = 0*/
 418         } else if (IS_HARDWARE_TYPE_8821(Adapter)) {
 419                 /* <20131121, VincentL> Add for 8821AU DPDT setting and fix switching antenna issue (Asked by Rock)
 420                 <20131122, VincentL> Enable for all 8821A/8811AU  (Asked by Alex)*/
 421                 phy_set_mac_reg(Adapter, 0x4C, BIT23, 0x0);             /*0x4C[23:22]=01*/
 422                 phy_set_mac_reg(Adapter, 0x4C, BIT22, 0x1);             /*0x4C[23:22]=01*/
 423         } else if (IS_HARDWARE_TYPE_8188ES(Adapter))
 424                 phy_set_mac_reg(Adapter, 0x4C , BIT23, 0);              /*select DPDT_P and DPDT_N as output pin*/
 425 #ifdef CONFIG_RTL8814A
 426         else if (IS_HARDWARE_TYPE_8814A(Adapter))
 427                 PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8814A, 0x2000);
 428 #endif
 429 #ifdef CONFIG_RTL8822B
 430         else if (IS_HARDWARE_TYPE_8822B(Adapter)) {
 431                 u32 tmp_reg = 0;
 432
 433                 PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8822B, 0x2000);
 434                 /* fixed wifi can't 2.4g tx suggest by Szuyitasi 20160504 */
 435                 phy_set_bb_reg(Adapter, 0x70, bMaskByte3, 0x0e);
 436                 RTW_INFO(" 0x73 = 0x%x\n", phy_query_bb_reg(Adapter, 0x70, bMaskByte3));
 437                 phy_set_bb_reg(Adapter, 0x1704, bMaskDWord, 0x0000ff00);
 438                 RTW_INFO(" 0x1704 = 0x%x\n", phy_query_bb_reg(Adapter, 0x1704, bMaskDWord));
 439                 phy_set_bb_reg(Adapter, 0x1700, bMaskDWord, 0xc00f0038);
 440                 RTW_INFO(" 0x1700 = 0x%x\n", phy_query_bb_reg(Adapter, 0x1700, bMaskDWord));
 441         }
 442 #endif /* CONFIG_RTL8822B */
 443 #ifdef CONFIG_RTL8821C
 444         else if (IS_HARDWARE_TYPE_8821C(Adapter))
 445                 PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8821C, 0x2000);
 446 #endif /* CONFIG_RTL8821C */
 447 }
 448
 449 static void PHY_IQCalibrate(PADAPTER padapter, u8 bReCovery)
 450 {
 451         PHAL_DATA_TYPE pHalData;
 452         u8 b2ant;       /* false:1ant, true:2-ant */
 453         u8 RF_Path;     /* 0:S1, 1:S0 */
 454
 455         if (IS_HARDWARE_TYPE_8723B(padapter)) {
 456 #ifdef CONFIG_RTL8723B
 457                 pHalData = GET_HAL_DATA(padapter);
 458                 b2ant = pHalData->EEPROMBluetoothAntNum == Ant_x2 ? _TRUE : _FALSE;
 459                 phy_iq_calibrate_8723b(padapter, bReCovery, _FALSE, b2ant, pHalData->ant_path);
 460 #endif
 461         } else if (IS_HARDWARE_TYPE_8188E(padapter)) {
 462 #ifdef CONFIG_RTL8188E
 463                 phy_iq_calibrate_8188e(padapter, bReCovery);
 464 #endif
 465         } else if (IS_HARDWARE_TYPE_8814A(padapter)) {
 466 #ifdef CONFIG_RTL8814A
 467                 phy_iq_calibrate_8814a(&(GET_HAL_DATA(padapter)->odmpriv), bReCovery);
 468 #endif
 469         } else if (IS_HARDWARE_TYPE_8812(padapter)) {
 470 #ifdef CONFIG_RTL8812A
 471                 phy_iq_calibrate_8812a(padapter, bReCovery);
 472 #endif
 473         } else if (IS_HARDWARE_TYPE_8821(padapter)) {
 474 #ifdef CONFIG_RTL8821A
 475                 phy_iq_calibrate_8821a(&(GET_HAL_DATA(padapter)->odmpriv), bReCovery);
 476 #endif
 477         } else if (IS_HARDWARE_TYPE_8192E(padapter)) {
 478 #ifdef CONFIG_RTL8192E
 479                 phy_iq_calibrate_8192e(padapter, bReCovery);
 480 #endif
 481         } else if (IS_HARDWARE_TYPE_8703B(padapter)) {
 482 #ifdef CONFIG_RTL8703B
 483                 phy_iq_calibrate_8703b(padapter, bReCovery);
 484 #endif
 485         } else if (IS_HARDWARE_TYPE_8188F(padapter)) {
 486 #ifdef CONFIG_RTL8188F
 487                 phy_iq_calibrate_8188f(padapter, bReCovery, _FALSE);
 488 #endif
 489         } else if (IS_HARDWARE_TYPE_8822B(padapter)) {
 490 #ifdef CONFIG_RTL8822B
 491                 phy_iq_calibrate_8822b(&(GET_HAL_DATA(padapter)->odmpriv), bReCovery);
 492 #endif
 493         } else if (IS_HARDWARE_TYPE_8723D(padapter)) {
 494 #ifdef CONFIG_RTL8723D
 495                 phy_iq_calibrate_8723d(padapter, bReCovery);
 496 #endif
 497         } else if (IS_HARDWARE_TYPE_8821C(padapter)) {
 498 #ifdef CONFIG_RTL8821C
 499                 phy_iq_calibrate_8821c(&(GET_HAL_DATA(padapter)->odmpriv), bReCovery);
 500 #endif
 501         }
 502
 503 }
 504
 505 static void PHY_LCCalibrate(PADAPTER padapter)
 506 {
 507         if (IS_HARDWARE_TYPE_8723B(padapter)) {
 508 #ifdef CONFIG_RTL8723B
 509                 phy_lc_calibrate_8723b(&(GET_HAL_DATA(padapter)->odmpriv));
 510 #endif
 511         } else if (IS_HARDWARE_TYPE_8188E(padapter)) {
 512 #ifdef CONFIG_RTL8188E
 513                 phy_lc_calibrate_8188e(&(GET_HAL_DATA(padapter)->odmpriv));
 514 #endif
 515         } else if (IS_HARDWARE_TYPE_8814A(padapter)) {
 516 #ifdef CONFIG_RTL8814A
 517                 phy_lc_calibrate_8814a(&(GET_HAL_DATA(padapter)->odmpriv));
 518 #endif
 519         } else if (IS_HARDWARE_TYPE_8812(padapter)) {
 520 #ifdef CONFIG_RTL8812A
 521                 phy_lc_calibrate_8812a(&(GET_HAL_DATA(padapter)->odmpriv));
 522 #endif
 523         } else if (IS_HARDWARE_TYPE_8821(padapter)) {
 524 #ifdef CONFIG_RTL8821A
 525                 phy_lc_calibrate_8821a(&(GET_HAL_DATA(padapter)->odmpriv));
 526 #endif
 527         } else if (IS_HARDWARE_TYPE_8192E(padapter)) {
 528 #ifdef CONFIG_RTL8192E
 529                 phy_lc_calibrate_8192e(&(GET_HAL_DATA(padapter)->odmpriv));
 530 #endif
 531         } else if (IS_HARDWARE_TYPE_8703B(padapter)) {
 532 #ifdef CONFIG_RTL8703B
 533                 phy_lc_calibrate_8703b(&(GET_HAL_DATA(padapter)->odmpriv));
 534 #endif
 535         } else if (IS_HARDWARE_TYPE_8188F(padapter)) {
 536 #ifdef CONFIG_RTL8188F
 537                 phy_lc_calibrate_8188f(&(GET_HAL_DATA(padapter)->odmpriv));
 538 #endif
 539         } else if (IS_HARDWARE_TYPE_8822B(padapter)) {
 540 #ifdef CONFIG_RTL8822B
 541                 phy_lc_calibrate_8822b(&(GET_HAL_DATA(padapter)->odmpriv));
 542 #endif
 543         } else if (IS_HARDWARE_TYPE_8723D(padapter)) {
 544 #ifdef CONFIG_RTL8723D
 545                 phy_lc_calibrate_8723d(&(GET_HAL_DATA(padapter)->odmpriv));
 546 #endif
 547         } else if (IS_HARDWARE_TYPE_8821C(padapter)) {
 548 #ifdef CONFIG_RTL8821C
 549                 /*phy_iq_calibrate_8821c(&(GET_HAL_DATA(padapter)->odmpriv));*/
 550 #endif
 551         }
 552
 553 }
 554
 555 static u8 PHY_QueryRFPathSwitch(PADAPTER padapter)
 556 {
 557         u8 bmain = 0;
 558 /*
 559         if (IS_HARDWARE_TYPE_8723B(padapter)) {
 560 #ifdef CONFIG_RTL8723B
 561                 bmain = PHY_QueryRFPathSwitch_8723B(padapter);
 562 #endif
 563         } else if (IS_HARDWARE_TYPE_8188E(padapter)) {
 564 #ifdef CONFIG_RTL8188E
 565                 bmain = PHY_QueryRFPathSwitch_8188E(padapter);
 566 #endif
 567         } else if (IS_HARDWARE_TYPE_8814A(padapter)) {
 568 #ifdef CONFIG_RTL8814A
 569                 bmain = PHY_QueryRFPathSwitch_8814A(padapter);
 570 #endif
 571         } else if (IS_HARDWARE_TYPE_8812(padapter) || IS_HARDWARE_TYPE_8821(padapter)) {
 572 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
 573                 bmain = PHY_QueryRFPathSwitch_8812A(padapter);
 574 #endif
 575         } else if (IS_HARDWARE_TYPE_8192E(padapter)) {
 576 #ifdef CONFIG_RTL8192E
 577                 bmain = PHY_QueryRFPathSwitch_8192E(padapter);
 578 #endif
 579         } else if (IS_HARDWARE_TYPE_8703B(padapter)) {
 580 #ifdef CONFIG_RTL8703B
 581                 bmain = PHY_QueryRFPathSwitch_8703B(padapter);
 582 #endif
 583         } else if (IS_HARDWARE_TYPE_8188F(padapter)) {
 584 #ifdef CONFIG_RTL8188F
 585                 bmain = PHY_QueryRFPathSwitch_8188F(padapter);
 586 #endif
 587         } else if (IS_HARDWARE_TYPE_8822B(padapter)) {
 588 #ifdef CONFIG_RTL8822B
 589                 bmain = PHY_QueryRFPathSwitch_8822B(padapter);
 590 #endif
 591         } else if (IS_HARDWARE_TYPE_8723D(padapter)) {
 592 #ifdef CONFIG_RTL8723D
 593                 bmain = PHY_QueryRFPathSwitch_8723D(padapter);
 594 #endif
 595         } else
 596 */
 597
 598         if (IS_HARDWARE_TYPE_8821C(padapter)) {
 599 #ifdef CONFIG_RTL8821C
 600                 bmain = phy_query_rf_path_switch_8821c(padapter);
 601 #endif
 602         }
 603
 604         return bmain;
 605 }
 606
 607 static void  PHY_SetRFPathSwitch(PADAPTER padapter , BOOLEAN bMain) {
 608
 609         if (IS_HARDWARE_TYPE_8723B(padapter)) {
 610 #ifdef CONFIG_RTL8723B
 611                 phy_set_rf_path_switch_8723b(padapter, bMain);
 612 #endif
 613         } else if (IS_HARDWARE_TYPE_8188E(padapter)) {
 614 #ifdef CONFIG_RTL8188E
 615                 phy_set_rf_path_switch_8188e(padapter, bMain);
 616 #endif
 617         } else if (IS_HARDWARE_TYPE_8814A(padapter)) {
 618 #ifdef CONFIG_RTL8814A
 619                 phy_set_rf_path_switch_8814a(padapter, bMain);
 620 #endif
 621         } else if (IS_HARDWARE_TYPE_8812(padapter) || IS_HARDWARE_TYPE_8821(padapter)) {
 622 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
 623                 phy_set_rf_path_switch_8812a(padapter, bMain);
 624 #endif
 625         } else if (IS_HARDWARE_TYPE_8192E(padapter)) {
 626 #ifdef CONFIG_RTL8192E
 627                 phy_set_rf_path_switch_8192e(padapter, bMain);
 628 #endif
 629         } else if (IS_HARDWARE_TYPE_8703B(padapter)) {
 630 #ifdef CONFIG_RTL8703B
 631                 phy_set_rf_path_switch_8703b(padapter, bMain);
 632 #endif
 633         } else if (IS_HARDWARE_TYPE_8188F(padapter)) {
 634 #ifdef CONFIG_RTL8188F
 635                 phy_set_rf_path_switch_8188f(padapter, bMain);
 636 #endif
 637         } else if (IS_HARDWARE_TYPE_8822B(padapter)) {
 638 #ifdef CONFIG_RTL8822B
 639                 phy_set_rf_path_switch_8822b(padapter, bMain);
 640 #endif
 641         } else if (IS_HARDWARE_TYPE_8723D(padapter)) {
 642 #ifdef CONFIG_RTL8723D
 643                 phy_set_rf_path_switch_8723d(padapter, bMain);
 644 #endif
 645         } else if (IS_HARDWARE_TYPE_8821C(padapter)) {
 646 #ifdef CONFIG_RTL8821C
 647                 phy_set_rf_path_switch_8821c(padapter, bMain);
 648 #endif
 649         }
 650 }
 651
 652 s32
 653 MPT_InitializeAdapter(
 654         IN      PADAPTER                        pAdapter,
 655         IN      u8                              Channel
 656 )
 657 {
 658         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
 659         s32             rtStatus = _SUCCESS;
 660         PMPT_CONTEXT    pMptCtx = &pAdapter->mppriv.mpt_ctx;
 661         u32             ledsetting;
 662         struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv;
 663
 664         pMptCtx->bMptDrvUnload = _FALSE;
 665         pMptCtx->bMassProdTest = _FALSE;
 666         pMptCtx->bMptIndexEven = _TRUE; /* default gain index is -6.0db */
 667         pMptCtx->h2cReqNum = 0x0;
 668         /* init for BT MP */
 669 #if defined(CONFIG_RTL8723B)
 670         pMptCtx->bMPh2c_timeout = _FALSE;
 671         pMptCtx->MptH2cRspEvent = _FALSE;
 672         pMptCtx->MptBtC2hEvent = _FALSE;
 673         _rtw_init_sema(&pMptCtx->MPh2c_Sema, 0);
 674         _init_timer(&pMptCtx->MPh2c_timeout_timer, pAdapter->pnetdev, MPh2c_timeout_handle, pAdapter);
 675 #endif
 676
 677         mpt_InitHWConfig(pAdapter);
 678
 679 #ifdef CONFIG_RTL8723B
 680         rtl8723b_InitAntenna_Selection(pAdapter);
 681         if (IS_HARDWARE_TYPE_8723B(pAdapter)) {
 682
 683                 /* <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou)*/
 684                 phy_set_bb_reg(pAdapter, 0xA00, BIT8, 0x0);
 685                 PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); /*default use Main*/
 686                 /*<20130522, Kordan> 0x51 and 0x71 should be set immediately after path switched, or they might be overwritten. */
 687                 if ((pHalData->PackageType == PACKAGE_TFBGA79) || (pHalData->PackageType == PACKAGE_TFBGA90))
 688                         phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B10E);
 689                 else
 690                         phy_set_rf_reg(pAdapter, ODM_RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E);
 691         }
 692         /*set ant to wifi side in mp mode*/
 693         rtw_write16(pAdapter, 0x870, 0x300);
 694         rtw_write16(pAdapter, 0x860, 0x110);
 695 #endif
 696
 697         pMptCtx->bMptWorkItemInProgress = _FALSE;
 698         pMptCtx->CurrMptAct = NULL;
 699         pMptCtx->mpt_rf_path = ODM_RF_PATH_A;
 700         /* ------------------------------------------------------------------------- */
 701         /* Don't accept any packets */
 702         rtw_write32(pAdapter, REG_RCR, 0);
 703
 704         /* ledsetting = rtw_read32(pAdapter, REG_LEDCFG0); */
 705         /* rtw_write32(pAdapter, REG_LEDCFG0, ledsetting & ~LED0DIS); */
 706
 707         /* rtw_write32(pAdapter, REG_LEDCFG0, 0x08080); */
 708         ledsetting = rtw_read32(pAdapter, REG_LEDCFG0);
 709
 710
 711         PHY_LCCalibrate(pAdapter);
 712         PHY_IQCalibrate(pAdapter, _FALSE);
 713         /* dm_check_txpowertracking(&pHalData->odmpriv);        */ /* trigger thermal meter */
 714
 715         PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); /* default use Main */
 716
 717         pMptCtx->backup0xc50 = (u1Byte)phy_query_bb_reg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0);
 718         pMptCtx->backup0xc58 = (u1Byte)phy_query_bb_reg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0);
 719         pMptCtx->backup0xc30 = (u1Byte)phy_query_bb_reg(pAdapter, rOFDM0_RxDetector1, bMaskByte0);
 720         pMptCtx->backup0x52_RF_A = (u1Byte)phy_query_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
 721         pMptCtx->backup0x52_RF_B = (u1Byte)phy_query_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0);
 722 #ifdef CONFIG_RTL8188E
 723         rtw_write32(pAdapter, REG_MACID_NO_LINK_0, 0x0);
 724         rtw_write32(pAdapter, REG_MACID_NO_LINK_1, 0x0);
 725 #endif
 726 #ifdef CONFIG_RTL8814A
 727         if (IS_HARDWARE_TYPE_8814A(pAdapter)) {
 728                 pHalData->BackUp_IG_REG_4_Chnl_Section[0] = (u1Byte)phy_query_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0);
 729                 pHalData->BackUp_IG_REG_4_Chnl_Section[1] = (u1Byte)phy_query_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0);
 730                 pHalData->BackUp_IG_REG_4_Chnl_Section[2] = (u1Byte)phy_query_bb_reg(pAdapter, rC_IGI_Jaguar2, bMaskByte0);
 731                 pHalData->BackUp_IG_REG_4_Chnl_Section[3] = (u1Byte)phy_query_bb_reg(pAdapter, rD_IGI_Jaguar2, bMaskByte0);
 732         }
 733 #endif
 734         return  rtStatus;
 735 }
 736
 737 /*-----------------------------------------------------------------------------
 738  * Function:    MPT_DeInitAdapter()
 739  *
 740  * Overview:    Extra DeInitialization for Mass Production Test.
 741  *
 742  * Input:               PADAPTER        pAdapter
 743  *
 744  * Output:              NONE
 745  *
 746  * Return:              NONE
 747  *
 748  * Revised History:
 749  *      When            Who             Remark
 750  *      05/08/2007      MHC             Create Version 0.
 751  *      05/18/2007      MHC             Add normal driver MPHalt code.
 752  *
 753  *---------------------------------------------------------------------------*/
 754 VOID
 755 MPT_DeInitAdapter(
 756         IN      PADAPTER        pAdapter
 757 )
 758 {
 759         PMPT_CONTEXT            pMptCtx = &pAdapter->mppriv.mpt_ctx;
 760
 761         pMptCtx->bMptDrvUnload = _TRUE;
 762 #if defined(CONFIG_RTL8723B)
 763         _rtw_free_sema(&(pMptCtx->MPh2c_Sema));
 764         _cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer);
 765 #endif
 766 #if     defined(CONFIG_RTL8723B)
 767         phy_set_bb_reg(pAdapter, 0xA01, BIT0, 1); /* /suggestion  by jerry for MP Rx. */
 768 #endif
 769 #if 0 /* for Windows */
 770         PlatformFreeWorkItem(&(pMptCtx->MptWorkItem));
 771
 772         while (pMptCtx->bMptWorkItemInProgress) {
 773                 if (NdisWaitEvent(&(pMptCtx->MptWorkItemEvent), 50))
 774                         break;
 775         }
 776         NdisFreeSpinLock(&(pMptCtx->MptWorkItemSpinLock));
 777 #endif
 778 }
 779
 780 static u8 mpt_ProStartTest(PADAPTER padapter)
 781 {
 782         PMPT_CONTEXT pMptCtx = &padapter->mppriv.mpt_ctx;
 783
 784         pMptCtx->bMassProdTest = _TRUE;
 785         pMptCtx->is_start_cont_tx = _FALSE;
 786         pMptCtx->bCckContTx = _FALSE;
 787         pMptCtx->bOfdmContTx = _FALSE;
 788         pMptCtx->bSingleCarrier = _FALSE;
 789         pMptCtx->is_carrier_suppression = _FALSE;
 790         pMptCtx->is_single_tone = _FALSE;
 791         pMptCtx->HWTxmode = PACKETS_TX;
 792
 793         return _SUCCESS;
 794 }
 795
 796 /*
 797  * General use
 798  */
 799 s32 SetPowerTracking(PADAPTER padapter, u8 enable)
 800 {
 801
 802         hal_mpt_SetPowerTracking(padapter, enable);
 803         return 0;
 804 }
 805
 806 void GetPowerTracking(PADAPTER padapter, u8 *enable)
 807 {
 808         hal_mpt_GetPowerTracking(padapter, enable);
 809 }
 810
 811 void rtw_mp_trigger_iqk(PADAPTER padapter)
 812 {
 813         PHY_IQCalibrate(padapter, _FALSE);
 814 }
 815
 816 void rtw_mp_trigger_lck(PADAPTER padapter)
 817 {
 818         PHY_LCCalibrate(padapter);
 819 }
 820
 821 static void disable_dm(PADAPTER padapter)
 822 {
 823         u8 v8;
 824         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
 825         struct PHY_DM_STRUCT            *pDM_Odm = &pHalData->odmpriv;
 826
 827         /* 3 1. disable firmware dynamic mechanism */
 828         /* disable Power Training, Rate Adaptive */
 829         v8 = rtw_read8(padapter, REG_BCN_CTRL);
 830         v8 &= ~EN_BCN_FUNCTION;
 831         rtw_write8(padapter, REG_BCN_CTRL, v8);
 832
 833         /* 3 2. disable driver dynamic mechanism */
 834         rtw_phydm_func_disable_all(padapter);
 835
 836         /* enable APK, LCK and IQK but disable power tracking */
 837         pDM_Odm->rf_calibrate_info.txpowertrack_control = _FALSE;
 838         rtw_phydm_func_set(padapter, ODM_RF_CALIBRATION);
 839
 840         /* #ifdef CONFIG_BT_COEXIST */
 841         /* rtw_btcoex_Switch(padapter, 0); */ /* remove for BT MP Down. */
 842         /* #endif */
 843 }
 844
 845
 846 void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart)
 847 {
 848         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(padapter);
 849         struct PHY_DM_STRUCT            *pDM_Odm = &pHalData->odmpriv;
 850
 851         if (bstart == 1) {
 852                 RTW_INFO("in MPT_PwrCtlDM start\n");
 853                 rtw_phydm_func_set(padapter, ODM_RF_TX_PWR_TRACK | ODM_RF_CALIBRATION);
 854
 855                 pDM_Odm->rf_calibrate_info.txpowertrack_control = _TRUE;
 856                 padapter->mppriv.mp_dm = 1;
 857
 858         } else {
 859                 RTW_INFO("in MPT_PwrCtlDM stop\n");
 860                 disable_dm(padapter);
 861                 pDM_Odm->rf_calibrate_info.txpowertrack_control = _FALSE;
 862                 padapter->mppriv.mp_dm = 0;
 863                 {
 864                         struct _TXPWRTRACK_CFG  c;
 865                         u1Byte  chnl = 0 ;
 866                         _rtw_memset(&c, 0, sizeof(struct _TXPWRTRACK_CFG));
 867                         configure_txpower_track(pDM_Odm, &c);
 868                         odm_clear_txpowertracking_state(pDM_Odm);
 869                         if (*c.odm_tx_pwr_track_set_pwr) {
 870                                 if (pDM_Odm->support_ic_type == ODM_RTL8188F)
 871                                         (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, MIX_MODE, ODM_RF_PATH_A, chnl);
 872                                 else if (pDM_Odm->support_ic_type == ODM_RTL8723D) {
 873                                         (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, ODM_RF_PATH_A, chnl);
 874                                         SetTxPower(padapter);
 875                                 } else {
 876                                         (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, ODM_RF_PATH_A, chnl);
 877                                         (*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, ODM_RF_PATH_B, chnl);
 878                                 }
 879                         }
 880                 }
 881         }
 882
 883 }
 884
 885
 886 u32 mp_join(PADAPTER padapter, u8 mode)
 887 {
 888         WLAN_BSSID_EX bssid;
 889         struct sta_info *psta;
 890         u32 length;
 891         u8 val8, join_type;
 892         _irqL irqL;
 893         s32 res = _SUCCESS;
 894
 895         struct mp_priv *pmppriv = &padapter->mppriv;
 896         struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
 897         struct wlan_network *tgt_network = &pmlmepriv->cur_network;
 898         struct mlme_ext_priv    *pmlmeext = &padapter->mlmeextpriv;
 899         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
 900         WLAN_BSSID_EX           *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network));
 901
 902 #ifdef CONFIG_IOCTL_CFG80211
 903         struct wireless_dev *pwdev = padapter->rtw_wdev;
 904 #endif /* #ifdef CONFIG_IOCTL_CFG80211 */
 905         /* 1. initialize a new WLAN_BSSID_EX */
 906         _rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX));
 907         RTW_INFO("%s ,pmppriv->network_macaddr=%x %x %x %x %x %x\n", __func__,
 908                 pmppriv->network_macaddr[0], pmppriv->network_macaddr[1], pmppriv->network_macaddr[2], pmppriv->network_macaddr[3], pmppriv->network_macaddr[4],
 909                  pmppriv->network_macaddr[5]);
 910         _rtw_memcpy(bssid.MacAddress, pmppriv->network_macaddr, ETH_ALEN);
 911
 912         if (mode == WIFI_FW_ADHOC_STATE) {
 913                 bssid.Ssid.SsidLength = strlen("mp_pseudo_adhoc");
 914                 _rtw_memcpy(bssid.Ssid.Ssid, (u8 *)"mp_pseudo_adhoc", bssid.Ssid.SsidLength);
 915                 bssid.InfrastructureMode = Ndis802_11IBSS;
 916                 bssid.NetworkTypeInUse = Ndis802_11DS;
 917                 bssid.IELength = 0;
 918                 bssid.Configuration.DSConfig = pmppriv->channel;
 919
 920         } else if (mode == WIFI_FW_STATION_STATE) {
 921                 bssid.Ssid.SsidLength = strlen("mp_pseudo_STATION");
 922                 _rtw_memcpy(bssid.Ssid.Ssid, (u8 *)"mp_pseudo_STATION", bssid.Ssid.SsidLength);
 923                 bssid.InfrastructureMode = Ndis802_11Infrastructure;
 924                 bssid.NetworkTypeInUse = Ndis802_11DS;
 925                 bssid.IELength = 0;
 926         }
 927
 928         length = get_WLAN_BSSID_EX_sz(&bssid);
 929         if (length % 4)
 930                 bssid.Length = ((length >> 2) + 1) << 2; /* round up to multiple of 4 bytes. */
 931         else
 932                 bssid.Length = length;
 933
 934         _enter_critical_bh(&pmlmepriv->lock, &irqL);
 935
 936         if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
 937                 goto end_of_mp_start_test;
 938
 939         /* init mp_start_test status */
 940         if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
 941                 rtw_disassoc_cmd(padapter, 500, 0);
 942                 rtw_indicate_disconnect(padapter, 0, _FALSE);
 943                 rtw_free_assoc_resources(padapter, 1);
 944         }
 945         pmppriv->prev_fw_state = get_fwstate(pmlmepriv);
 946         /*pmlmepriv->fw_state = WIFI_MP_STATE;*/
 947         init_fwstate(pmlmepriv, WIFI_MP_STATE);
 948
 949         set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
 950
 951         /* 3 2. create a new psta for mp driver */
 952         /* clear psta in the cur_network, if any */
 953         psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
 954         if (psta)
 955                 rtw_free_stainfo(padapter, psta);
 956
 957         psta = rtw_alloc_stainfo(&padapter->stapriv, bssid.MacAddress);
 958         if (psta == NULL) {
 959                 /*pmlmepriv->fw_state = pmppriv->prev_fw_state;*/
 960                 init_fwstate(pmlmepriv, pmppriv->prev_fw_state);
 961                 res = _FAIL;
 962                 goto end_of_mp_start_test;
 963         }
 964         if (mode == WIFI_FW_ADHOC_STATE)
 965         set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
 966         else
 967                 set_fwstate(pmlmepriv, WIFI_STATION_STATE);
 968         /* 3 3. join psudo AdHoc */
 969         tgt_network->join_res = 1;
 970         tgt_network->aid = psta->aid = 1;
 971
 972         _rtw_memcpy(&padapter->registrypriv.dev_network, &bssid, length);
 973         rtw_update_registrypriv_dev_network(padapter);
 974         _rtw_memcpy(&tgt_network->network, &padapter->registrypriv.dev_network, padapter->registrypriv.dev_network.Length);
 975         _rtw_memcpy(pnetwork, &padapter->registrypriv.dev_network, padapter->registrypriv.dev_network.Length);
 976
 977         rtw_indicate_connect(padapter);
 978         _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
 979         set_fwstate(pmlmepriv, _FW_LINKED);
 980
 981 end_of_mp_start_test:
 982
 983         _exit_critical_bh(&pmlmepriv->lock, &irqL);
 984
 985         if (1) { /* (res == _SUCCESS) */
 986                 /* set MSR to WIFI_FW_ADHOC_STATE */
 987                 if (mode == WIFI_FW_ADHOC_STATE) {
 988                         /* set msr to WIFI_FW_ADHOC_STATE */
 989                         pmlmeinfo->state = WIFI_FW_ADHOC_STATE;
 990                         Set_MSR(padapter, (pmlmeinfo->state & 0x3));
 991
 992                         rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, padapter->registrypriv.dev_network.MacAddress);
 993                         join_type = 0;
 994                         rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
 995
 996                         report_join_res(padapter, 1);
 997                         pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS;
 998                 } else {
 999                         Set_MSR(padapter, WIFI_FW_STATION_STATE);
1000
1001                         RTW_INFO("%s , pmppriv->network_macaddr =%x %x %x %x %x %x\n", __func__,
1002                                 pmppriv->network_macaddr[0], pmppriv->network_macaddr[1], pmppriv->network_macaddr[2], pmppriv->network_macaddr[3], pmppriv->network_macaddr[4],
1003                                  pmppriv->network_macaddr[5]);
1004
1005                         rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmppriv->network_macaddr);
1006                 }
1007         }
1008
1009         return res;
1010 }
1011 /* This function initializes the DUT to the MP test mode */
1012 s32 mp_start_test(PADAPTER padapter)
1013 {
1014         struct mp_priv *pmppriv = &padapter->mppriv;
1015         s32 res = _SUCCESS;
1016
1017         padapter->registrypriv.mp_mode = 1;
1018
1019         /* 3 disable dynamic mechanism */
1020         disable_dm(padapter);
1021 #ifdef CONFIG_RTL8814A
1022         rtl8814_InitHalDm(padapter);
1023 #endif /* CONFIG_RTL8814A */
1024 #ifdef CONFIG_RTL8822B
1025         rtl8822b_phy_init_haldm(padapter);
1026 #endif /* CONFIG_RTL8822B */
1027 #ifdef CONFIG_RTL8821C
1028         rtl8821c_phy_init_haldm(padapter);
1029 #endif /* CONFIG_RTL8821C */
1030 #ifdef CONFIG_RTL8812A
1031         rtl8812_InitHalDm(padapter);
1032 #endif /* CONFIG_RTL8812A */
1033 #ifdef CONFIG_RTL8723B
1034         rtl8723b_InitHalDm(padapter);
1035 #endif /* CONFIG_RTL8723B */
1036 #ifdef CONFIG_RTL8703B
1037         rtl8703b_InitHalDm(padapter);
1038 #endif /* CONFIG_RTL8703B */
1039 #ifdef CONFIG_RTL8192E
1040         rtl8192e_InitHalDm(padapter);
1041 #endif
1042 #ifdef CONFIG_RTL8188F
1043         rtl8188f_InitHalDm(padapter);
1044 #endif
1045 #ifdef CONFIG_RTL8188E
1046         rtl8188e_InitHalDm(padapter);
1047 #endif
1048 #ifdef CONFIG_RTL8723D
1049         rtl8723d_InitHalDm(padapter);
1050 #endif /* CONFIG_RTL8723D */
1051
1052         /* 3 0. update mp_priv */
1053
1054         if (!RF_TYPE_VALID(padapter->registrypriv.rf_config)) {
1055                 /*              switch (phal->rf_type) { */
1056                 switch (GET_RF_TYPE(padapter)) {
1057                 case RF_1T1R:
1058                         pmppriv->antenna_tx = ANTENNA_A;
1059                         pmppriv->antenna_rx = ANTENNA_A;
1060                         break;
1061                 case RF_1T2R:
1062                 default:
1063                         pmppriv->antenna_tx = ANTENNA_A;
1064                         pmppriv->antenna_rx = ANTENNA_AB;
1065                         break;
1066                 case RF_2T2R:
1067                 case RF_2T2R_GREEN:
1068                         pmppriv->antenna_tx = ANTENNA_AB;
1069                         pmppriv->antenna_rx = ANTENNA_AB;
1070                         break;
1071                 case RF_2T4R:
1072                         pmppriv->antenna_tx = ANTENNA_AB;
1073                         pmppriv->antenna_rx = ANTENNA_ABCD;
1074                         break;
1075                 }
1076         }
1077
1078         mpt_ProStartTest(padapter);
1079
1080         mp_join(padapter, WIFI_FW_ADHOC_STATE);
1081
1082         return res;
1083 }
1084 /* ------------------------------------------------------------------------------
1085  * This function change the DUT from the MP test mode into normal mode */
1086 void mp_stop_test(PADAPTER padapter)
1087 {
1088         struct mp_priv *pmppriv = &padapter->mppriv;
1089         struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
1090         struct wlan_network *tgt_network = &pmlmepriv->cur_network;
1091         struct sta_info *psta;
1092
1093         _irqL irqL;
1094
1095         if (pmppriv->mode == MP_ON) {
1096                 pmppriv->bSetTxPower = 0;
1097                 _enter_critical_bh(&pmlmepriv->lock, &irqL);
1098                 if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _FALSE)
1099                         goto end_of_mp_stop_test;
1100
1101                 /* 3 1. disconnect psudo AdHoc */
1102                 rtw_indicate_disconnect(padapter, 0, _FALSE);
1103
1104                 /* 3 2. clear psta used in mp test mode.
1105                 *       rtw_free_assoc_resources(padapter, 1); */
1106                 psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
1107                 if (psta)
1108                         rtw_free_stainfo(padapter, psta);
1109
1110                 /* 3 3. return to normal state (default:station mode) */
1111                 /*pmlmepriv->fw_state = pmppriv->prev_fw_state; */ /* WIFI_STATION_STATE;*/
1112                 init_fwstate(pmlmepriv, pmppriv->prev_fw_state);
1113
1114                 /* flush the cur_network */
1115                 _rtw_memset(tgt_network, 0, sizeof(struct wlan_network));
1116
1117                 _clr_fwstate_(pmlmepriv, WIFI_MP_STATE);
1118
1119 end_of_mp_stop_test:
1120
1121                 _exit_critical_bh(&pmlmepriv->lock, &irqL);
1122
1123 #ifdef CONFIG_RTL8812A
1124                 rtl8812_InitHalDm(padapter);
1125 #endif
1126 #ifdef CONFIG_RTL8723B
1127                 rtl8723b_InitHalDm(padapter);
1128 #endif
1129 #ifdef CONFIG_RTL8703B
1130                 rtl8703b_InitHalDm(padapter);
1131 #endif
1132 #ifdef CONFIG_RTL8192E
1133                 rtl8192e_InitHalDm(padapter);
1134 #endif
1135 #ifdef CONFIG_RTL8188F
1136                 rtl8188f_InitHalDm(padapter);
1137 #endif
1138 #ifdef CONFIG_RTL8723D
1139                 rtl8723d_InitHalDm(padapter);
1140 #endif
1141         }
1142 }
1143 /*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/
1144 #if 0
1145 /* #ifdef CONFIG_USB_HCI */
1146 static VOID mpt_AdjustRFRegByRateByChan92CU(PADAPTER pAdapter, u8 RateIdx, u8 Channel, u8 BandWidthID)
1147 {
1148         u8              eRFPath;
1149         u32             rfReg0x26;
1150         HAL_DATA_TYPE   *pHalData = GET_HAL_DATA(pAdapter);
1151
1152
1153         if (RateIdx < MPT_RATE_6M)      /* CCK rate,for 88cu */
1154                 rfReg0x26 = 0xf400;
1155         else if ((RateIdx >= MPT_RATE_6M) && (RateIdx <= MPT_RATE_54M)) {/* OFDM rate,for 88cu */
1156                 if ((4 == Channel) || (8 == Channel) || (12 == Channel))
1157                         rfReg0x26 = 0xf000;
1158                 else if ((5 == Channel) || (7 == Channel) || (13 == Channel) || (14 == Channel))
1159                         rfReg0x26 = 0xf400;
1160                 else
1161                         rfReg0x26 = 0x4f200;
1162         } else if ((RateIdx >= MPT_RATE_MCS0) && (RateIdx <= MPT_RATE_MCS15)) {
1163                 /* MCS 20M ,for 88cu */ /* MCS40M rate,for 88cu */
1164
1165                 if (CHANNEL_WIDTH_20 == BandWidthID) {
1166                         if ((4 == Channel) || (8 == Channel))
1167                                 rfReg0x26 = 0xf000;
1168                         else if ((5 == Channel) || (7 == Channel) || (13 == Channel) || (14 == Channel))
1169                                 rfReg0x26 = 0xf400;
1170                         else
1171                                 rfReg0x26 = 0x4f200;
1172                 } else {
1173                         if ((4 == Channel) || (8 == Channel))
1174                                 rfReg0x26 = 0xf000;
1175                         else if ((5 == Channel) || (7 == Channel))
1176                                 rfReg0x26 = 0xf400;
1177                         else
1178                                 rfReg0x26 = 0x4f200;
1179                 }
1180         }
1181
1182         for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++)
1183                 write_rfreg(pAdapter, eRFPath, RF_SYN_G2, rfReg0x26);
1184 }
1185 #endif
1186 /*-----------------------------------------------------------------------------
1187  * Function:    mpt_SwitchRfSetting
1188  *
1189  * Overview:    Change RF Setting when we siwthc channel/rate/BW for MP.
1190  *
1191  * Input:       IN      PADAPTER                                pAdapter
1192  *
1193  * Output:      NONE
1194  *
1195  * Return:      NONE
1196  *
1197  * Revised History:
1198  * When                 Who             Remark
1199  * 01/08/2009   MHC             Suggestion from SD3 Willis for 92S series.
1200  * 01/09/2009   MHC             Add CCK modification for 40MHZ. Suggestion from SD3.
1201  *
1202  *---------------------------------------------------------------------------*/
1203 static void mpt_SwitchRfSetting(PADAPTER pAdapter)
1204 {
1205         hal_mpt_SwitchRfSetting(pAdapter);
1206 }
1207
1208 /*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/
1209 /*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
1210 static void MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14)
1211 {
1212         hal_mpt_CCKTxPowerAdjust(Adapter, bInCH14);
1213 }
1214
1215 /*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
1216
1217 /*
1218  * SetChannel
1219  * Description
1220  *      Use H2C command to change channel,
1221  *      not only modify rf register, but also other setting need to be done.
1222  */
1223 void SetChannel(PADAPTER pAdapter)
1224 {
1225         hal_mpt_SetChannel(pAdapter);
1226 }
1227
1228 /*
1229  * Notice
1230  *      Switch bandwitdth may change center frequency(channel)
1231  */
1232 void SetBandwidth(PADAPTER pAdapter)
1233 {
1234         hal_mpt_SetBandwidth(pAdapter);
1235
1236 }
1237
1238 void SetAntenna(PADAPTER pAdapter)
1239 {
1240         hal_mpt_SetAntenna(pAdapter);
1241 }
1242
1243 int SetTxPower(PADAPTER pAdapter)
1244 {
1245
1246         hal_mpt_SetTxPower(pAdapter);
1247         return _TRUE;
1248 }
1249
1250 void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset)
1251 {
1252         u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D, tmpAGC;
1253
1254         TxAGCOffset_B = (ulTxAGCOffset & 0x000000ff);
1255         TxAGCOffset_C = ((ulTxAGCOffset & 0x0000ff00) >> 8);
1256         TxAGCOffset_D = ((ulTxAGCOffset & 0x00ff0000) >> 16);
1257
1258         tmpAGC = (TxAGCOffset_D << 8 | TxAGCOffset_C << 4 | TxAGCOffset_B);
1259         write_bbreg(pAdapter, rFPGA0_TxGainStage,
1260                     (bXBTxAGC | bXCTxAGC | bXDTxAGC), tmpAGC);
1261 }
1262
1263 void SetDataRate(PADAPTER pAdapter)
1264 {
1265         hal_mpt_SetDataRate(pAdapter);
1266 }
1267
1268 void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter , BOOLEAN bMain)
1269 {
1270
1271         PHY_SetRFPathSwitch(pAdapter, bMain);
1272
1273 }
1274
1275 u8 MP_PHY_QueryRFPathSwitch(PADAPTER pAdapter)
1276 {
1277         return PHY_QueryRFPathSwitch(pAdapter);
1278 }
1279
1280 s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther)
1281 {
1282         return hal_mpt_SetThermalMeter(pAdapter, target_ther);
1283 }
1284
1285 static void TriggerRFThermalMeter(PADAPTER pAdapter)
1286 {
1287         hal_mpt_TriggerRFThermalMeter(pAdapter);
1288 }
1289
1290 static u8 ReadRFThermalMeter(PADAPTER pAdapter)
1291 {
1292         return hal_mpt_ReadRFThermalMeter(pAdapter);
1293 }
1294
1295 void GetThermalMeter(PADAPTER pAdapter, u8 *value)
1296 {
1297         hal_mpt_GetThermalMeter(pAdapter, value);
1298 }
1299
1300 void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart)
1301 {
1302         PhySetTxPowerLevel(pAdapter);
1303         hal_mpt_SetSingleCarrierTx(pAdapter, bStart);
1304 }
1305
1306 void SetSingleToneTx(PADAPTER pAdapter, u8 bStart)
1307 {
1308         PhySetTxPowerLevel(pAdapter);
1309         hal_mpt_SetSingleToneTx(pAdapter, bStart);
1310 }
1311
1312 void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart)
1313 {
1314         PhySetTxPowerLevel(pAdapter);
1315         hal_mpt_SetCarrierSuppressionTx(pAdapter, bStart);
1316 }
1317
1318 void SetContinuousTx(PADAPTER pAdapter, u8 bStart)
1319 {
1320         PhySetTxPowerLevel(pAdapter);
1321         hal_mpt_SetContinuousTx(pAdapter, bStart);
1322 }
1323
1324
1325 void PhySetTxPowerLevel(PADAPTER pAdapter)
1326 {
1327         struct mp_priv *pmp_priv = &pAdapter->mppriv;
1328
1329
1330         if (pmp_priv->bSetTxPower == 0) /* for NO manually set power index */
1331                 rtw_hal_set_tx_power_level(pAdapter, pmp_priv->channel);
1332 }
1333
1334 /* ------------------------------------------------------------------------------ */
1335 static void dump_mpframe(PADAPTER padapter, struct xmit_frame *pmpframe)
1336 {
1337         rtw_hal_mgnt_xmit(padapter, pmpframe);
1338 }
1339
1340 static struct xmit_frame *alloc_mp_xmitframe(struct xmit_priv *pxmitpriv)
1341 {
1342         struct xmit_frame       *pmpframe;
1343         struct xmit_buf *pxmitbuf;
1344
1345         pmpframe = rtw_alloc_xmitframe(pxmitpriv);
1346         if (pmpframe == NULL)
1347                 return NULL;
1348
1349         pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
1350         if (pxmitbuf == NULL) {
1351                 rtw_free_xmitframe(pxmitpriv, pmpframe);
1352                 return NULL;
1353         }
1354
1355         pmpframe->frame_tag = MP_FRAMETAG;
1356
1357         pmpframe->pxmitbuf = pxmitbuf;
1358
1359         pmpframe->buf_addr = pxmitbuf->pbuf;
1360
1361         pxmitbuf->priv_data = pmpframe;
1362
1363         return pmpframe;
1364
1365 }
1366
1367 static thread_return mp_xmit_packet_thread(thread_context context)
1368 {
1369         struct xmit_frame       *pxmitframe;
1370         struct mp_tx            *pmptx;
1371         struct mp_priv  *pmp_priv;
1372         struct xmit_priv        *pxmitpriv;
1373         PADAPTER padapter;
1374
1375         pmp_priv = (struct mp_priv *)context;
1376         pmptx = &pmp_priv->tx;
1377         padapter = pmp_priv->papdater;
1378         pxmitpriv = &(padapter->xmitpriv);
1379
1380         thread_enter("RTW_MP_THREAD");
1381
1382         RTW_INFO("%s:pkTx Start\n", __func__);
1383         while (1) {
1384                 pxmitframe = alloc_mp_xmitframe(pxmitpriv);
1385                 if (pxmitframe == NULL) {
1386                         if (pmptx->stop ||
1387                             RTW_CANNOT_RUN(padapter))
1388                                 goto exit;
1389                         else {
1390                                 rtw_usleep_os(10);
1391                                 continue;
1392                         }
1393                 }
1394                 _rtw_memcpy((u8 *)(pxmitframe->buf_addr + TXDESC_OFFSET), pmptx->buf, pmptx->write_size);
1395                 _rtw_memcpy(&(pxmitframe->attrib), &(pmptx->attrib), sizeof(struct pkt_attrib));
1396
1397
1398                 rtw_usleep_os(padapter->mppriv.pktInterval);
1399                 dump_mpframe(padapter, pxmitframe);
1400
1401                 pmptx->sended++;
1402                 pmp_priv->tx_pktcount++;
1403
1404                 if (pmptx->stop ||
1405                     RTW_CANNOT_RUN(padapter))
1406                         goto exit;
1407                 if ((pmptx->count != 0) &&
1408                     (pmptx->count == pmptx->sended))
1409                         goto exit;
1410
1411                 flush_signals_thread();
1412         }
1413
1414 exit:
1415         /* RTW_INFO("%s:pkTx Exit\n", __func__); */
1416         rtw_mfree(pmptx->pallocated_buf, pmptx->buf_size);
1417         pmptx->pallocated_buf = NULL;
1418         pmptx->stop = 1;
1419
1420         thread_exit();
1421 }
1422
1423 void fill_txdesc_for_mp(PADAPTER padapter, u8 *ptxdesc)
1424 {
1425         struct mp_priv *pmp_priv = &padapter->mppriv;
1426         _rtw_memcpy(ptxdesc, pmp_priv->tx.desc, TXDESC_SIZE);
1427 }
1428
1429 #if defined(CONFIG_RTL8188E)
1430 void fill_tx_desc_8188e(PADAPTER padapter)
1431 {
1432         struct mp_priv *pmp_priv = &padapter->mppriv;
1433         struct tx_desc *desc   = (struct tx_desc *)&(pmp_priv->tx.desc);
1434         struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
1435         u32     pkt_size = pattrib->last_txcmdsz;
1436         s32 bmcast = IS_MCAST(pattrib->ra);
1437         /* offset 0 */
1438 #if !defined(CONFIG_RTL8188E_SDIO) && !defined(CONFIG_PCI_HCI)
1439         desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
1440         desc->txdw0 |= cpu_to_le32(pkt_size & 0x0000FFFF); /* packet size */
1441         desc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00FF0000); /* 32 bytes for TX Desc */
1442         if (bmcast)
1443                 desc->txdw0 |= cpu_to_le32(BMC); /* broadcast packet */
1444
1445         desc->txdw1 |= cpu_to_le32((0x01 << 26) & 0xff000000);
1446 #endif
1447
1448         desc->txdw1 |= cpu_to_le32((pattrib->mac_id) & 0x3F); /* CAM_ID(MAC_ID) */
1449         desc->txdw1 |= cpu_to_le32((pattrib->qsel << QSEL_SHT) & 0x00001F00); /* Queue Select, TID */
1450         desc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000F0000); /* Rate Adaptive ID */
1451         /* offset 8 */
1452         /* desc->txdw2 |= cpu_to_le32(AGG_BK); */ /* AGG BK */
1453
1454         desc->txdw3 |= cpu_to_le32((pattrib->seqnum << 16) & 0x0fff0000);
1455         desc->txdw4 |= cpu_to_le32(HW_SSN);
1456
1457         desc->txdw4 |= cpu_to_le32(USERATE);
1458         desc->txdw4 |= cpu_to_le32(DISDATAFB);
1459
1460         if (pmp_priv->preamble) {
1461                 if (HwRateToMPTRate(pmp_priv->rateidx) <=  MPT_RATE_54M)
1462                         desc->txdw4 |= cpu_to_le32(DATA_SHORT); /* CCK Short Preamble */
1463         }
1464
1465         if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
1466                 desc->txdw4 |= cpu_to_le32(DATA_BW);
1467
1468         /* offset 20 */
1469         desc->txdw5 |= cpu_to_le32(pmp_priv->rateidx & 0x0000001F);
1470
1471         if (pmp_priv->preamble) {
1472                 if (HwRateToMPTRate(pmp_priv->rateidx) > MPT_RATE_54M)
1473                         desc->txdw5 |= cpu_to_le32(SGI); /* MCS Short Guard Interval */
1474         }
1475
1476         desc->txdw5 |= cpu_to_le32(RTY_LMT_EN); /* retry limit enable */
1477         desc->txdw5 |= cpu_to_le32(0x00180000); /* DATA/RTS Rate Fallback Limit  */
1478
1479
1480 }
1481 #endif
1482
1483 #if defined(CONFIG_RTL8814A)
1484 void fill_tx_desc_8814a(PADAPTER padapter)
1485 {
1486         struct mp_priv *pmp_priv = &padapter->mppriv;
1487         u8 *pDesc   = (u8 *)&(pmp_priv->tx.desc);
1488         struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
1489
1490         u32     pkt_size = pattrib->last_txcmdsz;
1491         s32 bmcast = IS_MCAST(pattrib->ra);
1492         u8 data_rate, pwr_status, offset;
1493
1494         /* SET_TX_DESC_FIRST_SEG_8814A(pDesc, 1); */
1495         SET_TX_DESC_LAST_SEG_8814A(pDesc, 1);
1496         /* SET_TX_DESC_OWN_(pDesc, 1); */
1497
1498         SET_TX_DESC_PKT_SIZE_8814A(pDesc, pkt_size);
1499
1500         offset = TXDESC_SIZE + OFFSET_SZ;
1501
1502         SET_TX_DESC_OFFSET_8814A(pDesc, offset);
1503 #if defined(CONFIG_PCI_HCI)
1504         SET_TX_DESC_PKT_OFFSET_8814A(pDesc, 0); /* 8814AE pkt_offset is 0 */
1505 #else
1506         SET_TX_DESC_PKT_OFFSET_8814A(pDesc, 1);
1507 #endif
1508
1509         if (bmcast)
1510                 SET_TX_DESC_BMC_8814A(pDesc, 1);
1511
1512         SET_TX_DESC_MACID_8814A(pDesc, pattrib->mac_id);
1513         SET_TX_DESC_RATE_ID_8814A(pDesc, pattrib->raid);
1514
1515         /* SET_TX_DESC_RATE_ID_8812(pDesc, RATEID_IDX_G); */
1516         SET_TX_DESC_QUEUE_SEL_8814A(pDesc,  pattrib->qsel);
1517         /* SET_TX_DESC_QUEUE_SEL_8812(pDesc,  QSLT_MGNT); */
1518
1519         if (pmp_priv->preamble)
1520                 SET_TX_DESC_DATA_SHORT_8814A(pDesc, 1);
1521
1522         if (!pattrib->qos_en) {
1523                 SET_TX_DESC_HWSEQ_EN_8814A(pDesc, 1); /* Hw set sequence number */
1524         } else
1525                 SET_TX_DESC_SEQ_8814A(pDesc, pattrib->seqnum);
1526
1527         if (pmp_priv->bandwidth <= CHANNEL_WIDTH_160)
1528                 SET_TX_DESC_DATA_BW_8814A(pDesc, pmp_priv->bandwidth);
1529         else {
1530                 RTW_INFO("%s:Err: unknown bandwidth %d, use 20M\n", __func__, pmp_priv->bandwidth);
1531                 SET_TX_DESC_DATA_BW_8814A(pDesc, CHANNEL_WIDTH_20);
1532         }
1533
1534         SET_TX_DESC_DISABLE_FB_8814A(pDesc, 1);
1535         SET_TX_DESC_USE_RATE_8814A(pDesc, 1);
1536         SET_TX_DESC_TX_RATE_8814A(pDesc, pmp_priv->rateidx);
1537
1538 }
1539 #endif
1540
1541 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
1542 void fill_tx_desc_8812a(PADAPTER padapter)
1543 {
1544         struct mp_priv *pmp_priv = &padapter->mppriv;
1545         u8 *pDesc   = (u8 *)&(pmp_priv->tx.desc);
1546         struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
1547
1548         u32     pkt_size = pattrib->last_txcmdsz;
1549         s32 bmcast = IS_MCAST(pattrib->ra);
1550         u8 data_rate, pwr_status, offset;
1551
1552         SET_TX_DESC_FIRST_SEG_8812(pDesc, 1);
1553         SET_TX_DESC_LAST_SEG_8812(pDesc, 1);
1554         SET_TX_DESC_OWN_8812(pDesc, 1);
1555
1556         SET_TX_DESC_PKT_SIZE_8812(pDesc, pkt_size);
1557
1558         offset = TXDESC_SIZE + OFFSET_SZ;
1559
1560         SET_TX_DESC_OFFSET_8812(pDesc, offset);
1561
1562 #if defined(CONFIG_PCI_HCI)
1563         SET_TX_DESC_PKT_OFFSET_8812(pDesc, 0);
1564 #else
1565         SET_TX_DESC_PKT_OFFSET_8812(pDesc, 1);
1566 #endif
1567         if (bmcast)
1568                 SET_TX_DESC_BMC_8812(pDesc, 1);
1569
1570         SET_TX_DESC_MACID_8812(pDesc, pattrib->mac_id);
1571         SET_TX_DESC_RATE_ID_8812(pDesc, pattrib->raid);
1572
1573         /* SET_TX_DESC_RATE_ID_8812(pDesc, RATEID_IDX_G); */
1574         SET_TX_DESC_QUEUE_SEL_8812(pDesc,  pattrib->qsel);
1575         /* SET_TX_DESC_QUEUE_SEL_8812(pDesc,  QSLT_MGNT); */
1576
1577         if (!pattrib->qos_en) {
1578                 SET_TX_DESC_HWSEQ_EN_8812(pDesc, 1); /* Hw set sequence number */
1579         } else
1580                 SET_TX_DESC_SEQ_8812(pDesc, pattrib->seqnum);
1581
1582         if (pmp_priv->bandwidth <= CHANNEL_WIDTH_160)
1583                 SET_TX_DESC_DATA_BW_8812(pDesc, pmp_priv->bandwidth);
1584         else {
1585                 RTW_INFO("%s:Err: unknown bandwidth %d, use 20M\n", __func__, pmp_priv->bandwidth);
1586                 SET_TX_DESC_DATA_BW_8812(pDesc, CHANNEL_WIDTH_20);
1587         }
1588
1589         SET_TX_DESC_DISABLE_FB_8812(pDesc, 1);
1590         SET_TX_DESC_USE_RATE_8812(pDesc, 1);
1591         SET_TX_DESC_TX_RATE_8812(pDesc, pmp_priv->rateidx);
1592
1593 }
1594 #endif
1595 #if defined(CONFIG_RTL8192E)
1596 void fill_tx_desc_8192e(PADAPTER padapter)
1597 {
1598         struct mp_priv *pmp_priv = &padapter->mppriv;
1599         u8 *pDesc       = (u8 *)&(pmp_priv->tx.desc);
1600         struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
1601
1602         u32 pkt_size = pattrib->last_txcmdsz;
1603         s32 bmcast = IS_MCAST(pattrib->ra);
1604         u8 data_rate, pwr_status, offset;
1605
1606
1607         SET_TX_DESC_PKT_SIZE_92E(pDesc, pkt_size);
1608
1609         offset = TXDESC_SIZE + OFFSET_SZ;
1610
1611         SET_TX_DESC_OFFSET_92E(pDesc, offset);
1612 #if defined(CONFIG_PCI_HCI) /* 8192EE */
1613
1614         SET_TX_DESC_PKT_OFFSET_92E(pDesc, 0); /* 8192EE pkt_offset is 0 */
1615 #else /* 8192EU 8192ES */
1616         SET_TX_DESC_PKT_OFFSET_92E(pDesc, 1);
1617 #endif
1618
1619         if (bmcast)
1620                 SET_TX_DESC_BMC_92E(pDesc, 1);
1621
1622         SET_TX_DESC_MACID_92E(pDesc, pattrib->mac_id);
1623         SET_TX_DESC_RATE_ID_92E(pDesc, pattrib->raid);
1624
1625
1626         SET_TX_DESC_QUEUE_SEL_92E(pDesc,  pattrib->qsel);
1627         /* SET_TX_DESC_QUEUE_SEL_8812(pDesc,  QSLT_MGNT); */
1628
1629         if (!pattrib->qos_en) {
1630                 SET_TX_DESC_EN_HWSEQ_92E(pDesc, 1);/* Hw set sequence number */
1631                 SET_TX_DESC_HWSEQ_SEL_92E(pDesc, pattrib->hw_ssn_sel);
1632         } else
1633                 SET_TX_DESC_SEQ_92E(pDesc, pattrib->seqnum);
1634
1635         if ((pmp_priv->bandwidth == CHANNEL_WIDTH_20) || (pmp_priv->bandwidth == CHANNEL_WIDTH_40))
1636                 SET_TX_DESC_DATA_BW_92E(pDesc, pmp_priv->bandwidth);
1637         else {
1638                 RTW_INFO("%s:Err: unknown bandwidth %d, use 20M\n", __func__, pmp_priv->bandwidth);
1639                 SET_TX_DESC_DATA_BW_92E(pDesc, CHANNEL_WIDTH_20);
1640         }
1641
1642         /* SET_TX_DESC_DATA_SC_92E(pDesc, SCMapping_92E(padapter,pattrib)); */
1643
1644         SET_TX_DESC_DISABLE_FB_92E(pDesc, 1);
1645         SET_TX_DESC_USE_RATE_92E(pDesc, 1);
1646         SET_TX_DESC_TX_RATE_92E(pDesc, pmp_priv->rateidx);
1647
1648 }
1649 #endif
1650
1651 #if defined(CONFIG_RTL8723B)
1652 void fill_tx_desc_8723b(PADAPTER padapter)
1653 {
1654         struct mp_priv *pmp_priv = &padapter->mppriv;
1655         struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
1656         u8 *ptxdesc = pmp_priv->tx.desc;
1657
1658         SET_TX_DESC_AGG_BREAK_8723B(ptxdesc, 1);
1659         SET_TX_DESC_MACID_8723B(ptxdesc, pattrib->mac_id);
1660         SET_TX_DESC_QUEUE_SEL_8723B(ptxdesc, pattrib->qsel);
1661
1662         SET_TX_DESC_RATE_ID_8723B(ptxdesc, pattrib->raid);
1663         SET_TX_DESC_SEQ_8723B(ptxdesc, pattrib->seqnum);
1664         SET_TX_DESC_HWSEQ_EN_8723B(ptxdesc, 1);
1665         SET_TX_DESC_USE_RATE_8723B(ptxdesc, 1);
1666         SET_TX_DESC_DISABLE_FB_8723B(ptxdesc, 1);
1667
1668         if (pmp_priv->preamble) {
1669                 if (HwRateToMPTRate(pmp_priv->rateidx) <=  MPT_RATE_54M)
1670                         SET_TX_DESC_DATA_SHORT_8723B(ptxdesc, 1);
1671         }
1672
1673         if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
1674                 SET_TX_DESC_DATA_BW_8723B(ptxdesc, 1);
1675
1676         SET_TX_DESC_TX_RATE_8723B(ptxdesc, pmp_priv->rateidx);
1677
1678         SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(ptxdesc, 0x1F);
1679         SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(ptxdesc, 0xF);
1680 }
1681 #endif
1682
1683 #if defined(CONFIG_RTL8703B)
1684 void fill_tx_desc_8703b(PADAPTER padapter)
1685 {
1686         struct mp_priv *pmp_priv = &padapter->mppriv;
1687         struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
1688         u8 *ptxdesc = pmp_priv->tx.desc;
1689
1690         SET_TX_DESC_AGG_BREAK_8703B(ptxdesc, 1);
1691         SET_TX_DESC_MACID_8703B(ptxdesc, pattrib->mac_id);
1692         SET_TX_DESC_QUEUE_SEL_8703B(ptxdesc, pattrib->qsel);
1693
1694         SET_TX_DESC_RATE_ID_8703B(ptxdesc, pattrib->raid);
1695         SET_TX_DESC_SEQ_8703B(ptxdesc, pattrib->seqnum);
1696         SET_TX_DESC_HWSEQ_EN_8703B(ptxdesc, 1);
1697         SET_TX_DESC_USE_RATE_8703B(ptxdesc, 1);
1698         SET_TX_DESC_DISABLE_FB_8703B(ptxdesc, 1);
1699
1700         if (pmp_priv->preamble) {
1701                 if (HwRateToMPTRate(pmp_priv->rateidx) <=  MPT_RATE_54M)
1702                         SET_TX_DESC_DATA_SHORT_8703B(ptxdesc, 1);
1703         }
1704
1705         if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
1706                 SET_TX_DESC_DATA_BW_8703B(ptxdesc, 1);
1707
1708         SET_TX_DESC_TX_RATE_8703B(ptxdesc, pmp_priv->rateidx);
1709
1710         SET_TX_DESC_DATA_RATE_FB_LIMIT_8703B(ptxdesc, 0x1F);
1711         SET_TX_DESC_RTS_RATE_FB_LIMIT_8703B(ptxdesc, 0xF);
1712 }
1713 #endif
1714
1715 #if defined(CONFIG_RTL8188F)
1716 void fill_tx_desc_8188f(PADAPTER padapter)
1717 {
1718         struct mp_priv *pmp_priv = &padapter->mppriv;
1719         struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
1720         u8 *ptxdesc = pmp_priv->tx.desc;
1721
1722         SET_TX_DESC_AGG_BREAK_8188F(ptxdesc, 1);
1723         SET_TX_DESC_MACID_8188F(ptxdesc, pattrib->mac_id);
1724         SET_TX_DESC_QUEUE_SEL_8188F(ptxdesc, pattrib->qsel);
1725
1726         SET_TX_DESC_RATE_ID_8188F(ptxdesc, pattrib->raid);
1727         SET_TX_DESC_SEQ_8188F(ptxdesc, pattrib->seqnum);
1728         SET_TX_DESC_HWSEQ_EN_8188F(ptxdesc, 1);
1729         SET_TX_DESC_USE_RATE_8188F(ptxdesc, 1);
1730         SET_TX_DESC_DISABLE_FB_8188F(ptxdesc, 1);
1731
1732         if (pmp_priv->preamble)
1733                 if (HwRateToMPTRate(pmp_priv->rateidx) <=  MPT_RATE_54M)
1734                         SET_TX_DESC_DATA_SHORT_8188F(ptxdesc, 1);
1735
1736         if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
1737                 SET_TX_DESC_DATA_BW_8188F(ptxdesc, 1);
1738
1739         SET_TX_DESC_TX_RATE_8188F(ptxdesc, pmp_priv->rateidx);
1740
1741         SET_TX_DESC_DATA_RATE_FB_LIMIT_8188F(ptxdesc, 0x1F);
1742         SET_TX_DESC_RTS_RATE_FB_LIMIT_8188F(ptxdesc, 0xF);
1743 }
1744 #endif
1745
1746 #if defined(CONFIG_RTL8723D)
1747 void fill_tx_desc_8723d(PADAPTER padapter)
1748 {
1749         struct mp_priv *pmp_priv = &padapter->mppriv;
1750         struct pkt_attrib *pattrib = &(pmp_priv->tx.attrib);
1751         u8 *ptxdesc = pmp_priv->tx.desc;
1752
1753         SET_TX_DESC_BK_8723D(ptxdesc, 1);
1754         SET_TX_DESC_MACID_8723D(ptxdesc, pattrib->mac_id);
1755         SET_TX_DESC_QUEUE_SEL_8723D(ptxdesc, pattrib->qsel);
1756
1757         SET_TX_DESC_RATE_ID_8723D(ptxdesc, pattrib->raid);
1758         SET_TX_DESC_SEQ_8723D(ptxdesc, pattrib->seqnum);
1759         SET_TX_DESC_HWSEQ_EN_8723D(ptxdesc, 1);
1760         SET_TX_DESC_USE_RATE_8723D(ptxdesc, 1);
1761         SET_TX_DESC_DISABLE_FB_8723D(ptxdesc, 1);
1762
1763         if (pmp_priv->preamble) {
1764                 if (HwRateToMPTRate(pmp_priv->rateidx) <=  MPT_RATE_54M)
1765                         SET_TX_DESC_DATA_SHORT_8723D(ptxdesc, 1);
1766         }
1767
1768         if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
1769                 SET_TX_DESC_DATA_BW_8723D(ptxdesc, 1);
1770
1771         SET_TX_DESC_TX_RATE_8723D(ptxdesc, pmp_priv->rateidx);
1772
1773         SET_TX_DESC_DATA_RATE_FB_LIMIT_8723D(ptxdesc, 0x1F);
1774         SET_TX_DESC_RTS_RATE_FB_LIMIT_8723D(ptxdesc, 0xF);
1775 }
1776 #endif
1777
1778 static void Rtw_MPSetMacTxEDCA(PADAPTER padapter)
1779 {
1780
1781         rtw_write32(padapter, 0x508 , 0x00a422); /* Disable EDCA BE Txop for MP pkt tx adjust Packet interval */
1782         /* RTW_INFO("%s:write 0x508~~~~~~ 0x%x\n", __func__,rtw_read32(padapter, 0x508)); */
1783         phy_set_mac_reg(padapter, 0x458 , bMaskDWord , 0x0);
1784         /*RTW_INFO("%s()!!!!! 0x460 = 0x%x\n" ,__func__, phy_query_bb_reg(padapter, 0x460, bMaskDWord));*/
1785         phy_set_mac_reg(padapter, 0x460 , bMaskLWord , 0x0); /* fast EDCA queue packet interval & time out value*/
1786         /*phy_set_mac_reg(padapter, ODM_EDCA_VO_PARAM ,bMaskLWord , 0x431C);*/
1787         /*phy_set_mac_reg(padapter, ODM_EDCA_BE_PARAM ,bMaskLWord , 0x431C);*/
1788         /*phy_set_mac_reg(padapter, ODM_EDCA_BK_PARAM ,bMaskLWord , 0x431C);*/
1789         RTW_INFO("%s()!!!!! 0x460 = 0x%x\n" , __func__, phy_query_bb_reg(padapter, 0x460, bMaskDWord));
1790
1791 }
1792
1793 void SetPacketTx(PADAPTER padapter)
1794 {
1795         u8 *ptr, *pkt_start, *pkt_end, *fctrl;
1796         u32 pkt_size, offset, startPlace, i;
1797         struct rtw_ieee80211_hdr *hdr;
1798         u8 payload;
1799         s32 bmcast;
1800         struct pkt_attrib *pattrib;
1801         struct mp_priv *pmp_priv;
1802
1803         pmp_priv = &padapter->mppriv;
1804
1805         if (pmp_priv->tx.stop)
1806                 return;
1807         pmp_priv->tx.sended = 0;
1808         pmp_priv->tx.stop = 0;
1809         pmp_priv->tx_pktcount = 0;
1810
1811         /* 3 1. update_attrib() */
1812         pattrib = &pmp_priv->tx.attrib;
1813         _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN);
1814         _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
1815         _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
1816         bmcast = IS_MCAST(pattrib->ra);
1817         if (bmcast) {
1818                 pattrib->mac_id = 1;
1819                 pattrib->psta = rtw_get_bcmc_stainfo(padapter);
1820         } else {
1821                 pattrib->mac_id = 0;
1822                 pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv));
1823         }
1824         pattrib->mbssid = 0;
1825
1826         pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->pktlen;
1827
1828         /* 3 2. allocate xmit buffer */
1829         pkt_size = pattrib->last_txcmdsz;
1830
1831         if (pmp_priv->tx.pallocated_buf)
1832                 rtw_mfree(pmp_priv->tx.pallocated_buf, pmp_priv->tx.buf_size);
1833         pmp_priv->tx.write_size = pkt_size;
1834         pmp_priv->tx.buf_size = pkt_size + XMITBUF_ALIGN_SZ;
1835         pmp_priv->tx.pallocated_buf = rtw_zmalloc(pmp_priv->tx.buf_size);
1836         if (pmp_priv->tx.pallocated_buf == NULL) {
1837                 RTW_INFO("%s: malloc(%d) fail!!\n", __func__, pmp_priv->tx.buf_size);
1838                 return;
1839         }
1840         pmp_priv->tx.buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pmp_priv->tx.pallocated_buf), XMITBUF_ALIGN_SZ);
1841         ptr = pmp_priv->tx.buf;
1842
1843         _rtw_memset(pmp_priv->tx.desc, 0, TXDESC_SIZE);
1844         pkt_start = ptr;
1845         pkt_end = pkt_start + pkt_size;
1846
1847         /* 3 3. init TX descriptor */
1848 #if defined(CONFIG_RTL8188E)
1849         if (IS_HARDWARE_TYPE_8188E(padapter))
1850                 fill_tx_desc_8188e(padapter);
1851 #endif
1852
1853 #if defined(CONFIG_RTL8814A)
1854         if (IS_HARDWARE_TYPE_8814A(padapter))
1855                 fill_tx_desc_8814a(padapter);
1856 #endif /* defined(CONFIG_RTL8814A) */
1857
1858 #if defined(CONFIG_RTL8822B)
1859         if (IS_HARDWARE_TYPE_8822B(padapter))
1860                 rtl8822b_prepare_mp_txdesc(padapter, pmp_priv);
1861 #endif /* CONFIG_RTL8822B */
1862
1863 #if defined(CONFIG_RTL8821C)
1864         if (IS_HARDWARE_TYPE_8821C(padapter))
1865                 rtl8821c_prepare_mp_txdesc(padapter, pmp_priv);
1866 #endif /* CONFIG_RTL8821C */
1867
1868 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
1869         if (IS_HARDWARE_TYPE_8812(padapter) || IS_HARDWARE_TYPE_8821(padapter))
1870                 fill_tx_desc_8812a(padapter);
1871 #endif
1872
1873 #if defined(CONFIG_RTL8192E)
1874         if (IS_HARDWARE_TYPE_8192E(padapter))
1875                 fill_tx_desc_8192e(padapter);
1876 #endif
1877 #if defined(CONFIG_RTL8723B)
1878         if (IS_HARDWARE_TYPE_8723B(padapter))
1879                 fill_tx_desc_8723b(padapter);
1880 #endif
1881 #if defined(CONFIG_RTL8703B)
1882         if (IS_HARDWARE_TYPE_8703B(padapter))
1883                 fill_tx_desc_8703b(padapter);
1884 #endif
1885
1886 #if defined(CONFIG_RTL8188F)
1887         if (IS_HARDWARE_TYPE_8188F(padapter))
1888                 fill_tx_desc_8188f(padapter);
1889 #endif
1890
1891 #if defined(CONFIG_RTL8723D)
1892         if (IS_HARDWARE_TYPE_8723D(padapter))
1893                 fill_tx_desc_8723d(padapter);
1894 #endif
1895
1896         /* 3 4. make wlan header, make_wlanhdr() */
1897         hdr = (struct rtw_ieee80211_hdr *)pkt_start;
1898         set_frame_sub_type(&hdr->frame_ctl, pattrib->subtype);
1899
1900         _rtw_memcpy(hdr->addr1, pattrib->dst, ETH_ALEN); /* DA */
1901         _rtw_memcpy(hdr->addr2, pattrib->src, ETH_ALEN); /* SA */
1902         _rtw_memcpy(hdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); /* RA, BSSID */
1903
1904         /* 3 5. make payload */
1905         ptr = pkt_start + pattrib->hdrlen;
1906
1907         switch (pmp_priv->tx.payload) {
1908         case 0:
1909                 payload = 0x00;
1910                 break;
1911         case 1:
1912                 payload = 0x5a;
1913                 break;
1914         case 2:
1915                 payload = 0xa5;
1916                 break;
1917         case 3:
1918                 payload = 0xff;
1919                 break;
1920         default:
1921                 payload = 0x00;
1922                 break;
1923         }
1924         pmp_priv->TXradomBuffer = rtw_zmalloc(4096);
1925         if (pmp_priv->TXradomBuffer == NULL) {
1926                 RTW_INFO("mp create random buffer fail!\n");
1927                 goto exit;
1928         }
1929
1930
1931         for (i = 0; i < 4096; i++)
1932                 pmp_priv->TXradomBuffer[i] = rtw_random32() % 0xFF;
1933
1934         /* startPlace = (u32)(rtw_random32() % 3450); */
1935         _rtw_memcpy(ptr, pmp_priv->TXradomBuffer, pkt_end - ptr);
1936         /* _rtw_memset(ptr, payload, pkt_end - ptr); */
1937         rtw_mfree(pmp_priv->TXradomBuffer, 4096);
1938
1939         /* 3 6. start thread */
1940 #ifdef PLATFORM_LINUX
1941         pmp_priv->tx.PktTxThread = kthread_run(mp_xmit_packet_thread, pmp_priv, "RTW_MP_THREAD");
1942         if (IS_ERR(pmp_priv->tx.PktTxThread))
1943                 RTW_INFO("Create PktTx Thread Fail !!!!!\n");
1944 #endif
1945 #ifdef PLATFORM_FREEBSD
1946         {
1947                 struct proc *p;
1948                 struct thread *td;
1949                 pmp_priv->tx.PktTxThread = kproc_kthread_add(mp_xmit_packet_thread, pmp_priv,
1950                         &p, &td, RFHIGHPID, 0, "MPXmitThread", "MPXmitThread");
1951
1952                 if (pmp_priv->tx.PktTxThread < 0)
1953                         RTW_INFO("Create PktTx Thread Fail !!!!!\n");
1954         }
1955 #endif
1956
1957         Rtw_MPSetMacTxEDCA(padapter);
1958 exit:
1959         return;
1960 }
1961
1962 void SetPacketRx(PADAPTER pAdapter, u8 bStartRx, u8 bAB)
1963 {
1964         PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter);
1965         struct mp_priv *pmppriv = &pAdapter->mppriv;
1966
1967
1968         if (bStartRx) {
1969 #ifdef CONFIG_RTL8723B
1970                 phy_set_mac_reg(pAdapter, 0xe70, BIT23 | BIT22, 0x3); /* Power on adc  (in RX_WAIT_CCA state) */
1971                 write_bbreg(pAdapter, 0xa01, BIT0, bDisable);/* improve Rx performance by jerry  */
1972 #endif
1973                 pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AMF | RCR_HTC_LOC_CTRL;
1974                 pHalData->ReceiveConfig |= RCR_ACRC32;
1975                 pHalData->ReceiveConfig |= RCR_APP_PHYST_RXFF | RCR_APP_ICV | RCR_APP_MIC;
1976
1977                 if (pmppriv->bSetRxBssid == _TRUE) {
1978                         RTW_INFO("%s: pmppriv->network_macaddr=" MAC_FMT "\n", __func__,
1979                                  MAC_ARG(pmppriv->network_macaddr));
1980                         pHalData->ReceiveConfig = 0;
1981                         pHalData->ReceiveConfig |= RCR_CBSSID_DATA | RCR_CBSSID_BCN |RCR_APM | RCR_AM | RCR_AB |RCR_AMF;
1982
1983 #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
1984                         write_bbreg(pAdapter, 0x550, BIT3, bEnable);
1985 #endif
1986                         rtw_write16(pAdapter, REG_RXFLTMAP0, 0xFFEF); /* REG_RXFLTMAP0 (RX Filter Map Group 0) */
1987
1988                 } else {
1989                         pHalData->ReceiveConfig |= RCR_ADF;
1990                         /* Accept all data frames */
1991                         rtw_write16(pAdapter, REG_RXFLTMAP2, 0xFFFF);
1992                 }
1993
1994                 if (bAB)
1995                         pHalData->ReceiveConfig |= RCR_AB;
1996         } else {
1997 #ifdef CONFIG_RTL8723B
1998                 phy_set_mac_reg(pAdapter, 0xe70, BIT23 | BIT22, 0x00); /* Power off adc  (in RX_WAIT_CCA state)*/
1999                 write_bbreg(pAdapter, 0xa01, BIT0, bEnable);/* improve Rx performance by jerry   */
2000 #endif
2001                 pHalData->ReceiveConfig = 0;
2002                 rtw_write16(pAdapter, REG_RXFLTMAP0, 0xFFFF); /* REG_RXFLTMAP0 (RX Filter Map Group 0) */
2003         }
2004
2005         rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig);
2006 }
2007
2008 void ResetPhyRxPktCount(PADAPTER pAdapter)
2009 {
2010         u32 i, phyrx_set = 0;
2011
2012         for (i = 0; i <= 0xF; i++) {
2013                 phyrx_set = 0;
2014                 phyrx_set |= _RXERR_RPT_SEL(i); /* select */
2015                 phyrx_set |= RXERR_RPT_RST;     /* set counter to zero */
2016                 rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set);
2017         }
2018 }
2019
2020 static u32 GetPhyRxPktCounts(PADAPTER pAdapter, u32 selbit)
2021 {
2022         /* selection */
2023         u32 phyrx_set = 0, count = 0;
2024
2025         phyrx_set = _RXERR_RPT_SEL(selbit & 0xF);
2026         rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set);
2027
2028         /* Read packet count */
2029         count = rtw_read32(pAdapter, REG_RXERR_RPT) & RXERR_COUNTER_MASK;
2030
2031         return count;
2032 }
2033
2034 u32 GetPhyRxPktReceived(PADAPTER pAdapter)
2035 {
2036         u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0;
2037
2038         OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_OK);
2039         CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_OK);
2040         HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_OK);
2041
2042         return OFDM_cnt + CCK_cnt + HT_cnt;
2043 }
2044
2045 u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter)
2046 {
2047         u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0;
2048
2049         OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_FAIL);
2050         CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_FAIL);
2051         HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_FAIL);
2052
2053         return OFDM_cnt + CCK_cnt + HT_cnt;
2054 }
2055
2056 /* reg 0x808[9:0]: FFT data x
2057  * reg 0x808[22]:  0  -->  1  to get 1 FFT data y
2058  * reg 0x8B4[15:0]: FFT data y report */
2059 static u32 rtw_GetPSDData(PADAPTER pAdapter, u32 point)
2060 {
2061         u32 psd_val = 0;
2062
2063 #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
2064         u16 psd_reg = 0x910;
2065         u16 psd_regL = 0xF44;
2066 #else
2067         u16 psd_reg = 0x808;
2068         u16 psd_regL = 0x8B4;
2069 #endif
2070
2071         psd_val = rtw_read32(pAdapter, psd_reg);
2072
2073         psd_val &= 0xFFBFFC00;
2074         psd_val |= point;
2075
2076         rtw_write32(pAdapter, psd_reg, psd_val);
2077         rtw_mdelay_os(1);
2078         psd_val |= 0x00400000;
2079
2080         rtw_write32(pAdapter, psd_reg, psd_val);
2081         rtw_mdelay_os(1);
2082
2083         psd_val = rtw_read32(pAdapter, psd_regL);
2084         psd_val &= 0x0000FFFF;
2085
2086         return psd_val;
2087 }
2088
2089 /*
2090  * pts  start_point_min         stop_point_max
2091  * 128  64                      64 + 128 = 192
2092  * 256  128                     128 + 256 = 384
2093  * 512  256                     256 + 512 = 768
2094  * 1024 512                     512 + 1024 = 1536
2095  *
2096  */
2097 u32 mp_query_psd(PADAPTER pAdapter, u8 *data)
2098 {
2099         u32 i, psd_pts = 0, psd_start = 0, psd_stop = 0;
2100         u32 psd_data = 0;
2101
2102
2103 #ifdef PLATFORM_LINUX
2104         if (!netif_running(pAdapter->pnetdev)) {
2105                 return 0;
2106         }
2107 #endif
2108
2109         if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) {
2110                 return 0;
2111         }
2112
2113         if (strlen(data) == 0) { /* default value */
2114                 psd_pts = 128;
2115                 psd_start = 64;
2116                 psd_stop = 128;
2117         } else
2118                 sscanf(data, "pts=%d,start=%d,stop=%d", &psd_pts, &psd_start, &psd_stop);
2119
2120         data[0] = '\0';
2121
2122         i = psd_start;
2123         while (i < psd_stop) {
2124                 if (i >= psd_pts)
2125                         psd_data = rtw_GetPSDData(pAdapter, i - psd_pts);
2126                 else
2127                         psd_data = rtw_GetPSDData(pAdapter, i);
2128                 sprintf(data, "%s%x ", data, psd_data);
2129                 i++;
2130         }
2131
2132 #ifdef CONFIG_LONG_DELAY_ISSUE
2133         rtw_msleep_os(100);
2134 #else
2135         rtw_mdelay_os(100);
2136 #endif
2137
2138         return strlen(data) + 1;
2139 }
2140
2141
2142 #if 0
2143 void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv)
2144 {
2145         int i, res;
2146         _adapter *padapter = pxmitpriv->adapter;
2147         struct xmit_frame       *pxmitframe = (struct xmit_frame *) pxmitpriv->pxmit_frame_buf;
2148         struct xmit_buf *pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf;
2149
2150         u32 max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ;
2151         u32 num_xmit_extbuf = NR_XMIT_EXTBUFF;
2152         if (padapter->registrypriv.mp_mode == 0) {
2153                 max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ;
2154                 num_xmit_extbuf = NR_XMIT_EXTBUFF;
2155         } else {
2156                 max_xmit_extbuf_size = 6000;
2157                 num_xmit_extbuf = 8;
2158         }
2159
2160         pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf;
2161         for (i = 0; i < num_xmit_extbuf; i++) {
2162                 rtw_os_xmit_resource_free(padapter, pxmitbuf, (max_xmit_extbuf_size + XMITBUF_ALIGN_SZ), _FALSE);
2163
2164                 pxmitbuf++;
2165         }
2166
2167         if (pxmitpriv->pallocated_xmit_extbuf)
2168                 rtw_vmfree(pxmitpriv->pallocated_xmit_extbuf, num_xmit_extbuf * sizeof(struct xmit_buf) + 4);
2169
2170         if (padapter->registrypriv.mp_mode == 0) {
2171                 max_xmit_extbuf_size = 6000;
2172                 num_xmit_extbuf = 8;
2173         } else {
2174                 max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ;
2175                 num_xmit_extbuf = NR_XMIT_EXTBUFF;
2176         }
2177
2178         /* Init xmit extension buff */
2179         _rtw_init_queue(&pxmitpriv->free_xmit_extbuf_queue);
2180
2181         pxmitpriv->pallocated_xmit_extbuf = rtw_zvmalloc(num_xmit_extbuf * sizeof(struct xmit_buf) + 4);
2182
2183         if (pxmitpriv->pallocated_xmit_extbuf  == NULL) {
2184                 res = _FAIL;
2185                 goto exit;
2186         }
2187
2188         pxmitpriv->pxmit_extbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmit_extbuf), 4);
2189
2190         pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf;
2191
2192         for (i = 0; i < num_xmit_extbuf; i++) {
2193                 _rtw_init_listhead(&pxmitbuf->list);
2194
2195                 pxmitbuf->priv_data = NULL;
2196                 pxmitbuf->padapter = padapter;
2197                 pxmitbuf->buf_tag = XMITBUF_MGNT;
2198
2199                 res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf, max_xmit_extbuf_size + XMITBUF_ALIGN_SZ, _TRUE);
2200                 if (res == _FAIL) {
2201                         res = _FAIL;
2202                         goto exit;
2203                 }
2204
2205 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
2206                 pxmitbuf->phead = pxmitbuf->pbuf;
2207                 pxmitbuf->pend = pxmitbuf->pbuf + max_xmit_extbuf_size;
2208                 pxmitbuf->len = 0;
2209                 pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->phead;
2210 #endif
2211
2212                 rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmit_extbuf_queue.queue));
2213 #ifdef DBG_XMIT_BUF_EXT
2214                 pxmitbuf->no = i;
2215 #endif
2216                 pxmitbuf++;
2217
2218         }
2219
2220         pxmitpriv->free_xmit_extbuf_cnt = num_xmit_extbuf;
2221
2222 exit:
2223         ;
2224 }
2225 #endif
2226
2227 u8
2228 mpt_to_mgnt_rate(
2229         IN      ULONG   MptRateIdx
2230 )
2231 {
2232         /* Mapped to MGN_XXX defined in MgntGen.h */
2233         switch (MptRateIdx) {
2234         /* CCK rate. */
2235         case    MPT_RATE_1M:
2236                 return MGN_1M;
2237         case    MPT_RATE_2M:
2238                 return MGN_2M;
2239         case    MPT_RATE_55M:
2240                 return MGN_5_5M;
2241         case    MPT_RATE_11M:
2242                 return MGN_11M;
2243
2244         /* OFDM rate. */
2245         case    MPT_RATE_6M:
2246                 return MGN_6M;
2247         case    MPT_RATE_9M:
2248                 return MGN_9M;
2249         case    MPT_RATE_12M:
2250                 return MGN_12M;
2251         case    MPT_RATE_18M:
2252                 return MGN_18M;
2253         case    MPT_RATE_24M:
2254                 return MGN_24M;
2255         case    MPT_RATE_36M:
2256                 return MGN_36M;
2257         case    MPT_RATE_48M:
2258                 return MGN_48M;
2259         case    MPT_RATE_54M:
2260                 return MGN_54M;
2261
2262         /* HT rate. */
2263         case    MPT_RATE_MCS0:
2264                 return MGN_MCS0;
2265         case    MPT_RATE_MCS1:
2266                 return MGN_MCS1;
2267         case    MPT_RATE_MCS2:
2268                 return MGN_MCS2;
2269         case    MPT_RATE_MCS3:
2270                 return MGN_MCS3;
2271         case    MPT_RATE_MCS4:
2272                 return MGN_MCS4;
2273         case    MPT_RATE_MCS5:
2274                 return MGN_MCS5;
2275         case    MPT_RATE_MCS6:
2276                 return MGN_MCS6;
2277         case    MPT_RATE_MCS7:
2278                 return MGN_MCS7;
2279         case    MPT_RATE_MCS8:
2280                 return MGN_MCS8;
2281         case    MPT_RATE_MCS9:
2282                 return MGN_MCS9;
2283         case    MPT_RATE_MCS10:
2284                 return MGN_MCS10;
2285         case    MPT_RATE_MCS11:
2286                 return MGN_MCS11;
2287         case    MPT_RATE_MCS12:
2288                 return MGN_MCS12;
2289         case    MPT_RATE_MCS13:
2290                 return MGN_MCS13;
2291         case    MPT_RATE_MCS14:
2292                 return MGN_MCS14;
2293         case    MPT_RATE_MCS15:
2294                 return MGN_MCS15;
2295         case    MPT_RATE_MCS16:
2296                 return MGN_MCS16;
2297         case    MPT_RATE_MCS17:
2298                 return MGN_MCS17;
2299         case    MPT_RATE_MCS18:
2300                 return MGN_MCS18;
2301         case    MPT_RATE_MCS19:
2302                 return MGN_MCS19;
2303         case    MPT_RATE_MCS20:
2304                 return MGN_MCS20;
2305         case    MPT_RATE_MCS21:
2306                 return MGN_MCS21;
2307         case    MPT_RATE_MCS22:
2308                 return MGN_MCS22;
2309         case    MPT_RATE_MCS23:
2310                 return MGN_MCS23;
2311         case    MPT_RATE_MCS24:
2312                 return MGN_MCS24;
2313         case    MPT_RATE_MCS25:
2314                 return MGN_MCS25;
2315         case    MPT_RATE_MCS26:
2316                 return MGN_MCS26;
2317         case    MPT_RATE_MCS27:
2318                 return MGN_MCS27;
2319         case    MPT_RATE_MCS28:
2320                 return MGN_MCS28;
2321         case    MPT_RATE_MCS29:
2322                 return MGN_MCS29;
2323         case    MPT_RATE_MCS30:
2324                 return MGN_MCS30;
2325         case    MPT_RATE_MCS31:
2326                 return MGN_MCS31;
2327
2328         /* VHT rate. */
2329         case    MPT_RATE_VHT1SS_MCS0:
2330                 return MGN_VHT1SS_MCS0;
2331         case    MPT_RATE_VHT1SS_MCS1:
2332                 return MGN_VHT1SS_MCS1;
2333         case    MPT_RATE_VHT1SS_MCS2:
2334                 return MGN_VHT1SS_MCS2;
2335         case    MPT_RATE_VHT1SS_MCS3:
2336                 return MGN_VHT1SS_MCS3;
2337         case    MPT_RATE_VHT1SS_MCS4:
2338                 return MGN_VHT1SS_MCS4;
2339         case    MPT_RATE_VHT1SS_MCS5:
2340                 return MGN_VHT1SS_MCS5;
2341         case    MPT_RATE_VHT1SS_MCS6:
2342                 return MGN_VHT1SS_MCS6;
2343         case    MPT_RATE_VHT1SS_MCS7:
2344                 return MGN_VHT1SS_MCS7;
2345         case    MPT_RATE_VHT1SS_MCS8:
2346                 return MGN_VHT1SS_MCS8;
2347         case    MPT_RATE_VHT1SS_MCS9:
2348                 return MGN_VHT1SS_MCS9;
2349         case    MPT_RATE_VHT2SS_MCS0:
2350                 return MGN_VHT2SS_MCS0;
2351         case    MPT_RATE_VHT2SS_MCS1:
2352                 return MGN_VHT2SS_MCS1;
2353         case    MPT_RATE_VHT2SS_MCS2:
2354                 return MGN_VHT2SS_MCS2;
2355         case    MPT_RATE_VHT2SS_MCS3:
2356                 return MGN_VHT2SS_MCS3;
2357         case    MPT_RATE_VHT2SS_MCS4:
2358                 return MGN_VHT2SS_MCS4;
2359         case    MPT_RATE_VHT2SS_MCS5:
2360                 return MGN_VHT2SS_MCS5;
2361         case    MPT_RATE_VHT2SS_MCS6:
2362                 return MGN_VHT2SS_MCS6;
2363         case    MPT_RATE_VHT2SS_MCS7:
2364                 return MGN_VHT2SS_MCS7;
2365         case    MPT_RATE_VHT2SS_MCS8:
2366                 return MGN_VHT2SS_MCS8;
2367         case    MPT_RATE_VHT2SS_MCS9:
2368                 return MGN_VHT2SS_MCS9;
2369         case    MPT_RATE_VHT3SS_MCS0:
2370                 return MGN_VHT3SS_MCS0;
2371         case    MPT_RATE_VHT3SS_MCS1:
2372                 return MGN_VHT3SS_MCS1;
2373         case    MPT_RATE_VHT3SS_MCS2:
2374                 return MGN_VHT3SS_MCS2;
2375         case    MPT_RATE_VHT3SS_MCS3:
2376                 return MGN_VHT3SS_MCS3;
2377         case    MPT_RATE_VHT3SS_MCS4:
2378                 return MGN_VHT3SS_MCS4;
2379         case    MPT_RATE_VHT3SS_MCS5:
2380                 return MGN_VHT3SS_MCS5;
2381         case    MPT_RATE_VHT3SS_MCS6:
2382                 return MGN_VHT3SS_MCS6;
2383         case    MPT_RATE_VHT3SS_MCS7:
2384                 return MGN_VHT3SS_MCS7;
2385         case    MPT_RATE_VHT3SS_MCS8:
2386                 return MGN_VHT3SS_MCS8;
2387         case    MPT_RATE_VHT3SS_MCS9:
2388                 return MGN_VHT3SS_MCS9;
2389         case    MPT_RATE_VHT4SS_MCS0:
2390                 return MGN_VHT4SS_MCS0;
2391         case    MPT_RATE_VHT4SS_MCS1:
2392                 return MGN_VHT4SS_MCS1;
2393         case    MPT_RATE_VHT4SS_MCS2:
2394                 return MGN_VHT4SS_MCS2;
2395         case    MPT_RATE_VHT4SS_MCS3:
2396                 return MGN_VHT4SS_MCS3;
2397         case    MPT_RATE_VHT4SS_MCS4:
2398                 return MGN_VHT4SS_MCS4;
2399         case    MPT_RATE_VHT4SS_MCS5:
2400                 return MGN_VHT4SS_MCS5;
2401         case    MPT_RATE_VHT4SS_MCS6:
2402                 return MGN_VHT4SS_MCS6;
2403         case    MPT_RATE_VHT4SS_MCS7:
2404                 return MGN_VHT4SS_MCS7;
2405         case    MPT_RATE_VHT4SS_MCS8:
2406                 return MGN_VHT4SS_MCS8;
2407         case    MPT_RATE_VHT4SS_MCS9:
2408                 return MGN_VHT4SS_MCS9;
2409
2410         case    MPT_RATE_LAST:  /* fully automatiMGN_VHT2SS_MCS1;        */
2411         default:
2412                 RTW_INFO("<===mpt_to_mgnt_rate(), Invalid Rate: %d!!\n", MptRateIdx);
2413                 return 0x0;
2414         }
2415 }
2416
2417
2418 u8 HwRateToMPTRate(u8 rate)
2419 {
2420         u8      ret_rate = MGN_1M;
2421
2422         switch (rate) {
2423         case DESC_RATE1M:
2424                 ret_rate = MPT_RATE_1M;
2425                 break;
2426         case DESC_RATE2M:
2427                 ret_rate = MPT_RATE_2M;
2428                 break;
2429         case DESC_RATE5_5M:
2430                 ret_rate = MPT_RATE_55M;
2431                 break;
2432         case DESC_RATE11M:
2433                 ret_rate = MPT_RATE_11M;
2434                 break;
2435         case DESC_RATE6M:
2436                 ret_rate = MPT_RATE_6M;
2437                 break;
2438         case DESC_RATE9M:
2439                 ret_rate = MPT_RATE_9M;
2440                 break;
2441         case DESC_RATE12M:
2442                 ret_rate = MPT_RATE_12M;
2443                 break;
2444         case DESC_RATE18M:
2445                 ret_rate = MPT_RATE_18M;
2446                 break;
2447         case DESC_RATE24M:
2448                 ret_rate = MPT_RATE_24M;
2449                 break;
2450         case DESC_RATE36M:
2451                 ret_rate = MPT_RATE_36M;
2452                 break;
2453         case DESC_RATE48M:
2454                 ret_rate = MPT_RATE_48M;
2455                 break;
2456         case DESC_RATE54M:
2457                 ret_rate = MPT_RATE_54M;
2458                 break;
2459         case DESC_RATEMCS0:
2460                 ret_rate = MPT_RATE_MCS0;
2461                 break;
2462         case DESC_RATEMCS1:
2463                 ret_rate = MPT_RATE_MCS1;
2464                 break;
2465         case DESC_RATEMCS2:
2466                 ret_rate = MPT_RATE_MCS2;
2467                 break;
2468         case DESC_RATEMCS3:
2469                 ret_rate = MPT_RATE_MCS3;
2470                 break;
2471         case DESC_RATEMCS4:
2472                 ret_rate = MPT_RATE_MCS4;
2473                 break;
2474         case DESC_RATEMCS5:
2475                 ret_rate = MPT_RATE_MCS5;
2476                 break;
2477         case DESC_RATEMCS6:
2478                 ret_rate = MPT_RATE_MCS6;
2479                 break;
2480         case DESC_RATEMCS7:
2481                 ret_rate = MPT_RATE_MCS7;
2482                 break;
2483         case DESC_RATEMCS8:
2484                 ret_rate = MPT_RATE_MCS8;
2485                 break;
2486         case DESC_RATEMCS9:
2487                 ret_rate = MPT_RATE_MCS9;
2488                 break;
2489         case DESC_RATEMCS10:
2490                 ret_rate = MPT_RATE_MCS10;
2491                 break;
2492         case DESC_RATEMCS11:
2493                 ret_rate = MPT_RATE_MCS11;
2494                 break;
2495         case DESC_RATEMCS12:
2496                 ret_rate = MPT_RATE_MCS12;
2497                 break;
2498         case DESC_RATEMCS13:
2499                 ret_rate = MPT_RATE_MCS13;
2500                 break;
2501         case DESC_RATEMCS14:
2502                 ret_rate = MPT_RATE_MCS14;
2503                 break;
2504         case DESC_RATEMCS15:
2505                 ret_rate = MPT_RATE_MCS15;
2506                 break;
2507         case DESC_RATEMCS16:
2508                 ret_rate = MPT_RATE_MCS16;
2509                 break;
2510         case DESC_RATEMCS17:
2511                 ret_rate = MPT_RATE_MCS17;
2512                 break;
2513         case DESC_RATEMCS18:
2514                 ret_rate = MPT_RATE_MCS18;
2515                 break;
2516         case DESC_RATEMCS19:
2517                 ret_rate = MPT_RATE_MCS19;
2518                 break;
2519         case DESC_RATEMCS20:
2520                 ret_rate = MPT_RATE_MCS20;
2521                 break;
2522         case DESC_RATEMCS21:
2523                 ret_rate = MPT_RATE_MCS21;
2524                 break;
2525         case DESC_RATEMCS22:
2526                 ret_rate = MPT_RATE_MCS22;
2527                 break;
2528         case DESC_RATEMCS23:
2529                 ret_rate = MPT_RATE_MCS23;
2530                 break;
2531         case DESC_RATEMCS24:
2532                 ret_rate = MPT_RATE_MCS24;
2533                 break;
2534         case DESC_RATEMCS25:
2535                 ret_rate = MPT_RATE_MCS25;
2536                 break;
2537         case DESC_RATEMCS26:
2538                 ret_rate = MPT_RATE_MCS26;
2539                 break;
2540         case DESC_RATEMCS27:
2541                 ret_rate = MPT_RATE_MCS27;
2542                 break;
2543         case DESC_RATEMCS28:
2544                 ret_rate = MPT_RATE_MCS28;
2545                 break;
2546         case DESC_RATEMCS29:
2547                 ret_rate = MPT_RATE_MCS29;
2548                 break;
2549         case DESC_RATEMCS30:
2550                 ret_rate = MPT_RATE_MCS30;
2551                 break;
2552         case DESC_RATEMCS31:
2553                 ret_rate = MPT_RATE_MCS31;
2554                 break;
2555         case DESC_RATEVHTSS1MCS0:
2556                 ret_rate = MPT_RATE_VHT1SS_MCS0;
2557                 break;
2558         case DESC_RATEVHTSS1MCS1:
2559                 ret_rate = MPT_RATE_VHT1SS_MCS1;
2560                 break;
2561         case DESC_RATEVHTSS1MCS2:
2562                 ret_rate = MPT_RATE_VHT1SS_MCS2;
2563                 break;
2564         case DESC_RATEVHTSS1MCS3:
2565                 ret_rate = MPT_RATE_VHT1SS_MCS3;
2566                 break;
2567         case DESC_RATEVHTSS1MCS4:
2568                 ret_rate = MPT_RATE_VHT1SS_MCS4;
2569                 break;
2570         case DESC_RATEVHTSS1MCS5:
2571                 ret_rate = MPT_RATE_VHT1SS_MCS5;
2572                 break;
2573         case DESC_RATEVHTSS1MCS6:
2574                 ret_rate = MPT_RATE_VHT1SS_MCS6;
2575                 break;
2576         case DESC_RATEVHTSS1MCS7:
2577                 ret_rate = MPT_RATE_VHT1SS_MCS7;
2578                 break;
2579         case DESC_RATEVHTSS1MCS8:
2580                 ret_rate = MPT_RATE_VHT1SS_MCS8;
2581                 break;
2582         case DESC_RATEVHTSS1MCS9:
2583                 ret_rate = MPT_RATE_VHT1SS_MCS9;
2584                 break;
2585         case DESC_RATEVHTSS2MCS0:
2586                 ret_rate = MPT_RATE_VHT2SS_MCS0;
2587                 break;
2588         case DESC_RATEVHTSS2MCS1:
2589                 ret_rate = MPT_RATE_VHT2SS_MCS1;
2590                 break;
2591         case DESC_RATEVHTSS2MCS2:
2592                 ret_rate = MPT_RATE_VHT2SS_MCS2;
2593                 break;
2594         case DESC_RATEVHTSS2MCS3:
2595                 ret_rate = MPT_RATE_VHT2SS_MCS3;
2596                 break;
2597         case DESC_RATEVHTSS2MCS4:
2598                 ret_rate = MPT_RATE_VHT2SS_MCS4;
2599                 break;
2600         case DESC_RATEVHTSS2MCS5:
2601                 ret_rate = MPT_RATE_VHT2SS_MCS5;
2602                 break;
2603         case DESC_RATEVHTSS2MCS6:
2604                 ret_rate = MPT_RATE_VHT2SS_MCS6;
2605                 break;
2606         case DESC_RATEVHTSS2MCS7:
2607                 ret_rate = MPT_RATE_VHT2SS_MCS7;
2608                 break;
2609         case DESC_RATEVHTSS2MCS8:
2610                 ret_rate = MPT_RATE_VHT2SS_MCS8;
2611                 break;
2612         case DESC_RATEVHTSS2MCS9:
2613                 ret_rate = MPT_RATE_VHT2SS_MCS9;
2614                 break;
2615         case DESC_RATEVHTSS3MCS0:
2616                 ret_rate = MPT_RATE_VHT3SS_MCS0;
2617                 break;
2618         case DESC_RATEVHTSS3MCS1:
2619                 ret_rate = MPT_RATE_VHT3SS_MCS1;
2620                 break;
2621         case DESC_RATEVHTSS3MCS2:
2622                 ret_rate = MPT_RATE_VHT3SS_MCS2;
2623                 break;
2624         case DESC_RATEVHTSS3MCS3:
2625                 ret_rate = MPT_RATE_VHT3SS_MCS3;
2626                 break;
2627         case DESC_RATEVHTSS3MCS4:
2628                 ret_rate = MPT_RATE_VHT3SS_MCS4;
2629                 break;
2630         case DESC_RATEVHTSS3MCS5:
2631                 ret_rate = MPT_RATE_VHT3SS_MCS5;
2632                 break;
2633         case DESC_RATEVHTSS3MCS6:
2634                 ret_rate = MPT_RATE_VHT3SS_MCS6;
2635                 break;
2636         case DESC_RATEVHTSS3MCS7:
2637                 ret_rate = MPT_RATE_VHT3SS_MCS7;
2638                 break;
2639         case DESC_RATEVHTSS3MCS8:
2640                 ret_rate = MPT_RATE_VHT3SS_MCS8;
2641                 break;
2642         case DESC_RATEVHTSS3MCS9:
2643                 ret_rate = MPT_RATE_VHT3SS_MCS9;
2644                 break;
2645         case DESC_RATEVHTSS4MCS0:
2646                 ret_rate = MPT_RATE_VHT4SS_MCS0;
2647                 break;
2648         case DESC_RATEVHTSS4MCS1:
2649                 ret_rate = MPT_RATE_VHT4SS_MCS1;
2650                 break;
2651         case DESC_RATEVHTSS4MCS2:
2652                 ret_rate = MPT_RATE_VHT4SS_MCS2;
2653                 break;
2654         case DESC_RATEVHTSS4MCS3:
2655                 ret_rate = MPT_RATE_VHT4SS_MCS3;
2656                 break;
2657         case DESC_RATEVHTSS4MCS4:
2658                 ret_rate = MPT_RATE_VHT4SS_MCS4;
2659                 break;
2660         case DESC_RATEVHTSS4MCS5:
2661                 ret_rate = MPT_RATE_VHT4SS_MCS5;
2662                 break;
2663         case DESC_RATEVHTSS4MCS6:
2664                 ret_rate = MPT_RATE_VHT4SS_MCS6;
2665                 break;
2666         case DESC_RATEVHTSS4MCS7:
2667                 ret_rate = MPT_RATE_VHT4SS_MCS7;
2668                 break;
2669         case DESC_RATEVHTSS4MCS8:
2670                 ret_rate = MPT_RATE_VHT4SS_MCS8;
2671                 break;
2672         case DESC_RATEVHTSS4MCS9:
2673                 ret_rate = MPT_RATE_VHT4SS_MCS9;
2674                 break;
2675
2676         default:
2677                 RTW_INFO("hw_rate_to_m_rate(): Non supported Rate [%x]!!!\n", rate);
2678                 break;
2679         }
2680         return ret_rate;
2681 }
2682
2683 u8 rtw_mpRateParseFunc(PADAPTER pAdapter, u8 *targetStr)
2684 {
2685         u16 i = 0;
2686         u8 *rateindex_Array[] = { "1M", "2M", "5.5M", "11M", "6M", "9M", "12M", "18M", "24M", "36M", "48M", "54M",
2687                 "HTMCS0", "HTMCS1", "HTMCS2", "HTMCS3", "HTMCS4", "HTMCS5", "HTMCS6", "HTMCS7",
2688                 "HTMCS8", "HTMCS9", "HTMCS10", "HTMCS11", "HTMCS12", "HTMCS13", "HTMCS14", "HTMCS15",
2689                 "HTMCS16", "HTMCS17", "HTMCS18", "HTMCS19", "HTMCS20", "HTMCS21", "HTMCS22", "HTMCS23",
2690                 "HTMCS24", "HTMCS25", "HTMCS26", "HTMCS27", "HTMCS28", "HTMCS29", "HTMCS30", "HTMCS31",
2691                 "VHT1MCS0", "VHT1MCS1", "VHT1MCS2", "VHT1MCS3", "VHT1MCS4", "VHT1MCS5", "VHT1MCS6", "VHT1MCS7", "VHT1MCS8", "VHT1MCS9",
2692                 "VHT2MCS0", "VHT2MCS1", "VHT2MCS2", "VHT2MCS3", "VHT2MCS4", "VHT2MCS5", "VHT2MCS6", "VHT2MCS7", "VHT2MCS8", "VHT2MCS9",
2693                 "VHT3MCS0", "VHT3MCS1", "VHT3MCS2", "VHT3MCS3", "VHT3MCS4", "VHT3MCS5", "VHT3MCS6", "VHT3MCS7", "VHT3MCS8", "VHT3MCS9",
2694                 "VHT4MCS0", "VHT4MCS1", "VHT4MCS2", "VHT4MCS3", "VHT4MCS4", "VHT4MCS5", "VHT4MCS6", "VHT4MCS7", "VHT4MCS8", "VHT4MCS9"
2695                                 };
2696
2697         for (i = 0; i <= 83; i++) {
2698                 if (strcmp(targetStr, rateindex_Array[i]) == 0) {
2699                         RTW_INFO("%s , index = %d\n", __func__ , i);
2700                         return i;
2701                 }
2702         }
2703
2704         printk("%s ,please input a Data RATE String as:", __func__);
2705         for (i = 0; i <= 83; i++) {
2706                 printk("%s ", rateindex_Array[i]);
2707                 if (i % 10 == 0)
2708                         printk("\n");
2709         }
2710         return _FAIL;
2711 }
2712
2713 ULONG mpt_ProQueryCalTxPower(
2714         PADAPTER        pAdapter,
2715         u8              RfPath
2716 )
2717 {
2718
2719         HAL_DATA_TYPE   *pHalData       = GET_HAL_DATA(pAdapter);
2720         PMPT_CONTEXT            pMptCtx = &(pAdapter->mppriv.mpt_ctx);
2721
2722         ULONG                   TxPower = 1;
2723         u1Byte                  rate = 0;
2724         struct txpwr_idx_comp tic;
2725         u8 mgn_rate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index);
2726
2727         TxPower = rtw_hal_get_tx_power_index(pAdapter, RfPath, mgn_rate, pHalData->current_channel_bw, pHalData->current_channel, &tic);
2728
2729         RTW_INFO("bw=%d, ch=%d, rate=%d, txPower:%u = %u + (%d=%d:%d) + (%d) + (%d)\n",
2730                 pHalData->current_channel_bw, pHalData->current_channel, mgn_rate
2731                 , TxPower, tic.base, (tic.by_rate > tic.limit ? tic.limit : tic.by_rate), tic.by_rate, tic.limit, tic.tpt, tic.ebias);
2732
2733         pAdapter->mppriv.txpoweridx = (u8)TxPower;
2734         pMptCtx->TxPwrLevel[ODM_RF_PATH_A] = (u8)TxPower;
2735         pMptCtx->TxPwrLevel[ODM_RF_PATH_B] = (u8)TxPower;
2736         pMptCtx->TxPwrLevel[ODM_RF_PATH_C] = (u8)TxPower;
2737         pMptCtx->TxPwrLevel[ODM_RF_PATH_D]  = (u8)TxPower;
2738         hal_mpt_SetTxPower(pAdapter);
2739
2740         return TxPower;
2741 }
2742
2743 #ifdef CONFIG_MP_VHT_HW_TX_MODE
2744 static inline void dump_buf(u8 *buf, u32 len)
2745 {
2746         u32 i;
2747
2748         RTW_INFO("-----------------Len %d----------------\n", len);
2749         for (i = 0; i < len; i++)
2750                 RTW_INFO("%2.2x-", *(buf + i));
2751         RTW_INFO("\n");
2752 }
2753
2754 void ByteToBit(
2755         UCHAR   *out,
2756         bool    *in,
2757         UCHAR   in_size)
2758 {
2759         UCHAR i = 0, j = 0;
2760
2761         for (i = 0; i < in_size; i++) {
2762                 for (j = 0; j < 8; j++) {
2763                         if (in[8 * i + j])
2764                                 out[i] |= (1 << j);
2765                 }
2766         }
2767 }
2768
2769
2770 void CRC16_generator(
2771         bool *out,
2772         bool *in,
2773         UCHAR in_size
2774 )
2775 {
2776         UCHAR i = 0;
2777         bool temp = 0, reg[] = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
2778
2779         for (i = 0; i < in_size; i++) {/* take one's complement and bit reverse*/
2780                 temp = in[i] ^ reg[15];
2781                 reg[15] = reg[14];
2782                 reg[14] = reg[13];
2783                 reg[13] = reg[12];
2784                 reg[12] = reg[11];
2785                 reg[11] = reg[10];
2786                 reg[10] = reg[9];
2787                 reg[9]  = reg[8];
2788                 reg[8]  = reg[7];
2789
2790                 reg[7]  = reg[6];
2791                 reg[6]  = reg[5];
2792                 reg[5]  = reg[4];
2793                 reg[4]  = reg[3];
2794                 reg[3]  = reg[2];
2795                 reg[2]  = reg[1];
2796                 reg[1]  = reg[0];
2797                 reg[12] = reg[12] ^ temp;
2798                 reg[5]  = reg[5] ^ temp;
2799                 reg[0]  = temp;
2800         }
2801         for (i = 0; i < 16; i++)        /* take one's complement and bit reverse*/
2802                 out[i] = 1 - reg[15 - i];
2803 }
2804
2805
2806
2807 /*========================================
2808         SFD             SIGNAL  SERVICE LENGTH  CRC
2809         16 bit  8 bit   8 bit   16 bit  16 bit
2810 ========================================*/
2811 void CCK_generator(
2812         PRT_PMAC_TX_INFO        pPMacTxInfo,
2813         PRT_PMAC_PKT_INFO       pPMacPktInfo
2814 )
2815 {
2816         double  ratio = 0;
2817         bool    crc16_in[32] = {0}, crc16_out[16] = {0};
2818         bool LengthExtBit;
2819         double LengthExact;
2820         double LengthPSDU;
2821         UCHAR i;
2822         UINT PacketLength = pPMacTxInfo->PacketLength;
2823
2824         if (pPMacTxInfo->bSPreamble)
2825                 pPMacTxInfo->SFD = 0x05CF;
2826         else
2827                 pPMacTxInfo->SFD = 0xF3A0;
2828
2829         switch (pPMacPktInfo->MCS) {
2830         case 0:
2831                 pPMacTxInfo->SignalField = 0xA;
2832                 ratio = 8;
2833                 /*CRC16_in(1,0:7)=[0 1 0 1 0 0 0 0]*/
2834                 crc16_in[1] = crc16_in[3] = 1;
2835                 break;
2836         case 1:
2837                 pPMacTxInfo->SignalField = 0x14;
2838                 ratio = 4;
2839                 /*CRC16_in(1,0:7)=[0 0 1 0 1 0 0 0];*/
2840                 crc16_in[2] = crc16_in[4] = 1;
2841                 break;
2842         case 2:
2843                 pPMacTxInfo->SignalField = 0x37;
2844                 ratio = 8.0 / 5.5;
2845                 /*CRC16_in(1,0:7)=[1 1 1 0 1 1 0 0];*/
2846                 crc16_in[0] = crc16_in[1] = crc16_in[2] = crc16_in[4] = crc16_in[5] = 1;
2847                 break;
2848         case 3:
2849                 pPMacTxInfo->SignalField = 0x6E;
2850                 ratio = 8.0 / 11.0;
2851                 /*CRC16_in(1,0:7)=[0 1 1 1 0 1 1 0];*/
2852                 crc16_in[1] = crc16_in[2] = crc16_in[3] = crc16_in[5] = crc16_in[6] = 1;
2853                 break;
2854         }
2855
2856         LengthExact = PacketLength * ratio;
2857         LengthPSDU = ceil(LengthExact);
2858
2859         if ((pPMacPktInfo->MCS == 3) &&
2860             ((LengthPSDU - LengthExact) >= 0.727 || (LengthPSDU - LengthExact) <= -0.727))
2861                 LengthExtBit = 1;
2862         else
2863                 LengthExtBit = 0;
2864
2865
2866         pPMacTxInfo->LENGTH = (UINT)LengthPSDU;
2867         /* CRC16_in(1,16:31) = LengthPSDU[0:15]*/
2868         for (i = 0; i < 16; i++)
2869                 crc16_in[i + 16] = (pPMacTxInfo->LENGTH >> i) & 0x1;
2870
2871         if (LengthExtBit == 0) {
2872                 pPMacTxInfo->ServiceField = 0x0;
2873                 /* CRC16_in(1,8:15) = [0 0 0 0 0 0 0 0];*/
2874         } else {
2875                 pPMacTxInfo->ServiceField = 0x80;
2876                 /*CRC16_in(1,8:15)=[0 0 0 0 0 0 0 1];*/
2877                 crc16_in[15] = 1;
2878         }
2879
2880         CRC16_generator(crc16_out, crc16_in, 32);
2881
2882         _rtw_memset(pPMacTxInfo->CRC16, 0, 2);
2883         ByteToBit(pPMacTxInfo->CRC16, crc16_out, 2);
2884
2885 }
2886
2887
2888 void PMAC_Get_Pkt_Param(
2889         PRT_PMAC_TX_INFO        pPMacTxInfo,
2890         PRT_PMAC_PKT_INFO       pPMacPktInfo)
2891 {
2892
2893         UCHAR           TX_RATE_HEX = 0, MCS = 0;
2894         UCHAR           TX_RATE = pPMacTxInfo->TX_RATE;
2895
2896         /*      TX_RATE & Nss   */
2897         if (MPT_IS_2SS_RATE(TX_RATE))
2898                 pPMacPktInfo->Nss = 2;
2899         else if (MPT_IS_3SS_RATE(TX_RATE))
2900                 pPMacPktInfo->Nss = 3;
2901         else if (MPT_IS_4SS_RATE(TX_RATE))
2902                 pPMacPktInfo->Nss = 4;
2903         else
2904                 pPMacPktInfo->Nss = 1;
2905
2906         RTW_INFO("PMacTxInfo.Nss =%d\n", pPMacPktInfo->Nss);
2907
2908         /*      MCS & TX_RATE_HEX*/
2909         if (MPT_IS_CCK_RATE(TX_RATE)) {
2910                 switch (TX_RATE) {
2911                 case MPT_RATE_1M:
2912                         TX_RATE_HEX = MCS = 0;
2913                         break;
2914                 case MPT_RATE_2M:
2915                         TX_RATE_HEX = MCS = 1;
2916                         break;
2917                 case MPT_RATE_55M:
2918                         TX_RATE_HEX = MCS = 2;
2919                         break;
2920                 case MPT_RATE_11M:
2921                         TX_RATE_HEX = MCS = 3;
2922                         break;
2923                 }
2924         } else if (MPT_IS_OFDM_RATE(TX_RATE)) {
2925                 MCS = TX_RATE - MPT_RATE_6M;
2926                 TX_RATE_HEX = MCS + 4;
2927         } else if (MPT_IS_HT_RATE(TX_RATE)) {
2928                 MCS = TX_RATE - MPT_RATE_MCS0;
2929                 TX_RATE_HEX = MCS + 12;
2930         } else if (MPT_IS_VHT_RATE(TX_RATE)) {
2931                 TX_RATE_HEX = TX_RATE - MPT_RATE_VHT1SS_MCS0 + 44;
2932
2933                 if (MPT_IS_VHT_2S_RATE(TX_RATE))
2934                         MCS = TX_RATE - MPT_RATE_VHT2SS_MCS0;
2935                 else if (MPT_IS_VHT_3S_RATE(TX_RATE))
2936                         MCS = TX_RATE - MPT_RATE_VHT3SS_MCS0;
2937                 else if (MPT_IS_VHT_4S_RATE(TX_RATE))
2938                         MCS = TX_RATE - MPT_RATE_VHT4SS_MCS0;
2939                 else
2940                         MCS = TX_RATE - MPT_RATE_VHT1SS_MCS0;
2941         }
2942
2943         pPMacPktInfo->MCS = MCS;
2944         pPMacTxInfo->TX_RATE_HEX = TX_RATE_HEX;
2945
2946         RTW_INFO(" MCS=%d, TX_RATE_HEX =0x%x\n", MCS, pPMacTxInfo->TX_RATE_HEX);
2947         /*      mSTBC & Nsts*/
2948         pPMacPktInfo->Nsts = pPMacPktInfo->Nss;
2949         if (pPMacTxInfo->bSTBC) {
2950                 if (pPMacPktInfo->Nss == 1) {
2951                         pPMacTxInfo->m_STBC = 2;
2952                         pPMacPktInfo->Nsts = pPMacPktInfo->Nss * 2;
2953                 } else
2954                         pPMacTxInfo->m_STBC = 1;
2955         } else
2956                 pPMacTxInfo->m_STBC = 1;
2957 }
2958
2959
2960 UINT LDPC_parameter_generator(
2961         UINT N_pld_int,
2962         UINT N_CBPSS,
2963         UINT N_SS,
2964         UINT R,
2965         UINT m_STBC,
2966         UINT N_TCB_int
2967 )
2968 {
2969         double  CR = 0.;
2970         double  N_pld = (double)N_pld_int;
2971         double  N_TCB = (double)N_TCB_int;
2972         double  N_CW = 0., N_shrt = 0., N_spcw = 0., N_fshrt = 0.;
2973         double  L_LDPC = 0., K_LDPC = 0., L_LDPC_info = 0.;
2974         double  N_punc = 0., N_ppcw = 0., N_fpunc = 0., N_rep = 0., N_rpcw = 0., N_frep = 0.;
2975         double  R_eff = 0.;
2976         UINT    VHTSIGA2B3  = 0;/* extra symbol from VHT-SIG-A2 Bit 3*/
2977
2978         if (R == 0)
2979                 CR      = 0.5;
2980         else if (R == 1)
2981                 CR = 2. / 3.;
2982         else if (R == 2)
2983                 CR = 3. / 4.;
2984         else if (R == 3)
2985                 CR = 5. / 6.;
2986
2987         if (N_TCB <= 648.) {
2988                 N_CW    = 1.;
2989                 if (N_TCB >= N_pld + 912.*(1. - CR))
2990                         L_LDPC  = 1296.;
2991                 else
2992                         L_LDPC  = 648.;
2993         } else if (N_TCB <= 1296.) {
2994                 N_CW    = 1.;
2995                 if (N_TCB >= (double)N_pld + 1464.*(1. - CR))
2996                         L_LDPC  = 1944.;
2997                 else
2998                         L_LDPC  = 1296.;
2999         } else if       (N_TCB <= 1944.) {
3000                 N_CW    = 1.;
3001                 L_LDPC  = 1944.;
3002         } else if (N_TCB <= 2592.) {
3003                 N_CW    = 2.;
3004                 if (N_TCB >= N_pld + 2916.*(1. - CR))
3005                         L_LDPC  = 1944.;
3006                 else
3007                         L_LDPC  = 1296.;
3008         } else {
3009                 N_CW = ceil(N_pld / 1944. / CR);
3010                 L_LDPC  = 1944.;
3011         }
3012         /*      Number of information bits per CW*/
3013         K_LDPC = L_LDPC * CR;
3014         /*      Number of shortening bits                                       max(0, (N_CW * L_LDPC * R) - N_pld)*/
3015         N_shrt = (N_CW * K_LDPC - N_pld) > 0. ? (N_CW * K_LDPC - N_pld) : 0.;
3016         /*      Number of shortening bits per CW                        N_spcw = rtfloor(N_shrt/N_CW)*/
3017         N_spcw = rtfloor(N_shrt / N_CW);
3018         /*      The first N_fshrt CWs shorten 1 bit more*/
3019         N_fshrt = (double)((int)N_shrt % (int)N_CW);
3020         /*      Number of data bits for the last N_CW-N_fshrt CWs*/
3021         L_LDPC_info = K_LDPC - N_spcw;
3022         /*      Number of puncturing bits*/
3023         N_punc = (N_CW * L_LDPC - N_TCB - N_shrt) > 0. ? (N_CW * L_LDPC - N_TCB - N_shrt) : 0.;
3024         if (((N_punc > .1 * N_CW * L_LDPC * (1. - CR)) && (N_shrt < 1.2 * N_punc * CR / (1. - CR))) ||
3025             (N_punc > 0.3 * N_CW * L_LDPC * (1. - CR))) {
3026                 /*cout << "*** N_TCB and N_punc are Recomputed ***" << endl;*/
3027                 VHTSIGA2B3 = 1;
3028                 N_TCB += (double)N_CBPSS * N_SS * m_STBC;
3029                 N_punc = (N_CW * L_LDPC - N_TCB - N_shrt) > 0. ? (N_CW * L_LDPC - N_TCB - N_shrt) : 0.;
3030         } else
3031                 VHTSIGA2B3 = 0;
3032
3033         return VHTSIGA2B3;
3034 }       /* function end of LDPC_parameter_generator */
3035
3036 /*========================================
3037         Data field of PPDU
3038         Get N_sym and SIGA2BB3
3039 ========================================*/
3040 void PMAC_Nsym_generator(
3041         PRT_PMAC_TX_INFO        pPMacTxInfo,
3042         PRT_PMAC_PKT_INFO       pPMacPktInfo)
3043 {
3044         UINT    SIGA2B3 = 0;
3045         UCHAR   TX_RATE = pPMacTxInfo->TX_RATE;
3046
3047         UINT R, R_list[10] = {0, 0, 2, 0, 2, 1, 2, 3, 2, 3};
3048         double CR = 0;
3049         UINT N_SD, N_BPSC_list[10] = {1, 2, 2, 4, 4, 6, 6, 6, 8, 8};
3050         UINT N_BPSC = 0, N_CBPS = 0, N_DBPS = 0, N_ES = 0, N_SYM = 0, N_pld = 0, N_TCB = 0;
3051         int D_R = 0;
3052
3053         RTW_INFO("TX_RATE = %d\n", TX_RATE);
3054         /*      N_SD*/
3055         if (pPMacTxInfo->BandWidth == 0)
3056                 N_SD = 52;
3057         else if (pPMacTxInfo->BandWidth == 1)
3058                 N_SD = 108;
3059         else
3060                 N_SD = 234;
3061
3062         if (MPT_IS_HT_RATE(TX_RATE)) {
3063                 UCHAR MCS_temp;
3064
3065                 if (pPMacPktInfo->MCS > 23)
3066                         MCS_temp = pPMacPktInfo->MCS - 24;
3067                 else if (pPMacPktInfo->MCS > 15)
3068                         MCS_temp = pPMacPktInfo->MCS - 16;
3069                 else if (pPMacPktInfo->MCS > 7)
3070                         MCS_temp = pPMacPktInfo->MCS - 8;
3071                 else
3072                         MCS_temp = pPMacPktInfo->MCS;
3073
3074                 R = R_list[MCS_temp];
3075
3076                 switch (R) {
3077                 case 0:
3078                         CR = .5;
3079                         break;
3080                 case 1:
3081                         CR = 2. / 3.;
3082                         break;
3083                 case 2:
3084                         CR = 3. / 4.;
3085                         break;
3086                 case 3:
3087                         CR = 5. / 6.;
3088                         break;
3089                 }
3090
3091                 N_BPSC = N_BPSC_list[MCS_temp];
3092                 N_CBPS = N_BPSC * N_SD * pPMacPktInfo->Nss;
3093                 N_DBPS = (UINT)((double)N_CBPS * CR);
3094
3095                 if (pPMacTxInfo->bLDPC == FALSE) {
3096                         N_ES = (UINT)ceil((double)(N_DBPS * pPMacPktInfo->Nss) / 4. / 300.);
3097                         RTW_INFO("N_ES = %d\n", N_ES);
3098
3099                         /*      N_SYM = m_STBC* (8*length+16+6*N_ES) / (m_STBC*N_DBPS)*/
3100                         N_SYM = pPMacTxInfo->m_STBC * (UINT)ceil((double)(pPMacTxInfo->PacketLength * 8 + 16 + N_ES * 6) /
3101                                         (double)(N_DBPS * pPMacTxInfo->m_STBC));
3102
3103                 } else {
3104                         N_ES = 1;
3105                         /*      N_pld = length * 8 + 16*/
3106                         N_pld = pPMacTxInfo->PacketLength * 8 + 16;
3107                         RTW_INFO("N_pld = %d\n", N_pld);
3108                         N_SYM = pPMacTxInfo->m_STBC * (UINT)ceil((double)(N_pld) /
3109                                         (double)(N_DBPS * pPMacTxInfo->m_STBC));
3110                         RTW_INFO("N_SYM = %d\n", N_SYM);
3111                         /*      N_avbits = N_CBPS *m_STBC *(N_pld/N_CBPS*R*m_STBC)*/
3112                         N_TCB = N_CBPS * N_SYM;
3113                         RTW_INFO("N_TCB = %d\n", N_TCB);
3114                         SIGA2B3 = LDPC_parameter_generator(N_pld, N_CBPS, pPMacPktInfo->Nss, R, pPMacTxInfo->m_STBC, N_TCB);
3115                         RTW_INFO("SIGA2B3 = %d\n", SIGA2B3);
3116                         N_SYM = N_SYM + SIGA2B3 * pPMacTxInfo->m_STBC;
3117                         RTW_INFO("N_SYM = %d\n", N_SYM);
3118                 }
3119         } else if (MPT_IS_VHT_RATE(TX_RATE)) {
3120                 R = R_list[pPMacPktInfo->MCS];
3121
3122                 switch (R) {
3123                 case 0:
3124                         CR = .5;
3125                         break;
3126                 case 1:
3127                         CR = 2. / 3.;
3128                         break;
3129                 case 2:
3130                         CR = 3. / 4.;
3131                         break;
3132                 case 3:
3133                         CR = 5. / 6.;
3134                         break;
3135                 }
3136                 N_BPSC = N_BPSC_list[pPMacPktInfo->MCS];
3137                 N_CBPS = N_BPSC * N_SD * pPMacPktInfo->Nss;
3138                 N_DBPS = (UINT)((double)N_CBPS * CR);
3139                 if (pPMacTxInfo->bLDPC == FALSE) {
3140                         if (pPMacTxInfo->bSGI)
3141                                 N_ES = (UINT)ceil((double)(N_DBPS) / 3.6 / 600.);
3142                         else
3143                                 N_ES = (UINT)ceil((double)(N_DBPS) / 4. / 600.);
3144                         /*      N_SYM = m_STBC* (8*length+16+6*N_ES) / (m_STBC*N_DBPS)*/
3145                         N_SYM = pPMacTxInfo->m_STBC * (UINT)ceil((double)(pPMacTxInfo->PacketLength * 8 + 16 + N_ES * 6) / (double)(N_DBPS * pPMacTxInfo->m_STBC));
3146                         SIGA2B3 = 0;
3147                 } else {
3148                         N_ES = 1;
3149                         /*      N_SYM = m_STBC* (8*length+N_service) / (m_STBC*N_DBPS)*/
3150                         N_SYM = pPMacTxInfo->m_STBC * (UINT)ceil((double)(pPMacTxInfo->PacketLength * 8 + 16) / (double)(N_DBPS * pPMacTxInfo->m_STBC));
3151                         /*      N_avbits = N_sys_init * N_CBPS*/
3152                         N_TCB = N_CBPS * N_SYM;
3153                         /*      N_pld = N_sys_init * N_DBPS*/
3154                         N_pld = N_SYM * N_DBPS;
3155                         SIGA2B3 = LDPC_parameter_generator(N_pld, N_CBPS, pPMacPktInfo->Nss, R, pPMacTxInfo->m_STBC, N_TCB);
3156                         N_SYM = N_SYM + SIGA2B3 * pPMacTxInfo->m_STBC;
3157                 }
3158
3159                 switch (R) {
3160                 case 0:
3161                         D_R = 2;
3162                         break;
3163                 case 1:
3164                         D_R = 3;
3165                         break;
3166                 case 2:
3167                         D_R = 4;
3168                         break;
3169                 case 3:
3170                         D_R = 6;
3171                         break;
3172                 }
3173
3174                 if (((N_CBPS / N_ES) % D_R) != 0) {
3175                         RTW_INFO("MCS= %d is not supported when Nss=%d and BW= %d !!\n",  pPMacPktInfo->MCS, pPMacPktInfo->Nss, pPMacTxInfo->BandWidth);
3176                         return;
3177                 }
3178
3179                 RTW_INFO("MCS= %d Nss=%d and BW= %d !!\n",  pPMacPktInfo->MCS, pPMacPktInfo->Nss, pPMacTxInfo->BandWidth);
3180         }
3181
3182         pPMacPktInfo->N_sym = N_SYM;
3183         pPMacPktInfo->SIGA2B3 = SIGA2B3;
3184 }
3185
3186 /*========================================
3187         L-SIG   Rate    R       Length  P       Tail
3188                         4b              1b      12b             1b      6b
3189 ========================================*/
3190
3191 void L_SIG_generator(
3192         UINT    N_SYM,          /* Max: 750*/
3193         PRT_PMAC_TX_INFO        pPMacTxInfo,
3194         PRT_PMAC_PKT_INFO       pPMacPktInfo)
3195 {
3196         u8      sig_bi[24] = {0};       /* 24 BIT*/
3197         UINT    mode, LENGTH;
3198         int i;
3199
3200         if (MPT_IS_OFDM_RATE(pPMacTxInfo->TX_RATE)) {
3201                 mode = pPMacPktInfo->MCS;
3202                 LENGTH = pPMacTxInfo->PacketLength;
3203         } else {
3204                 UCHAR   N_LTF;
3205                 double  T_data;
3206                 UINT    OFDM_symbol;
3207
3208                 mode = 0;
3209
3210                 /*      Table 20-13 Num of HT-DLTFs request*/
3211                 if (pPMacPktInfo->Nsts <= 2)
3212                         N_LTF = pPMacPktInfo->Nsts;
3213                 else
3214                         N_LTF = 4;
3215
3216                 if (pPMacTxInfo->bSGI)
3217                         T_data = 3.6;
3218                 else
3219                         T_data = 4.0;
3220
3221                 /*(L-SIG, HT-SIG, HT-STF, HT-LTF....HT-LTF, Data)*/
3222                 if (MPT_IS_VHT_RATE(pPMacTxInfo->TX_RATE))
3223                         OFDM_symbol = (UINT)ceil((double)(8 + 4 + N_LTF * 4 + N_SYM * T_data + 4) / 4.);
3224                 else
3225                         OFDM_symbol = (UINT)ceil((double)(8 + 4 + N_LTF * 4 + N_SYM * T_data) / 4.);
3226
3227                 RTW_INFO("%s , OFDM_symbol =%d\n", __func__, OFDM_symbol);
3228                 LENGTH = OFDM_symbol * 3 - 3;
3229                 RTW_INFO("%s , LENGTH =%d\n", __func__, LENGTH);
3230
3231         }
3232         /*      Rate Field*/
3233         switch (mode) {
3234         case    0:
3235                 sig_bi[0] = 1;
3236                 sig_bi[1] = 1;
3237                 sig_bi[2] = 0;
3238                 sig_bi[3] = 1;
3239                 break;
3240         case    1:
3241                 sig_bi[0] = 1;
3242                 sig_bi[1] = 1;
3243                 sig_bi[2] = 1;
3244                 sig_bi[3] = 1;
3245                 break;
3246         case    2:
3247                 sig_bi[0] = 0;
3248                 sig_bi[1] = 1;
3249                 sig_bi[2] = 0;
3250                 sig_bi[3] = 1;
3251                 break;
3252         case    3:
3253                 sig_bi[0] = 0;
3254                 sig_bi[1] = 1;
3255                 sig_bi[2] = 1;
3256                 sig_bi[3] = 1;
3257                 break;
3258         case    4:
3259                 sig_bi[0] = 1;
3260                 sig_bi[1] = 0;
3261                 sig_bi[2] = 0;
3262                 sig_bi[3] = 1;
3263                 break;
3264         case    5:
3265                 sig_bi[0] = 1;
3266                 sig_bi[1] = 0;
3267                 sig_bi[2] = 1;
3268                 sig_bi[3] = 1;
3269                 break;
3270         case    6:
3271                 sig_bi[0] = 0;
3272                 sig_bi[1] = 0;
3273                 sig_bi[2] = 0;
3274                 sig_bi[3] = 1;
3275                 break;
3276         case    7:
3277                 sig_bi[0] = 0;
3278                 sig_bi[1] = 0;
3279                 sig_bi[2] = 1;
3280                 sig_bi[3] = 1;
3281                 break;
3282         }
3283         /*Reserved bit*/
3284         sig_bi[4] = 0;
3285
3286         /*      Length Field*/
3287         for (i = 0; i < 12; i++)
3288                 sig_bi[i + 5] = (LENGTH >> i) & 1;
3289
3290         /* Parity Bit*/
3291         sig_bi[17] = 0;
3292         for (i = 0; i < 17; i++)
3293                 sig_bi[17] = sig_bi[17] + sig_bi[i];
3294
3295         sig_bi[17] %= 2;
3296
3297         /*      Tail Field*/
3298         for (i = 18; i < 24; i++)
3299                 sig_bi[i] = 0;
3300
3301         /* dump_buf(sig_bi,24);*/
3302         _rtw_memset(pPMacTxInfo->LSIG, 0, 3);
3303         ByteToBit(pPMacTxInfo->LSIG, (bool *)sig_bi, 3);
3304 }
3305
3306
3307 void CRC8_generator(
3308         bool    *out,
3309         bool    *in,
3310         UCHAR   in_size
3311 )
3312 {
3313         UCHAR i = 0;
3314         bool temp = 0, reg[] = {1, 1, 1, 1, 1, 1, 1, 1};
3315
3316         for (i = 0; i < in_size; i++) { /* take one's complement and bit reverse*/
3317                 temp = in[i] ^ reg[7];
3318                 reg[7]  = reg[6];
3319                 reg[6]  = reg[5];
3320                 reg[5]  = reg[4];
3321                 reg[4]  = reg[3];
3322                 reg[3]  = reg[2];
3323                 reg[2]  = reg[1] ^ temp;
3324                 reg[1]  = reg[0] ^ temp;
3325                 reg[0]  = temp;
3326         }
3327         for (i = 0; i < 8; i++)/* take one's complement and bit reverse*/
3328                 out[i] = reg[7 - i] ^ 1;
3329 }
3330
3331 /*/================================================================================
3332         HT-SIG1 MCS     CW      Length          24BIT + 24BIT
3333                         7b      1b      16b
3334         HT-SIG2 Smoothing       Not sounding    Rsvd            AGG     STBC    FEC     SGI     N_ELTF  CRC     Tail
3335                         1b                      1b                      1b              1b      2b              1b      1b      2b              8b      6b
3336 ================================================================================*/
3337 void HT_SIG_generator(
3338         PRT_PMAC_TX_INFO        pPMacTxInfo,
3339         PRT_PMAC_PKT_INFO       pPMacPktInfo
3340 )
3341 {
3342         UINT i;
3343         bool sig_bi[48] = {0}, crc8[8] = {0};
3344         /*      MCS Field*/
3345         for (i = 0; i < 7; i++)
3346                 sig_bi[i] = (pPMacPktInfo->MCS >> i) & 0x1;
3347         /*      Packet BW Setting*/
3348         sig_bi[7] = pPMacTxInfo->BandWidth;
3349         /*      HT-Length Field*/
3350         for (i = 0; i < 16; i++)
3351                 sig_bi[i + 8] = (pPMacTxInfo->PacketLength >> i) & 0x1;
3352         /*      Smoothing;      1->allow smoothing*/
3353         sig_bi[24] = 1;
3354         /*Not Sounding*/
3355         sig_bi[25] = 1 - pPMacTxInfo->NDP_sound;
3356         /*Reserved bit*/
3357         sig_bi[26] = 1;
3358         /*/Aggregate*/
3359         sig_bi[27] = 0;
3360         /*STBC Field*/
3361         if (pPMacTxInfo->bSTBC) {
3362                 sig_bi[28] = 1;
3363                 sig_bi[29] = 0;
3364         } else {
3365                 sig_bi[28] = 0;
3366                 sig_bi[29] = 0;
3367         }
3368         /*Advance Coding,       0: BCC, 1: LDPC*/
3369         sig_bi[30] = pPMacTxInfo->bLDPC;
3370         /* Short GI*/
3371         sig_bi[31] = pPMacTxInfo->bSGI;
3372         /* N_ELTFs*/
3373         if (pPMacTxInfo->NDP_sound == FALSE) {
3374                 sig_bi[32]      = 0;
3375                 sig_bi[33]      = 0;
3376         } else {
3377                 int     N_ELTF = pPMacTxInfo->Ntx - pPMacPktInfo->Nss;
3378
3379                 for (i = 0; i < 2; i++)
3380                         sig_bi[32 + i] = (N_ELTF >> i) % 2;
3381         }
3382         /*      CRC-8*/
3383         CRC8_generator(crc8, sig_bi, 34);
3384
3385         for (i = 0; i < 8; i++)
3386                 sig_bi[34 + i] = crc8[i];
3387
3388         /*Tail*/
3389         for (i = 42; i < 48; i++)
3390                 sig_bi[i] = 0;
3391
3392         _rtw_memset(pPMacTxInfo->HT_SIG, 0, 6);
3393         ByteToBit(pPMacTxInfo->HT_SIG, sig_bi, 6);
3394 }
3395
3396
3397 /*======================================================================================
3398         VHT-SIG-A1
3399         BW      Reserved        STBC    G_ID    SU_Nsts P_AID   TXOP_PS_NOT_ALLOW       Reserved
3400         2b      1b                      1b              6b      3b      9b              1b              2b                                      1b
3401         VHT-SIG-A2
3402         SGI     SGI_Nsym        SU/MU coding    LDPC_Extra      SU_NCS  Beamformed      Reserved        CRC     Tail
3403         1b      1b                      1b                              1b                      4b              1b                      1b                      8b      6b
3404 ======================================================================================*/
3405 void VHT_SIG_A_generator(
3406         PRT_PMAC_TX_INFO        pPMacTxInfo,
3407         PRT_PMAC_PKT_INFO       pPMacPktInfo)
3408 {
3409         UINT i;
3410         bool sig_bi[48], crc8[8];
3411
3412         _rtw_memset(sig_bi, 0, 48);
3413         _rtw_memset(crc8, 0, 8);
3414
3415         /*      BW Setting*/
3416         for (i = 0; i < 2; i++)
3417                 sig_bi[i] = (pPMacTxInfo->BandWidth >> i) & 0x1;
3418         /* Reserved Bit*/
3419         sig_bi[2] = 1;
3420         /*STBC Field*/
3421         sig_bi[3] = pPMacTxInfo->bSTBC;
3422         /*Group ID: Single User->A value of 0 or 63 indicates an SU PPDU. */
3423         for (i = 0; i < 6; i++)
3424                 sig_bi[4 + i] = 0;
3425         /*      N_STS/Partial AID*/
3426         for (i = 0; i < 12; i++) {
3427                 if (i < 3)
3428                         sig_bi[10 + i] = ((pPMacPktInfo->Nsts - 1) >> i) & 0x1;
3429                 else
3430                         sig_bi[10 + i] = 0;
3431         }
3432         /*TXOP_PS_NOT_ALLPWED*/
3433         sig_bi[22]      = 0;
3434         /*Reserved Bits*/
3435         sig_bi[23]      = 1;
3436         /*Short GI*/
3437         sig_bi[24] = pPMacTxInfo->bSGI;
3438         if (pPMacTxInfo->bSGI > 0 && (pPMacPktInfo->N_sym % 10) == 9)
3439                 sig_bi[25] = 1;
3440         else
3441                 sig_bi[25] = 0;
3442         /* SU/MU[0] Coding*/
3443         sig_bi[26] = pPMacTxInfo->bLDPC;        /*      0:BCC, 1:LDPC           */
3444         sig_bi[27] = pPMacPktInfo->SIGA2B3;     /*/     Record Extra OFDM Symols is added or not when LDPC is used*/
3445         /*SU MCS/MU[1-3] Coding*/
3446         for (i = 0; i < 4; i++)
3447                 sig_bi[28 + i] = (pPMacPktInfo->MCS >> i) & 0x1;
3448         /*SU Beamform */
3449         sig_bi[32] = 0; /*packet.TXBF_en;*/
3450         /*Reserved Bit*/
3451         sig_bi[33] = 1;
3452         /*CRC-8*/
3453         CRC8_generator(crc8, sig_bi, 34);
3454         for (i = 0; i < 8; i++)
3455                 sig_bi[34 + i]  = crc8[i];
3456         /*Tail*/
3457         for (i = 42; i < 48; i++)
3458                 sig_bi[i] = 0;
3459
3460         _rtw_memset(pPMacTxInfo->VHT_SIG_A, 0, 6);
3461         ByteToBit(pPMacTxInfo->VHT_SIG_A, sig_bi, 6);
3462 }
3463
3464 /*======================================================================================
3465         VHT-SIG-B
3466         Length                          Resesrved       Trail
3467         17/19/21 BIT            3/2/2 BIT       6b
3468 ======================================================================================*/
3469 void VHT_SIG_B_generator(
3470         PRT_PMAC_TX_INFO        pPMacTxInfo)
3471 {
3472         bool sig_bi[32], crc8_bi[8];
3473         UINT i, len, res, tail = 6, total_len, crc8_in_len;
3474         UINT sigb_len;
3475
3476         _rtw_memset(sig_bi, 0, 32);
3477         _rtw_memset(crc8_bi, 0, 8);
3478
3479         /*Sounding Packet*/
3480         if (pPMacTxInfo->NDP_sound == 1) {
3481                 if (pPMacTxInfo->BandWidth == 0) {
3482                         bool sigb_temp[26] = {0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0};
3483
3484                         _rtw_memcpy(sig_bi, sigb_temp, 26);
3485                 } else if (pPMacTxInfo->BandWidth == 1) {
3486                         bool sigb_temp[27] = {1, 0, 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0};
3487
3488                         _rtw_memcpy(sig_bi, sigb_temp, 27);
3489                 } else if (pPMacTxInfo->BandWidth == 2) {
3490                         bool sigb_temp[29] = {0, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0};
3491
3492                         _rtw_memcpy(sig_bi, sigb_temp, 29);
3493                 }
3494         } else {        /* Not NDP Sounding*/
3495                 bool *sigb_temp[29] = {0};
3496
3497                 if (pPMacTxInfo->BandWidth == 0) {
3498                         len = 17;
3499                         res = 3;
3500                 } else if (pPMacTxInfo->BandWidth == 1) {
3501                         len = 19;
3502                         res = 2;
3503                 } else if (pPMacTxInfo->BandWidth == 2) {
3504                         len     = 21;
3505                         res     = 2;
3506                 } else {
3507                         len     = 21;
3508                         res     = 2;
3509                 }
3510                 total_len = len + res + tail;
3511                 crc8_in_len = len + res;
3512
3513                 /*Length Field*/
3514                 sigb_len = (pPMacTxInfo->PacketLength + 3) >> 2;
3515
3516                 for (i = 0; i < len; i++)
3517                         sig_bi[i] = (sigb_len >> i) & 0x1;
3518                 /*Reserved Field*/
3519                 for (i = 0; i < res; i++)
3520                         sig_bi[len + i] = 1;
3521                 /* CRC-8*/
3522                 CRC8_generator(crc8_bi, sig_bi, crc8_in_len);
3523
3524                 /* Tail */
3525                 for (i = 0; i < tail; i++)
3526                         sig_bi[len + res + i] = 0;
3527         }
3528
3529         _rtw_memset(pPMacTxInfo->VHT_SIG_B, 0, 4);
3530         ByteToBit(pPMacTxInfo->VHT_SIG_B, sig_bi, 4);
3531
3532         pPMacTxInfo->VHT_SIG_B_CRC = 0;
3533         ByteToBit(&(pPMacTxInfo->VHT_SIG_B_CRC), crc8_bi, 1);
3534 }
3535
3536 /*=======================
3537  VHT Delimiter
3538 =======================*/
3539 void VHT_Delimiter_generator(
3540         PRT_PMAC_TX_INFO        pPMacTxInfo
3541 )
3542 {
3543         bool sig_bi[32] = {0}, crc8[8] = {0};
3544         UINT crc8_in_len = 16;
3545         UINT PacketLength = pPMacTxInfo->PacketLength;
3546         int j;
3547
3548         /* Delimiter[0]: EOF*/
3549         sig_bi[0] = 1;
3550         /* Delimiter[1]: Reserved*/
3551         sig_bi[1] = 0;
3552         /* Delimiter[3:2]: MPDU Length High*/
3553         sig_bi[2] = ((PacketLength - 4) >> 12) % 2;
3554         sig_bi[3] = ((PacketLength - 4) >> 13) % 2;
3555         /* Delimiter[15:4]: MPDU Length Low*/
3556         for (j = 4; j < 16; j++)
3557                 sig_bi[j] = ((PacketLength - 4) >> (j - 4)) % 2;
3558         CRC8_generator(crc8, sig_bi, crc8_in_len);
3559         for (j = 16; j < 24; j++) /* Delimiter[23:16]: CRC 8*/
3560                 sig_bi[j] = crc8[j - 16];
3561         for (j = 24; j < 32; j++) /* Delimiter[31:24]: Signature ('4E' in Hex, 78 in Dec)*/
3562                 sig_bi[j]       = (78 >> (j - 24)) % 2;
3563
3564         _rtw_memset(pPMacTxInfo->VHT_Delimiter, 0, 4);
3565         ByteToBit(pPMacTxInfo->VHT_Delimiter, sig_bi, 4);
3566 }
3567
3568 #endif
3569 #endif