drivers/net/wireless/rockchip_wlan/rtl8723cs/hal/btc/halbtc8192e2ant.c

   1 /* ************************************************************
   2  * Description:
   3  *
   4  * This file is for RTL8192E Co-exist mechanism
   5  *
   6  * History
   7  * 2012/11/15 Cosa first check in.
   8  *
   9  * ************************************************************ */
  10
  11 /* ************************************************************
  12  * include files
  13  * ************************************************************ */
  14 #include "mp_precomp.h"
  15
  16
  17 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
  18
  19 #if (RTL8192E_SUPPORT == 1)
  20 /* ************************************************************
  21  * Global variables, these are static variables
  22  * ************************************************************ */
  23 static u8        *trace_buf = &gl_btc_trace_buf[0];
  24 static struct  coex_dm_8192e_2ant               glcoex_dm_8192e_2ant;
  25 static struct  coex_dm_8192e_2ant       *coex_dm = &glcoex_dm_8192e_2ant;
  26 static struct  coex_sta_8192e_2ant              glcoex_sta_8192e_2ant;
  27 static struct  coex_sta_8192e_2ant      *coex_sta = &glcoex_sta_8192e_2ant;
  28
  29 const char *const glbt_info_src_8192e_2ant[] = {
  30         "BT Info[wifi fw]",
  31         "BT Info[bt rsp]",
  32         "BT Info[bt auto report]",
  33 };
  34 /* ************************************************************
  35  * BtCoex Version Format:
  36  * 1. date :                    glcoex_ver_date_XXXXX_1ant
  37  * 2. WifiCoexVersion : glcoex_ver_XXXX_1ant
  38  * 3. BtCoexVersion :   glcoex_ver_btdesired_XXXXX_1ant
  39  * 4. others :                  glcoex_ver_XXXXXX_XXXXX_1ant
  40  *
  41  * Variable should be indicated IC and Antenna numbers !!!
  42  * Please strictly follow this order and naming style !!!
  43  *
  44  * ************************************************************ */
  45 u32     glcoex_ver_date_8192e_2ant = 20160818;
  46 u32     glcoex_ver_8192e_2ant = 0x44;
  47 u32     glcoex_ver_btdesired_8192e_2ant = 0x44;
  48 /*1. add coex. log for wifi/BT coex. version*/
  49 /* ************************************************************
  50  * local function proto type if needed
  51  * ************************************************************
  52  * ************************************************************
  53  * local function start with halbtc8192e2ant_
  54  * ************************************************************ */
  55 u8 halbtc8192e2ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1)
  56 {
  57         s32                     bt_rssi = 0;
  58         u8                      bt_rssi_state = coex_sta->pre_bt_rssi_state;
  59
  60         bt_rssi = coex_sta->bt_rssi;
  61
  62         if (level_num == 2) {
  63                 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  64                     (coex_sta->pre_bt_rssi_state ==
  65                      BTC_RSSI_STATE_STAY_LOW)) {
  66                         if (bt_rssi >= (rssi_thresh +
  67                                         BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  68                                 bt_rssi_state = BTC_RSSI_STATE_HIGH;
  69                         else
  70                                 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  71                 } else {
  72                         if (bt_rssi < rssi_thresh)
  73                                 bt_rssi_state = BTC_RSSI_STATE_LOW;
  74                         else
  75                                 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  76                 }
  77         } else if (level_num == 3) {
  78                 if (rssi_thresh > rssi_thresh1) {
  79                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  80                                     "[BTCoex], BT Rssi thresh error!!\n");
  81                         BTC_TRACE(trace_buf);
  82                         return coex_sta->pre_bt_rssi_state;
  83                 }
  84
  85                 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  86                     (coex_sta->pre_bt_rssi_state ==
  87                      BTC_RSSI_STATE_STAY_LOW)) {
  88                         if (bt_rssi >= (rssi_thresh +
  89                                         BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  90                                 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  91                         else
  92                                 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  93                 } else if ((coex_sta->pre_bt_rssi_state ==
  94                             BTC_RSSI_STATE_MEDIUM) ||
  95                            (coex_sta->pre_bt_rssi_state ==
  96                             BTC_RSSI_STATE_STAY_MEDIUM)) {
  97                         if (bt_rssi >= (rssi_thresh1 +
  98                                         BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  99                                 bt_rssi_state = BTC_RSSI_STATE_HIGH;
 100                         else if (bt_rssi < rssi_thresh)
 101                                 bt_rssi_state = BTC_RSSI_STATE_LOW;
 102                         else
 103                                 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
 104                 } else {
 105                         if (bt_rssi < rssi_thresh1)
 106                                 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
 107                         else
 108                                 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
 109                 }
 110         }
 111
 112         coex_sta->pre_bt_rssi_state = bt_rssi_state;
 113
 114         return bt_rssi_state;
 115 }
 116
 117 u8 halbtc8192e2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
 118            IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1)
 119 {
 120         s32                     wifi_rssi = 0;
 121         u8                      wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
 122
 123         btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
 124
 125         if (level_num == 2) {
 126                 if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
 127                     ||
 128                     (coex_sta->pre_wifi_rssi_state[index] ==
 129                      BTC_RSSI_STATE_STAY_LOW)) {
 130                         if (wifi_rssi >= (rssi_thresh +
 131                                           BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
 132                                 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
 133                         else
 134                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
 135                 } else {
 136                         if (wifi_rssi < rssi_thresh)
 137                                 wifi_rssi_state = BTC_RSSI_STATE_LOW;
 138                         else
 139                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
 140                 }
 141         } else if (level_num == 3) {
 142                 if (rssi_thresh > rssi_thresh1) {
 143                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 144                                     "[BTCoex], wifi RSSI thresh error!!\n");
 145                         BTC_TRACE(trace_buf);
 146                         return coex_sta->pre_wifi_rssi_state[index];
 147                 }
 148
 149                 if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
 150                     ||
 151                     (coex_sta->pre_wifi_rssi_state[index] ==
 152                      BTC_RSSI_STATE_STAY_LOW)) {
 153                         if (wifi_rssi >= (rssi_thresh +
 154                                           BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
 155                                 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
 156                         else
 157                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
 158                 } else if ((coex_sta->pre_wifi_rssi_state[index] ==
 159                             BTC_RSSI_STATE_MEDIUM) ||
 160                            (coex_sta->pre_wifi_rssi_state[index] ==
 161                             BTC_RSSI_STATE_STAY_MEDIUM)) {
 162                         if (wifi_rssi >= (rssi_thresh1 +
 163                                           BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
 164                                 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
 165                         else if (wifi_rssi < rssi_thresh)
 166                                 wifi_rssi_state = BTC_RSSI_STATE_LOW;
 167                         else
 168                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
 169                 } else {
 170                         if (wifi_rssi < rssi_thresh1)
 171                                 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
 172                         else
 173                                 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
 174                 }
 175         }
 176
 177         coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state;
 178
 179         return wifi_rssi_state;
 180 }
 181
 182 void halbtc8192e2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
 183 {
 184         static u32      bt_disable_cnt = 0;
 185         boolean                 bt_active = true, bt_disabled = false;
 186
 187         /* This function check if bt is disabled */
 188
 189         if (coex_sta->high_priority_tx == 0 &&
 190             coex_sta->high_priority_rx == 0 &&
 191             coex_sta->low_priority_tx == 0 &&
 192             coex_sta->low_priority_rx == 0)
 193                 bt_active = false;
 194         if (coex_sta->high_priority_tx == 0xffff &&
 195             coex_sta->high_priority_rx == 0xffff &&
 196             coex_sta->low_priority_tx == 0xffff &&
 197             coex_sta->low_priority_rx == 0xffff)
 198                 bt_active = false;
 199         if (bt_active) {
 200                 bt_disable_cnt = 0;
 201                 bt_disabled = false;
 202                 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 203                                    &bt_disabled);
 204                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 205                             "[BTCoex], BT is enabled !!\n");
 206                 BTC_TRACE(trace_buf);
 207         } else {
 208                 bt_disable_cnt++;
 209                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 210                             "[BTCoex], bt all counters=0, %d times!!\n",
 211                             bt_disable_cnt);
 212                 BTC_TRACE(trace_buf);
 213                 if (bt_disable_cnt >= 2) {
 214                         bt_disabled = true;
 215                         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
 216                                            &bt_disabled);
 217                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 218                                     "[BTCoex], BT is disabled !!\n");
 219                         BTC_TRACE(trace_buf);
 220                 }
 221         }
 222         if (coex_sta->bt_disabled != bt_disabled) {
 223                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 224                             "[BTCoex], BT is from %s to %s!!\n",
 225                             (coex_sta->bt_disabled ? "disabled" : "enabled"),
 226                             (bt_disabled ? "disabled" : "enabled"));
 227                 BTC_TRACE(trace_buf);
 228                 coex_sta->bt_disabled = bt_disabled;
 229                 /* if (!bt_disabled) {
 230                 } else {
 231                 } */
 232         }
 233 }
 234
 235 u32 halbtc8192e2ant_decide_ra_mask(IN struct btc_coexist *btcoexist,
 236                                    IN u8 ss_type, IN u32 ra_mask_type)
 237 {
 238         u32     dis_ra_mask = 0x0;
 239
 240         switch (ra_mask_type) {
 241         case 0: /* normal mode */
 242                 if (ss_type == 2)
 243                         dis_ra_mask = 0x0;                      /* enable 2ss */
 244                 else
 245                         dis_ra_mask = 0xfff00000;               /* disable 2ss */
 246                 break;
 247         case 1: /* disable cck 1/2 */
 248                 if (ss_type == 2)
 249                         dis_ra_mask = 0x00000003;               /* enable 2ss */
 250                 else
 251                         dis_ra_mask = 0xfff00003;               /* disable 2ss */
 252                 break;
 253         case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
 254                 if (ss_type == 2)
 255                         dis_ra_mask = 0x0001f1f7;               /* enable 2ss */
 256                 else
 257                         dis_ra_mask = 0xfff1f1f7;               /* disable 2ss */
 258                 break;
 259         default:
 260                 break;
 261         }
 262
 263         return dis_ra_mask;
 264 }
 265
 266 void halbtc8192e2ant_update_ra_mask(IN struct btc_coexist *btcoexist,
 267                                     IN boolean force_exec, IN u32 dis_rate_mask)
 268 {
 269         coex_dm->cur_ra_mask = dis_rate_mask;
 270
 271         if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask))
 272                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK,
 273                                    &coex_dm->cur_ra_mask);
 274         coex_dm->pre_ra_mask = coex_dm->cur_ra_mask;
 275 }
 276
 277 void halbtc8192e2ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist,
 278                 IN boolean force_exec, IN u8 type)
 279 {
 280         boolean wifi_under_b_mode = false;
 281
 282         coex_dm->cur_arfr_type = type;
 283
 284         if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) {
 285                 switch (coex_dm->cur_arfr_type) {
 286                 case 0: /* normal mode */
 287                         btcoexist->btc_write_4byte(btcoexist, 0x430,
 288                                                    coex_dm->backup_arfr_cnt1);
 289                         btcoexist->btc_write_4byte(btcoexist, 0x434,
 290                                                    coex_dm->backup_arfr_cnt2);
 291                         break;
 292                 case 1:
 293                         btcoexist->btc_get(btcoexist,
 294                                            BTC_GET_BL_WIFI_UNDER_B_MODE,
 295                                            &wifi_under_b_mode);
 296                         if (wifi_under_b_mode) {
 297                                 btcoexist->btc_write_4byte(btcoexist,
 298                                                            0x430, 0x0);
 299                                 btcoexist->btc_write_4byte(btcoexist,
 300                                                            0x434, 0x01010101);
 301                         } else {
 302                                 btcoexist->btc_write_4byte(btcoexist,
 303                                                            0x430, 0x0);
 304                                 btcoexist->btc_write_4byte(btcoexist,
 305                                                            0x434, 0x04030201);
 306                         }
 307                         break;
 308                 default:
 309                         break;
 310                 }
 311         }
 312
 313         coex_dm->pre_arfr_type = coex_dm->cur_arfr_type;
 314 }
 315
 316 void halbtc8192e2ant_retry_limit(IN struct btc_coexist *btcoexist,
 317                                  IN boolean force_exec, IN u8 type)
 318 {
 319         coex_dm->cur_retry_limit_type = type;
 320
 321         if (force_exec ||
 322             (coex_dm->pre_retry_limit_type !=
 323              coex_dm->cur_retry_limit_type)) {
 324                 switch (coex_dm->cur_retry_limit_type) {
 325                 case 0: /* normal mode */
 326                         btcoexist->btc_write_2byte(btcoexist, 0x42a,
 327                                                    coex_dm->backup_retry_limit);
 328                         break;
 329                 case 1: /* retry limit=8 */
 330                         btcoexist->btc_write_2byte(btcoexist, 0x42a,
 331                                                    0x0808);
 332                         break;
 333                 default:
 334                         break;
 335                 }
 336         }
 337
 338         coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type;
 339 }
 340
 341 void halbtc8192e2ant_ampdu_max_time(IN struct btc_coexist *btcoexist,
 342                                     IN boolean force_exec, IN u8 type)
 343 {
 344         coex_dm->cur_ampdu_time_type = type;
 345
 346         if (force_exec ||
 347             (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) {
 348                 switch (coex_dm->cur_ampdu_time_type) {
 349                 case 0: /* normal mode */
 350                         btcoexist->btc_write_1byte(btcoexist, 0x456,
 351                                            coex_dm->backup_ampdu_max_time);
 352                         break;
 353                 case 1: /* AMPDU timw = 0x38 * 32us */
 354                         btcoexist->btc_write_1byte(btcoexist, 0x456,
 355                                                    0x38);
 356                         break;
 357                 default:
 358                         break;
 359                 }
 360         }
 361
 362         coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type;
 363 }
 364
 365 void halbtc8192e2ant_limited_tx(IN struct btc_coexist *btcoexist,
 366                 IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type,
 367                                 IN u8 retry_limit_type, IN u8 ampdu_time_type)
 368 {
 369         u32     dis_ra_mask = 0x0;
 370
 371         coex_dm->cur_ra_mask_type = ra_mask_type;
 372         dis_ra_mask = halbtc8192e2ant_decide_ra_mask(btcoexist,
 373                         coex_dm->cur_ss_type, ra_mask_type);
 374         halbtc8192e2ant_update_ra_mask(btcoexist, force_exec, dis_ra_mask);
 375
 376         halbtc8192e2ant_auto_rate_fallback_retry(btcoexist, force_exec,
 377                         arfr_type);
 378         halbtc8192e2ant_retry_limit(btcoexist, force_exec, retry_limit_type);
 379         halbtc8192e2ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type);
 380 }
 381
 382 void halbtc8192e2ant_limited_rx(IN struct btc_coexist *btcoexist,
 383                         IN boolean force_exec, IN boolean rej_ap_agg_pkt,
 384                         IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
 385 {
 386         boolean reject_rx_agg = rej_ap_agg_pkt;
 387         boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
 388         u8      rx_agg_size = agg_buf_size;
 389
 390         /* ============================================ */
 391         /*      Rx Aggregation related setting */
 392         /* ============================================ */
 393         btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
 394                            &reject_rx_agg);
 395         /* decide BT control aggregation buf size or not */
 396         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
 397                            &bt_ctrl_rx_agg_size);
 398         /* aggregation buf size, only work when BT control Rx aggregation size. */
 399         btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
 400         /* real update aggregation setting */
 401         btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
 402
 403
 404 }
 405
 406 void halbtc8192e2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
 407 {
 408         u32                     reg_hp_txrx, reg_lp_txrx, u32tmp;
 409         u32                     reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
 410
 411         reg_hp_txrx = 0x770;
 412         reg_lp_txrx = 0x774;
 413
 414         u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
 415         reg_hp_tx = u32tmp & MASKLWORD;
 416         reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
 417
 418         u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
 419         reg_lp_tx = u32tmp & MASKLWORD;
 420         reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
 421
 422         coex_sta->high_priority_tx = reg_hp_tx;
 423         coex_sta->high_priority_rx = reg_hp_rx;
 424         coex_sta->low_priority_tx = reg_lp_tx;
 425         coex_sta->low_priority_rx = reg_lp_rx;
 426
 427         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 428                 "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
 429                     reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
 430         BTC_TRACE(trace_buf);
 431         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 432                 "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
 433                     reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
 434         BTC_TRACE(trace_buf);
 435
 436         /* reset counter */
 437         btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
 438 }
 439
 440
 441 void halbtc8192e2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
 442 {
 443 #if 1
 444
 445         coex_sta->crc_ok_cck =
 446                 btcoexist->btc_phydm_query_PHY_counter(
 447                         btcoexist,
 448                         PHYDM_INFO_CRC32_OK_CCK);
 449         coex_sta->crc_ok_11g =
 450                 btcoexist->btc_phydm_query_PHY_counter(
 451                         btcoexist,
 452                         PHYDM_INFO_CRC32_OK_LEGACY);
 453         coex_sta->crc_ok_11n =
 454                 btcoexist->btc_phydm_query_PHY_counter(
 455                         btcoexist,
 456                         PHYDM_INFO_CRC32_OK_HT);
 457         coex_sta->crc_ok_11n_vht =
 458                 btcoexist->btc_phydm_query_PHY_counter(
 459                         btcoexist,
 460                         PHYDM_INFO_CRC32_OK_VHT);
 461
 462         coex_sta->crc_err_cck =
 463                 btcoexist->btc_phydm_query_PHY_counter(
 464                         btcoexist,
 465                         PHYDM_INFO_CRC32_ERROR_CCK);
 466         coex_sta->crc_err_11g =
 467                 btcoexist->btc_phydm_query_PHY_counter(
 468                         btcoexist,
 469                         PHYDM_INFO_CRC32_ERROR_LEGACY);
 470         coex_sta->crc_err_11n =
 471                 btcoexist->btc_phydm_query_PHY_counter(
 472                         btcoexist,
 473                         PHYDM_INFO_CRC32_ERROR_HT);
 474         coex_sta->crc_err_11n_vht =
 475                 btcoexist->btc_phydm_query_PHY_counter(
 476                         btcoexist,
 477                         PHYDM_INFO_CRC32_ERROR_VHT);
 478 #endif
 479 }
 480
 481
 482
 483 void halbtc8192e2ant_query_bt_info(IN struct btc_coexist *btcoexist)
 484 {
 485         u8                      h2c_parameter[1] = {0};
 486
 487         coex_sta->c2h_bt_info_req_sent = true;
 488
 489         h2c_parameter[0] |= BIT(0);     /* trigger */
 490
 491         btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
 492
 493         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 494                     "[BTCoex],Query BT info!!!! H2C 0x61 = 0x1\n");
 495         BTC_TRACE(trace_buf);
 496 }
 497
 498 boolean halbtc8192e2ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
 499 {
 500         static boolean  pre_wifi_busy = false, pre_under_4way = false,
 501                         pre_bt_hs_on = false;
 502         boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
 503         boolean wifi_connected = false;
 504         u8      wifi_rssi_state = BTC_RSSI_STATE_HIGH;
 505
 506
 507         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
 508                            &wifi_connected);
 509         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
 510         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 511         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
 512                            &under_4way);
 513
 514         if (wifi_connected) {
 515                 if (wifi_busy != pre_wifi_busy) {
 516                         pre_wifi_busy = wifi_busy;
 517                         return true;
 518                 }
 519                 if (under_4way != pre_under_4way) {
 520                         pre_under_4way = under_4way;
 521                         return true;
 522                 }
 523                 if (bt_hs_on != pre_bt_hs_on) {
 524                         pre_bt_hs_on = bt_hs_on;
 525                         return true;
 526                 }
 527
 528                 wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0,
 529                                   2, 34, 0);
 530
 531                 if ((BTC_RSSI_STATE_HIGH == wifi_rssi_state) ||
 532                     (BTC_RSSI_STATE_LOW == wifi_rssi_state))
 533                         return true;
 534         }
 535
 536         return false;
 537 }
 538
 539 void halbtc8192e2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
 540 {
 541         struct  btc_bt_link_info        *bt_link_info = &btcoexist->bt_link_info;
 542         boolean                         bt_hs_on = false;
 543
 544         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 545
 546         bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
 547         bt_link_info->sco_exist = coex_sta->sco_exist;
 548         bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
 549         bt_link_info->pan_exist = coex_sta->pan_exist;
 550         bt_link_info->hid_exist = coex_sta->hid_exist;
 551
 552         /* work around for HS mode. */
 553         if (bt_hs_on) {
 554                 bt_link_info->pan_exist = true;
 555                 bt_link_info->bt_link_exist = true;
 556         }
 557
 558         /* check if Sco only */
 559         if (bt_link_info->sco_exist &&
 560             !bt_link_info->a2dp_exist &&
 561             !bt_link_info->pan_exist &&
 562             !bt_link_info->hid_exist)
 563                 bt_link_info->sco_only = true;
 564         else
 565                 bt_link_info->sco_only = false;
 566
 567         /* check if A2dp only */
 568         if (!bt_link_info->sco_exist &&
 569             bt_link_info->a2dp_exist &&
 570             !bt_link_info->pan_exist &&
 571             !bt_link_info->hid_exist)
 572                 bt_link_info->a2dp_only = true;
 573         else
 574                 bt_link_info->a2dp_only = false;
 575
 576         /* check if Pan only */
 577         if (!bt_link_info->sco_exist &&
 578             !bt_link_info->a2dp_exist &&
 579             bt_link_info->pan_exist &&
 580             !bt_link_info->hid_exist)
 581                 bt_link_info->pan_only = true;
 582         else
 583                 bt_link_info->pan_only = false;
 584
 585         /* check if Hid only */
 586         if (!bt_link_info->sco_exist &&
 587             !bt_link_info->a2dp_exist &&
 588             !bt_link_info->pan_exist &&
 589             bt_link_info->hid_exist)
 590                 bt_link_info->hid_only = true;
 591         else
 592                 bt_link_info->hid_only = false;
 593 }
 594
 595 u8 halbtc8192e2ant_action_algorithm(IN struct btc_coexist *btcoexist)
 596 {
 597         struct  btc_bt_link_info        *bt_link_info = &btcoexist->bt_link_info;
 598         struct  btc_stack_info  *stack_info = &btcoexist->stack_info;
 599         boolean                         bt_hs_on = false;
 600         u8                              algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
 601         u8                              num_of_diff_profile = 0;
 602
 603         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
 604
 605         if (!bt_link_info->bt_link_exist) {
 606                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 607                             "[BTCoex], No BT link exists!!!\n");
 608                 BTC_TRACE(trace_buf);
 609                 return algorithm;
 610         }
 611
 612         if (bt_link_info->sco_exist)
 613                 num_of_diff_profile++;
 614         if (bt_link_info->hid_exist)
 615                 num_of_diff_profile++;
 616         if (bt_link_info->pan_exist)
 617                 num_of_diff_profile++;
 618         if (bt_link_info->a2dp_exist)
 619                 num_of_diff_profile++;
 620
 621         if (num_of_diff_profile == 1) {
 622                 if (bt_link_info->sco_exist) {
 623                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 624                                     "[BTCoex], SCO only\n");
 625                         BTC_TRACE(trace_buf);
 626                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 627                 } else {
 628                         if (bt_link_info->hid_exist) {
 629                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 630                                             "[BTCoex], HID only\n");
 631                                 BTC_TRACE(trace_buf);
 632                                 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
 633                         } else if (bt_link_info->a2dp_exist) {
 634                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 635                                             "[BTCoex], A2DP only\n");
 636                                 BTC_TRACE(trace_buf);
 637                                 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
 638                         } else if (bt_link_info->pan_exist) {
 639                                 if (bt_hs_on) {
 640                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 641                                                     "[BTCoex], PAN(HS) only\n");
 642                                         BTC_TRACE(trace_buf);
 643                                         algorithm =
 644                                                 BT_8192E_2ANT_COEX_ALGO_PANHS;
 645                                 } else {
 646                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 647                                                 "[BTCoex], PAN(EDR) only\n");
 648                                         BTC_TRACE(trace_buf);
 649                                         algorithm =
 650                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR;
 651                                 }
 652                         }
 653                 }
 654         } else if (num_of_diff_profile == 2) {
 655                 if (bt_link_info->sco_exist) {
 656                         if (bt_link_info->hid_exist) {
 657                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 658                                             "[BTCoex], SCO + HID\n");
 659                                 BTC_TRACE(trace_buf);
 660                                 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 661                         } else if (bt_link_info->a2dp_exist) {
 662                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 663                                             "[BTCoex], SCO + A2DP ==> SCO\n");
 664                                 BTC_TRACE(trace_buf);
 665                                 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 666                         } else if (bt_link_info->pan_exist) {
 667                                 if (bt_hs_on) {
 668                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 669                                                 "[BTCoex], SCO + PAN(HS)\n");
 670                                         BTC_TRACE(trace_buf);
 671                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 672                                 } else {
 673                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 674                                                 "[BTCoex], SCO + PAN(EDR)\n");
 675                                         BTC_TRACE(trace_buf);
 676                                         algorithm =
 677                                                 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
 678                                 }
 679                         }
 680                 } else {
 681                         if (bt_link_info->hid_exist &&
 682                             bt_link_info->a2dp_exist) {
 683                                 if (stack_info->num_of_hid >= 2) {
 684                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 685                                                     "[BTCoex], HID*2 + A2DP\n");
 686                                         BTC_TRACE(trace_buf);
 687                                         algorithm =
 688                                                 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 689                                 } else {
 690                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 691                                                     "[BTCoex], HID + A2DP\n");
 692                                         BTC_TRACE(trace_buf);
 693                                         algorithm =
 694                                                 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
 695                                 }
 696                         } else if (bt_link_info->hid_exist &&
 697                                    bt_link_info->pan_exist) {
 698                                 if (bt_hs_on) {
 699                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 700                                                 "[BTCoex], HID + PAN(HS)\n");
 701                                         BTC_TRACE(trace_buf);
 702                                         algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
 703                                 } else {
 704                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 705                                                 "[BTCoex], HID + PAN(EDR)\n");
 706                                         BTC_TRACE(trace_buf);
 707                                         algorithm =
 708                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 709                                 }
 710                         } else if (bt_link_info->pan_exist &&
 711                                    bt_link_info->a2dp_exist) {
 712                                 if (bt_hs_on) {
 713                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 714                                                 "[BTCoex], A2DP + PAN(HS)\n");
 715                                         BTC_TRACE(trace_buf);
 716                                         algorithm =
 717                                                 BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
 718                                 } else {
 719                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 720                                                 "[BTCoex], A2DP + PAN(EDR)\n");
 721                                         BTC_TRACE(trace_buf);
 722                                         algorithm =
 723                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
 724                                 }
 725                         }
 726                 }
 727         } else if (num_of_diff_profile == 3) {
 728                 if (bt_link_info->sco_exist) {
 729                         if (bt_link_info->hid_exist &&
 730                             bt_link_info->a2dp_exist) {
 731                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 732                                         "[BTCoex], SCO + HID + A2DP ==> HID\n");
 733                                 BTC_TRACE(trace_buf);
 734                                 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 735                         } else if (bt_link_info->hid_exist &&
 736                                    bt_link_info->pan_exist) {
 737                                 if (bt_hs_on) {
 738                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 739                                                 "[BTCoex], SCO + HID + PAN(HS)\n");
 740                                         BTC_TRACE(trace_buf);
 741                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 742                                 } else {
 743                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 744                                                 "[BTCoex], SCO + HID + PAN(EDR)\n");
 745                                         BTC_TRACE(trace_buf);
 746                                         algorithm =
 747                                                 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
 748                                 }
 749                         } else if (bt_link_info->pan_exist &&
 750                                    bt_link_info->a2dp_exist) {
 751                                 if (bt_hs_on) {
 752                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 753                                                 "[BTCoex], SCO + A2DP + PAN(HS)\n");
 754                                         BTC_TRACE(trace_buf);
 755                                         algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
 756                                 } else {
 757                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 758                                                 "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n");
 759                                         BTC_TRACE(trace_buf);
 760                                         algorithm =
 761                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 762                                 }
 763                         }
 764                 } else {
 765                         if (bt_link_info->hid_exist &&
 766                             bt_link_info->pan_exist &&
 767                             bt_link_info->a2dp_exist) {
 768                                 if (bt_hs_on) {
 769                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 770                                                 "[BTCoex], HID + A2DP + PAN(HS)\n");
 771                                         BTC_TRACE(trace_buf);
 772                                         algorithm =
 773                                                 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
 774                                 } else {
 775                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 776                                                 "[BTCoex], HID + A2DP + PAN(EDR)\n");
 777                                         BTC_TRACE(trace_buf);
 778                                         algorithm =
 779                                                 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
 780                                 }
 781                         }
 782                 }
 783         } else if (num_of_diff_profile >= 3) {
 784                 if (bt_link_info->sco_exist) {
 785                         if (bt_link_info->hid_exist &&
 786                             bt_link_info->pan_exist &&
 787                             bt_link_info->a2dp_exist) {
 788                                 if (bt_hs_on) {
 789                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 790                                                 "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n");
 791                                         BTC_TRACE(trace_buf);
 792                                 } else {
 793                                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 794                                                 "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
 795                                         BTC_TRACE(trace_buf);
 796                                         algorithm =
 797                                                 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
 798                                 }
 799                         }
 800                 }
 801         }
 802
 803         return algorithm;
 804 }
 805
 806 void halbtc8192e2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
 807                 IN u8 dac_swing_lvl)
 808 {
 809         u8                      h2c_parameter[1] = {0};
 810
 811         /* There are several type of dacswing */
 812         /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
 813         h2c_parameter[0] = dac_swing_lvl;
 814
 815         btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
 816 }
 817
 818 void halbtc8192e2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
 819                                        IN u8 dec_bt_pwr_lvl)
 820 {
 821         u8                      h2c_parameter[1] = {0};
 822
 823         h2c_parameter[0] = dec_bt_pwr_lvl;
 824
 825         btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
 826 }
 827
 828 void halbtc8192e2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
 829                                 IN boolean force_exec, IN u8 dec_bt_pwr_lvl)
 830 {
 831         coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl;
 832
 833         if (!force_exec) {
 834 #if 0   /* work around, avoid h2c command fail. */
 835                 if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl)
 836                         return;
 837 #endif
 838         }
 839         halbtc8192e2ant_set_fw_dec_bt_pwr(btcoexist,
 840                                           coex_dm->cur_bt_dec_pwr_lvl);
 841
 842         coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl;
 843 }
 844
 845 void halbtc8192e2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
 846                                         IN boolean enable_auto_report)
 847 {
 848         u8                      h2c_parameter[1] = {0};
 849
 850         h2c_parameter[0] = 0;
 851
 852         if (enable_auto_report)
 853                 h2c_parameter[0] |= BIT(0);
 854
 855         btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
 856 }
 857
 858 void halbtc8192e2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
 859                     IN boolean force_exec, IN boolean enable_auto_report)
 860 {
 861         coex_dm->cur_bt_auto_report = enable_auto_report;
 862
 863         if (!force_exec) {
 864                 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
 865                         return;
 866         }
 867         halbtc8192e2ant_set_bt_auto_report(btcoexist,
 868                                            coex_dm->cur_bt_auto_report);
 869
 870         coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
 871 }
 872
 873 void halbtc8192e2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
 874                               IN boolean force_exec, IN u8 fw_dac_swing_lvl)
 875 {
 876         coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
 877
 878         if (!force_exec) {
 879                 if (coex_dm->pre_fw_dac_swing_lvl ==
 880                     coex_dm->cur_fw_dac_swing_lvl)
 881                         return;
 882         }
 883
 884         halbtc8192e2ant_set_fw_dac_swing_level(btcoexist,
 885                                                coex_dm->cur_fw_dac_swing_lvl);
 886
 887         coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
 888 }
 889
 890 void halbtc8192e2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist *btcoexist,
 891                 IN boolean rx_rf_shrink_on)
 892 {
 893         if (rx_rf_shrink_on) {
 894                 /* Shrink RF Rx LPF corner */
 895                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 896                             "[BTCoex], Shrink RF Rx LPF corner!!\n");
 897                 BTC_TRACE(trace_buf);
 898                 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff,
 899                                           0xffffc);
 900         } else {
 901                 /* Resume RF Rx LPF corner */
 902                 /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */
 903                 if (btcoexist->initilized) {
 904                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 905                                     "[BTCoex], Resume RF Rx LPF corner!!\n");
 906                         BTC_TRACE(trace_buf);
 907                         btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
 908                                           0xfffff, coex_dm->bt_rf_0x1e_backup);
 909                 }
 910         }
 911 }
 912
 913 void halbtc8192e2ant_rf_shrink(IN struct btc_coexist *btcoexist,
 914                        IN boolean force_exec, IN boolean rx_rf_shrink_on)
 915 {
 916         coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
 917
 918         if (!force_exec) {
 919                 if (coex_dm->pre_rf_rx_lpf_shrink ==
 920                     coex_dm->cur_rf_rx_lpf_shrink)
 921                         return;
 922         }
 923         halbtc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist,
 924                                                 coex_dm->cur_rf_rx_lpf_shrink);
 925
 926         coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
 927 }
 928
 929 void halbtc8192e2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist
 930                 *btcoexist, IN boolean low_penalty_ra)
 931 {
 932         u8                      h2c_parameter[6] = {0};
 933
 934         h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */
 935
 936         if (low_penalty_ra) {
 937                 h2c_parameter[1] |= BIT(0);
 938                 h2c_parameter[2] =
 939                         0x00;  /* normal rate except MCS7/6/5, OFDM54/48/36 */
 940                 h2c_parameter[3] = 0xf7;  /* MCS7 or OFDM54 */
 941                 h2c_parameter[4] = 0xf8;  /* MCS6 or OFDM48 */
 942                 h2c_parameter[5] = 0xf9;        /* MCS5 or OFDM36        */
 943         }
 944
 945         btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
 946 }
 947
 948 void halbtc8192e2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
 949                             IN boolean force_exec, IN boolean low_penalty_ra)
 950 {
 951         coex_dm->cur_low_penalty_ra = low_penalty_ra;
 952
 953         if (!force_exec) {
 954                 if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
 955                         return;
 956         }
 957         halbtc8192e2ant_set_sw_penalty_tx_rate_adaptive(btcoexist,
 958                         coex_dm->cur_low_penalty_ra);
 959
 960         coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
 961 }
 962
 963 void halbtc8192e2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist,
 964                                        IN u32 level)
 965 {
 966         u8      val = (u8)level;
 967
 968         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
 969                     "[BTCoex], Write SwDacSwing = 0x%x\n", level);
 970         BTC_TRACE(trace_buf);
 971         btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
 972 }
 973
 974 void halbtc8192e2ant_set_sw_full_time_dac_swing(IN struct btc_coexist
 975                 *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl)
 976 {
 977         if (sw_dac_swing_on)
 978                 halbtc8192e2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
 979         else
 980                 halbtc8192e2ant_set_dac_swing_reg(btcoexist, 0x18);
 981 }
 982
 983
 984 void halbtc8192e2ant_dac_swing(IN struct btc_coexist *btcoexist,
 985         IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl)
 986 {
 987         coex_dm->cur_dac_swing_on = dac_swing_on;
 988         coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
 989
 990         if (!force_exec) {
 991                 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
 992                     (coex_dm->pre_dac_swing_lvl ==
 993                      coex_dm->cur_dac_swing_lvl))
 994                         return;
 995         }
 996         delay_ms(30);
 997         halbtc8192e2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on,
 998                         dac_swing_lvl);
 999
1000         coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
1001         coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
1002 }
1003
1004 void halbtc8192e2ant_set_adc_back_off(IN struct btc_coexist *btcoexist,
1005                                       IN boolean adc_back_off)
1006 {
1007         if (adc_back_off) {
1008                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1009                             "[BTCoex], BB BackOff Level On!\n");
1010                 BTC_TRACE(trace_buf);
1011                 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x3);
1012         } else {
1013                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1014                             "[BTCoex], BB BackOff Level Off!\n");
1015                 BTC_TRACE(trace_buf);
1016                 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x1);
1017         }
1018 }
1019
1020 void halbtc8192e2ant_adc_back_off(IN struct btc_coexist *btcoexist,
1021                           IN boolean force_exec, IN boolean adc_back_off)
1022 {
1023         coex_dm->cur_adc_back_off = adc_back_off;
1024
1025         if (!force_exec) {
1026                 if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off)
1027                         return;
1028         }
1029         halbtc8192e2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off);
1030
1031         coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off;
1032 }
1033
1034 void halbtc8192e2ant_set_agc_table(IN struct btc_coexist *btcoexist,
1035                                    IN boolean agc_table_en)
1036 {
1037         /* =================BB AGC Gain Table */
1038         if (agc_table_en) {
1039                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1040                             "[BTCoex], BB Agc Table On!\n");
1041                 BTC_TRACE(trace_buf);
1042                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001);
1043                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001);
1044                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001);
1045                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001);
1046                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001);
1047                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001);
1048         } else {
1049                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1050                             "[BTCoex], BB Agc Table Off!\n");
1051                 BTC_TRACE(trace_buf);
1052                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
1053                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
1054                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
1055                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
1056                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
1057                 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
1058         }
1059 }
1060
1061 void halbtc8192e2ant_agc_table(IN struct btc_coexist *btcoexist,
1062                                IN boolean force_exec, IN boolean agc_table_en)
1063 {
1064         coex_dm->cur_agc_table_en = agc_table_en;
1065
1066         if (!force_exec) {
1067                 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
1068                         return;
1069         }
1070         halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en);
1071
1072         coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
1073 }
1074
1075 void halbtc8192e2ant_set_coex_table(IN struct btc_coexist *btcoexist,
1076             IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
1077 {
1078         btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
1079
1080         btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
1081
1082         btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
1083
1084         btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
1085 }
1086
1087 void halbtc8192e2ant_coex_table(IN struct btc_coexist *btcoexist,
1088                         IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
1089                                 IN u32 val0x6c8, IN u8 val0x6cc)
1090 {
1091         coex_dm->cur_val0x6c0 = val0x6c0;
1092         coex_dm->cur_val0x6c4 = val0x6c4;
1093         coex_dm->cur_val0x6c8 = val0x6c8;
1094         coex_dm->cur_val0x6cc = val0x6cc;
1095
1096         if (!force_exec) {
1097                 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1098                     (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1099                     (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1100                     (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1101                         return;
1102         }
1103         halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
1104                                        val0x6cc);
1105
1106         coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1107         coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1108         coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1109         coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1110 }
1111
1112 void halbtc8192e2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
1113                 IN boolean force_exec, IN u8 type)
1114 {
1115         switch (type) {
1116         case 0:
1117                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1118                                            0x5a5a5a5a, 0xffffff, 0x3);
1119                 break;
1120         case 1:
1121                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
1122                                            0x5a5a5a5a, 0xffffff, 0x3);
1123                 break;
1124         case 2:
1125                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55dd55dd,
1126                                            0x5ada5ada, 0xffffff, 0x3);
1127                 break;
1128         case 3:
1129                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5fdf5fdf,
1130                                            0x5fdb5fdb, 0xffffff, 0x3);
1131                 break;
1132         case 4:
1133                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1134                                            0x5ffb5ffb, 0xffffff, 0x3);
1135                 break;
1136         case 5:
1137                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5ddd5ddd,
1138                                            0x5fdb5fdb, 0xffffff, 0x3);
1139                 break;
1140         case 6:
1141                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5fff5fff,
1142                                            0x5a5a5a5a, 0xffffff, 0x3);
1143                 break;
1144         case 7:
1145                 if (coex_sta->scan_ap_num <= NOISY_AP_NUM_THRESH_8192E)
1146                         halbtc8192e2ant_coex_table(btcoexist, force_exec,
1147                                    0xffffffff, 0xfafafafa, 0xffffff, 0x3);
1148                 else
1149                         halbtc8192e2ant_coex_table(btcoexist, force_exec,
1150                                    0xffffffff, 0x5a5a5a5a, 0xffffff, 0x3);
1151                 break;
1152         case 8:
1153                 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5f5f5f5f,
1154                                            0x5a5a5a5a, 0xffffff, 0x3);
1155                 break;
1156         default:
1157                 break;
1158         }
1159 }
1160
1161 void halbtc8192e2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1162                 IN boolean enable)
1163 {
1164         u8                      h2c_parameter[1] = {0};
1165
1166         if (enable)
1167                 h2c_parameter[0] |= BIT(0);             /* function enable */
1168
1169         btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1170 }
1171
1172 void halbtc8192e2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
1173                                      IN boolean force_exec, IN boolean enable)
1174 {
1175         coex_dm->cur_ignore_wlan_act = enable;
1176
1177         if (!force_exec) {
1178                 if (coex_dm->pre_ignore_wlan_act ==
1179                     coex_dm->cur_ignore_wlan_act)
1180                         return;
1181         }
1182         halbtc8192e2ant_set_fw_ignore_wlan_act(btcoexist, enable);
1183
1184         coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1185 }
1186
1187 void halbtc8192e2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
1188                                   IN u8 lps_val, IN u8 rpwm_val)
1189 {
1190         u8      lps = lps_val;
1191         u8      rpwm = rpwm_val;
1192
1193         btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps);
1194         btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
1195 }
1196
1197 void halbtc8192e2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
1198                       IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
1199 {
1200         coex_dm->cur_lps = lps_val;
1201         coex_dm->cur_rpwm = rpwm_val;
1202
1203         if (!force_exec) {
1204                 if ((coex_dm->pre_lps == coex_dm->cur_lps) &&
1205                     (coex_dm->pre_rpwm == coex_dm->cur_rpwm))
1206                         return;
1207         }
1208         halbtc8192e2ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
1209
1210         coex_dm->pre_lps = coex_dm->cur_lps;
1211         coex_dm->pre_rpwm = coex_dm->cur_rpwm;
1212 }
1213
1214 void halbtc8192e2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
1215            IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
1216 {
1217         u8                      h2c_parameter[5] = {0};
1218         u8                      real_byte1 = byte1, real_byte5 = byte5;
1219         boolean         ap_enable = false;
1220
1221         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
1222                            &ap_enable);
1223
1224         if (ap_enable) {
1225                 if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
1226                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1227                                     "[BTCoex], FW for 1Ant AP mode\n");
1228                         real_byte1 &= ~BIT(4);
1229                         real_byte1 |= BIT(5);
1230
1231                         real_byte5 |= BIT(5);
1232                         real_byte5 &= ~BIT(6);
1233                 }
1234         }
1235
1236         h2c_parameter[0] = byte1;
1237         h2c_parameter[1] = byte2;
1238         h2c_parameter[2] = byte3;
1239         h2c_parameter[3] = byte4;
1240         h2c_parameter[4] = byte5;
1241
1242         coex_dm->ps_tdma_para[0] = byte1;
1243         coex_dm->ps_tdma_para[1] = byte2;
1244         coex_dm->ps_tdma_para[2] = byte3;
1245         coex_dm->ps_tdma_para[3] = byte4;
1246         coex_dm->ps_tdma_para[4] = byte5;
1247
1248         btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1249 }
1250
1251 void halbtc8192e2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
1252                            IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
1253                            IN boolean limited_dig, IN boolean bt_lna_constrain)
1254 {
1255         /*
1256         u32     wifi_bw;
1257
1258         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
1259
1260         if(BTC_WIFI_BW_HT40 != wifi_bw)
1261         {
1262                 if (shrink_rx_lpf)
1263                         shrink_rx_lpf = false;
1264         }
1265         */
1266
1267         halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1268         /* halbtc8192e2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); */
1269 }
1270
1271 void halbtc8192e2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
1272                            IN boolean agc_table_shift, IN boolean adc_back_off,
1273                            IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
1274 {
1275         halbtc8192e2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift);
1276         /* halbtc8192e2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */
1277         halbtc8192e2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1278                                   dac_swing_lvl);
1279 }
1280
1281 void halbtc8192e2ant_set_ant_path(IN struct btc_coexist *btcoexist,
1282           IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off)
1283 {
1284         u32                     u32tmp = 0;
1285
1286         if (init_hwcfg) {
1287                 btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24);
1288                 btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700);
1289                 if (btcoexist->chip_interface == BTC_INTF_USB)
1290                         btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
1291                 else
1292                         btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
1293
1294                 /* 0x4c[27][24]='00', Set Antenna to BB */
1295                 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1296                 u32tmp &= ~BIT(24);
1297                 u32tmp &= ~BIT(27);
1298                 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
1299         } else if (wifi_off) {
1300                 if (btcoexist->chip_interface == BTC_INTF_USB)
1301                         btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
1302                 else
1303                         btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
1304
1305                 /* 0x4c[27][24]='11', Set Antenna to BT, 0x64[8:7]=0, 0x64[2]=1 */
1306                 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
1307                 u32tmp |= BIT(24);
1308                 u32tmp |= BIT(27);
1309                 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
1310         }
1311
1312         /* ext switch setting */
1313         switch (ant_pos_type) {
1314         case BTC_ANT_PATH_WIFI:
1315                 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1316                 break;
1317         case BTC_ANT_PATH_BT:
1318                 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
1319                 break;
1320         default:
1321         case BTC_ANT_PATH_PTA:
1322                 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1323                 break;
1324         }
1325 }
1326
1327 void halbtc8192e2ant_ps_tdma(IN struct btc_coexist *btcoexist,
1328                      IN boolean force_exec, IN boolean turn_on, IN u8 type)
1329 {
1330         s8              wifi_duration_adjust = 0x0;
1331
1332         coex_dm->cur_ps_tdma_on = turn_on;
1333         coex_dm->cur_ps_tdma = type;
1334
1335         if (!force_exec) {
1336                 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1337                     (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1338                         return;
1339         }
1340
1341         if (coex_sta->scan_ap_num  >= 40)
1342                 wifi_duration_adjust = -15;
1343         else if (coex_sta->scan_ap_num  >= 20)
1344                 wifi_duration_adjust = -10;
1345
1346
1347         if (turn_on) {
1348                 switch (type) {
1349                 case 1:
1350                 default:        /*d1,wb*/
1351                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x3c,
1352                                                       0x03, 0x11, 0x10);
1353                         break;
1354                 case 2:
1355                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x32,
1356                                                       0x03, 0x11, 0x10);
1357                         break;
1358                 case 3:
1359                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x28,
1360                                                       0x03, 0x11, 0x10);
1361                         break;
1362                 case 4:
1363                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1e,
1364                                                       0x03, 0x11, 0x10);
1365                         break;
1366                 case 5:         /*d1,pb,TXpause*/
1367                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x3c,
1368                                                       0x03, 0x90, 0x10);
1369                         break;
1370                 case 6:
1371                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x32,
1372                                                       0x03, 0x90, 0x10);
1373                         break;
1374                 case 7:
1375                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x28,
1376                                                       0x03, 0x90, 0x10);
1377                         break;
1378                 case 8:
1379                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x1e,
1380                                                       0x03, 0x90, 0x10);
1381                         break;
1382                 case 9:         /*d1,bb*/
1383                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x3c,
1384                                                       0x03, 0x31, 0x10);
1385                         break;
1386                 case 10:
1387                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x32,
1388                                                       0x03, 0x31, 0x10);
1389                         break;
1390                 case 11:
1391                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x28,
1392                                                       0x03, 0x31, 0x10);
1393                         break;
1394                 case 12:
1395                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1e,
1396                                                       0x03, 0x31, 0x10);
1397                         break;
1398                 case 13:                /*d1,bb,TXpause*/
1399                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x3c,
1400                                                       0x03, 0x30, 0x10);
1401                         break;
1402                 case 14:
1403                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x32,
1404                                                       0x03, 0x30, 0x10);
1405                         break;
1406                 case 15:
1407                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x28,
1408                                                       0x03, 0x30, 0x10);
1409                         break;
1410                 case 16:
1411                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1e,
1412                                                       0x03, 0x30, 0x10);
1413                         break;
1414                 case 17:
1415                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x20,
1416                                                       0x03, 0x10, 0x10);
1417                         break;
1418                 case 18:
1419                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5, 0x5,
1420                                                       0xe1, 0x90);
1421                         break;
1422                 case 19:
1423                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x25,
1424                                                       0x25, 0xe1, 0x90);
1425                         break;
1426                 case 20:
1427                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x25,
1428                                                       0x25, 0x60, 0x90);
1429                         break;
1430                 case 21:
1431                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x35,
1432                                                       0x03, 0x11, 0x11);
1433                         break;
1434                 case 22:        /* d1,wb */
1435                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x14,
1436                                                       0x03, 0x11, 0x14);
1437                         break;
1438                 case 23:        /* d1,pb,TXpause */
1439                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x14,
1440                                                       0x03, 0x90, 0x14);
1441                         break;
1442                 case 24:        /* d1,bb */
1443                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x14,
1444                                                       0x03, 0x31, 0x14);
1445                         break;
1446                 case 25:        /* d1,bb,TXpause */
1447                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x14,
1448                                                       0x03, 0x30, 0x14);
1449                         break;
1450                 case 71:
1451                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a,
1452                                                       0x1a, 0xe1, 0x90);
1453                         break;
1454                 /* following cases is for wifi rssi low // bad antenna isolation, started from 81 */
1455                 case 80:
1456                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x3c,
1457                                                       0x3, 0x10, 0x50);
1458                         break;
1459                 case 81:
1460                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51,
1461                                 0x3a + wifi_duration_adjust, 0x3, 0x10, 0x50);
1462                         break;
1463                 case 82:
1464                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51,
1465                                 0x30 + wifi_duration_adjust, 0x03, 0x10, 0x50);
1466                         break;
1467                 case 83:
1468                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x21,
1469                                                       0x03, 0x10, 0x50);
1470                         break;
1471                 case 84:
1472                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x15,
1473                                                       0x3, 0x10, 0x50);
1474                         break;
1475                 case 85:
1476                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x3a,
1477                                                       0x03, 0x10, 0x50);
1478                         break;
1479                 case 86:
1480                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x21,
1481                                                       0x03, 0x10, 0x50);
1482                         break;
1483                 case 87:
1484                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x14,
1485                                                       0x03, 0x10, 0x54);
1486                         break;
1487
1488                 }
1489         } else {
1490                 /* disable PS tdma */
1491                 switch (type) {
1492                 default:
1493                 case 0:  /* ANT2PTA, 0x778=1 */
1494                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x8,
1495                                                       0x0, 0x0, 0x0, 0x0);
1496                         halbtc8192e2ant_set_ant_path(btcoexist,
1497                                              BTC_ANT_PATH_PTA, false, false);
1498                         break;
1499                 case 1:  /* ANT2BT, 0x778=3 */
1500                         halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x0,
1501                                                       0x0, 0x0, 0x8, 0x0);
1502                         delay_ms(5);
1503                         halbtc8192e2ant_set_ant_path(btcoexist,
1504                                              BTC_ANT_PATH_BT, false, false);
1505                         break;
1506
1507                 }
1508         }
1509
1510         /* update pre state */
1511         coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1512         coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1513 }
1514
1515 void halbtc8192e2ant_set_switch_ss_type(IN struct btc_coexist *btcoexist,
1516                                         IN u8 ss_type)
1517 {
1518         u8      mimo_ps = BTC_MIMO_PS_DYNAMIC;
1519         u32     dis_ra_mask = 0x0;
1520
1521         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1522                     "[BTCoex], REAL set SS Type = %d\n", ss_type);
1523         BTC_TRACE(trace_buf);
1524
1525         dis_ra_mask = halbtc8192e2ant_decide_ra_mask(btcoexist, ss_type,
1526                         coex_dm->cur_ra_mask_type);
1527         halbtc8192e2ant_update_ra_mask(btcoexist, FORCE_EXEC, dis_ra_mask);
1528
1529         if (ss_type == 1) {
1530                 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1531                 /* switch ofdm path */
1532                 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
1533                 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
1534                 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111);
1535                 /* switch cck patch */
1536                 /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1); */
1537                 /* btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81); */
1538                 mimo_ps = BTC_MIMO_PS_STATIC;
1539         } else if (ss_type == 2) {
1540                 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
1541                 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
1542                 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
1543                 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
1544                 /* remove, if 0xe77[2]=0x0 then CCK will fail, advised by Jenyu */
1545                 /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0); */
1546                 /* btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41); */
1547                 mimo_ps = BTC_MIMO_PS_DYNAMIC;
1548         }
1549
1550         btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS,
1551                            &mimo_ps);   /* set rx 1ss or 2ss */
1552 }
1553
1554 void halbtc8192e2ant_switch_ss_type(IN struct btc_coexist *btcoexist,
1555                                     IN boolean force_exec, IN u8 new_ss_type)
1556 {
1557         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1558                     "[BTCoex], %s Switch SS Type = %d\n",
1559                     (force_exec ? "force to" : ""), new_ss_type);
1560         BTC_TRACE(trace_buf);
1561         coex_dm->cur_ss_type = new_ss_type;
1562
1563         if (!force_exec) {
1564                 if (coex_dm->pre_ss_type == coex_dm->cur_ss_type)
1565                         return;
1566         }
1567         halbtc8192e2ant_set_switch_ss_type(btcoexist, coex_dm->cur_ss_type);
1568
1569         coex_dm->pre_ss_type = coex_dm->cur_ss_type;
1570 }
1571
1572 void halbtc8192e2ant_ps_tdma_check_for_power_save_state(
1573         IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
1574 {
1575         u8      lps_mode = 0x0;
1576
1577         btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
1578
1579         if (lps_mode) { /* already under LPS state */
1580                 if (new_ps_state) {
1581                         /* keep state under LPS, do nothing. */
1582                 } else {
1583                         /* will leave LPS state, turn off psTdma first */
1584                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1585                                                 0);
1586                 }
1587         } else {                                        /* NO PS state */
1588                 if (new_ps_state) {
1589                         /* will enter LPS state, turn off psTdma first */
1590                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1591                                                 0);
1592                 } else {
1593                         /* keep state under NO PS state, do nothing. */
1594                 }
1595         }
1596 }
1597
1598 void halbtc8192e2ant_power_save_state(IN struct btc_coexist *btcoexist,
1599                               IN u8 ps_type,  IN u8 lps_val,  IN u8 rpwm_val)
1600 {
1601         boolean         low_pwr_disable = false;
1602         boolean ap_enable = false;
1603
1604         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
1605                            &ap_enable);
1606
1607         if (ap_enable) {
1608                 ps_type = BTC_PS_WIFI_NATIVE;
1609                 lps_val = 0x0;
1610                 rpwm_val = 0x0;
1611         }
1612         switch (ps_type) {
1613         case BTC_PS_WIFI_NATIVE:
1614                 btcoexist->btc_set(btcoexist,
1615                                    BTC_SET_ACT_DISABLE_LOW_POWER,
1616                                    &low_pwr_disable);
1617                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
1618                                    NULL);
1619                 break;
1620         case BTC_PS_LPS_ON:
1621                 halbtc8192e2ant_ps_tdma_check_for_power_save_state(
1622                         btcoexist, true);
1623                 halbtc8192e2ant_lps_rpwm(btcoexist, NORMAL_EXEC,
1624                                          lps_val, rpwm_val);
1625                 btcoexist->btc_set(btcoexist,
1626                                    BTC_SET_ACT_DISABLE_LOW_POWER,
1627                                    &low_pwr_disable);
1628                 /* power save must executed before psTdma. */
1629                 btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
1630                                    NULL);
1631                 break;
1632         default:
1633                 break;
1634         }
1635 }
1636
1637
1638 void halbtc8192e2ant_coex_all_off(IN struct btc_coexist *btcoexist)
1639 {
1640         /* fw all off */
1641         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1642         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1643         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1644
1645         /* sw all off */
1646         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1647         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1648
1649         /* hw all off */
1650         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1651 }
1652
1653 void halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
1654 {
1655         /* force to reset coex mechanism */
1656         halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
1657                                          0x0);
1658         halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
1659         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
1660         halbtc8192e2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0);
1661
1662         halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
1663         halbtc8192e2ant_switch_ss_type(btcoexist, FORCE_EXEC, 2);
1664
1665         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1666         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1667 }
1668
1669 void halbtc8192e2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
1670 {
1671
1672
1673         /*      halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);*/
1674         halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
1675                                          0x0);
1676
1677         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
1678         halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
1679                                          0x0);
1680         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
1681         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1682         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1683
1684         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
1685         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
1686 }
1687
1688 boolean halbtc8192e2ant_is_common_action(IN struct btc_coexist *btcoexist)
1689 {
1690         struct  btc_bt_link_info        *bt_link_info = &btcoexist->bt_link_info;
1691         boolean                 common = false, wifi_connected = false, wifi_busy = false;
1692         boolean                 bt_hs_on = false, low_pwr_disable = false;
1693
1694         btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
1695         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1696                            &wifi_connected);
1697         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1698
1699         if (bt_link_info->sco_exist || bt_link_info->hid_exist)
1700                 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
1701         else
1702                 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
1703
1704         if (!wifi_connected) {
1705
1706                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
1707                                                  0x0, 0x0);
1708
1709
1710                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1711                             "[BTCoex], Wifi non-connected idle!!\n");
1712                 BTC_TRACE(trace_buf);
1713
1714                 if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1715                      coex_dm->bt_status) ||
1716                     (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1717                      coex_dm->bt_status)) {
1718                         /*                      halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2);*/
1719                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1720                                                              NORMAL_EXEC, 1);
1721                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1722                                                 0);
1723                 } else {
1724                         /*                      halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);*/
1725                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1726                                                              NORMAL_EXEC, 0);
1727                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1728                                                 1);
1729                 }
1730
1731                 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
1732                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1733
1734                 halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false,
1735                                               false);
1736                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
1737                                               0x18);
1738
1739                 common = true;
1740         } else {
1741                 if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1742                     coex_dm->bt_status) {
1743
1744                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1745                                 "[BTCoex], Wifi connected + BT non connected-idle!!\n");
1746                         BTC_TRACE(trace_buf);
1747
1748                         halbtc8192e2ant_power_save_state(btcoexist,
1749                                                  BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1750                         /*                      halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2);*/
1751
1752                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1753                                                              NORMAL_EXEC, 1);
1754                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1755                                                 0);
1756                         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
1757                                                          6);
1758                         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1759
1760                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
1761                                                       false, false);
1762                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
1763                                                       false, 0x18);
1764
1765                         common = true;
1766                 } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1767                            coex_dm->bt_status) {
1768
1769                         if (bt_hs_on)
1770                                 return false;
1771                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1772                                 "[BTCoex], Wifi connected + BT connected-idle!!\n");
1773                         BTC_TRACE(trace_buf);
1774
1775                         halbtc8192e2ant_power_save_state(btcoexist,
1776                                                  BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1777                         /*                      halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2);*/
1778                         halbtc8192e2ant_coex_table_with_type(btcoexist,
1779                                                              NORMAL_EXEC, 0);
1780                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
1781                                                 0);
1782                         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
1783                                                          6);
1784                         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
1785
1786                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
1787                                                       false, false);
1788                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
1789                                                       false, 0x18);
1790
1791                         common = true;
1792                 } else {
1793
1794                         if (wifi_busy) {
1795                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1796                                         "[BTCoex], Wifi Connected-Busy + BT Busy!!\n");
1797                                 BTC_TRACE(trace_buf);
1798                                 common = false;
1799                         } else {
1800                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
1801                                         "[BTCoex], Wifi Connected-Idle + BT Busy!!\n");
1802                                 BTC_TRACE(trace_buf);
1803
1804                                 halbtc8192e2ant_power_save_state(btcoexist,
1805                                                  BTC_PS_WIFI_NATIVE, 0x0, 0x0);
1806                                 /*                              halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);*/
1807                                 halbtc8192e2ant_coex_table_with_type(btcoexist,
1808                                                              NORMAL_EXEC, 0);
1809                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1810                                                         true, 21);
1811                                 halbtc8192e2ant_fw_dac_swing_lvl(btcoexist,
1812                                                          NORMAL_EXEC, 6);
1813                                 halbtc8192e2ant_dec_bt_pwr(btcoexist,
1814                                                            NORMAL_EXEC, 0);
1815                                 halbtc8192e2ant_sw_mechanism1(btcoexist, false,
1816                                                       false, false, false);
1817                                 halbtc8192e2ant_sw_mechanism2(btcoexist, false,
1818                                                       false, false, 0x18);
1819                                 common = true;
1820                         }
1821                 }
1822         }
1823
1824         return common;
1825 }
1826 void halbtc8192e2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist,
1827                 IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval)
1828 {
1829         static s32              up, dn, m, n, wait_count;
1830         s32                     result;   /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
1831         u8                      retry_count = 0;
1832
1833
1834         if (!coex_dm->auto_tdma_adjust) {
1835                 coex_dm->auto_tdma_adjust = true;
1836                 {
1837                         if (sco_hid) {
1838                                 if (tx_pause) {
1839                                         if (max_interval == 1) {
1840                                                 halbtc8192e2ant_ps_tdma(
1841                                                         btcoexist, NORMAL_EXEC,
1842                                                         true, 13);
1843                                                 coex_dm->ps_tdma_du_adj_type =
1844                                                         13;
1845                                         } else if (max_interval == 2) {
1846                                                 halbtc8192e2ant_ps_tdma(
1847                                                         btcoexist, NORMAL_EXEC,
1848                                                         true, 14);
1849                                                 coex_dm->ps_tdma_du_adj_type =
1850                                                         14;
1851                                         } else if (max_interval == 3) {
1852                                                 halbtc8192e2ant_ps_tdma(
1853                                                         btcoexist, NORMAL_EXEC,
1854                                                         true, 15);
1855                                                 coex_dm->ps_tdma_du_adj_type =
1856                                                         15;
1857                                         } else {
1858                                                 halbtc8192e2ant_ps_tdma(
1859                                                         btcoexist, NORMAL_EXEC,
1860                                                         true, 15);
1861                                                 coex_dm->ps_tdma_du_adj_type =
1862                                                         15;
1863                                         }
1864                                 } else {
1865                                         if (max_interval == 1) {
1866                                                 halbtc8192e2ant_ps_tdma(
1867                                                         btcoexist, NORMAL_EXEC,
1868                                                         true, 9);
1869                                                 coex_dm->ps_tdma_du_adj_type =
1870                                                         9;
1871                                         } else if (max_interval == 2) {
1872                                                 halbtc8192e2ant_ps_tdma(
1873                                                         btcoexist, NORMAL_EXEC,
1874                                                         true, 10);
1875                                                 coex_dm->ps_tdma_du_adj_type =
1876                                                         10;
1877                                         } else if (max_interval == 3) {
1878                                                 halbtc8192e2ant_ps_tdma(
1879                                                         btcoexist, NORMAL_EXEC,
1880                                                         true, 11);
1881                                                 coex_dm->ps_tdma_du_adj_type =
1882                                                         11;
1883                                         } else {
1884                                                 halbtc8192e2ant_ps_tdma(
1885                                                         btcoexist, NORMAL_EXEC,
1886                                                         true, 11);
1887                                                 coex_dm->ps_tdma_du_adj_type =
1888                                                         11;
1889                                         }
1890                                 }
1891                         } else {
1892                                 if (tx_pause) {
1893                                         if (max_interval == 1) {
1894                                                 halbtc8192e2ant_ps_tdma(
1895                                                         btcoexist, NORMAL_EXEC,
1896                                                         true, 5);
1897                                                 coex_dm->ps_tdma_du_adj_type =
1898                                                         5;
1899                                         } else if (max_interval == 2) {
1900                                                 halbtc8192e2ant_ps_tdma(
1901                                                         btcoexist, NORMAL_EXEC,
1902                                                         true, 6);
1903                                                 coex_dm->ps_tdma_du_adj_type =
1904                                                         6;
1905                                         } else if (max_interval == 3) {
1906                                                 halbtc8192e2ant_ps_tdma(
1907                                                         btcoexist, NORMAL_EXEC,
1908                                                         true, 7);
1909                                                 coex_dm->ps_tdma_du_adj_type =
1910                                                         7;
1911                                         } else {
1912                                                 halbtc8192e2ant_ps_tdma(
1913                                                         btcoexist, NORMAL_EXEC,
1914                                                         true, 7);
1915                                                 coex_dm->ps_tdma_du_adj_type =
1916                                                         7;
1917                                         }
1918                                 } else {
1919                                         if (max_interval == 1) {
1920                                                 halbtc8192e2ant_ps_tdma(
1921                                                         btcoexist, NORMAL_EXEC,
1922                                                         true, 1);
1923                                                 coex_dm->ps_tdma_du_adj_type =
1924                                                         1;
1925                                         } else if (max_interval == 2) {
1926                                                 halbtc8192e2ant_ps_tdma(
1927                                                         btcoexist, NORMAL_EXEC,
1928                                                         true, 2);
1929                                                 coex_dm->ps_tdma_du_adj_type =
1930                                                         2;
1931                                         } else if (max_interval == 3) {
1932                                                 halbtc8192e2ant_ps_tdma(
1933                                                         btcoexist, NORMAL_EXEC,
1934                                                         true, 3);
1935                                                 coex_dm->ps_tdma_du_adj_type =
1936                                                         3;
1937                                         } else {
1938                                                 halbtc8192e2ant_ps_tdma(
1939                                                         btcoexist, NORMAL_EXEC,
1940                                                         true, 3);
1941                                                 coex_dm->ps_tdma_du_adj_type =
1942                                                         3;
1943                                         }
1944                                 }
1945                         }
1946                 }
1947                 /* ============ */
1948                 up = 0;
1949                 dn = 0;
1950                 m = 1;
1951                 n = 3;
1952                 result = 0;
1953                 wait_count = 0;
1954         } else {
1955                 /* acquire the BT TRx retry count from BT_Info byte2 */
1956                 retry_count = coex_sta->bt_retry_cnt;
1957                 result = 0;
1958                 wait_count++;
1959
1960                 if (retry_count ==
1961                     0) { /* no retry in the last 2-second duration */
1962                         up++;
1963                         dn--;
1964
1965                         if (dn <= 0)
1966                                 dn = 0;
1967
1968                         if (up >= n) {  /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */
1969                                 wait_count = 0;
1970                                 n = 3;
1971                                 up = 0;
1972                                 dn = 0;
1973                                 result = 1;
1974                         }
1975                 } else if (retry_count <=
1976                            3) { /* <=3 retry in the last 2-second duration */
1977                         up--;
1978                         dn++;
1979
1980                         if (up <= 0)
1981                                 up = 0;
1982
1983                         if (dn == 2) {  /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */
1984                                 if (wait_count <= 2)
1985                                         m++; /* to avoid loop between the two levels */
1986                                 else
1987                                         m = 1;
1988
1989                                 if (m >= 20)  /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
1990                                         m = 20;
1991
1992                                 n = 3 * m;
1993                                 up = 0;
1994                                 dn = 0;
1995                                 wait_count = 0;
1996                                 result = -1;
1997                         }
1998                 } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */
1999                         if (wait_count == 1)
2000                                 m++; /* to avoid loop between the two levels */
2001                         else
2002                                 m = 1;
2003
2004                         if (m >= 20)  /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
2005                                 m = 20;
2006
2007                         n = 3 * m;
2008                         up = 0;
2009                         dn = 0;
2010                         wait_count = 0;
2011                         result = -1;
2012                 }
2013
2014                 if (max_interval == 1) {
2015                         if (tx_pause) {
2016                                 if (coex_dm->cur_ps_tdma == 1) {
2017                                         halbtc8192e2ant_ps_tdma(btcoexist,
2018                                                         NORMAL_EXEC, true, 5);
2019                                         coex_dm->ps_tdma_du_adj_type = 5;
2020                                 } else if (coex_dm->cur_ps_tdma == 2) {
2021                                         halbtc8192e2ant_ps_tdma(btcoexist,
2022                                                         NORMAL_EXEC, true, 6);
2023                                         coex_dm->ps_tdma_du_adj_type = 6;
2024                                 } else if (coex_dm->cur_ps_tdma == 3) {
2025                                         halbtc8192e2ant_ps_tdma(btcoexist,
2026                                                         NORMAL_EXEC, true, 7);
2027                                         coex_dm->ps_tdma_du_adj_type = 7;
2028                                 } else if (coex_dm->cur_ps_tdma == 4) {
2029                                         halbtc8192e2ant_ps_tdma(btcoexist,
2030                                                         NORMAL_EXEC, true, 8);
2031                                         coex_dm->ps_tdma_du_adj_type = 8;
2032                                 }
2033                                 if (coex_dm->cur_ps_tdma == 9) {
2034                                         halbtc8192e2ant_ps_tdma(btcoexist,
2035                                                         NORMAL_EXEC, true, 13);
2036                                         coex_dm->ps_tdma_du_adj_type = 13;
2037                                 } else if (coex_dm->cur_ps_tdma == 10) {
2038                                         halbtc8192e2ant_ps_tdma(btcoexist,
2039                                                         NORMAL_EXEC, true, 14);
2040                                         coex_dm->ps_tdma_du_adj_type = 14;
2041                                 } else if (coex_dm->cur_ps_tdma == 11) {
2042                                         halbtc8192e2ant_ps_tdma(btcoexist,
2043                                                         NORMAL_EXEC, true, 15);
2044                                         coex_dm->ps_tdma_du_adj_type = 15;
2045                                 } else if (coex_dm->cur_ps_tdma == 12) {
2046                                         halbtc8192e2ant_ps_tdma(btcoexist,
2047                                                         NORMAL_EXEC, true, 16);
2048                                         coex_dm->ps_tdma_du_adj_type = 16;
2049                                 }
2050
2051                                 if (result == -1) {
2052                                         if (coex_dm->cur_ps_tdma == 5) {
2053                                                 halbtc8192e2ant_ps_tdma(
2054                                                         btcoexist, NORMAL_EXEC,
2055                                                         true, 6);
2056                                                 coex_dm->ps_tdma_du_adj_type =
2057                                                         6;
2058                                         } else if (coex_dm->cur_ps_tdma == 6) {
2059                                                 halbtc8192e2ant_ps_tdma(
2060                                                         btcoexist, NORMAL_EXEC,
2061                                                         true, 7);
2062                                                 coex_dm->ps_tdma_du_adj_type =
2063                                                         7;
2064                                         } else if (coex_dm->cur_ps_tdma == 7) {
2065                                                 halbtc8192e2ant_ps_tdma(
2066                                                         btcoexist, NORMAL_EXEC,
2067                                                         true, 8);
2068                                                 coex_dm->ps_tdma_du_adj_type =
2069                                                         8;
2070                                         } else if (coex_dm->cur_ps_tdma == 13) {
2071                                                 halbtc8192e2ant_ps_tdma(
2072                                                         btcoexist, NORMAL_EXEC,
2073                                                         true, 14);
2074                                                 coex_dm->ps_tdma_du_adj_type =
2075                                                         14;
2076                                         } else if (coex_dm->cur_ps_tdma == 14) {
2077                                                 halbtc8192e2ant_ps_tdma(
2078                                                         btcoexist, NORMAL_EXEC,
2079                                                         true, 15);
2080                                                 coex_dm->ps_tdma_du_adj_type =
2081                                                         15;
2082                                         } else if (coex_dm->cur_ps_tdma == 15) {
2083                                                 halbtc8192e2ant_ps_tdma(
2084                                                         btcoexist, NORMAL_EXEC,
2085                                                         true, 16);
2086                                                 coex_dm->ps_tdma_du_adj_type =
2087                                                         16;
2088                                         }
2089                                 } else if (result == 1) {
2090                                         if (coex_dm->cur_ps_tdma == 8) {
2091                                                 halbtc8192e2ant_ps_tdma(
2092                                                         btcoexist, NORMAL_EXEC,
2093                                                         true, 7);
2094                                                 coex_dm->ps_tdma_du_adj_type =
2095                                                         7;
2096                                         } else if (coex_dm->cur_ps_tdma == 7) {
2097                                                 halbtc8192e2ant_ps_tdma(
2098                                                         btcoexist, NORMAL_EXEC,
2099                                                         true, 6);
2100                                                 coex_dm->ps_tdma_du_adj_type =
2101                                                         6;
2102                                         } else if (coex_dm->cur_ps_tdma == 6) {
2103                                                 halbtc8192e2ant_ps_tdma(
2104                                                         btcoexist, NORMAL_EXEC,
2105                                                         true, 5);
2106                                                 coex_dm->ps_tdma_du_adj_type =
2107                                                         5;
2108                                         } else if (coex_dm->cur_ps_tdma == 16) {
2109                                                 halbtc8192e2ant_ps_tdma(
2110                                                         btcoexist, NORMAL_EXEC,
2111                                                         true, 15);
2112                                                 coex_dm->ps_tdma_du_adj_type =
2113                                                         15;
2114                                         } else if (coex_dm->cur_ps_tdma == 15) {
2115                                                 halbtc8192e2ant_ps_tdma(
2116                                                         btcoexist, NORMAL_EXEC,
2117                                                         true, 14);
2118                                                 coex_dm->ps_tdma_du_adj_type =
2119                                                         14;
2120                                         } else if (coex_dm->cur_ps_tdma == 14) {
2121                                                 halbtc8192e2ant_ps_tdma(
2122                                                         btcoexist, NORMAL_EXEC,
2123                                                         true, 13);
2124                                                 coex_dm->ps_tdma_du_adj_type =
2125                                                         13;
2126                                         }
2127                                 }
2128                         } else {
2129                                 if (coex_dm->cur_ps_tdma == 5) {
2130                                         halbtc8192e2ant_ps_tdma(btcoexist,
2131                                                         NORMAL_EXEC, true, 1);
2132                                         coex_dm->ps_tdma_du_adj_type = 1;
2133                                 } else if (coex_dm->cur_ps_tdma == 6) {
2134                                         halbtc8192e2ant_ps_tdma(btcoexist,
2135                                                         NORMAL_EXEC, true, 2);
2136                                         coex_dm->ps_tdma_du_adj_type = 2;
2137                                 } else if (coex_dm->cur_ps_tdma == 7) {
2138                                         halbtc8192e2ant_ps_tdma(btcoexist,
2139                                                         NORMAL_EXEC, true, 3);
2140                                         coex_dm->ps_tdma_du_adj_type = 3;
2141                                 } else if (coex_dm->cur_ps_tdma == 8) {
2142                                         halbtc8192e2ant_ps_tdma(btcoexist,
2143                                                         NORMAL_EXEC, true, 4);
2144                                         coex_dm->ps_tdma_du_adj_type = 4;
2145                                 }
2146                                 if (coex_dm->cur_ps_tdma == 13) {
2147                                         halbtc8192e2ant_ps_tdma(btcoexist,
2148                                                         NORMAL_EXEC, true, 9);
2149                                         coex_dm->ps_tdma_du_adj_type = 9;
2150                                 } else if (coex_dm->cur_ps_tdma == 14) {
2151                                         halbtc8192e2ant_ps_tdma(btcoexist,
2152                                                         NORMAL_EXEC, true, 10);
2153                                         coex_dm->ps_tdma_du_adj_type = 10;
2154                                 } else if (coex_dm->cur_ps_tdma == 15) {
2155                                         halbtc8192e2ant_ps_tdma(btcoexist,
2156                                                         NORMAL_EXEC, true, 11);
2157                                         coex_dm->ps_tdma_du_adj_type = 11;
2158                                 } else if (coex_dm->cur_ps_tdma == 16) {
2159                                         halbtc8192e2ant_ps_tdma(btcoexist,
2160                                                         NORMAL_EXEC, true, 12);
2161                                         coex_dm->ps_tdma_du_adj_type = 12;
2162                                 }
2163
2164                                 if (result == -1) {
2165                                         if (coex_dm->cur_ps_tdma == 1) {
2166                                                 halbtc8192e2ant_ps_tdma(
2167                                                         btcoexist, NORMAL_EXEC,
2168                                                         true, 2);
2169                                                 coex_dm->ps_tdma_du_adj_type =
2170                                                         2;
2171                                         } else if (coex_dm->cur_ps_tdma == 2) {
2172                                                 halbtc8192e2ant_ps_tdma(
2173                                                         btcoexist, NORMAL_EXEC,
2174                                                         true, 3);
2175                                                 coex_dm->ps_tdma_du_adj_type =
2176                                                         3;
2177                                         } else if (coex_dm->cur_ps_tdma == 3) {
2178                                                 halbtc8192e2ant_ps_tdma(
2179                                                         btcoexist, NORMAL_EXEC,
2180                                                         true, 4);
2181                                                 coex_dm->ps_tdma_du_adj_type =
2182                                                         4;
2183                                         } else if (coex_dm->cur_ps_tdma == 9) {
2184                                                 halbtc8192e2ant_ps_tdma(
2185                                                         btcoexist, NORMAL_EXEC,
2186                                                         true, 10);
2187                                                 coex_dm->ps_tdma_du_adj_type =
2188                                                         10;
2189                                         } else if (coex_dm->cur_ps_tdma == 10) {
2190                                                 halbtc8192e2ant_ps_tdma(
2191                                                         btcoexist, NORMAL_EXEC,
2192                                                         true, 11);
2193                                                 coex_dm->ps_tdma_du_adj_type =
2194                                                         11;
2195                                         } else if (coex_dm->cur_ps_tdma == 11) {
2196                                                 halbtc8192e2ant_ps_tdma(
2197                                                         btcoexist, NORMAL_EXEC,
2198                                                         true, 12);
2199                                                 coex_dm->ps_tdma_du_adj_type =
2200                                                         12;
2201                                         }
2202                                 } else if (result == 1) {
2203                                         if (coex_dm->cur_ps_tdma == 4) {
2204                                                 halbtc8192e2ant_ps_tdma(
2205                                                         btcoexist, NORMAL_EXEC,
2206                                                         true, 3);
2207                                                 coex_dm->ps_tdma_du_adj_type =
2208                                                         3;
2209                                         } else if (coex_dm->cur_ps_tdma == 3) {
2210                                                 halbtc8192e2ant_ps_tdma(
2211                                                         btcoexist, NORMAL_EXEC,
2212                                                         true, 2);
2213                                                 coex_dm->ps_tdma_du_adj_type =
2214                                                         2;
2215                                         } else if (coex_dm->cur_ps_tdma == 2) {
2216                                                 halbtc8192e2ant_ps_tdma(
2217                                                         btcoexist, NORMAL_EXEC,
2218                                                         true, 1);
2219                                                 coex_dm->ps_tdma_du_adj_type =
2220                                                         1;
2221                                         } else if (coex_dm->cur_ps_tdma == 1) {
2222                                                 halbtc8192e2ant_ps_tdma(
2223                                                         btcoexist, NORMAL_EXEC,
2224                                                         true, 71);
2225                                                 coex_dm->ps_tdma_du_adj_type =
2226                                                         71;
2227                                         } else if (coex_dm->cur_ps_tdma == 12) {
2228                                                 halbtc8192e2ant_ps_tdma(
2229                                                         btcoexist, NORMAL_EXEC,
2230                                                         true, 11);
2231                                                 coex_dm->ps_tdma_du_adj_type =
2232                                                         11;
2233                                         } else if (coex_dm->cur_ps_tdma == 11) {
2234                                                 halbtc8192e2ant_ps_tdma(
2235                                                         btcoexist, NORMAL_EXEC,
2236                                                         true, 10);
2237                                                 coex_dm->ps_tdma_du_adj_type =
2238                                                         10;
2239                                         } else if (coex_dm->cur_ps_tdma == 10) {
2240                                                 halbtc8192e2ant_ps_tdma(
2241                                                         btcoexist, NORMAL_EXEC,
2242                                                         true, 9);
2243                                                 coex_dm->ps_tdma_du_adj_type =
2244                                                         9;
2245                                         }
2246                                 }
2247                         }
2248                 } else if (max_interval == 2) {
2249                         if (tx_pause) {
2250                                 if (coex_dm->cur_ps_tdma == 1) {
2251                                         halbtc8192e2ant_ps_tdma(btcoexist,
2252                                                         NORMAL_EXEC, true, 6);
2253                                         coex_dm->ps_tdma_du_adj_type = 6;
2254                                 } else if (coex_dm->cur_ps_tdma == 2) {
2255                                         halbtc8192e2ant_ps_tdma(btcoexist,
2256                                                         NORMAL_EXEC, true, 6);
2257                                         coex_dm->ps_tdma_du_adj_type = 6;
2258                                 } else if (coex_dm->cur_ps_tdma == 3) {
2259                                         halbtc8192e2ant_ps_tdma(btcoexist,
2260                                                         NORMAL_EXEC, true, 7);
2261                                         coex_dm->ps_tdma_du_adj_type = 7;
2262                                 } else if (coex_dm->cur_ps_tdma == 4) {
2263                                         halbtc8192e2ant_ps_tdma(btcoexist,
2264                                                         NORMAL_EXEC, true, 8);
2265                                         coex_dm->ps_tdma_du_adj_type = 8;
2266                                 }
2267                                 if (coex_dm->cur_ps_tdma == 9) {
2268                                         halbtc8192e2ant_ps_tdma(btcoexist,
2269                                                         NORMAL_EXEC, true, 14);
2270                                         coex_dm->ps_tdma_du_adj_type = 14;
2271                                 } else if (coex_dm->cur_ps_tdma == 10) {
2272                                         halbtc8192e2ant_ps_tdma(btcoexist,
2273                                                         NORMAL_EXEC, true, 14);
2274                                         coex_dm->ps_tdma_du_adj_type = 14;
2275                                 } else if (coex_dm->cur_ps_tdma == 11) {
2276                                         halbtc8192e2ant_ps_tdma(btcoexist,
2277                                                         NORMAL_EXEC, true, 15);
2278                                         coex_dm->ps_tdma_du_adj_type = 15;
2279                                 } else if (coex_dm->cur_ps_tdma == 12) {
2280                                         halbtc8192e2ant_ps_tdma(btcoexist,
2281                                                         NORMAL_EXEC, true, 16);
2282                                         coex_dm->ps_tdma_du_adj_type = 16;
2283                                 }
2284                                 if (result == -1) {
2285                                         if (coex_dm->cur_ps_tdma == 5) {
2286                                                 halbtc8192e2ant_ps_tdma(
2287                                                         btcoexist, NORMAL_EXEC,
2288                                                         true, 6);
2289                                                 coex_dm->ps_tdma_du_adj_type =
2290                                                         6;
2291                                         } else if (coex_dm->cur_ps_tdma == 6) {
2292                                                 halbtc8192e2ant_ps_tdma(
2293                                                         btcoexist, NORMAL_EXEC,
2294                                                         true, 7);
2295                                                 coex_dm->ps_tdma_du_adj_type =
2296                                                         7;
2297                                         } else if (coex_dm->cur_ps_tdma == 7) {
2298                                                 halbtc8192e2ant_ps_tdma(
2299                                                         btcoexist, NORMAL_EXEC,
2300                                                         true, 8);
2301                                                 coex_dm->ps_tdma_du_adj_type =
2302                                                         8;
2303                                         } else if (coex_dm->cur_ps_tdma == 13) {
2304                                                 halbtc8192e2ant_ps_tdma(
2305                                                         btcoexist, NORMAL_EXEC,
2306                                                         true, 14);
2307                                                 coex_dm->ps_tdma_du_adj_type =
2308                                                         14;
2309                                         } else if (coex_dm->cur_ps_tdma == 14) {
2310                                                 halbtc8192e2ant_ps_tdma(
2311                                                         btcoexist, NORMAL_EXEC,
2312                                                         true, 15);
2313                                                 coex_dm->ps_tdma_du_adj_type =
2314                                                         15;
2315                                         } else if (coex_dm->cur_ps_tdma == 15) {
2316                                                 halbtc8192e2ant_ps_tdma(
2317                                                         btcoexist, NORMAL_EXEC,
2318                                                         true, 16);
2319                                                 coex_dm->ps_tdma_du_adj_type =
2320                                                         16;
2321                                         }
2322                                 } else if (result == 1) {
2323                                         if (coex_dm->cur_ps_tdma == 8) {
2324                                                 halbtc8192e2ant_ps_tdma(
2325                                                         btcoexist, NORMAL_EXEC,
2326                                                         true, 7);
2327                                                 coex_dm->ps_tdma_du_adj_type =
2328                                                         7;
2329                                         } else if (coex_dm->cur_ps_tdma == 7) {
2330                                                 halbtc8192e2ant_ps_tdma(
2331                                                         btcoexist, NORMAL_EXEC,
2332                                                         true, 6);
2333                                                 coex_dm->ps_tdma_du_adj_type =
2334                                                         6;
2335                                         } else if (coex_dm->cur_ps_tdma == 6) {
2336                                                 halbtc8192e2ant_ps_tdma(
2337                                                         btcoexist, NORMAL_EXEC,
2338                                                         true, 6);
2339                                                 coex_dm->ps_tdma_du_adj_type =
2340                                                         6;
2341                                         } else if (coex_dm->cur_ps_tdma == 16) {
2342                                                 halbtc8192e2ant_ps_tdma(
2343                                                         btcoexist, NORMAL_EXEC,
2344                                                         true, 15);
2345                                                 coex_dm->ps_tdma_du_adj_type =
2346                                                         15;
2347                                         } else if (coex_dm->cur_ps_tdma == 15) {
2348                                                 halbtc8192e2ant_ps_tdma(
2349                                                         btcoexist, NORMAL_EXEC,
2350                                                         true, 14);
2351                                                 coex_dm->ps_tdma_du_adj_type =
2352                                                         14;
2353                                         } else if (coex_dm->cur_ps_tdma == 14) {
2354                                                 halbtc8192e2ant_ps_tdma(
2355                                                         btcoexist, NORMAL_EXEC,
2356                                                         true, 14);
2357                                                 coex_dm->ps_tdma_du_adj_type =
2358                                                         14;
2359                                         }
2360                                 }
2361                         } else {
2362                                 if (coex_dm->cur_ps_tdma == 5) {
2363                                         halbtc8192e2ant_ps_tdma(btcoexist,
2364                                                         NORMAL_EXEC, true, 2);
2365                                         coex_dm->ps_tdma_du_adj_type = 2;
2366                                 } else if (coex_dm->cur_ps_tdma == 6) {
2367                                         halbtc8192e2ant_ps_tdma(btcoexist,
2368                                                         NORMAL_EXEC, true, 2);
2369                                         coex_dm->ps_tdma_du_adj_type = 2;
2370                                 } else if (coex_dm->cur_ps_tdma == 7) {
2371                                         halbtc8192e2ant_ps_tdma(btcoexist,
2372                                                         NORMAL_EXEC, true, 3);
2373                                         coex_dm->ps_tdma_du_adj_type = 3;
2374                                 } else if (coex_dm->cur_ps_tdma == 8) {
2375                                         halbtc8192e2ant_ps_tdma(btcoexist,
2376                                                         NORMAL_EXEC, true, 4);
2377                                         coex_dm->ps_tdma_du_adj_type = 4;
2378                                 }
2379                                 if (coex_dm->cur_ps_tdma == 13) {
2380                                         halbtc8192e2ant_ps_tdma(btcoexist,
2381                                                         NORMAL_EXEC, true, 10);
2382                                         coex_dm->ps_tdma_du_adj_type = 10;
2383                                 } else if (coex_dm->cur_ps_tdma == 14) {
2384                                         halbtc8192e2ant_ps_tdma(btcoexist,
2385                                                         NORMAL_EXEC, true, 10);
2386                                         coex_dm->ps_tdma_du_adj_type = 10;
2387                                 } else if (coex_dm->cur_ps_tdma == 15) {
2388                                         halbtc8192e2ant_ps_tdma(btcoexist,
2389                                                         NORMAL_EXEC, true, 11);
2390                                         coex_dm->ps_tdma_du_adj_type = 11;
2391                                 } else if (coex_dm->cur_ps_tdma == 16) {
2392                                         halbtc8192e2ant_ps_tdma(btcoexist,
2393                                                         NORMAL_EXEC, true, 12);
2394                                         coex_dm->ps_tdma_du_adj_type = 12;
2395                                 }
2396                                 if (result == -1) {
2397                                         if (coex_dm->cur_ps_tdma == 1) {
2398                                                 halbtc8192e2ant_ps_tdma(
2399                                                         btcoexist, NORMAL_EXEC,
2400                                                         true, 2);
2401                                                 coex_dm->ps_tdma_du_adj_type =
2402                                                         2;
2403                                         } else if (coex_dm->cur_ps_tdma == 2) {
2404                                                 halbtc8192e2ant_ps_tdma(
2405                                                         btcoexist, NORMAL_EXEC,
2406                                                         true, 3);
2407                                                 coex_dm->ps_tdma_du_adj_type =
2408                                                         3;
2409                                         } else if (coex_dm->cur_ps_tdma == 3) {
2410                                                 halbtc8192e2ant_ps_tdma(
2411                                                         btcoexist, NORMAL_EXEC,
2412                                                         true, 4);
2413                                                 coex_dm->ps_tdma_du_adj_type =
2414                                                         4;
2415                                         } else if (coex_dm->cur_ps_tdma == 9) {
2416                                                 halbtc8192e2ant_ps_tdma(
2417                                                         btcoexist, NORMAL_EXEC,
2418                                                         true, 10);
2419                                                 coex_dm->ps_tdma_du_adj_type =
2420                                                         10;
2421                                         } else if (coex_dm->cur_ps_tdma == 10) {
2422                                                 halbtc8192e2ant_ps_tdma(
2423                                                         btcoexist, NORMAL_EXEC,
2424                                                         true, 11);
2425                                                 coex_dm->ps_tdma_du_adj_type =
2426                                                         11;
2427                                         } else if (coex_dm->cur_ps_tdma == 11) {
2428                                                 halbtc8192e2ant_ps_tdma(
2429                                                         btcoexist, NORMAL_EXEC,
2430                                                         true, 12);
2431                                                 coex_dm->ps_tdma_du_adj_type =
2432                                                         12;
2433                                         }
2434                                 } else if (result == 1) {
2435                                         if (coex_dm->cur_ps_tdma == 4) {
2436                                                 halbtc8192e2ant_ps_tdma(
2437                                                         btcoexist, NORMAL_EXEC,
2438                                                         true, 3);
2439                                                 coex_dm->ps_tdma_du_adj_type =
2440                                                         3;
2441                                         } else if (coex_dm->cur_ps_tdma == 3) {
2442                                                 halbtc8192e2ant_ps_tdma(
2443                                                         btcoexist, NORMAL_EXEC,
2444                                                         true, 2);
2445                                                 coex_dm->ps_tdma_du_adj_type =
2446                                                         2;
2447                                         } else if (coex_dm->cur_ps_tdma == 2) {
2448                                                 halbtc8192e2ant_ps_tdma(
2449                                                         btcoexist, NORMAL_EXEC,
2450                                                         true, 2);
2451                                                 coex_dm->ps_tdma_du_adj_type =
2452                                                         2;
2453                                         } else if (coex_dm->cur_ps_tdma == 12) {
2454                                                 halbtc8192e2ant_ps_tdma(
2455                                                         btcoexist, NORMAL_EXEC,
2456                                                         true, 11);
2457                                                 coex_dm->ps_tdma_du_adj_type =
2458                                                         11;
2459                                         } else if (coex_dm->cur_ps_tdma == 11) {
2460                                                 halbtc8192e2ant_ps_tdma(
2461                                                         btcoexist, NORMAL_EXEC,
2462                                                         true, 10);
2463                                                 coex_dm->ps_tdma_du_adj_type =
2464                                                         10;
2465                                         } else if (coex_dm->cur_ps_tdma == 10) {
2466                                                 halbtc8192e2ant_ps_tdma(
2467                                                         btcoexist, NORMAL_EXEC,
2468                                                         true, 10);
2469                                                 coex_dm->ps_tdma_du_adj_type =
2470                                                         10;
2471                                         }
2472                                 }
2473                         }
2474                 } else if (max_interval == 3) {
2475                         if (tx_pause) {
2476                                 if (coex_dm->cur_ps_tdma == 1) {
2477                                         halbtc8192e2ant_ps_tdma(btcoexist,
2478                                                         NORMAL_EXEC, true, 7);
2479                                         coex_dm->ps_tdma_du_adj_type = 7;
2480                                 } else if (coex_dm->cur_ps_tdma == 2) {
2481                                         halbtc8192e2ant_ps_tdma(btcoexist,
2482                                                         NORMAL_EXEC, true, 7);
2483                                         coex_dm->ps_tdma_du_adj_type = 7;
2484                                 } else if (coex_dm->cur_ps_tdma == 3) {
2485                                         halbtc8192e2ant_ps_tdma(btcoexist,
2486                                                         NORMAL_EXEC, true, 7);
2487                                         coex_dm->ps_tdma_du_adj_type = 7;
2488                                 } else if (coex_dm->cur_ps_tdma == 4) {
2489                                         halbtc8192e2ant_ps_tdma(btcoexist,
2490                                                         NORMAL_EXEC, true, 8);
2491                                         coex_dm->ps_tdma_du_adj_type = 8;
2492                                 }
2493                                 if (coex_dm->cur_ps_tdma == 9) {
2494                                         halbtc8192e2ant_ps_tdma(btcoexist,
2495                                                         NORMAL_EXEC, true, 15);
2496                                         coex_dm->ps_tdma_du_adj_type = 15;
2497                                 } else if (coex_dm->cur_ps_tdma == 10) {
2498                                         halbtc8192e2ant_ps_tdma(btcoexist,
2499                                                         NORMAL_EXEC, true, 15);
2500                                         coex_dm->ps_tdma_du_adj_type = 15;
2501                                 } else if (coex_dm->cur_ps_tdma == 11) {
2502                                         halbtc8192e2ant_ps_tdma(btcoexist,
2503                                                         NORMAL_EXEC, true, 15);
2504                                         coex_dm->ps_tdma_du_adj_type = 15;
2505                                 } else if (coex_dm->cur_ps_tdma == 12) {
2506                                         halbtc8192e2ant_ps_tdma(btcoexist,
2507                                                         NORMAL_EXEC, true, 16);
2508                                         coex_dm->ps_tdma_du_adj_type = 16;
2509                                 }
2510                                 if (result == -1) {
2511                                         if (coex_dm->cur_ps_tdma == 5) {
2512                                                 halbtc8192e2ant_ps_tdma(
2513                                                         btcoexist, NORMAL_EXEC,
2514                                                         true, 7);
2515                                                 coex_dm->ps_tdma_du_adj_type =
2516                                                         7;
2517                                         } else if (coex_dm->cur_ps_tdma == 6) {
2518                                                 halbtc8192e2ant_ps_tdma(
2519                                                         btcoexist, NORMAL_EXEC,
2520                                                         true, 7);
2521                                                 coex_dm->ps_tdma_du_adj_type =
2522                                                         7;
2523                                         } else if (coex_dm->cur_ps_tdma == 7) {
2524                                                 halbtc8192e2ant_ps_tdma(
2525                                                         btcoexist, NORMAL_EXEC,
2526                                                         true, 8);
2527                                                 coex_dm->ps_tdma_du_adj_type =
2528                                                         8;
2529                                         } else if (coex_dm->cur_ps_tdma == 13) {
2530                                                 halbtc8192e2ant_ps_tdma(
2531                                                         btcoexist, NORMAL_EXEC,
2532                                                         true, 15);
2533                                                 coex_dm->ps_tdma_du_adj_type =
2534                                                         15;
2535                                         } else if (coex_dm->cur_ps_tdma == 14) {
2536                                                 halbtc8192e2ant_ps_tdma(
2537                                                         btcoexist, NORMAL_EXEC,
2538                                                         true, 15);
2539                                                 coex_dm->ps_tdma_du_adj_type =
2540                                                         15;
2541                                         } else if (coex_dm->cur_ps_tdma == 15) {
2542                                                 halbtc8192e2ant_ps_tdma(
2543                                                         btcoexist, NORMAL_EXEC,
2544                                                         true, 16);
2545                                                 coex_dm->ps_tdma_du_adj_type =
2546                                                         16;
2547                                         }
2548                                 } else if (result == 1) {
2549                                         if (coex_dm->cur_ps_tdma == 8) {
2550                                                 halbtc8192e2ant_ps_tdma(
2551                                                         btcoexist, NORMAL_EXEC,
2552                                                         true, 7);
2553                                                 coex_dm->ps_tdma_du_adj_type =
2554                                                         7;
2555                                         } else if (coex_dm->cur_ps_tdma == 7) {
2556                                                 halbtc8192e2ant_ps_tdma(
2557                                                         btcoexist, NORMAL_EXEC,
2558                                                         true, 7);
2559                                                 coex_dm->ps_tdma_du_adj_type =
2560                                                         7;
2561                                         } else if (coex_dm->cur_ps_tdma == 6) {
2562                                                 halbtc8192e2ant_ps_tdma(
2563                                                         btcoexist, NORMAL_EXEC,
2564                                                         true, 7);
2565                                                 coex_dm->ps_tdma_du_adj_type =
2566                                                         7;
2567                                         } else if (coex_dm->cur_ps_tdma == 16) {
2568                                                 halbtc8192e2ant_ps_tdma(
2569                                                         btcoexist, NORMAL_EXEC,
2570                                                         true, 15);
2571                                                 coex_dm->ps_tdma_du_adj_type =
2572                                                         15;
2573                                         } else if (coex_dm->cur_ps_tdma == 15) {
2574                                                 halbtc8192e2ant_ps_tdma(
2575                                                         btcoexist, NORMAL_EXEC,
2576                                                         true, 15);
2577                                                 coex_dm->ps_tdma_du_adj_type =
2578                                                         15;
2579                                         } else if (coex_dm->cur_ps_tdma == 14) {
2580                                                 halbtc8192e2ant_ps_tdma(
2581                                                         btcoexist, NORMAL_EXEC,
2582                                                         true, 15);
2583                                                 coex_dm->ps_tdma_du_adj_type =
2584                                                         15;
2585                                         }
2586                                 }
2587                         } else {
2588                                 if (coex_dm->cur_ps_tdma == 5) {
2589                                         halbtc8192e2ant_ps_tdma(btcoexist,
2590                                                         NORMAL_EXEC, true, 3);
2591                                         coex_dm->ps_tdma_du_adj_type = 3;
2592                                 } else if (coex_dm->cur_ps_tdma == 6) {
2593                                         halbtc8192e2ant_ps_tdma(btcoexist,
2594                                                         NORMAL_EXEC, true, 3);
2595                                         coex_dm->ps_tdma_du_adj_type = 3;
2596                                 } else if (coex_dm->cur_ps_tdma == 7) {
2597                                         halbtc8192e2ant_ps_tdma(btcoexist,
2598                                                         NORMAL_EXEC, true, 3);
2599                                         coex_dm->ps_tdma_du_adj_type = 3;
2600                                 } else if (coex_dm->cur_ps_tdma == 8) {
2601                                         halbtc8192e2ant_ps_tdma(btcoexist,
2602                                                         NORMAL_EXEC, true, 4);
2603                                         coex_dm->ps_tdma_du_adj_type = 4;
2604                                 }
2605                                 if (coex_dm->cur_ps_tdma == 13) {
2606                                         halbtc8192e2ant_ps_tdma(btcoexist,
2607                                                         NORMAL_EXEC, true, 11);
2608                                         coex_dm->ps_tdma_du_adj_type = 11;
2609                                 } else if (coex_dm->cur_ps_tdma == 14) {
2610                                         halbtc8192e2ant_ps_tdma(btcoexist,
2611                                                         NORMAL_EXEC, true, 11);
2612                                         coex_dm->ps_tdma_du_adj_type = 11;
2613                                 } else if (coex_dm->cur_ps_tdma == 15) {
2614                                         halbtc8192e2ant_ps_tdma(btcoexist,
2615                                                         NORMAL_EXEC, true, 11);
2616                                         coex_dm->ps_tdma_du_adj_type = 11;
2617                                 } else if (coex_dm->cur_ps_tdma == 16) {
2618                                         halbtc8192e2ant_ps_tdma(btcoexist,
2619                                                         NORMAL_EXEC, true, 12);
2620                                         coex_dm->ps_tdma_du_adj_type = 12;
2621                                 }
2622                                 if (result == -1) {
2623                                         if (coex_dm->cur_ps_tdma == 1) {
2624                                                 halbtc8192e2ant_ps_tdma(
2625                                                         btcoexist, NORMAL_EXEC,
2626                                                         true, 3);
2627                                                 coex_dm->ps_tdma_du_adj_type =
2628                                                         3;
2629                                         } else if (coex_dm->cur_ps_tdma == 2) {
2630                                                 halbtc8192e2ant_ps_tdma(
2631                                                         btcoexist, NORMAL_EXEC,
2632                                                         true, 3);
2633                                                 coex_dm->ps_tdma_du_adj_type =
2634                                                         3;
2635                                         } else if (coex_dm->cur_ps_tdma == 3) {
2636                                                 halbtc8192e2ant_ps_tdma(
2637                                                         btcoexist, NORMAL_EXEC,
2638                                                         true, 4);
2639                                                 coex_dm->ps_tdma_du_adj_type =
2640                                                         4;
2641                                         } else if (coex_dm->cur_ps_tdma == 9) {
2642                                                 halbtc8192e2ant_ps_tdma(
2643                                                         btcoexist, NORMAL_EXEC,
2644                                                         true, 11);
2645                                                 coex_dm->ps_tdma_du_adj_type =
2646                                                         11;
2647                                         } else if (coex_dm->cur_ps_tdma == 10) {
2648                                                 halbtc8192e2ant_ps_tdma(
2649                                                         btcoexist, NORMAL_EXEC,
2650                                                         true, 11);
2651                                                 coex_dm->ps_tdma_du_adj_type =
2652                                                         11;
2653                                         } else if (coex_dm->cur_ps_tdma == 11) {
2654                                                 halbtc8192e2ant_ps_tdma(
2655                                                         btcoexist, NORMAL_EXEC,
2656                                                         true, 12);
2657                                                 coex_dm->ps_tdma_du_adj_type =
2658                                                         12;
2659                                         }
2660                                 } else if (result == 1) {
2661                                         if (coex_dm->cur_ps_tdma == 4) {
2662                                                 halbtc8192e2ant_ps_tdma(
2663                                                         btcoexist, NORMAL_EXEC,
2664                                                         true, 3);
2665                                                 coex_dm->ps_tdma_du_adj_type =
2666                                                         3;
2667                                         } else if (coex_dm->cur_ps_tdma == 3) {
2668                                                 halbtc8192e2ant_ps_tdma(
2669                                                         btcoexist, NORMAL_EXEC,
2670                                                         true, 3);
2671                                                 coex_dm->ps_tdma_du_adj_type =
2672                                                         3;
2673                                         } else if (coex_dm->cur_ps_tdma == 2) {
2674                                                 halbtc8192e2ant_ps_tdma(
2675                                                         btcoexist, NORMAL_EXEC,
2676                                                         true, 3);
2677                                                 coex_dm->ps_tdma_du_adj_type =
2678                                                         3;
2679                                         } else if (coex_dm->cur_ps_tdma == 12) {
2680                                                 halbtc8192e2ant_ps_tdma(
2681                                                         btcoexist, NORMAL_EXEC,
2682                                                         true, 11);
2683                                                 coex_dm->ps_tdma_du_adj_type =
2684                                                         11;
2685                                         } else if (coex_dm->cur_ps_tdma == 11) {
2686                                                 halbtc8192e2ant_ps_tdma(
2687                                                         btcoexist, NORMAL_EXEC,
2688                                                         true, 11);
2689                                                 coex_dm->ps_tdma_du_adj_type =
2690                                                         11;
2691                                         } else if (coex_dm->cur_ps_tdma == 10) {
2692                                                 halbtc8192e2ant_ps_tdma(
2693                                                         btcoexist, NORMAL_EXEC,
2694                                                         true, 11);
2695                                                 coex_dm->ps_tdma_du_adj_type =
2696                                                         11;
2697                                         }
2698                                 }
2699                         }
2700                 }
2701         }
2702
2703         /* if current PsTdma not match with the recorded one (when scan, dhcp...), */
2704         /* then we have to adjust it back to the previous record one. */
2705         if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
2706                 boolean scan = false, link = false, roam = false;
2707
2708                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2709                         "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n",
2710                             coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
2711                 BTC_TRACE(trace_buf);
2712
2713                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2714                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2715                 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2716
2717                 if (!scan && !link && !roam)
2718                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2719                                                 coex_dm->ps_tdma_du_adj_type);
2720                 else {
2721                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
2722                                 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
2723                         BTC_TRACE(trace_buf);
2724                 }
2725         }
2726 }
2727
2728 /* ******************
2729  * pstdma for wifi rssi low
2730  * ****************** */
2731 void halbtc8192e2ant_tdma_duration_adjust_for_wifi_rssi_low(
2732         IN struct btc_coexist *btcoexist/* , */ /* IN u8 wifi_status */)
2733 {
2734         static s32              up, dn, m, n, wait_count;
2735         s32                     result;   /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
2736         u8                      retry_count = 0, bt_info_ext;
2737
2738         coex_dm->auto_tdma_adjust = false;
2739
2740         retry_count = coex_sta->bt_retry_cnt;
2741         bt_info_ext = coex_sta->bt_info_ext;
2742
2743         if (!coex_dm->auto_tdma_adjust_low_rssi) {
2744                 coex_dm->auto_tdma_adjust_low_rssi = true;
2745                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 81);
2746                 coex_dm->ps_tdma_du_adj_type = 81;
2747                 /* ============ */
2748                 up = 0;
2749                 dn = 0;
2750                 m = 1;
2751                 n = 3;
2752                 result = 0;
2753                 wait_count = 0;
2754         } else {
2755                 /* acquire the BT TRx retry count from BT_Info byte2
2756                 *               retry_count = coex_sta->bt_retry_cnt;
2757                 *               bt_info_ext = coex_sta->bt_info_ext; */
2758                 result = 0;
2759                 wait_count++;
2760
2761                 if ((coex_sta->low_priority_tx) > 1050 ||
2762                     (coex_sta->low_priority_rx) > 1250)
2763                         retry_count++;
2764
2765                 if (retry_count ==
2766                     0) { /* no retry in the last 2-second duration */
2767                         up++;
2768                         dn--;
2769
2770                         if (dn <= 0)
2771                                 dn = 0;
2772
2773                         if (up >= n) {  /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */
2774                                 wait_count = 0;
2775                                 n = 3;
2776                                 up = 0;
2777                                 dn = 0;
2778                                 result = 1;
2779                         }
2780                 } else if (retry_count <=
2781                            3) { /* <=3 retry in the last 2-second duration */
2782                         up--;
2783                         dn++;
2784
2785                         if (up <= 0)
2786                                 up = 0;
2787
2788                         if (dn == 2) {  /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */
2789                                 if (wait_count <= 2)
2790                                         m++; /* to avoid loop between the two levels */
2791                                 else
2792                                         m = 1;
2793
2794                                 if (m >= 20)  /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
2795                                         m = 20;
2796
2797                                 n = 3 * m;
2798                                 up = 0;
2799                                 dn = 0;
2800                                 wait_count = 0;
2801                                 result = -1;
2802                         }
2803                 } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */
2804                         if (wait_count == 1)
2805                                 m++; /* to avoid loop between the two levels */
2806                         else
2807                                 m = 1;
2808
2809                         if (m >= 20)  /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
2810                                 m = 20;
2811
2812                         n = 3 * m;
2813                         up = 0;
2814                         dn = 0;
2815                         wait_count = 0;
2816                         result = -1;
2817                 }
2818
2819                 if (result == -1) {
2820                         if (coex_dm->cur_ps_tdma == 80) {
2821                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2822                                                         true, 81);
2823                                 coex_dm->ps_tdma_du_adj_type = 81;
2824                         } else if (coex_dm->cur_ps_tdma == 81) {
2825                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2826                                                         true, 82);
2827                                 coex_dm->ps_tdma_du_adj_type = 82;
2828                         } else if (coex_dm->cur_ps_tdma == 82) {
2829                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2830                                                         true, 83);
2831                                 coex_dm->ps_tdma_du_adj_type = 83;
2832                         } else if (coex_dm->cur_ps_tdma == 83) {
2833                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2834                                                         true, 84);
2835                                 coex_dm->ps_tdma_du_adj_type = 84;
2836                         }
2837                 } else if (result == 1) {
2838                         if (coex_dm->cur_ps_tdma == 84) {
2839                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2840                                                         true, 83);
2841                                 coex_dm->ps_tdma_du_adj_type = 83;
2842                         } else if (coex_dm->cur_ps_tdma == 83) {
2843                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2844                                                         true, 82);
2845                                 coex_dm->ps_tdma_du_adj_type = 82;
2846                         } else if (coex_dm->cur_ps_tdma == 82) {
2847                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2848                                                         true, 81);
2849                                 coex_dm->ps_tdma_du_adj_type = 81;
2850                         } else if ((coex_dm->cur_ps_tdma == 81) &&
2851                                    (coex_sta->scan_ap_num <= 5)) {
2852                                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2853                                                         true, 81);
2854                                 coex_dm->ps_tdma_du_adj_type = 81;
2855                         }
2856                 }
2857
2858                 if (coex_dm->cur_ps_tdma != 80 &&
2859                     coex_dm->cur_ps_tdma != 81 &&
2860                     coex_dm->cur_ps_tdma != 82 &&
2861                     coex_dm->cur_ps_tdma != 83 &&
2862                     coex_dm->cur_ps_tdma != 84) {
2863                         /* recover to previous adjust type */
2864                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
2865                                                 coex_dm->ps_tdma_du_adj_type);
2866                 }
2867         }
2868 }
2869
2870
2871 void halbtc8192e2ant_get_bt_rssi_threshold(IN struct btc_coexist *btcoexist,
2872                 IN u8 *pThres0, IN u8 *pThres1)
2873 {
2874         u8 ant_type;
2875
2876         struct  btc_board_info  *board_info = &btcoexist->board_info;
2877
2878         ant_type = board_info->ant_type;
2879
2880         switch (ant_type) {
2881         case BTC_ANT_TYPE_0:
2882                 *pThres0 = 100;
2883                 *pThres1 = 100;
2884                 break;
2885         case BTC_ANT_TYPE_1:
2886                 *pThres0 = 34;
2887                 *pThres1 = 42;
2888                 break;
2889         case BTC_ANT_TYPE_2:
2890                 *pThres0 = 34;
2891                 *pThres1 = 42;
2892                 break;
2893         case BTC_ANT_TYPE_3:
2894                 *pThres0 = 34;
2895                 *pThres1 = 42;
2896                 break;
2897         case BTC_ANT_TYPE_4:
2898                 *pThres0 = 34;
2899                 *pThres1 = 42;
2900                 break;
2901         default:
2902                 break;
2903         }
2904 }
2905
2906
2907
2908
2909 /* SCO only or SCO+PAN(HS) */
2910 void halbtc8192e2ant_action_sco(IN struct btc_coexist *btcoexist)
2911 {
2912         u8      wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
2913         u32     wifi_bw;
2914         u8      bt_thresh0 = 0, bt_thresh1 = 0;
2915
2916         halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
2917                                               &bt_thresh1);
2918         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
2919                         bt_thresh1);
2920
2921         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
2922                           0);
2923
2924         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
2925                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
2926                                                  0x0, 0x0);
2927         else
2928                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
2929                                                  0x0, 0x0);
2930
2931
2932         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
2933                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2934         else
2935                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2936
2937
2938         if (BTC_RSSI_HIGH(wifi_rssi_state) &&   (!BTC_RSSI_LOW(bt_rssi_state)))
2939                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2940         else
2941                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
2942
2943
2944         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
2945         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2946         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2947
2948         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
2949         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
2950 }
2951
2952 void halbtc8192e2ant_action_sco_pan(IN struct btc_coexist *btcoexist)
2953 {
2954         u8      wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
2955         u32     wifi_bw;
2956         u8              bt_thresh0 = 0, bt_thresh1 = 0;
2957
2958
2959         halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
2960                                               &bt_thresh1);
2961         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
2962                         bt_thresh1);
2963
2964         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
2965                           0);
2966
2967         if ((BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))))
2968                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
2969                                                  0x0, 0x0);
2970         else
2971                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
2972                                                  0x4);
2973
2974
2975         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
2976                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
2977         else
2978                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
2979
2980
2981
2982         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
2983                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2984         else
2985                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86);
2986
2987         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2988         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
2989
2990         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
2991         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)) &&
2992             (coex_sta->scan_ap_num < NOISY_AP_NUM_THRESH_8192E))
2993                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
2994                                               0x18);
2995         else if (BTC_RSSI_HIGH(wifi_rssi_state) &&
2996                  (!BTC_RSSI_LOW(bt_rssi_state)) &&
2997                  (coex_sta->scan_ap_num > NOISY_AP_NUM_THRESH_8192E))
2998                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
2999                                               0x18);
3000         else
3001                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3002                                               0x18);
3003 }
3004
3005
3006 void halbtc8192e2ant_action_hid(IN struct btc_coexist *btcoexist)
3007 {
3008         u8      wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3009         u32     wifi_bw;
3010         u8      anttype = 0;
3011
3012         btcoexist->btc_get(btcoexist, BTC_GET_U1_ANT_TYPE, &anttype);
3013
3014         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
3015                           0);
3016         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3017
3018         if (anttype == 0) {
3019                 /*ANTTYPE = 0   92E 2ant with SPDT*/
3020                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3021                                                  0x0, 0x0);
3022                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
3023                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3024         } else if (anttype == 1) {
3025                 /*92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation*/
3026                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3027                                                  0x0, 0x0);
3028                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
3029                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3030         } else if (anttype == 2) {
3031                 /*ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation*/
3032                 if (BTC_RSSI_HIGH(wifi_rssi_state) &&
3033                     (!BTC_RSSI_LOW(bt_rssi_state))) {
3034                         halbtc8192e2ant_power_save_state(btcoexist,
3035                                                  BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3036                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3037                                                 9);
3038                         halbtc8192e2ant_coex_table_with_type(btcoexist,
3039                                                              NORMAL_EXEC, 3);
3040                 } else {
3041                         halbtc8192e2ant_power_save_state(btcoexist,
3042                                                  BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3043                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3044                                                 9);
3045                         halbtc8192e2ant_coex_table_with_type(btcoexist,
3046                                                              NORMAL_EXEC, 3);
3047                 }
3048         } else if (anttype == 3) {
3049                 /*ANTTYPE = 3,  92E 3ant with good ant. isolation*/
3050                 if (BTC_RSSI_HIGH(wifi_rssi_state) &&
3051                     (!BTC_RSSI_LOW(bt_rssi_state))) {
3052                         halbtc8192e2ant_power_save_state(btcoexist,
3053                                                  BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3054                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
3055                                                 1);
3056                         halbtc8192e2ant_coex_table_with_type(btcoexist,
3057                                                              NORMAL_EXEC, 0);
3058                 } else {
3059                         halbtc8192e2ant_power_save_state(btcoexist,
3060                                                  BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3061                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
3062                                                 1);
3063                         halbtc8192e2ant_coex_table_with_type(btcoexist,
3064                                                              NORMAL_EXEC, 0);
3065                 }
3066         }
3067
3068         halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
3069                                          0x0);
3070         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3071         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
3072         halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3073         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3074         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3075
3076         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3077         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
3078 }
3079
3080 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
3081 void halbtc8192e2ant_action_a2dp(IN struct btc_coexist *btcoexist)
3082 {
3083         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3084         u32             wifi_bw;
3085         boolean         long_dist = false;
3086         u8      anttype = 0;
3087
3088         btcoexist->btc_get(btcoexist, BTC_GET_U1_ANT_TYPE, &anttype);
3089
3090         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
3091                           0);
3092         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3093
3094         if (anttype == 0) {
3095                 /*ANTTYPE = 0   92E 2ant with SPDT*/
3096                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
3097                                                  0x4);
3098                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 87);
3099                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
3100         } else if (anttype == 1) {
3101                 /*92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation*/
3102                 if (BTC_RSSI_HIGH(wifi_rssi_state) &&
3103                     (!BTC_RSSI_LOW(bt_rssi_state))) {
3104                         halbtc8192e2ant_power_save_state(btcoexist,
3105                                                  BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3106                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3107                                                 25);
3108                         halbtc8192e2ant_coex_table_with_type(btcoexist,
3109                                                              NORMAL_EXEC, 7);
3110                 } else {
3111                         halbtc8192e2ant_power_save_state(btcoexist,
3112                                                  BTC_PS_LPS_ON, 0x50, 0x4);
3113                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3114                                                 87);
3115                         halbtc8192e2ant_coex_table_with_type(btcoexist,
3116                                                              NORMAL_EXEC, 7);
3117                 }
3118         } else if (anttype == 2) {
3119                 /*ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation*/
3120                 if (BTC_RSSI_HIGH(wifi_rssi_state) &&
3121                     (!BTC_RSSI_LOW(bt_rssi_state))) {
3122                         halbtc8192e2ant_power_save_state(btcoexist,
3123                                                  BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3124                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3125                                                 22);
3126                         halbtc8192e2ant_coex_table_with_type(btcoexist,
3127                                                              NORMAL_EXEC, 5);
3128                 } else {
3129                         halbtc8192e2ant_power_save_state(btcoexist,
3130                                                  BTC_PS_LPS_ON, 0x50, 0x4);
3131                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3132                                                 87);
3133                         halbtc8192e2ant_coex_table_with_type(btcoexist,
3134                                                              NORMAL_EXEC, 7);
3135                 }
3136         } else if (anttype == 3) {
3137                 /*ANTTYPE = 3,  92E 3ant with good ant. isolation*/
3138                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3139                                                  0x0, 0x0);
3140                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3141                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3142         }
3143
3144         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3145         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3146         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3147         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)) &&
3148             (coex_sta->scan_ap_num < NOISY_AP_NUM_THRESH_8192E))
3149                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3150                                               0x18);
3151         else if (BTC_RSSI_HIGH(wifi_rssi_state) &&
3152                  (!BTC_RSSI_LOW(bt_rssi_state)) &&
3153                  (coex_sta->scan_ap_num > NOISY_AP_NUM_THRESH_8192E))
3154                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, true,
3155                                               0x06);
3156         else
3157                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3158                                               0x18);
3159 }
3160
3161 void halbtc8192e2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
3162 {
3163         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3164         u32             wifi_bw;
3165
3166         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
3167                           0);
3168         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3169
3170         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3171
3172         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3173         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3174
3175         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
3176             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3177                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
3178                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3179         } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
3180                    (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3181                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3182                                                      2);
3183                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3184         } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3185                    (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3186                 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
3187                                                      2);
3188                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
3189         }
3190
3191         /* sw mechanism */
3192         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3193         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3194                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3195                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3196                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3197                                                       false, false);
3198                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3199                                                       true, 0x6);
3200                 } else {
3201                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3202                                                       false, false);
3203                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3204                                                       true, 0x6);
3205                 }
3206         } else {
3207                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3208                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3209                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3210                                                       false, false);
3211                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3212                                                       true, 0x6);
3213                 } else {
3214                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3215                                                       false, false);
3216                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3217                                                       true, 0x6);
3218                 }
3219         }
3220 }
3221
3222 void halbtc8192e2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
3223 {
3224         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3225         u32             wifi_bw;
3226         u8              bt_thresh0 = 0, bt_thresh1 = 0;
3227
3228         halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
3229                                               &bt_thresh1);
3230         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
3231                         bt_thresh1);
3232         /*      wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34, 0); */
3233         wifi_rssi_state = BTC_RSSI_STATE_LOW;
3234
3235         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
3236                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3237                                                  0x0, 0x0);
3238         else
3239                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
3240                                                  0x4);
3241
3242         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
3243                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3244         else
3245                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3246
3247         if (BTC_RSSI_HIGH(wifi_rssi_state) &&   (!BTC_RSSI_LOW(bt_rssi_state)))
3248                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
3249         else
3250                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 85);
3251
3252         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3253         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3254
3255         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3256         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)) &&
3257             (coex_sta->scan_ap_num < NOISY_AP_NUM_THRESH_8192E))
3258                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3259                                               0x18);
3260         else if (BTC_RSSI_HIGH(wifi_rssi_state) &&
3261                  (!BTC_RSSI_LOW(bt_rssi_state)) &&
3262                  (coex_sta->scan_ap_num > NOISY_AP_NUM_THRESH_8192E))
3263                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3264                                               0x18);
3265         else
3266                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3267                                               0x18);
3268 }
3269
3270 /* PAN(HS) only */
3271 void halbtc8192e2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
3272 {
3273         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3274         u32             wifi_bw;
3275
3276         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
3277                           0);
3278         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3279
3280         /*      halbtc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);*/
3281         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3282
3283         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3284
3285         halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3286
3287         if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
3288             (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW))
3289                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
3290         else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
3291                  (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM))
3292                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
3293         else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
3294                  (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
3295                 halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
3296         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3297
3298         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3299         if (BTC_WIFI_BW_HT40 == wifi_bw) {
3300                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3301                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3302                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3303                                                       false, false);
3304                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3305                                                       false, 0x18);
3306                 } else {
3307                         halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
3308                                                       false, false);
3309                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3310                                                       false, 0x18);
3311                 }
3312         } else {
3313                 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
3314                     (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3315                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3316                                                       false, false);
3317                         halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
3318                                                       false, 0x18);
3319                 } else {
3320                         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
3321                                                       false, false);
3322                         halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
3323                                                       false, 0x18);
3324                 }
3325         }
3326 }
3327
3328 /* PAN(EDR)+A2DP */
3329 void halbtc8192e2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
3330 {
3331         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3332         u32             wifi_bw;
3333         u8              bt_thresh0 = 0, bt_thresh1 = 0;
3334
3335         halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
3336                                               &bt_thresh1);
3337         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
3338                         bt_thresh1);
3339         /*      wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34, 0); */
3340         wifi_rssi_state = BTC_RSSI_STATE_LOW;
3341
3342         if ((BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))))
3343                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3344                                                  0x0, 0x0);
3345         else
3346                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
3347                                                  0x4);
3348
3349         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
3350                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
3351         else
3352                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3353
3354         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
3355                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
3356         else
3357                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86);
3358
3359         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3360         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3361
3362         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3363         if (BTC_RSSI_HIGH(wifi_rssi_state) &&   (!BTC_RSSI_LOW(bt_rssi_state)) &&
3364             (coex_sta->scan_ap_num < NOISY_AP_NUM_THRESH_8192E))
3365                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3366                                               0x18);
3367         else if (BTC_RSSI_HIGH(wifi_rssi_state) &&
3368                  (!BTC_RSSI_LOW(bt_rssi_state)) &&
3369                  (coex_sta->scan_ap_num > NOISY_AP_NUM_THRESH_8192E))
3370                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3371                                               0x18);
3372         else
3373                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3374                                               0x18);
3375
3376 }
3377
3378 void halbtc8192e2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
3379 {
3380         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3381         u32             wifi_bw;
3382         u8              bt_thresh0 = 0, bt_thresh1 = 0;
3383
3384         halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
3385                                               &bt_thresh1);
3386         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
3387                         bt_thresh1);
3388
3389         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
3390                           0);
3391
3392         if ((BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))))
3393                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3394                                                  0x0, 0x0);
3395         else
3396                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
3397                                                  0x4);
3398
3399         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
3400                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3401         else
3402                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3403
3404         if (BTC_RSSI_HIGH(wifi_rssi_state) &&   (!BTC_RSSI_LOW(bt_rssi_state)))
3405                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
3406         else
3407                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86);
3408
3409         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3410         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3411
3412         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3413         if (BTC_RSSI_HIGH(wifi_rssi_state) &&   (!BTC_RSSI_LOW(bt_rssi_state)) &&
3414             (coex_sta->scan_ap_num < NOISY_AP_NUM_THRESH_8192E))
3415                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3416                                               0x18);
3417         else if (BTC_RSSI_HIGH(wifi_rssi_state) &&
3418                  (!BTC_RSSI_LOW(bt_rssi_state)) &&
3419                  (coex_sta->scan_ap_num > NOISY_AP_NUM_THRESH_8192E))
3420                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3421                                               0x18);
3422         else
3423                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3424                                               0x18);
3425
3426
3427 }
3428
3429 /* HID+A2DP+PAN(EDR) */
3430 void halbtc8192e2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
3431 {
3432         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3433         u32             wifi_bw;
3434         u8              bt_thresh0 = 0, bt_thresh1 = 0;
3435
3436         halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
3437                                               &bt_thresh1);
3438         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
3439                         bt_thresh1);
3440         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
3441                           0);
3442
3443         if ((BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))))
3444                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3445                                                  0x0, 0x0);
3446         else
3447                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
3448                                                  0x4);
3449
3450         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
3451                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
3452         else
3453                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3454
3455         if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
3456                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
3457         else
3458                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86);
3459
3460         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3461         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3462
3463         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3464         if (BTC_RSSI_HIGH(wifi_rssi_state) &&   (!BTC_RSSI_LOW(bt_rssi_state)) &&
3465             (coex_sta->scan_ap_num < NOISY_AP_NUM_THRESH_8192E))
3466                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3467                                               0x18);
3468         else if (BTC_RSSI_HIGH(wifi_rssi_state) &&
3469                  (!BTC_RSSI_LOW(bt_rssi_state)) &&
3470                  (coex_sta->scan_ap_num > NOISY_AP_NUM_THRESH_8192E))
3471                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3472                                               0x18);
3473         else
3474                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3475                                               0x18);
3476 }
3477
3478 void halbtc8192e2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
3479 {
3480         u8              wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
3481         u32             wifi_bw;
3482         u8              bt_thresh0 = 0, bt_thresh1 = 0, anttype = 0;
3483
3484         btcoexist->btc_get(btcoexist, BTC_GET_U1_ANT_TYPE, &anttype);
3485
3486         wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
3487                           0);
3488         bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
3489
3490         if (anttype == 0) {
3491                 /*92E 2ant with SPDT*/
3492                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
3493                                                  0x4);
3494                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 87);
3495                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
3496
3497         } else if (anttype == 1) {
3498                 /*92E 2ant with coupler and bad ant. isolation, 92E 3ant with bad ant. isolation*/
3499                 if (BTC_RSSI_HIGH(wifi_rssi_state) &&
3500                     (!BTC_RSSI_LOW(bt_rssi_state))) {
3501                         halbtc8192e2ant_power_save_state(btcoexist,
3502                                                  BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3503                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3504                                                 25);
3505                         halbtc8192e2ant_coex_table_with_type(btcoexist,
3506                                                              NORMAL_EXEC, 8);
3507                 } else {
3508                         halbtc8192e2ant_power_save_state(btcoexist,
3509                                                  BTC_PS_LPS_ON, 0x50, 0x4);
3510                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3511                                                 87);
3512                         halbtc8192e2ant_coex_table_with_type(btcoexist,
3513                                                              NORMAL_EXEC, 8);
3514                 }
3515         } else if (anttype == 2) {
3516                 /*ANTTYPE = 2, 92E 2ant with coupler and normal/good ant. isolation, 92E 3ant with normal ant. isolation*/
3517                 if (BTC_RSSI_HIGH(wifi_rssi_state) &&
3518                     (!BTC_RSSI_LOW(bt_rssi_state))) {
3519                         halbtc8192e2ant_power_save_state(btcoexist,
3520                                                  BTC_PS_WIFI_NATIVE, 0x0, 0x0);
3521                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3522                                                 25);
3523                         halbtc8192e2ant_coex_table_with_type(btcoexist,
3524                                                              NORMAL_EXEC, 8);
3525                 } else {
3526                         halbtc8192e2ant_power_save_state(btcoexist,
3527                                                  BTC_PS_LPS_ON, 0x50, 0x4);
3528                         halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
3529                                                 87);
3530                         halbtc8192e2ant_coex_table_with_type(btcoexist,
3531                                                              NORMAL_EXEC, 8);
3532                 }
3533         } else if (anttype == 3) {
3534                 /*ANTTYPE = 3,  92E 3ant with good ant. isolation*/
3535                 halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
3536                                                  0x0, 0x0);
3537                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
3538                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
3539         }
3540
3541         halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3542         halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
3543
3544         halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
3545         if (BTC_RSSI_HIGH(wifi_rssi_state) &&   (!BTC_RSSI_LOW(bt_rssi_state)) &&
3546             (coex_sta->scan_ap_num < NOISY_AP_NUM_THRESH_8192E))
3547                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3548                                               0x18);
3549         else if (BTC_RSSI_HIGH(wifi_rssi_state) &&
3550                  (!BTC_RSSI_LOW(bt_rssi_state)) &&
3551                  (coex_sta->scan_ap_num > NOISY_AP_NUM_THRESH_8192E))
3552                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, true,
3553                                               0x06);
3554         else
3555                 halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
3556                                               0x18);
3557 }
3558
3559 void halbtc8192e2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
3560 {
3561         u8                              algorithm = 0;
3562
3563         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3564                     "[BTCoex], RunCoexistMechanism()===>\n");
3565         BTC_TRACE(trace_buf);
3566
3567         if (btcoexist->manual_control) {
3568                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3569                         "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n");
3570                 BTC_TRACE(trace_buf);
3571                 return;
3572         }
3573
3574         if (coex_sta->under_ips) {
3575                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3576                             "[BTCoex], wifi is under IPS !!!\n");
3577                 BTC_TRACE(trace_buf);
3578                 return;
3579         }
3580
3581         algorithm = halbtc8192e2ant_action_algorithm(btcoexist);
3582         if (coex_sta->c2h_bt_inquiry_page &&
3583             (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
3584                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3585                             "[BTCoex], BT is under inquiry/page scan !!\n");
3586                 BTC_TRACE(trace_buf);
3587                 halbtc8192e2ant_action_bt_inquiry(btcoexist);
3588                 return;
3589         }
3590
3591         coex_dm->cur_algorithm = algorithm;
3592         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
3593                     coex_dm->cur_algorithm);
3594         BTC_TRACE(trace_buf);
3595
3596         if (halbtc8192e2ant_is_common_action(btcoexist)) {
3597                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3598                             "[BTCoex], Action 2-Ant common.\n");
3599                 BTC_TRACE(trace_buf);
3600                 coex_dm->auto_tdma_adjust = false;
3601                 coex_dm->auto_tdma_adjust_low_rssi = false;
3602
3603         } else {
3604                 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
3605                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3606                                 "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
3607                                 coex_dm->pre_algorithm, coex_dm->cur_algorithm);
3608                         BTC_TRACE(trace_buf);
3609                         coex_dm->auto_tdma_adjust = false;
3610                         coex_dm->auto_tdma_adjust_low_rssi = false;
3611
3612                 }
3613                 switch (coex_dm->cur_algorithm) {
3614                 case BT_8192E_2ANT_COEX_ALGO_SCO:
3615                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3616                                 "[BTCoex], Action 2-Ant, algorithm = SCO.\n");
3617                         BTC_TRACE(trace_buf);
3618                         halbtc8192e2ant_action_sco(btcoexist);
3619                         break;
3620                 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
3621                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3622                                 "[BTCoex], Action 2-Ant, algorithm = SCO+PAN(EDR).\n");
3623                         BTC_TRACE(trace_buf);
3624                         halbtc8192e2ant_action_sco_pan(btcoexist);
3625                         break;
3626                 case BT_8192E_2ANT_COEX_ALGO_HID:
3627                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3628                                 "[BTCoex], Action 2-Ant, algorithm = HID.\n");
3629                         BTC_TRACE(trace_buf);
3630                         halbtc8192e2ant_action_hid(btcoexist);
3631                         break;
3632                 case BT_8192E_2ANT_COEX_ALGO_A2DP:
3633                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3634                                 "[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
3635                         BTC_TRACE(trace_buf);
3636                         halbtc8192e2ant_action_a2dp(btcoexist);
3637                         break;
3638                 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
3639                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3640                                 "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
3641                         BTC_TRACE(trace_buf);
3642                         halbtc8192e2ant_action_a2dp_pan_hs(btcoexist);
3643                         break;
3644                 case BT_8192E_2ANT_COEX_ALGO_PANEDR:
3645                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3646                                 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
3647                         BTC_TRACE(trace_buf);
3648                         halbtc8192e2ant_action_pan_edr(btcoexist);
3649                         break;
3650                 case BT_8192E_2ANT_COEX_ALGO_PANHS:
3651                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3652                                 "[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
3653                         BTC_TRACE(trace_buf);
3654                         halbtc8192e2ant_action_pan_hs(btcoexist);
3655                         break;
3656                 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
3657                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3658                                 "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
3659                         BTC_TRACE(trace_buf);
3660                         halbtc8192e2ant_action_pan_edr_a2dp(btcoexist);
3661                         break;
3662                 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
3663                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3664                                 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
3665                         BTC_TRACE(trace_buf);
3666                         halbtc8192e2ant_action_pan_edr_hid(btcoexist);
3667                         break;
3668                 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
3669                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3670                                 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
3671                         BTC_TRACE(trace_buf);
3672                         halbtc8192e2ant_action_hid_a2dp_pan_edr(
3673                                 btcoexist);
3674                         break;
3675                 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
3676                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3677                                 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
3678                         BTC_TRACE(trace_buf);
3679                         halbtc8192e2ant_action_hid_a2dp(btcoexist);
3680                         break;
3681                 default:
3682                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3683                                 "[BTCoex], Action 2-Ant, algorithm = unknown!!\n");
3684                         BTC_TRACE(trace_buf);
3685                         halbtc8192e2ant_coex_all_off(btcoexist);
3686                         break;
3687                 }
3688                 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
3689         }
3690 }
3691
3692 void halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
3693                                     IN boolean back_up)
3694 {
3695         u16     u16tmp = 0;
3696         u8      u8tmp = 0;
3697
3698         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3699                     "[BTCoex], 2Ant Init HW Config!!\n");
3700         BTC_TRACE(trace_buf);
3701
3702         if (back_up) {
3703                 /* backup rf 0x1e value */
3704                 coex_dm->bt_rf_0x1e_backup =
3705                         btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e,
3706                                                   0xfffff);
3707
3708                 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
3709                                             0x430);
3710                 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
3711                                             0x434);
3712                 coex_dm->backup_retry_limit = btcoexist->btc_read_2byte(
3713                                                       btcoexist, 0x42a);
3714                 coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte(
3715                                 btcoexist, 0x456);
3716         }
3717
3718         /* antenna sw ctrl to bt */
3719         halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, true, false);
3720
3721         halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
3722
3723         /* antenna switch control parameter */
3724         /*      btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555); */
3725
3726         /* coex parameters */
3727         btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
3728         /* 0x790[5:0]=0x5 */
3729         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
3730         u8tmp &= 0xc0;
3731         u8tmp |= 0x5;
3732         btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
3733
3734         /* enable counter statistics */
3735         btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
3736
3737         /* enable PTA */
3738         btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20);
3739         /* enable mailbox interface */
3740         u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40);
3741         u16tmp |= BIT(9);
3742         btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
3743
3744         /* enable PTA I2C mailbox */
3745         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
3746         u8tmp |= BIT(4);
3747         btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
3748
3749         /* enable bt clock when wifi is disabled. */
3750         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93);
3751         u8tmp |= BIT(0);
3752         btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp);
3753         /* enable bt clock when suspend. */
3754         u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7);
3755         u8tmp |= BIT(0);
3756         btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
3757
3758         /* Give bt_coex_supported_version the default value */
3759         coex_sta->bt_coex_supported_version = 0;
3760 }
3761
3762 /* ************************************************************
3763  * work around function start with wa_halbtc8192e2ant_
3764  * ************************************************************
3765  * ************************************************************
3766  * extern function start with ex_halbtc8192e2ant_
3767  * ************************************************************ */
3768 void ex_halbtc8192e2ant_power_on_setting(IN struct btc_coexist *btcoexist)
3769 {
3770 }
3771
3772 void ex_halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
3773                                        IN boolean wifi_only)
3774 {
3775         halbtc8192e2ant_init_hw_config(btcoexist, true);
3776 }
3777
3778 void ex_halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
3779 {
3780         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
3781                     "[BTCoex], Coex Mechanism Init!!\n");
3782         BTC_TRACE(trace_buf);
3783
3784         halbtc8192e2ant_init_coex_dm(btcoexist);
3785 }
3786
3787 void ex_halbtc8192e2ant_display_coex_info(IN struct btc_coexist *btcoexist)
3788 {
3789         struct  btc_board_info          *board_info = &btcoexist->board_info;
3790         struct  btc_stack_info          *stack_info = &btcoexist->stack_info;
3791         u8                              *cli_buf = btcoexist->cli_buf;
3792         u8                              u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
3793         u16                             u16tmp[4];
3794         u32                             u32tmp[4];
3795         u32                             fa_ofdm, fa_cck, cca_ofdm, cca_cck;
3796         u32                             fw_ver = 0, bt_patch_ver = 0, bt_coex_ver = 0;
3797         u32                             phyver = 0;
3798
3799         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3800                    "\r\n ============[BT Coexist info]============");
3801         CL_PRINTF(cli_buf);
3802
3803         if (btcoexist->manual_control) {
3804                 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3805                         "\r\n ============[Under Manual Control]============");
3806                 CL_PRINTF(cli_buf);
3807                 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3808                            "\r\n ==========================================");
3809                 CL_PRINTF(cli_buf);
3810         }
3811
3812         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3813                    "Ant PG number/ Ant mechanism:",
3814                    board_info->pg_ant_num, board_info->btdm_ant_num);
3815         CL_PRINTF(cli_buf);
3816
3817         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Antenna type:",
3818                    board_info->ant_type);
3819         CL_PRINTF(cli_buf);
3820
3821         btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
3822         btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3823         phyver = btcoexist->btc_get_bt_phydm_version(btcoexist);
3824         bt_coex_ver = ((coex_sta->bt_coex_supported_version & 0xff00) >> 8);
3825
3826         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3827                    "\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)",
3828                    "CoexVer WL/  BT_Desired/ BT_Report",
3829                    glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
3830                    glcoex_ver_btdesired_8192e_2ant, bt_coex_ver,
3831                    (bt_coex_ver == 0xff ? "Unknown" : (bt_coex_ver >=
3832                                    glcoex_ver_btdesired_8192e_2ant ? "Match" :
3833                                    "Mis-Match")));
3834         CL_PRINTF(cli_buf);
3835
3836
3837         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3838                    "\r\n %-35s = 0x%x/ 0x%x/ v%d",
3839                    "W_FW/ B_FW/ Phy", fw_ver, bt_patch_ver, phyver);
3840         CL_PRINTF(cli_buf);
3841
3842         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
3843                    "Wifi channel informed to BT",
3844                    coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
3845                    coex_dm->wifi_chnl_info[2]);
3846         CL_PRINTF(cli_buf);
3847
3848         /* wifi status */
3849         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3850                    "============[Wifi Status]============");
3851         CL_PRINTF(cli_buf);
3852         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
3853
3854         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3855                    "============[BT Status]============");
3856         CL_PRINTF(cli_buf);
3857
3858         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ",
3859                    "BT [status/ rssi/ retryCnt]",
3860                    ((coex_sta->bt_disabled) ? ("disabled") :    ((
3861                    coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan")
3862                            : ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
3863                                coex_dm->bt_status) ? "non-connected idle" :
3864                 ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
3865                                        ? "connected-idle" : "busy")))),
3866                    coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
3867         CL_PRINTF(cli_buf);
3868
3869         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d",
3870                    "SCO/HID/PAN/A2DP",
3871                    stack_info->sco_exist, stack_info->hid_exist,
3872                    stack_info->pan_exist, stack_info->a2dp_exist);
3873         CL_PRINTF(cli_buf);
3874         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO);
3875
3876         bt_info_ext = coex_sta->bt_info_ext;
3877         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
3878                    "BT Info A2DP rate",
3879                    (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate");
3880         CL_PRINTF(cli_buf);
3881
3882         for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) {
3883                 if (coex_sta->bt_info_c2h_cnt[i]) {
3884                         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3885                                 "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)",
3886                                    glbt_info_src_8192e_2ant[i],
3887                                    coex_sta->bt_info_c2h[i][0],
3888                                    coex_sta->bt_info_c2h[i][1],
3889                                    coex_sta->bt_info_c2h[i][2],
3890                                    coex_sta->bt_info_c2h[i][3],
3891                                    coex_sta->bt_info_c2h[i][4],
3892                                    coex_sta->bt_info_c2h[i][5],
3893                                    coex_sta->bt_info_c2h[i][6],
3894                                    coex_sta->bt_info_c2h_cnt[i]);
3895                         CL_PRINTF(cli_buf);
3896                 }
3897         }
3898
3899         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type",
3900                    coex_dm->cur_ss_type);
3901         CL_PRINTF(cli_buf);
3902
3903         /* Sw mechanism  */
3904         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3905                    "============[Sw mechanism]============");
3906         CL_PRINTF(cli_buf);
3907         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
3908                    "SM1[ShRf/ LpRA/ LimDig]",
3909                    coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra,
3910                    coex_dm->limited_dig);
3911         CL_PRINTF(cli_buf);
3912         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3913                    "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
3914                    coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
3915                    coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
3916         CL_PRINTF(cli_buf);
3917
3918         /* Fw mechanism          */
3919         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3920                    "============[Fw mechanism]============");
3921         CL_PRINTF(cli_buf);
3922
3923         ps_tdma_case = coex_dm->cur_ps_tdma;
3924         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
3925                    "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)",
3926                    "PS TDMA",
3927                    coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
3928                    coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
3929                    coex_dm->ps_tdma_para[4], ps_tdma_case,
3930                    coex_dm->auto_tdma_adjust);
3931         CL_PRINTF(cli_buf);
3932
3933         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
3934                    "DecBtPwr/ IgnWlanAct",
3935                    coex_dm->cur_bt_dec_pwr_lvl, coex_dm->cur_ignore_wlan_act);
3936         CL_PRINTF(cli_buf);
3937
3938         /* Hw setting            */
3939         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
3940                    "============[Hw setting]============");
3941         CL_PRINTF(cli_buf);
3942
3943         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
3944                    "RF-A, 0x1e initVal",
3945                    coex_dm->bt_rf_0x1e_backup);
3946         CL_PRINTF(cli_buf);
3947
3948         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3949                    "backup ARFR1/ARFR2/RL/AMaxTime",
3950                    coex_dm->backup_arfr_cnt1, coex_dm->backup_arfr_cnt2,
3951                    coex_dm->backup_retry_limit,
3952                    coex_dm->backup_ampdu_max_time);
3953         CL_PRINTF(cli_buf);
3954
3955         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
3956         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
3957         u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
3958         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
3959         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3960                    "0x430/0x434/0x42a/0x456",
3961                    u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
3962         CL_PRINTF(cli_buf);
3963
3964         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04);
3965         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04);
3966         u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c);
3967         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3968                    "0xc04/ 0xd04/ 0x90c",
3969                    u32tmp[0], u32tmp[1], u32tmp[2]);
3970         CL_PRINTF(cli_buf);
3971
3972         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
3973         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0x778",
3974                    u8tmp[0]);
3975         CL_PRINTF(cli_buf);
3976
3977         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c);
3978         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930);
3979         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3980                    "0x92c/ 0x930",
3981                    (u8tmp[0]), u32tmp[0]);
3982         CL_PRINTF(cli_buf);
3983
3984         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
3985         u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f);
3986         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3987                    "0x40/ 0x4f",
3988                    u8tmp[0], u8tmp[1]);
3989         CL_PRINTF(cli_buf);
3990
3991         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
3992         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
3993         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
3994                    "0x550(bcn ctrl)/0x522",
3995                    u32tmp[0], u8tmp[0]);
3996         CL_PRINTF(cli_buf);
3997
3998         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
3999         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)",
4000                    u32tmp[0]);
4001         CL_PRINTF(cli_buf);
4002
4003         fa_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
4004                         PHYDM_INFO_FA_OFDM);
4005         fa_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
4006                         PHYDM_INFO_FA_CCK);
4007         cca_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
4008                         PHYDM_INFO_CCA_OFDM);
4009         cca_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
4010                         PHYDM_INFO_CCA_CCK);
4011
4012         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4013                    "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
4014                    "CCK-CCA/CCK-FA/OFDM-CCA/OFDM-FA",
4015                    cca_cck, fa_cck, cca_ofdm, fa_ofdm);
4016         CL_PRINTF(cli_buf);
4017
4018         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
4019                    "CRC_OK CCK/11g/11n/11n-agg",
4020                    coex_sta->crc_ok_cck, coex_sta->crc_ok_11g,
4021                    coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_vht);
4022         CL_PRINTF(cli_buf);
4023
4024         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
4025                    "CRC_Err CCK/11g/11n/11n-agg",
4026                    coex_sta->crc_err_cck, coex_sta->crc_err_11g,
4027                    coex_sta->crc_err_11n, coex_sta->crc_err_11n_vht);
4028         CL_PRINTF(cli_buf);
4029
4030         u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
4031         u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
4032         u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
4033         u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
4034         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
4035                    "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
4036                    "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
4037                    u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
4038         CL_PRINTF(cli_buf);
4039
4040         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
4041                    "0x770(hp rx[31:16]/tx[15:0])",
4042                    coex_sta->high_priority_rx, coex_sta->high_priority_tx);
4043         CL_PRINTF(cli_buf);
4044         CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
4045                    "0x774(lp rx[31:16]/tx[15:0])",
4046                    coex_sta->low_priority_rx, coex_sta->low_priority_tx);
4047         CL_PRINTF(cli_buf);
4048 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
4049         halbtc8192e2ant_monitor_bt_ctr(btcoexist);
4050 #endif
4051         btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
4052 }
4053
4054
4055 void ex_halbtc8192e2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
4056 {
4057         if (BTC_IPS_ENTER == type) {
4058                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4059                             "[BTCoex], IPS ENTER notify\n");
4060                 BTC_TRACE(trace_buf);
4061                 coex_sta->under_ips = true;
4062                 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
4063                 halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false,
4064                                              true);
4065                 halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
4066         } else if (BTC_IPS_LEAVE == type) {
4067                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4068                             "[BTCoex], IPS LEAVE notify\n");
4069                 BTC_TRACE(trace_buf);
4070                 coex_sta->under_ips = false;
4071                 halbtc8192e2ant_init_hw_config(btcoexist, false);
4072                 halbtc8192e2ant_init_coex_dm(btcoexist);
4073                 halbtc8192e2ant_query_bt_info(btcoexist);
4074         }
4075 }
4076
4077 void ex_halbtc8192e2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
4078 {
4079         if (BTC_LPS_ENABLE == type) {
4080                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4081                             "[BTCoex], LPS ENABLE notify\n");
4082                 BTC_TRACE(trace_buf);
4083                 coex_sta->under_lps = true;
4084
4085         } else if (BTC_LPS_DISABLE == type) {
4086                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4087                             "[BTCoex], LPS DISABLE notify\n");
4088                 BTC_TRACE(trace_buf);
4089                 coex_sta->under_lps = false;
4090         }
4091 }
4092
4093 void ex_halbtc8192e2ant_scan_notify(IN struct btc_coexist *btcoexist,
4094                                     IN u8 type)
4095 {
4096         if (BTC_SCAN_START == type) {
4097                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4098                             "[BTCoex], SCAN START notify\n");
4099                 BTC_TRACE(trace_buf);
4100         } else if (BTC_SCAN_FINISH == type) {
4101                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4102                             "[BTCoex], SCAN FINISH notify\n");
4103                 BTC_TRACE(trace_buf);
4104                 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
4105                                    &coex_sta->scan_ap_num);
4106
4107         }
4108 }
4109
4110 void ex_halbtc8192e2ant_connect_notify(IN struct btc_coexist *btcoexist,
4111                                        IN u8 type)
4112 {
4113         if (BTC_ASSOCIATE_START == type) {
4114                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4115                             "[BTCoex], CONNECT START notify\n");
4116                 BTC_TRACE(trace_buf);
4117         } else if (BTC_ASSOCIATE_FINISH == type) {
4118                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4119                             "[BTCoex], CONNECT FINISH notify\n");
4120                 BTC_TRACE(trace_buf);
4121         }
4122 }
4123
4124 void ex_halbtc8192e2ant_media_status_notify(IN struct btc_coexist *btcoexist,
4125                 IN u8 type)
4126 {
4127         u8                      h2c_parameter[3] = {0};
4128         u32                     wifi_bw;
4129         u8                      wifi_central_chnl;
4130
4131         if (btcoexist->manual_control ||
4132             btcoexist->stop_coex_dm ||
4133             coex_sta->bt_disabled)
4134                 return;
4135
4136         if (BTC_MEDIA_CONNECT == type) {
4137                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4138                             "[BTCoex], MEDIA connect notify\n");
4139                 BTC_TRACE(trace_buf);
4140         } else {
4141                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4142                             "[BTCoex], MEDIA disconnect notify\n");
4143                 BTC_TRACE(trace_buf);
4144         }
4145
4146         /* only 2.4G we need to inform bt the chnl mask */
4147         btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
4148                            &wifi_central_chnl);
4149         if ((BTC_MEDIA_CONNECT == type) &&
4150             (wifi_central_chnl <= 14)) {
4151                 h2c_parameter[0] = 0x1;
4152                 h2c_parameter[1] = wifi_central_chnl;
4153                 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
4154                 if (BTC_WIFI_BW_HT40 == wifi_bw)
4155                         h2c_parameter[2] = 0x30;
4156                 else
4157                         h2c_parameter[2] = 0x20;
4158         }
4159
4160         coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
4161         coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
4162         coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
4163
4164         btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
4165 }
4166
4167 void ex_halbtc8192e2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
4168                 IN u8 type)
4169 {
4170         if (type == BTC_PACKET_DHCP) {
4171                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4172                             "[BTCoex], DHCP Packet notify\n");
4173                 BTC_TRACE(trace_buf);
4174         }
4175 }
4176
4177 void ex_halbtc8192e2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
4178                                        IN u8 *tmp_buf, IN u8 length)
4179 {
4180         u8                      bt_info = 0;
4181         u8                      i, rsp_source = 0;
4182         boolean                 bt_busy = false, limited_dig = false;
4183         boolean                 wifi_connected = false;
4184
4185         coex_sta->c2h_bt_info_req_sent = false;
4186
4187         rsp_source = tmp_buf[0] & 0xf;
4188         if (rsp_source >= BT_INFO_SRC_8192E_2ANT_MAX)
4189                 rsp_source = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
4190         coex_sta->bt_info_c2h_cnt[rsp_source]++;
4191
4192         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4193                     "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source,
4194                     length);
4195         BTC_TRACE(trace_buf);
4196         for (i = 0; i < length; i++) {
4197                 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
4198                 if (i == 1)
4199                         bt_info = tmp_buf[i];
4200                 if (i == length - 1) {
4201                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
4202                                     tmp_buf[i]);
4203                         BTC_TRACE(trace_buf);
4204                 } else {
4205                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
4206                                     tmp_buf[i]);
4207                         BTC_TRACE(trace_buf);
4208                 }
4209         }
4210
4211         if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) {
4212                 coex_sta->bt_retry_cnt =        /* [3:0] */
4213                         coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
4214
4215                 coex_sta->bt_rssi =
4216                         coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
4217
4218                 coex_sta->bt_info_ext =
4219                         coex_sta->bt_info_c2h[rsp_source][4];
4220
4221                 /* Here we need to resend some wifi info to BT */
4222                 /* because bt is reset and loss of the info. */
4223                 if ((coex_sta->bt_info_ext & BIT(1))) {
4224                         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4225                                 "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
4226                         BTC_TRACE(trace_buf);
4227                         btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
4228                                            &wifi_connected);
4229                         if (wifi_connected)
4230                                 ex_halbtc8192e2ant_media_status_notify(
4231                                         btcoexist, BTC_MEDIA_CONNECT);
4232                         else
4233                                 ex_halbtc8192e2ant_media_status_notify(
4234                                         btcoexist, BTC_MEDIA_DISCONNECT);
4235                 }
4236
4237                 if ((coex_sta->bt_info_ext & BIT(3))) {
4238                         if (!btcoexist->manual_control &&
4239                             !btcoexist->stop_coex_dm) {
4240                                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4241                                         "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
4242                                 BTC_TRACE(trace_buf);
4243                                 halbtc8192e2ant_ignore_wlan_act(btcoexist,
4244                                                         FORCE_EXEC, false);
4245                         }
4246                 } else {
4247                         /* BT already NOT ignore Wlan active, do nothing here. */
4248                 }
4249
4250 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
4251                 if ((coex_sta->bt_info_ext & BIT(4))) {
4252                         /* BT auto report already enabled, do nothing */
4253                 } else
4254                         halbtc8192e2ant_bt_auto_report(btcoexist, FORCE_EXEC,
4255                                                        true);
4256 #endif
4257         }
4258
4259         /* check BIT2 first ==> check if bt is under inquiry or page scan */
4260         if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE)
4261                 coex_sta->c2h_bt_inquiry_page = true;
4262         else
4263                 coex_sta->c2h_bt_inquiry_page = false;
4264
4265         /* set link exist status */
4266         if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) {
4267                 coex_sta->bt_link_exist = false;
4268                 coex_sta->pan_exist = false;
4269                 coex_sta->a2dp_exist = false;
4270                 coex_sta->hid_exist = false;
4271                 coex_sta->sco_exist = false;
4272         } else {        /* connection exists */
4273                 coex_sta->bt_link_exist = true;
4274                 if (bt_info & BT_INFO_8192E_2ANT_B_FTP)
4275                         coex_sta->pan_exist = true;
4276                 else
4277                         coex_sta->pan_exist = false;
4278                 if (bt_info & BT_INFO_8192E_2ANT_B_A2DP)
4279                         coex_sta->a2dp_exist = true;
4280                 else
4281                         coex_sta->a2dp_exist = false;
4282                 if (bt_info & BT_INFO_8192E_2ANT_B_HID)
4283                         coex_sta->hid_exist = true;
4284                 else
4285                         coex_sta->hid_exist = false;
4286                 if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO)
4287                         coex_sta->sco_exist = true;
4288                 else
4289                         coex_sta->sco_exist = false;
4290         }
4291
4292         halbtc8192e2ant_update_bt_link_info(btcoexist);
4293
4294         if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) {
4295                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
4296                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4297                         "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
4298                 BTC_TRACE(trace_buf);
4299         } else if (bt_info ==
4300                 BT_INFO_8192E_2ANT_B_CONNECTION) {      /* connection exists but no busy */
4301                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
4302                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4303                             "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
4304                 BTC_TRACE(trace_buf);
4305         } else if ((bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
4306                    (bt_info & BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
4307                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
4308                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4309                             "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
4310                 BTC_TRACE(trace_buf);
4311         } else if (bt_info & BT_INFO_8192E_2ANT_B_ACL_BUSY) {
4312                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
4313                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4314                             "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
4315                 BTC_TRACE(trace_buf);
4316         } else {
4317                 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX;
4318                 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
4319                         "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
4320                 BTC_TRACE(trace_buf);
4321         }
4322
4323         if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
4324             (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
4325             (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
4326                 bt_busy = true;
4327                 limited_dig = true;
4328         } else {
4329                 bt_busy = false;
4330                 limited_dig = false;
4331         }
4332
4333         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
4334
4335         coex_dm->limited_dig = limited_dig;
4336         btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
4337
4338         halbtc8192e2ant_run_coexist_mechanism(btcoexist);
4339 }
4340
4341 void ex_halbtc8192e2ant_halt_notify(IN struct btc_coexist *btcoexist)
4342 {
4343         BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
4344         BTC_TRACE(trace_buf);
4345
4346         halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, true);
4347         halbtc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
4348         ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
4349 }
4350
4351 void ex_halbtc8192e2ant_periodical(IN struct btc_coexist *btcoexist)
4352 {
4353
4354         if ((coex_sta->bt_coex_supported_version == 0) ||
4355             (coex_sta->bt_coex_supported_version == 0xffff))
4356                 coex_sta->bt_coex_supported_version =
4357                         btcoexist->btc_get_bt_coex_supported_version(btcoexist);
4358
4359 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
4360         halbtc8192e2ant_query_bt_info(btcoexist);
4361         halbtc8192e2ant_monitor_bt_ctr(btcoexist);
4362         halbtc8192e2ant_monitor_wifi_ctr(btcoexist);
4363         halbtc8192e2ant_monitor_bt_enable_disable(btcoexist);
4364 #else
4365         halbtc8192e2ant_monitor_wifi_ctr(btcoexist);
4366
4367         if (halbtc8192e2ant_is_wifi_status_changed(btcoexist) ||
4368             coex_dm->auto_tdma_adjust)
4369                 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
4370 #endif
4371 }
4372
4373 #endif
4374
4375 #endif  /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */
4376
4377