1 /******************************************************************************
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 ******************************************************************************/
21 /* ************************************************************
23 * ************************************************************ */
25 #include "mp_precomp.h"
26 #include "phydm_precomp.h"
28 /* #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE)) */
29 #if (defined(CONFIG_ANT_DETECTION))
31 /* IS_ANT_DETECT_SUPPORT_SINGLE_TONE(adapter)
32 * IS_ANT_DETECT_SUPPORT_RSSI(adapter)
33 * IS_ANT_DETECT_SUPPORT_PSD(adapter) */
35 /* 1 [1. Single Tone method] =================================================== */
39 * Set Single/Dual Antenna default setting for products that do not do detection in advance.
41 * Added by Joseph, 2012.03.22
44 odm_single_dual_antenna_default_setting(
48 struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
49 struct _sw_antenna_switch_ *p_dm_swat_table = &p_dm_odm->dm_swat_table;
50 struct _ADAPTER *p_adapter = p_dm_odm->adapter;
52 u8 bt_ant_num = BT_GetPgAntNum(p_adapter);
53 /* Set default antenna A and B status */
54 if (bt_ant_num == 2) {
55 p_dm_swat_table->ANTA_ON = true;
56 p_dm_swat_table->ANTB_ON = true;
58 } else if (bt_ant_num == 1) {
59 /* Set antenna A as default */
60 p_dm_swat_table->ANTA_ON = true;
61 p_dm_swat_table->ANTB_ON = false;
64 RT_ASSERT(false, ("Incorrect antenna number!!\n"));
71 * Implement IQK single tone for RF DPK loopback and BB PSD scanning.
72 * This function is cooperated with BB team Neil.
74 * Added by Roger, 2011.12.15
77 odm_single_dual_antenna_detection(
82 struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
83 struct _ADAPTER *p_adapter = p_dm_odm->adapter;
84 struct _sw_antenna_switch_ *p_dm_swat_table = &p_dm_odm->dm_swat_table;
85 u32 current_channel, rf_loop_reg;
87 u32 reg88c, regc08, reg874, regc50, reg948, regb2c, reg92c, reg930, reg064, afe_rrx_wait_cca;
88 u8 initial_gain = 0x5a;
90 u32 ant_a_report = 0x0, ant_b_report = 0x0, ant_0_report = 0x0;
91 boolean is_result = true;
93 u32 AFE_REG_8723A[16] = {
94 REG_RX_WAIT_CCA, REG_TX_CCK_RFON,
95 REG_TX_CCK_BBON, REG_TX_OFDM_RFON,
96 REG_TX_OFDM_BBON, REG_TX_TO_RX,
97 REG_TX_TO_TX, REG_RX_CCK,
98 REG_RX_OFDM, REG_RX_WAIT_RIFS,
99 REG_RX_TO_RX, REG_STANDBY,
100 REG_SLEEP, REG_PMPD_ANAEN,
101 REG_FPGA0_XCD_SWITCH_CONTROL, REG_BLUE_TOOTH
104 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_single_dual_antenna_detection()============>\n"));
107 if (!(p_dm_odm->support_ic_type & ODM_RTL8723B))
110 /* Retrieve antenna detection registry info, added by Roger, 2012.11.27. */
111 if (!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(p_adapter))
114 /* 1 Backup Current RF/BB Settings */
116 current_channel = odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK);
117 rf_loop_reg = odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x00, RFREGOFFSETMASK);
118 if (p_dm_odm->support_ic_type & ODM_RTL8723B) {
119 reg92c = odm_get_bb_reg(p_dm_odm, REG_DPDT_CONTROL, MASKDWORD);
120 reg930 = odm_get_bb_reg(p_dm_odm, rfe_ctrl_anta_src, MASKDWORD);
121 reg948 = odm_get_bb_reg(p_dm_odm, REG_S0_S1_PATH_SWITCH, MASKDWORD);
122 regb2c = odm_get_bb_reg(p_dm_odm, REG_AGC_TABLE_SELECT, MASKDWORD);
123 reg064 = odm_get_mac_reg(p_dm_odm, REG_SYM_WLBT_PAPE_SEL, BIT(29));
124 odm_set_bb_reg(p_dm_odm, REG_DPDT_CONTROL, 0x3, 0x1);
125 odm_set_bb_reg(p_dm_odm, rfe_ctrl_anta_src, 0xff, 0x77);
126 odm_set_mac_reg(p_dm_odm, REG_SYM_WLBT_PAPE_SEL, BIT(29), 0x1); /* dbg 7 */
127 odm_set_bb_reg(p_dm_odm, REG_S0_S1_PATH_SWITCH, 0x3c0, 0x0);/* dbg 8 */
128 odm_set_bb_reg(p_dm_odm, REG_AGC_TABLE_SELECT, BIT(31), 0x0);
131 odm_stall_execution(10);
133 /* Store A path Register 88c, c08, 874, c50 */
134 reg88c = odm_get_bb_reg(p_dm_odm, REG_FPGA0_ANALOG_PARAMETER4, MASKDWORD);
135 regc08 = odm_get_bb_reg(p_dm_odm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD);
136 reg874 = odm_get_bb_reg(p_dm_odm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD);
137 regc50 = odm_get_bb_reg(p_dm_odm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD);
139 /* Store AFE Registers */
140 if (p_dm_odm->support_ic_type & ODM_RTL8723B)
141 afe_rrx_wait_cca = odm_get_bb_reg(p_dm_odm, REG_RX_WAIT_CCA, MASKDWORD);
143 /* Set PSD 128 pts */
144 odm_set_bb_reg(p_dm_odm, REG_FPGA0_PSD_FUNCTION, BIT(14) | BIT15, 0x0); /* 128 pts */
146 /* To SET CH1 to do */
147 odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK, 0x7401); /* channel 1 */
149 /* AFE all on step */
150 if (p_dm_odm->support_ic_type & ODM_RTL8723B)
151 odm_set_bb_reg(p_dm_odm, REG_RX_WAIT_CCA, MASKDWORD, 0x01c00016);
154 odm_set_bb_reg(p_dm_odm, REG_FPGA0_ANALOG_PARAMETER4, MASKDWORD, 0xCCF000C0);
157 odm_set_bb_reg(p_dm_odm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD, 0x000800E4);
158 odm_set_bb_reg(p_dm_odm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD, 0x22208000);
160 /* IQK setting tone@ 4.34Mhz */
161 odm_set_bb_reg(p_dm_odm, REG_TX_IQK_TONE_A, MASKDWORD, 0x10008C1C);
162 odm_set_bb_reg(p_dm_odm, REG_TX_IQK, MASKDWORD, 0x01007c00);
165 odm_set_bb_reg(p_dm_odm, REG_CONFIG_ANT_A, MASKDWORD, 0x00080000);
166 odm_set_bb_reg(p_dm_odm, REG_CONFIG_ANT_A, MASKDWORD, 0x0f600000);
167 odm_set_bb_reg(p_dm_odm, REG_RX_IQK, MASKDWORD, 0x01004800);
168 odm_set_bb_reg(p_dm_odm, REG_RX_IQK_TONE_A, MASKDWORD, 0x10008c1f);
169 if (p_dm_odm->support_ic_type & ODM_RTL8723B) {
170 odm_set_bb_reg(p_dm_odm, REG_TX_IQK_PI_A, MASKDWORD, 0x82150016);
171 odm_set_bb_reg(p_dm_odm, REG_RX_IQK_PI_A, MASKDWORD, 0x28150016);
173 odm_set_bb_reg(p_dm_odm, REG_IQK_AGC_RSP, MASKDWORD, 0x001028d0);
174 odm_set_bb_reg(p_dm_odm, REG_OFDM_0_XA_AGC_CORE1, 0x7f, initial_gain);
176 /* IQK Single tone start */
177 odm_set_bb_reg(p_dm_odm, REG_FPGA0_IQK, 0xffffff00, 0x808000);
178 odm_set_bb_reg(p_dm_odm, REG_IQK_AGC_PTS, MASKDWORD, 0xf9000000);
179 odm_set_bb_reg(p_dm_odm, REG_IQK_AGC_PTS, MASKDWORD, 0xf8000000);
181 odm_stall_execution(10000);
183 /* PSD report of antenna A */
184 PSD_report_tmp = 0x0;
185 for (n = 0; n < 2; n++) {
186 PSD_report_tmp = phydm_get_psd_data(p_dm_odm, 14, initial_gain);
187 if (PSD_report_tmp > ant_a_report)
188 ant_a_report = PSD_report_tmp;
191 /* change to Antenna B */
192 if (p_dm_odm->support_ic_type & ODM_RTL8723B) {
193 /* odm_set_bb_reg(p_dm_odm, REG_DPDT_CONTROL, 0x3, 0x2); */
194 odm_set_bb_reg(p_dm_odm, REG_S0_S1_PATH_SWITCH, 0xfff, 0x280);
195 odm_set_bb_reg(p_dm_odm, REG_AGC_TABLE_SELECT, BIT(31), 0x1);
198 odm_stall_execution(10);
200 /* PSD report of antenna B */
201 PSD_report_tmp = 0x0;
202 for (n = 0; n < 2; n++) {
203 PSD_report_tmp = phydm_get_psd_data(p_dm_odm, 14, initial_gain);
204 if (PSD_report_tmp > ant_b_report)
205 ant_b_report = PSD_report_tmp;
208 /* Close IQK Single Tone function */
209 odm_set_bb_reg(p_dm_odm, REG_FPGA0_IQK, 0xffffff00, 0x000000);
211 /* 1 Return to antanna A */
212 if (p_dm_odm->support_ic_type & ODM_RTL8723B) {
214 odm_set_bb_reg(p_dm_odm, REG_DPDT_CONTROL, MASKDWORD, reg92c);
217 odm_set_bb_reg(p_dm_odm, REG_S0_S1_PATH_SWITCH, MASKDWORD, reg948);
218 odm_set_bb_reg(p_dm_odm, REG_AGC_TABLE_SELECT, MASKDWORD, regb2c);
219 odm_set_bb_reg(p_dm_odm, rfe_ctrl_anta_src, MASKDWORD, reg930);
220 odm_set_mac_reg(p_dm_odm, REG_SYM_WLBT_PAPE_SEL, BIT(29), reg064);
223 odm_set_bb_reg(p_dm_odm, REG_FPGA0_ANALOG_PARAMETER4, MASKDWORD, reg88c);
224 odm_set_bb_reg(p_dm_odm, REG_OFDM_0_TR_MUX_PAR, MASKDWORD, regc08);
225 odm_set_bb_reg(p_dm_odm, REG_FPGA0_XCD_RF_INTERFACE_SW, MASKDWORD, reg874);
226 odm_set_bb_reg(p_dm_odm, REG_OFDM_0_XA_AGC_CORE1, 0x7F, 0x40);
227 odm_set_bb_reg(p_dm_odm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD, regc50);
228 odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, current_channel);
229 odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x00, RFREGOFFSETMASK, rf_loop_reg);
231 /* Reload AFE Registers */
232 if (p_dm_odm->support_ic_type & ODM_RTL8723B)
233 odm_set_bb_reg(p_dm_odm, REG_RX_WAIT_CCA, MASKDWORD, afe_rrx_wait_cca);
235 if (p_dm_odm->support_ic_type & ODM_RTL8723B) {
236 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d\n", 2416, ant_a_report));
237 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d\n", 2416, ant_b_report));
239 /* 2 Test ant B based on ant A is ON */
240 if ((ant_a_report >= 100) && (ant_b_report >= 100) && (ant_a_report <= 135) && (ant_b_report <= 135)) {
243 if ((ant_a_report - ant_b_report < TH1) || (ant_b_report - ant_a_report < TH1)) {
244 p_dm_swat_table->ANTA_ON = true;
245 p_dm_swat_table->ANTB_ON = true;
246 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_single_dual_antenna_detection(): Dual Antenna\n"));
247 } else if (((ant_a_report - ant_b_report >= TH1) && (ant_a_report - ant_b_report <= TH2)) ||
248 ((ant_b_report - ant_a_report >= TH1) && (ant_b_report - ant_a_report <= TH2))) {
249 p_dm_swat_table->ANTA_ON = false;
250 p_dm_swat_table->ANTB_ON = false;
252 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_single_dual_antenna_detection(): Need to check again\n"));
254 p_dm_swat_table->ANTA_ON = true;
255 p_dm_swat_table->ANTB_ON = false;
256 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_single_dual_antenna_detection(): Single Antenna\n"));
258 p_dm_odm->ant_detected_info.is_ant_detected = true;
259 p_dm_odm->ant_detected_info.db_for_ant_a = ant_a_report;
260 p_dm_odm->ant_detected_info.db_for_ant_b = ant_b_report;
261 p_dm_odm->ant_detected_info.db_for_ant_o = ant_0_report;
264 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("return false!!\n"));
274 /* 1 [2. Scan AP RSSI method] ================================================== */
280 odm_sw_ant_div_check_before_link(
285 #if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM)
287 struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
288 struct _ADAPTER *adapter = p_dm_odm->adapter;
289 HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter);
290 PMGNT_INFO p_mgnt_info = &adapter->MgntInfo;
291 struct _sw_antenna_switch_ *p_dm_swat_table = &p_dm_odm->dm_swat_table;
292 struct _FAST_ANTENNA_TRAINNING_ *p_dm_fat_table = &p_dm_odm->dm_fat_table;
294 PRT_WLAN_BSS p_tmp_bss_desc, p_test_bss_desc;
295 u8 power_target_L = 9, power_target_H = 16;
296 u8 tmp_power_diff = 0, power_diff = 0, avg_power_diff = 0, max_power_diff = 0, min_power_diff = 0xff;
297 u16 index, counter = 0;
298 static u8 scan_channel;
299 u32 tmp_swas_no_link_bk_reg948;
301 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ANTA_ON = (( %d )) , ANTB_ON = (( %d ))\n", p_dm_odm->dm_swat_table.ANTA_ON, p_dm_odm->dm_swat_table.ANTB_ON));
305 if (p_dm_odm->dm_swat_table.rssi_ant_dect_result == true && p_dm_odm->support_ic_type == ODM_RTL8723B) {
306 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("8723B RSSI-based Antenna Detection is done\n"));
310 if (p_dm_odm->support_ic_type == ODM_RTL8723B) {
311 if (p_dm_swat_table->swas_no_link_bk_reg948 == 0xff)
312 p_dm_swat_table->swas_no_link_bk_reg948 = odm_read_4byte(p_dm_odm, REG_S0_S1_PATH_SWITCH);
316 if (p_dm_odm->adapter == NULL) { /* For BSOD when plug/unplug fast. //By YJ,120413 */
317 /* The ODM structure is not initialized. */
321 /* Retrieve antenna detection registry info, added by Roger, 2012.11.27. */
322 if (!IS_ANT_DETECT_SUPPORT_RSSI(adapter))
325 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Antenna Detection: RSSI method\n"));
327 /* Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. */
328 odm_acquire_spin_lock(p_dm_odm, RT_RF_STATE_SPINLOCK);
329 if (p_hal_data->eRFPowerState != eRfOn || p_mgnt_info->RFChangeInProgress || p_mgnt_info->bMediaConnect) {
330 odm_release_spin_lock(p_dm_odm, RT_RF_STATE_SPINLOCK);
332 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
333 ("odm_sw_ant_div_check_before_link(): rf_change_in_progress(%x), e_rf_power_state(%x)\n",
334 p_mgnt_info->RFChangeInProgress, p_hal_data->eRFPowerState));
336 p_dm_swat_table->swas_no_link_state = 0;
340 odm_release_spin_lock(p_dm_odm, RT_RF_STATE_SPINLOCK);
341 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("p_dm_swat_table->swas_no_link_state = %d\n", p_dm_swat_table->swas_no_link_state));
342 /* 1 Run AntDiv mechanism "Before Link" part. */
343 if (p_dm_swat_table->swas_no_link_state == 0) {
344 /* 1 Prepare to do Scan again to check current antenna state. */
346 /* Set check state to next step. */
347 p_dm_swat_table->swas_no_link_state = 1;
349 /* Copy Current Scan list. */
350 p_mgnt_info->tmpNumBssDesc = p_mgnt_info->NumBssDesc;
351 PlatformMoveMemory((void *)adapter->MgntInfo.tmpbssDesc, (void *)p_mgnt_info->bssDesc, sizeof(RT_WLAN_BSS) * MAX_BSS_DESC);
353 /* Go back to scan function again. */
354 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link: Scan one more time\n"));
355 p_mgnt_info->ScanStep = 0;
356 p_mgnt_info->bScanAntDetect = true;
357 scan_channel = odm_sw_ant_div_select_scan_chnl(adapter);
360 if (p_dm_odm->support_ic_type & (ODM_RTL8188E | ODM_RTL8821)) {
361 if (p_dm_fat_table->rx_idle_ant == MAIN_ANT)
362 odm_update_rx_idle_ant(p_dm_odm, AUX_ANT);
364 odm_update_rx_idle_ant(p_dm_odm, MAIN_ANT);
365 if (scan_channel == 0) {
366 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
367 ("odm_sw_ant_div_check_before_link(): No AP List Avaiable, Using ant(%s)\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "AUX_ANT" : "MAIN_ANT"));
369 if (IS_5G_WIRELESS_MODE(p_mgnt_info->dot11CurrentWirelessMode)) {
370 p_dm_swat_table->ant_5g = p_dm_fat_table->rx_idle_ant;
371 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("p_dm_swat_table->ant_5g=%s\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
373 p_dm_swat_table->ant_2g = p_dm_fat_table->rx_idle_ant;
374 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("p_dm_swat_table->ant_2g=%s\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
379 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
380 ("odm_sw_ant_div_check_before_link: Change to %s for testing.\n", ((p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT")));
381 } else if (p_dm_odm->support_ic_type & (ODM_RTL8723B)) {
382 /*Switch Antenna to another one.*/
384 tmp_swas_no_link_bk_reg948 = odm_read_4byte(p_dm_odm, REG_S0_S1_PATH_SWITCH);
386 if ((p_dm_swat_table->cur_antenna == MAIN_ANT) && (tmp_swas_no_link_bk_reg948 == 0x200)) {
387 odm_set_bb_reg(p_dm_odm, REG_S0_S1_PATH_SWITCH, 0xfff, 0x280);
388 odm_set_bb_reg(p_dm_odm, REG_AGC_TABLE_SELECT, BIT(31), 0x1);
389 p_dm_swat_table->cur_antenna = AUX_ANT;
391 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Reg[948]= (( %x )) was in wrong state\n", tmp_swas_no_link_bk_reg948));
394 odm_stall_execution(10);
396 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link: Change to (( %s-ant)) for testing.\n", (p_dm_swat_table->cur_antenna == MAIN_ANT) ? "MAIN" : "AUX"));
399 odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel);
400 PlatformSetTimer(adapter, &p_mgnt_info->ScanTimer, 5);
403 } else { /* p_dm_swat_table->swas_no_link_state == 1 */
404 /* 1 ScanComple() is called after antenna swiched. */
405 /* 1 Check scan result and determine which antenna is going */
408 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, (" tmp_num_bss_desc= (( %d ))\n", p_mgnt_info->tmpNumBssDesc)); /* debug for Dino */
410 for (index = 0; index < p_mgnt_info->tmpNumBssDesc; index++) {
411 p_tmp_bss_desc = &(p_mgnt_info->tmpbssDesc[index]); /* Antenna 1 */
412 p_test_bss_desc = &(p_mgnt_info->bssDesc[index]); /* Antenna 2 */
414 if (PlatformCompareMemory(p_test_bss_desc->bdBssIdBuf, p_tmp_bss_desc->bdBssIdBuf, 6) != 0) {
415 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link(): ERROR!! This shall not happen.\n"));
419 if (p_dm_odm->support_ic_type != ODM_RTL8723B) {
420 if (p_tmp_bss_desc->ChannelNumber == scan_channel) {
421 if (p_tmp_bss_desc->RecvSignalPower > p_test_bss_desc->RecvSignalPower) {
422 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link: Compare scan entry: score++\n"));
423 RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen);
424 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
427 PlatformMoveMemory(p_test_bss_desc, p_tmp_bss_desc, sizeof(RT_WLAN_BSS));
428 } else if (p_tmp_bss_desc->RecvSignalPower < p_test_bss_desc->RecvSignalPower) {
429 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link: Compare scan entry: score--\n"));
430 RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen);
431 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
434 if (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp < 5000) {
435 RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", p_tmp_bss_desc->bdSsIdBuf, p_tmp_bss_desc->bdSsIdLen);
436 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n", p_tmp_bss_desc->ChannelNumber, p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
437 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("The 2nd Antenna didn't get this AP\n\n"));
442 if (p_tmp_bss_desc->ChannelNumber == scan_channel) {
443 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("channel_number == scan_channel->(( %d ))\n", p_tmp_bss_desc->ChannelNumber));
445 if (p_tmp_bss_desc->RecvSignalPower > p_test_bss_desc->RecvSignalPower) { /* Pow(Ant1) > Pow(Ant2) */
447 tmp_power_diff = (u8)(p_tmp_bss_desc->RecvSignalPower - p_test_bss_desc->RecvSignalPower);
448 power_diff = power_diff + tmp_power_diff;
450 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
451 ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), p_tmp_bss_desc->bdSsIdBuf);
452 ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), p_tmp_bss_desc->bdSsIdBuf);
454 /* ODM_RT_TRACE(p_dm_odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("tmp_power_diff: (( %d)),max_power_diff: (( %d)),min_power_diff: (( %d))\n", tmp_power_diff,max_power_diff,min_power_diff)); */
455 if (tmp_power_diff > max_power_diff)
456 max_power_diff = tmp_power_diff;
457 if (tmp_power_diff < min_power_diff)
458 min_power_diff = tmp_power_diff;
459 /* ODM_RT_TRACE(p_dm_odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("max_power_diff: (( %d)),min_power_diff: (( %d))\n",max_power_diff,min_power_diff)); */
461 PlatformMoveMemory(p_test_bss_desc, p_tmp_bss_desc, sizeof(RT_WLAN_BSS));
462 } else if (p_test_bss_desc->RecvSignalPower > p_tmp_bss_desc->RecvSignalPower) { /* Pow(Ant1) < Pow(Ant2) */
464 tmp_power_diff = (u8)(p_test_bss_desc->RecvSignalPower - p_tmp_bss_desc->RecvSignalPower);
465 power_diff = power_diff + tmp_power_diff;
466 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
467 ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), p_tmp_bss_desc->bdSsIdBuf);
468 ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), p_tmp_bss_desc->bdSsIdBuf);
469 if (tmp_power_diff > max_power_diff)
470 max_power_diff = tmp_power_diff;
471 if (tmp_power_diff < min_power_diff)
472 min_power_diff = tmp_power_diff;
473 } else { /* Pow(Ant1) = Pow(Ant2) */
474 if (p_test_bss_desc->bdTstamp > p_tmp_bss_desc->bdTstamp) { /* Stamp(Ant1) < Stamp(Ant2) */
475 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("time_diff: %lld\n", (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp) / 1000));
476 if (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp > 5000) {
478 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", p_tmp_bss_desc->RecvSignalPower, p_test_bss_desc->RecvSignalPower));
479 ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), p_tmp_bss_desc->bdSsIdBuf);
480 ODM_PRINT_ADDR(p_dm_odm, ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), p_tmp_bss_desc->bdSsIdBuf);
484 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Error !!!]: Time_diff: %lld\n", (p_test_bss_desc->bdTstamp - p_tmp_bss_desc->bdTstamp) / 1000));
490 if (p_dm_odm->support_ic_type & (ODM_RTL8188E | ODM_RTL8821)) {
491 if (p_mgnt_info->NumBssDesc != 0 && score < 0) {
492 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
493 ("odm_sw_ant_div_check_before_link(): Using ant(%s)\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
495 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
496 ("odm_sw_ant_div_check_before_link(): Remain ant(%s)\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "AUX_ANT" : "MAIN_ANT"));
498 if (p_dm_fat_table->rx_idle_ant == MAIN_ANT)
499 odm_update_rx_idle_ant(p_dm_odm, AUX_ANT);
501 odm_update_rx_idle_ant(p_dm_odm, MAIN_ANT);
504 if (IS_5G_WIRELESS_MODE(p_mgnt_info->dot11CurrentWirelessMode)) {
505 p_dm_swat_table->ant_5g = p_dm_fat_table->rx_idle_ant;
506 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("p_dm_swat_table->ant_5g=%s\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
508 p_dm_swat_table->ant_2g = p_dm_fat_table->rx_idle_ant;
509 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("p_dm_swat_table->ant_2g=%s\n", (p_dm_fat_table->rx_idle_ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
511 } else if (p_dm_odm->support_ic_type == ODM_RTL8723B) {
513 if (p_dm_odm->dm_swat_table.pre_aux_fail_detec == false) {
514 p_dm_odm->dm_swat_table.pre_aux_fail_detec = true;
515 p_dm_odm->dm_swat_table.rssi_ant_dect_result = false;
516 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter=(( 0 )) , [[ Cannot find any AP with Aux-ant ]] -> Scan Target-channel again\n"));
518 /* 3 [ Scan again ] */
519 odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel);
520 PlatformSetTimer(adapter, &p_mgnt_info->ScanTimer, 5);
522 } else { /* pre_aux_fail_detec == true */
523 /* 2 [ Single Antenna ] */
524 p_dm_odm->dm_swat_table.pre_aux_fail_detec = false;
525 p_dm_odm->dm_swat_table.rssi_ant_dect_result = true;
526 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter=(( 0 )) , [[ Still cannot find any AP ]]\n"));
527 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link(): Single antenna\n"));
529 p_dm_odm->dm_swat_table.aux_fail_detec_counter++;
531 p_dm_odm->dm_swat_table.pre_aux_fail_detec = false;
534 avg_power_diff = ((power_diff - max_power_diff - min_power_diff) >> 1) + ((max_power_diff + min_power_diff) >> 2);
535 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: (( %d )) , power_diff: (( %d ))\n", counter, power_diff));
536 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ counter==3 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d ))\n", avg_power_diff, max_power_diff, min_power_diff));
537 } else if (counter >= 4) {
538 avg_power_diff = (power_diff - max_power_diff - min_power_diff) / (counter - 2);
539 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: (( %d )) , power_diff: (( %d ))\n", counter, power_diff));
540 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ counter>=4 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d ))\n", avg_power_diff, max_power_diff, min_power_diff));
542 } else { /* counter==1,2 */
543 avg_power_diff = power_diff / counter;
544 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("avg_power_diff: (( %d )) , counter: (( %d )) , power_diff: (( %d ))\n", avg_power_diff, counter, power_diff));
548 if ((avg_power_diff >= power_target_L) && (avg_power_diff <= power_target_H)) {
549 p_dm_odm->dm_swat_table.retry_counter++;
551 if (p_dm_odm->dm_swat_table.retry_counter <= 3) {
552 p_dm_odm->dm_swat_table.rssi_ant_dect_result = false;
553 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[[ Low confidence result ]] avg_power_diff= (( %d )) -> Scan Target-channel again ]]\n", avg_power_diff));
555 /* 3 [ Scan again ] */
556 odm_sw_ant_div_construct_scan_chnl(adapter, scan_channel);
557 PlatformSetTimer(adapter, &p_mgnt_info->ScanTimer, 5);
560 p_dm_odm->dm_swat_table.rssi_ant_dect_result = true;
561 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[[ Still Low confidence result ]] (( retry_counter > 3 ))\n"));
562 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link(): Single antenna\n"));
566 /* 2 [ Dual Antenna ] */
567 else if ((p_mgnt_info->NumBssDesc != 0) && (avg_power_diff < power_target_L)) {
568 p_dm_odm->dm_swat_table.rssi_ant_dect_result = true;
569 if (p_dm_odm->dm_swat_table.ANTB_ON == false) {
570 p_dm_odm->dm_swat_table.ANTA_ON = true;
571 p_dm_odm->dm_swat_table.ANTB_ON = true;
573 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link(): Dual antenna\n"));
574 p_dm_odm->dm_swat_table.dual_ant_counter++;
576 /* set bt coexDM from 1ant coexDM to 2ant coexDM */
577 BT_SetBtCoexAntNum(adapter, BT_COEX_ANT_TYPE_DETECTED, 2);
579 /* 3 [ Init antenna diversity ] */
580 p_dm_odm->support_ability |= ODM_BB_ANT_DIV;
581 odm_ant_div_init(p_dm_odm);
583 /* 2 [ Single Antenna ] */
584 else if (avg_power_diff > power_target_H) {
585 p_dm_odm->dm_swat_table.rssi_ant_dect_result = true;
586 if (p_dm_odm->dm_swat_table.ANTB_ON == true) {
587 p_dm_odm->dm_swat_table.ANTA_ON = true;
588 p_dm_odm->dm_swat_table.ANTB_ON = false;
589 /* bt_set_bt_coex_ant_num(adapter, BT_COEX_ANT_TYPE_DETECTED, 1); */
591 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link(): Single antenna\n"));
592 p_dm_odm->dm_swat_table.single_ant_counter++;
595 /* ODM_RT_TRACE(p_dm_odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("is_result=(( %d ))\n",p_dm_odm->dm_swat_table.rssi_ant_dect_result)); */
596 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dual_ant_counter = (( %d )), single_ant_counter = (( %d )) , retry_counter = (( %d )) , aux_fail_detec_counter = (( %d ))\n\n\n",
597 p_dm_odm->dm_swat_table.dual_ant_counter, p_dm_odm->dm_swat_table.single_ant_counter, p_dm_odm->dm_swat_table.retry_counter, p_dm_odm->dm_swat_table.aux_fail_detec_counter));
599 /* 2 recover the antenna setting */
601 if (p_dm_odm->dm_swat_table.ANTB_ON == false)
602 odm_set_bb_reg(p_dm_odm, REG_S0_S1_PATH_SWITCH, 0xfff, (p_dm_swat_table->swas_no_link_bk_reg948));
604 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("is_result=(( %d )), Recover Reg[948]= (( %x )) \n\n", p_dm_odm->dm_swat_table.rssi_ant_dect_result, p_dm_swat_table->swas_no_link_bk_reg948));
609 /* Check state reset to default and wait for next time. */
610 p_dm_swat_table->swas_no_link_state = 0;
611 p_mgnt_info->bScanAntDetect = false;
628 /* 1 [3. PSD method] ========================================================== */
630 odm_single_dual_antenna_detection_psd(
634 struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
636 u8 initial_gain = 0x36;
638 u8 tone_lenth_1 = 7, tone_lenth_2 = 4;
639 u16 tone_idx_1[7] = {88, 104, 120, 8, 24, 40, 56};
640 u16 tone_idx_2[4] = {8, 24, 40, 56};
641 u32 psd_report_main[11] = {0}, psd_report_aux[11] = {0};
642 /* u8 tone_lenth_1=4, tone_lenth_2=2; */
643 /* u16 tone_idx_1[4]={88, 120, 24, 56}; */
644 /* u16 tone_idx_2[2]={ 24, 56}; */
645 /* u32 psd_report_main[6]={0}, psd_report_aux[6]={0}; */
647 u32 PSD_report_temp, max_psd_report_main = 0, max_psd_report_aux = 0;
648 u32 PSD_power_threshold;
649 u32 main_psd_result = 0, aux_psd_result = 0;
650 u32 regc50, reg948, regb2c, regc14, reg908;
651 u32 i = 0, test_num = 8;
654 if (p_dm_odm->support_ic_type != ODM_RTL8723B)
657 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_single_dual_antenna_detection_psd()============>\n"));
659 /* 2 [ Backup Current RF/BB Settings ] */
661 channel_ori = odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK);
662 reg948 = odm_get_bb_reg(p_dm_odm, REG_S0_S1_PATH_SWITCH, MASKDWORD);
663 regb2c = odm_get_bb_reg(p_dm_odm, REG_AGC_TABLE_SELECT, MASKDWORD);
664 regc50 = odm_get_bb_reg(p_dm_odm, REG_OFDM_0_XA_AGC_CORE1, MASKDWORD);
665 regc14 = odm_get_bb_reg(p_dm_odm, 0xc14, MASKDWORD);
666 reg908 = odm_get_bb_reg(p_dm_odm, 0x908, MASKDWORD);
668 /* 2 [ setting for doing PSD function (CH4)] */
669 odm_set_bb_reg(p_dm_odm, REG_FPGA0_RFMOD, BIT(24), 0); /* disable whole CCK block */
670 odm_write_1byte(p_dm_odm, REG_TXPAUSE, 0xFF); /* Turn off TX -> Pause TX Queue */
671 odm_set_bb_reg(p_dm_odm, 0xC14, MASKDWORD, 0x0); /* [ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA] */
673 /* PHYTXON while loop */
674 odm_set_bb_reg(p_dm_odm, 0x908, MASKDWORD, 0x803);
675 while (odm_get_bb_reg(p_dm_odm, 0xdf4, BIT(6))) {
678 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Wait in %s() more than %d times!\n", __FUNCTION__, i));
683 odm_set_bb_reg(p_dm_odm, 0xc50, 0x7f, initial_gain);
684 odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); /* Set RF to CH4 & 40M */
685 odm_set_bb_reg(p_dm_odm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0xf); /* 3 wire Disable 88c[23:20]=0xf */
686 odm_set_bb_reg(p_dm_odm, REG_FPGA0_PSD_FUNCTION, BIT(14) | BIT15, 0x0); /* 128 pt */ /* Set PSD 128 ptss */
687 odm_stall_execution(3000);
690 /* 2 [ Doing PSD Function in (CH4)] */
693 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Main-ant (CH4)\n"));
694 odm_set_bb_reg(p_dm_odm, 0x948, 0xfff, 0x200);
695 odm_stall_execution(10);
696 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dbg\n"));
697 for (i = 0; i < test_num; i++) {
698 for (tone_idx = 0; tone_idx < tone_lenth_1; tone_idx++) {
699 PSD_report_temp = phydm_get_psd_data(p_dm_odm, tone_idx_1[tone_idx], initial_gain);
700 /* if( PSD_report_temp>psd_report_main[tone_idx] ) */
701 psd_report_main[tone_idx] += PSD_report_temp;
705 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Aux-ant (CH4)\n"));
706 odm_set_bb_reg(p_dm_odm, 0x948, 0xfff, 0x280);
707 odm_stall_execution(10);
708 for (i = 0; i < test_num; i++) {
709 for (tone_idx = 0; tone_idx < tone_lenth_1; tone_idx++) {
710 PSD_report_temp = phydm_get_psd_data(p_dm_odm, tone_idx_1[tone_idx], initial_gain);
711 /* if( PSD_report_temp>psd_report_aux[tone_idx] ) */
712 psd_report_aux[tone_idx] += PSD_report_temp;
715 /* 2 [ Doing PSD Function in (CH8)] */
717 odm_set_bb_reg(p_dm_odm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0x0); /* 3 wire enable 88c[23:20]=0x0 */
718 odm_stall_execution(3000);
720 odm_set_bb_reg(p_dm_odm, 0xc50, 0x7f, initial_gain);
721 odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); /* Set RF to CH8 & 40M */
723 odm_set_bb_reg(p_dm_odm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0xf); /* 3 wire Disable 88c[23:20]=0xf */
724 odm_stall_execution(3000);
727 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Main-ant (CH8)\n"));
728 odm_set_bb_reg(p_dm_odm, 0x948, 0xfff, 0x200);
729 odm_stall_execution(10);
731 for (i = 0; i < test_num; i++) {
732 for (tone_idx = 0; tone_idx < tone_lenth_2; tone_idx++) {
733 PSD_report_temp = phydm_get_psd_data(p_dm_odm, tone_idx_2[tone_idx], initial_gain);
734 /* if( PSD_report_temp>psd_report_main[tone_idx] ) */
735 psd_report_main[tone_lenth_1 + tone_idx] += PSD_report_temp;
740 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Aux-ant (CH8)\n"));
741 odm_set_bb_reg(p_dm_odm, 0x948, 0xfff, 0x280);
742 odm_stall_execution(10);
744 for (i = 0; i < test_num; i++) {
745 for (tone_idx = 0; tone_idx < tone_lenth_2; tone_idx++) {
746 PSD_report_temp = phydm_get_psd_data(p_dm_odm, tone_idx_2[tone_idx], initial_gain);
747 /* if( PSD_report_temp>psd_report_aux[tone_idx] ) */
748 psd_report_aux[tone_lenth_1 + tone_idx] += PSD_report_temp;
752 /* 2 [ Calculate Result ] */
754 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\nMain PSD Result: (ALL)\n"));
755 for (tone_idx = 0; tone_idx < (tone_lenth_1 + tone_lenth_2); tone_idx++) {
756 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tone-%d]: %d,\n", (tone_idx + 1), psd_report_main[tone_idx]));
757 main_psd_result += psd_report_main[tone_idx];
758 if (psd_report_main[tone_idx] > max_psd_report_main)
759 max_psd_report_main = psd_report_main[tone_idx];
761 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--------------------------- \nTotal_Main= (( %d ))\n", main_psd_result));
762 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MAX_Main = (( %d ))\n", max_psd_report_main));
765 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\nAux PSD Result: (ALL)\n"));
766 for (tone_idx = 0; tone_idx < (tone_lenth_1 + tone_lenth_2); tone_idx++) {
767 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tone-%d]: %d,\n", (tone_idx + 1), psd_report_aux[tone_idx]));
768 aux_psd_result += psd_report_aux[tone_idx];
769 if (psd_report_aux[tone_idx] > max_psd_report_aux)
770 max_psd_report_aux = psd_report_aux[tone_idx];
772 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--------------------------- \nTotal_Aux= (( %d ))\n", aux_psd_result));
773 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MAX_Aux = (( %d ))\n\n", max_psd_report_aux));
775 /* main_psd_result=main_psd_result-max_psd_report_main; */
776 /* aux_psd_result=aux_psd_result-max_psd_report_aux; */
777 PSD_power_threshold = (main_psd_result * 7) >> 3;
779 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Main_result, Aux_result ] = [ %d , %d ], PSD_power_threshold=(( %d ))\n", main_psd_result, aux_psd_result, PSD_power_threshold));
781 /* 3 [ Dual Antenna ] */
782 if (aux_psd_result >= PSD_power_threshold) {
783 if (p_dm_odm->dm_swat_table.ANTB_ON == false) {
784 p_dm_odm->dm_swat_table.ANTA_ON = true;
785 p_dm_odm->dm_swat_table.ANTB_ON = true;
787 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link(): Dual antenna\n"));
789 /* set bt coexDM from 1ant coexDM to 2ant coexDM */
790 /* bt_set_bt_coex_ant_num(p_adapter, BT_COEX_ANT_TYPE_DETECTED, 2); */
792 /* Init antenna diversity */
793 p_dm_odm->support_ability |= ODM_BB_ANT_DIV;
794 odm_ant_div_init(p_dm_odm);
796 /* 3 [ Single Antenna ] */
798 if (p_dm_odm->dm_swat_table.ANTB_ON == true) {
799 p_dm_odm->dm_swat_table.ANTA_ON = true;
800 p_dm_odm->dm_swat_table.ANTB_ON = false;
802 ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_sw_ant_div_check_before_link(): Single antenna\n"));
805 /* 2 [ Recover all parameters ] */
807 odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, channel_ori);
808 odm_set_bb_reg(p_dm_odm, REG_FPGA0_ANALOG_PARAMETER4, 0xf00000, 0x0); /* 3 wire enable 88c[23:20]=0x0 */
809 odm_set_bb_reg(p_dm_odm, 0xc50, 0x7f, regc50);
811 odm_set_bb_reg(p_dm_odm, REG_S0_S1_PATH_SWITCH, MASKDWORD, reg948);
812 odm_set_bb_reg(p_dm_odm, REG_AGC_TABLE_SELECT, MASKDWORD, regb2c);
814 odm_set_bb_reg(p_dm_odm, REG_FPGA0_RFMOD, BIT(24), 1); /* enable whole CCK block */
815 odm_write_1byte(p_dm_odm, REG_TXPAUSE, 0x0); /* Turn on TX */ /* Resume TX Queue */
816 odm_set_bb_reg(p_dm_odm, 0xC14, MASKDWORD, regc14); /* [ Set IQK Matrix = 0 ] equivalent to [ Turn on CCA] */
817 odm_set_bb_reg(p_dm_odm, 0x908, MASKDWORD, reg908);
825 odm_sw_ant_detect_init(
829 #if (defined(CONFIG_ANT_DETECTION))
830 struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
831 struct _sw_antenna_switch_ *p_dm_swat_table = &p_dm_odm->dm_swat_table;
833 /* p_dm_swat_table->pre_antenna = MAIN_ANT; */
834 /* p_dm_swat_table->cur_antenna = MAIN_ANT; */
835 p_dm_swat_table->swas_no_link_state = 0;
836 p_dm_swat_table->pre_aux_fail_detec = false;
837 p_dm_swat_table->swas_no_link_bk_reg948 = 0xff;
839 #if (CONFIG_PSD_TOOL == 1)
840 phydm_psd_init(p_dm_odm);