drivers/net/wireless/rockchip_wlan/rtl8723cs/hal/phydm/phydm_powertracking_ap.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20
  21 #ifndef __PHYDMPOWERTRACKING_H__
  22 #define    __PHYDMPOWERTRACKING_H__
  23
  24 #define POWRTRACKING_VERSION    "1.1"
  25
  26 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
  27         #ifdef RTK_AC_SUPPORT
  28                 #define ODM_IC_11AC_SERIES_SUPPORT              1
  29         #else
  30                 #define ODM_IC_11AC_SERIES_SUPPORT              0
  31         #endif
  32 #else
  33         #define ODM_IC_11AC_SERIES_SUPPORT              1
  34 #endif
  35
  36 #define         DPK_DELTA_MAPPING_NUM   13
  37 #define         index_mapping_HP_NUM    15
  38 #define         DELTA_SWINGIDX_SIZE     30
  39 #define         DELTA_SWINTSSI_SIZE     61
  40 #define         BAND_NUM                                3
  41 #define         MAX_RF_PATH     4
  42 #define         TXSCALE_TABLE_SIZE              37
  43 #define         CCK_TABLE_SIZE_8723D            41
  44 /* JJ ADD 20161014 */
  45 #define         CCK_TABLE_SIZE_8710B            41
  46
  47 #define IQK_MAC_REG_NUM         4
  48 #define IQK_ADDA_REG_NUM                16
  49 #define IQK_BB_REG_NUM_MAX      10
  50
  51 #define IQK_BB_REG_NUM          9
  52
  53 #define HP_THERMAL_NUM          8
  54
  55 #define AVG_THERMAL_NUM         8
  56 #define iqk_matrix_reg_num      8
  57 /* #define IQK_MATRIX_SETTINGS_NUM      1+24+21 */
  58 #define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
  59
  60 #if !defined(_OUTSRC_COEXIST)
  61         #define OFDM_TABLE_SIZE_92D     43
  62         #define OFDM_TABLE_SIZE 37
  63         #define CCK_TABLE_SIZE          33
  64         #define CCK_TABLE_SIZE_88F      21
  65
  66
  67
  68         /* #define      OFDM_TABLE_SIZE_92E     54 */
  69         /* #define      CCK_TABLE_SIZE_92E      54 */
  70         extern  u32 ofdm_swing_table[OFDM_TABLE_SIZE_92D];
  71         extern  u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
  72         extern  u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
  73
  74
  75         extern  u32 ofdm_swing_table_new[OFDM_TABLE_SIZE_92D];
  76         extern  u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
  77         extern  u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
  78         extern  u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
  79         extern  u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
  80         extern  u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
  81
  82 #endif
  83
  84 #define ODM_OFDM_TABLE_SIZE     37
  85 #define ODM_CCK_TABLE_SIZE              33
  86 /* <20140613, YuChen> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
  87 extern u8 delta_swing_table_idx_2ga_p_default[DELTA_SWINGIDX_SIZE];
  88 extern u8 delta_swing_table_idx_2ga_n_default[DELTA_SWINGIDX_SIZE];
  89
  90 static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4,  4,  4,  4,  4,  4,  5,  5,  7,  7,  8,  8,  8,  9,  9,  9,  9,  9};
  91 static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5,  6,  6,  7,  7,  7,  7,  8,  8,  9,  9, 10, 10, 10, 11, 11, 11, 11};
  92
  93 /* extern       u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E];
  94  * extern       u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8];
  95  * extern       u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8]; */
  96
  97 #ifdef CONFIG_WLAN_HAL_8192EE
  98         #define OFDM_TABLE_SIZE_92E     54
  99         #define CCK_TABLE_SIZE_92E      54
 100         extern  u32 ofdm_swing_table_92e[OFDM_TABLE_SIZE_92E];
 101         extern  u8 cck_swing_table_ch1_ch13_92e[CCK_TABLE_SIZE_92E][8];
 102         extern  u8 cck_swing_table_ch14_92e[CCK_TABLE_SIZE_92E][8];
 103 #endif
 104
 105 #define OFDM_TABLE_SIZE_8812    43
 106 #define AVG_THERMAL_NUM_8812    4
 107
 108 #if (RTL8814A_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
 109         extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
 110         #elif(ODM_IC_11AC_SERIES_SUPPORT)
 111         extern unsigned int ofdm_swing_table_8812[OFDM_TABLE_SIZE_8812];
 112 #endif
 113
 114 extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
 115 /* JJ ADD 20161014 */
 116 extern u32 cck_swing_table_ch1_ch14_8710b[CCK_TABLE_SIZE_8710B];
 117
 118 #define dm_check_txpowertracking        odm_txpowertracking_check
 119
 120 struct _IQK_MATRIX_REGS_SETTING {
 121         boolean is_iqk_done;
 122         s32             value[1][iqk_matrix_reg_num];
 123 };
 124
 125 struct odm_rf_calibration_structure {
 126         /* for tx power tracking */
 127
 128         u32     rega24; /* for TempCCK */
 129         s32     rege94;
 130         s32     rege9c;
 131         s32     regeb4;
 132         s32     regebc;
 133
 134         /* u8 is_txpowertracking; */
 135         u8      tx_powercount;
 136         boolean is_txpowertracking_init;
 137         boolean is_txpowertracking;
 138         u8      txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
 139         u8      tm_trigger;
 140         u8      internal_pa_5g[2];      /* pathA / pathB */
 141
 142         u8      thermal_meter[2];    /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
 143         u8      thermal_value;
 144         u8      thermal_value_lck;
 145         u8      thermal_value_iqk;
 146         s8      thermal_value_delta; /* delta of thermal_value and efuse thermal */
 147         u8      thermal_value_dpk;
 148         u8      thermal_value_avg[AVG_THERMAL_NUM];
 149         u8      thermal_value_avg_index;
 150         u8      thermal_value_rx_gain;
 151         u8      thermal_value_crystal;
 152         u8      thermal_value_dpk_store;
 153         u8      thermal_value_dpk_track;
 154         boolean txpowertracking_in_progress;
 155         boolean is_dpk_enable;
 156
 157         boolean is_reloadtxpowerindex;
 158         u8      is_rf_pi_enable;
 159         u32     txpowertracking_callback_cnt; /* cosa add for debug */
 160
 161         u8      is_cck_in_ch14;
 162         u8      CCK_index;
 163         u8      OFDM_index[MAX_RF_PATH];
 164         s8      power_index_offset;
 165         s8      delta_power_index;
 166         s8      delta_power_index_last;
 167         boolean is_tx_power_changed;
 168
 169         u8      thermal_value_hp[HP_THERMAL_NUM];
 170         u8      thermal_value_hp_index;
 171         struct _IQK_MATRIX_REGS_SETTING iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
 172         u8      delta_lck;
 173         u8  delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
 174         u8  delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
 175         u8  delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
 176         u8  delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
 177         u8  delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
 178         u8  delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
 179         u8  delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
 180         u8  delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
 181         u8  delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
 182         u8  delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
 183         u8  delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
 184         u8  delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
 185         u8  delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
 186         u8  delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
 187         u8  delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
 188         u8  delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
 189         u8  delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
 190         u8  delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
 191         u8  delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
 192         u8  delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
 193         u8  delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
 194         u8  delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
 195         u8  delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
 196         u8  delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
 197         u8  delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
 198         u8  delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
 199         u8  delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
 200         u8  delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
 201         u8  delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
 202         u8  delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
 203         u8  delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
 204         u8  delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
 205         u8  delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
 206         u8  delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
 207         u8  delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
 208         u8  delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
 209         u8  delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
 210         u8  delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
 211
 212         u8                      bb_swing_idx_ofdm[MAX_RF_PATH];
 213         u8                      bb_swing_idx_ofdm_current;
 214 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
 215         u8                      bb_swing_idx_ofdm_base[MAX_RF_PATH];
 216 #else
 217         u8                      bb_swing_idx_ofdm_base;
 218 #endif
 219         boolean                 bb_swing_flag_ofdm;
 220         u8                      bb_swing_idx_cck;
 221         u8                      bb_swing_idx_cck_current;
 222         u8                      bb_swing_idx_cck_base;
 223         u8                      default_ofdm_index;
 224         u8                      default_cck_index;
 225         boolean                 bb_swing_flag_cck;
 226
 227         s8                      absolute_ofdm_swing_idx[MAX_RF_PATH];
 228         s8                      remnant_ofdm_swing_idx[MAX_RF_PATH];
 229         s8                      absolute_cck_swing_idx[MAX_RF_PATH];
 230         s8                      remnant_cck_swing_idx;
 231         s8                      modify_tx_agc_value;       /*Remnat compensate value at tx_agc */
 232         boolean                 modify_tx_agc_flag_path_a;
 233         boolean                 modify_tx_agc_flag_path_b;
 234         boolean                 modify_tx_agc_flag_path_c;
 235         boolean                 modify_tx_agc_flag_path_d;
 236         boolean                 modify_tx_agc_flag_path_a_cck;
 237
 238         s8                      kfree_offset[MAX_RF_PATH];
 239
 240         /* -------------------------------------------------------------------- */
 241
 242         /* for IQK */
 243         u32     regc04;
 244         u32     reg874;
 245         u32     regc08;
 246         u32     regb68;
 247         u32     regb6c;
 248         u32     reg870;
 249         u32     reg860;
 250         u32     reg864;
 251
 252         boolean is_iqk_initialized;
 253         boolean is_lck_in_progress;
 254         boolean is_antenna_detected;
 255         boolean is_need_iqk;
 256         boolean is_iqk_in_progress;
 257         boolean is_iqk_pa_off;
 258         u8      delta_iqk;
 259         u32     ADDA_backup[IQK_ADDA_REG_NUM];
 260         u32     IQK_MAC_backup[IQK_MAC_REG_NUM];
 261         u32     IQK_BB_backup_recover[9];
 262         u32     IQK_BB_backup[IQK_BB_REG_NUM];
 263         u32     tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
 264         u32     rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}} */
 265         u32     tx_iqc_8703b[3][2];     /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
 266         u32     rx_iqc_8703b[2][2];     /* { {S1: 0xc14, 0xca0} ,           {S0: 0xc14, 0xca0}}*/
 267
 268         u64     iqk_start_time;
 269         u64     iqk_total_progressing_time;
 270         u64     iqk_progressing_time;
 271         u32  lok_result;
 272         u8      iqk_step;
 273         u8      kcount;
 274         u8      retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
 275         boolean is_mp_mode;
 276
 277         /* for APK */
 278         u32     ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
 279         u8      is_ap_kdone;
 280         u8      is_apk_thermal_meter_ignore;
 281         u8      is_dp_done;
 282         u8      is_dp_path_aok;
 283         u8      is_dp_path_bok;
 284
 285         /*Add by Yuchen for Kfree Phydm*/
 286         u8                      reg_rf_kfree_enable;    /*for registry*/
 287         u8                      rf_kfree_enable;                /*for efuse enable check*/
 288         u32     tx_lok[2];
 289 };
 290
 291 void
 292 odm_txpowertracking_check_ap(
 293         void            *p_dm_void
 294 );
 295
 296 void
 297 odm_txpowertracking_check(
 298         void            *p_dm_void
 299 );
 300
 301
 302 void
 303 odm_txpowertracking_thermal_meter_init(
 304         void            *p_dm_void
 305 );
 306
 307 void
 308 odm_txpowertracking_init(
 309         void            *p_dm_void
 310 );
 311
 312 void
 313 odm_txpowertracking_check_mp(
 314         void            *p_dm_void
 315 );
 316
 317
 318 void
 319 odm_txpowertracking_check_ce(
 320         void            *p_dm_void
 321 );
 322
 323
 324 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
 325
 326 void
 327 odm_txpowertracking_callback_thermal_meter92c(
 328         struct _ADAPTER *adapter
 329 );
 330
 331 void
 332 odm_txpowertracking_callback_rx_gain_thermal_meter92d(
 333         struct _ADAPTER *adapter
 334 );
 335
 336 void
 337 odm_txpowertracking_callback_thermal_meter92d(
 338         struct _ADAPTER *adapter
 339 );
 340
 341 void
 342 odm_txpowertracking_direct_call92c(
 343         struct _ADAPTER         *adapter
 344 );
 345
 346 void
 347 odm_txpowertracking_thermal_meter_check(
 348         struct _ADAPTER         *adapter
 349 );
 350
 351 #endif
 352
 353
 354
 355 #endif