1 /* ************************************************************
\r
4 * This file is for RTL8723B Co-exist mechanism
\r
7 * 2012/11/15 Cosa first check in.
\r
9 * ************************************************************ */
\r
11 /* ************************************************************
\r
13 * ************************************************************ */
\r
14 #include "Mp_Precomp.h"
\r
16 #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
\r
18 #if (RTL8723B_SUPPORT == 1)
\r
19 /* ************************************************************
\r
20 * Global variables, these are static variables
\r
21 * ************************************************************ */
\r
22 static u8 *trace_buf = &gl_btc_trace_buf[0];
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23 static struct coex_dm_8723b_2ant glcoex_dm_8723b_2ant;
\r
24 static struct coex_dm_8723b_2ant *coex_dm = &glcoex_dm_8723b_2ant;
\r
25 static struct coex_sta_8723b_2ant glcoex_sta_8723b_2ant;
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26 static struct coex_sta_8723b_2ant *coex_sta = &glcoex_sta_8723b_2ant;
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28 const char *const glbt_info_src_8723b_2ant[] = {
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31 "BT Info[bt auto report]",
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34 u32 glcoex_ver_date_8723b_2ant = 20151223;
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35 u32 glcoex_ver_8723b_2ant = 0x4a;
\r
37 /* ************************************************************
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38 * local function proto type if needed
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39 * ************************************************************
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40 * ************************************************************
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41 * local function start with halbtc8723b2ant_
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42 * ************************************************************ */
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43 u8 halbtc8723b2ant_bt_rssi_state(u8 *ppre_bt_rssi_state, u8 level_num,
\r
44 u8 rssi_thresh, u8 rssi_thresh1)
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47 u8 bt_rssi_state = *ppre_bt_rssi_state;
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49 bt_rssi = coex_sta->bt_rssi;
\r
51 if (level_num == 2) {
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52 if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
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53 (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
\r
54 if (bt_rssi >= (rssi_thresh +
\r
55 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
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56 bt_rssi_state = BTC_RSSI_STATE_HIGH;
\r
58 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
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60 if (bt_rssi < rssi_thresh)
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61 bt_rssi_state = BTC_RSSI_STATE_LOW;
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63 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
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65 } else if (level_num == 3) {
\r
66 if (rssi_thresh > rssi_thresh1) {
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67 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
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68 "[BTCoex], BT Rssi thresh error!!\n");
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69 BTC_TRACE(trace_buf);
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70 return *ppre_bt_rssi_state;
\r
73 if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
\r
74 (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
\r
75 if (bt_rssi >= (rssi_thresh +
\r
76 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
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77 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
\r
79 bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
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80 } else if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
\r
81 (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
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82 if (bt_rssi >= (rssi_thresh1 +
\r
83 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
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84 bt_rssi_state = BTC_RSSI_STATE_HIGH;
\r
85 else if (bt_rssi < rssi_thresh)
\r
86 bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
88 bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
\r
90 if (bt_rssi < rssi_thresh1)
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91 bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
\r
93 bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
\r
97 *ppre_bt_rssi_state = bt_rssi_state;
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99 return bt_rssi_state;
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102 u8 halbtc8723b2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
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103 IN u8 *pprewifi_rssi_state, IN u8 level_num, IN u8 rssi_thresh,
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104 IN u8 rssi_thresh1)
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107 u8 wifi_rssi_state = *pprewifi_rssi_state;
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109 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
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111 if (level_num == 2) {
\r
112 if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) ||
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113 (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
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114 if (wifi_rssi >= (rssi_thresh +
\r
115 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
\r
116 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
\r
118 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
\r
120 if (wifi_rssi < rssi_thresh)
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121 wifi_rssi_state = BTC_RSSI_STATE_LOW;
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123 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
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125 } else if (level_num == 3) {
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126 if (rssi_thresh > rssi_thresh1) {
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127 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
128 "[BTCoex], wifi RSSI thresh error!!\n");
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129 BTC_TRACE(trace_buf);
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130 return *pprewifi_rssi_state;
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133 if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) ||
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134 (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
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135 if (wifi_rssi >= (rssi_thresh +
\r
136 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
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137 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
\r
139 wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
\r
140 } else if ((*pprewifi_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
\r
141 (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
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142 if (wifi_rssi >= (rssi_thresh1 +
\r
143 BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
\r
144 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
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145 else if (wifi_rssi < rssi_thresh)
\r
146 wifi_rssi_state = BTC_RSSI_STATE_LOW;
\r
148 wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
\r
150 if (wifi_rssi < rssi_thresh1)
\r
151 wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
\r
153 wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
\r
157 *pprewifi_rssi_state = wifi_rssi_state;
\r
159 return wifi_rssi_state;
\r
162 void halbtc8723b2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
\r
164 static u32 bt_disable_cnt = 0;
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165 boolean bt_active = true, bt_disabled = false;
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167 /* This function check if bt is disabled */
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169 if (coex_sta->high_priority_tx == 0 &&
\r
170 coex_sta->high_priority_rx == 0 &&
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171 coex_sta->low_priority_tx == 0 &&
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172 coex_sta->low_priority_rx == 0)
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174 if (coex_sta->high_priority_tx == 0xffff &&
\r
175 coex_sta->high_priority_rx == 0xffff &&
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176 coex_sta->low_priority_tx == 0xffff &&
\r
177 coex_sta->low_priority_rx == 0xffff)
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180 bt_disable_cnt = 0;
\r
181 bt_disabled = false;
\r
184 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
185 "[BTCoex], bt all counters=0, %d times!!\n",
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187 BTC_TRACE(trace_buf);
\r
188 if (bt_disable_cnt >= 2)
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189 bt_disabled = true;
\r
191 if (coex_sta->bt_disabled != bt_disabled) {
\r
192 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
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193 "[BTCoex], BT is from %s to %s!!\n",
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194 (coex_sta->bt_disabled ? "disabled" : "enabled"),
\r
195 (bt_disabled ? "disabled" : "enabled"));
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196 BTC_TRACE(trace_buf);
\r
198 coex_sta->bt_disabled = bt_disabled;
\r
199 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
\r
202 btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
\r
204 btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
\r
211 void halbtc8723b2ant_limited_rx(IN struct btc_coexist *btcoexist,
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212 IN boolean force_exec, IN boolean rej_ap_agg_pkt,
\r
213 IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
\r
215 boolean reject_rx_agg = rej_ap_agg_pkt;
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216 boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
\r
217 u8 rx_agg_size = agg_buf_size;
\r
219 /* ============================================ */
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220 /* Rx Aggregation related setting */
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221 /* ============================================ */
\r
222 btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
\r
224 /* decide BT control aggregation buf size or not */
\r
225 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
\r
226 &bt_ctrl_rx_agg_size);
\r
227 /* aggregation buf size, only work when BT control Rx aggregation size. */
\r
228 btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
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229 /* real update aggregation setting */
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230 btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
\r
233 void halbtc8723b2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
\r
235 u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
\r
236 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
\r
238 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
\r
240 reg_hp_txrx = 0x770;
\r
241 reg_lp_txrx = 0x774;
\r
243 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
\r
244 reg_hp_tx = u32tmp & MASKLWORD;
\r
245 reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
\r
247 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
\r
248 reg_lp_tx = u32tmp & MASKLWORD;
\r
249 reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
\r
251 coex_sta->high_priority_tx = reg_hp_tx;
\r
252 coex_sta->high_priority_rx = reg_hp_rx;
\r
253 coex_sta->low_priority_tx = reg_lp_tx;
\r
254 coex_sta->low_priority_rx = reg_lp_rx;
\r
256 if ((coex_sta->low_priority_tx > 1050) &&
\r
257 (!coex_sta->c2h_bt_inquiry_page))
\r
258 coex_sta->pop_event_cnt++;
\r
260 if ((coex_sta->low_priority_rx >= 950) &&
\r
261 (coex_sta->low_priority_rx >= coex_sta->low_priority_tx) &&
\r
262 (!coex_sta->under_ips))
\r
263 bt_link_info->slave_role = true;
\r
265 bt_link_info->slave_role = false;
\r
267 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
268 "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
\r
269 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
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270 BTC_TRACE(trace_buf);
\r
271 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
272 "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
\r
273 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
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274 BTC_TRACE(trace_buf);
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276 /* reset counter */
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277 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
\r
280 void halbtc8723b2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
\r
284 if (coex_sta->under_ips) {
\r
285 coex_sta->crc_ok_cck = 0;
\r
286 coex_sta->crc_ok_11g = 0;
\r
287 coex_sta->crc_ok_11n = 0;
\r
288 coex_sta->crc_ok_11n_agg = 0;
\r
290 coex_sta->crc_err_cck = 0;
\r
291 coex_sta->crc_err_11g = 0;
\r
292 coex_sta->crc_err_11n = 0;
\r
293 coex_sta->crc_err_11n_agg = 0;
\r
295 coex_sta->crc_ok_cck = btcoexist->btc_read_4byte(btcoexist,
\r
297 coex_sta->crc_ok_11g = btcoexist->btc_read_2byte(btcoexist,
\r
299 coex_sta->crc_ok_11n = btcoexist->btc_read_2byte(btcoexist,
\r
301 coex_sta->crc_ok_11n_agg = btcoexist->btc_read_2byte(btcoexist,
\r
304 coex_sta->crc_err_cck = btcoexist->btc_read_4byte(btcoexist,
\r
306 coex_sta->crc_err_11g = btcoexist->btc_read_2byte(btcoexist,
\r
308 coex_sta->crc_err_11n = btcoexist->btc_read_2byte(btcoexist,
\r
310 coex_sta->crc_err_11n_agg = btcoexist->btc_read_2byte(btcoexist,
\r
314 /* reset counter */
\r
315 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x1);
\r
316 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x0);
\r
319 void halbtc8723b2ant_query_bt_info(IN struct btc_coexist *btcoexist)
\r
321 u8 h2c_parameter[1] = {0};
\r
323 coex_sta->c2h_bt_info_req_sent = true;
\r
325 h2c_parameter[0] |= BIT(0); /* trigger */
\r
327 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
\r
330 boolean halbtc8723b2ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
\r
332 static boolean pre_wifi_busy = false, pre_under_4way = false,
\r
333 pre_bt_hs_on = false;
\r
334 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
\r
335 boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
\r
336 boolean wifi_connected = false;
\r
337 u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
\r
340 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
\r
342 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
\r
343 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
\r
344 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
\r
347 if (wifi_connected) {
\r
348 if (wifi_busy != pre_wifi_busy) {
\r
349 pre_wifi_busy = wifi_busy;
\r
352 if (under_4way != pre_under_4way) {
\r
353 pre_under_4way = under_4way;
\r
356 if (bt_hs_on != pre_bt_hs_on) {
\r
357 pre_bt_hs_on = bt_hs_on;
\r
362 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
363 &prewifi_rssi_state, 2,
\r
364 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
\r
365 coex_dm->switch_thres_offset, 0);
\r
367 if ((BTC_RSSI_STATE_HIGH == wifi_rssi_state) ||
\r
368 (BTC_RSSI_STATE_LOW == wifi_rssi_state))
\r
376 void halbtc8723b2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
\r
378 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
\r
379 boolean bt_hs_on = false;
\r
381 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
\r
383 bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
\r
384 bt_link_info->sco_exist = coex_sta->sco_exist;
\r
385 bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
\r
386 bt_link_info->pan_exist = coex_sta->pan_exist;
\r
387 bt_link_info->hid_exist = coex_sta->hid_exist;
\r
389 /* work around for HS mode. */
\r
391 bt_link_info->pan_exist = true;
\r
392 bt_link_info->bt_link_exist = true;
\r
395 /* check if Sco only */
\r
396 if (bt_link_info->sco_exist &&
\r
397 !bt_link_info->a2dp_exist &&
\r
398 !bt_link_info->pan_exist &&
\r
399 !bt_link_info->hid_exist)
\r
400 bt_link_info->sco_only = true;
\r
402 bt_link_info->sco_only = false;
\r
404 /* check if A2dp only */
\r
405 if (!bt_link_info->sco_exist &&
\r
406 bt_link_info->a2dp_exist &&
\r
407 !bt_link_info->pan_exist &&
\r
408 !bt_link_info->hid_exist)
\r
409 bt_link_info->a2dp_only = true;
\r
411 bt_link_info->a2dp_only = false;
\r
413 /* check if Pan only */
\r
414 if (!bt_link_info->sco_exist &&
\r
415 !bt_link_info->a2dp_exist &&
\r
416 bt_link_info->pan_exist &&
\r
417 !bt_link_info->hid_exist)
\r
418 bt_link_info->pan_only = true;
\r
420 bt_link_info->pan_only = false;
\r
422 /* check if Hid only */
\r
423 if (!bt_link_info->sco_exist &&
\r
424 !bt_link_info->a2dp_exist &&
\r
425 !bt_link_info->pan_exist &&
\r
426 bt_link_info->hid_exist)
\r
427 bt_link_info->hid_only = true;
\r
429 bt_link_info->hid_only = false;
\r
432 u8 halbtc8723b2ant_action_algorithm(IN struct btc_coexist *btcoexist)
\r
434 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
\r
435 boolean bt_hs_on = false;
\r
436 u8 algorithm = BT_8723B_2ANT_COEX_ALGO_UNDEFINED;
\r
437 u8 num_of_diff_profile = 0;
\r
439 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
\r
441 if (!bt_link_info->bt_link_exist) {
\r
442 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
443 "[BTCoex], No BT link exists!!!\n");
\r
444 BTC_TRACE(trace_buf);
\r
448 if (bt_link_info->sco_exist)
\r
449 num_of_diff_profile++;
\r
450 if (bt_link_info->hid_exist)
\r
451 num_of_diff_profile++;
\r
452 if (bt_link_info->pan_exist)
\r
453 num_of_diff_profile++;
\r
454 if (bt_link_info->a2dp_exist)
\r
455 num_of_diff_profile++;
\r
457 if (num_of_diff_profile == 1) {
\r
458 if (bt_link_info->sco_exist) {
\r
459 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
460 "[BTCoex], SCO only\n");
\r
461 BTC_TRACE(trace_buf);
\r
462 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
\r
464 if (bt_link_info->hid_exist) {
\r
465 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
466 "[BTCoex], HID only\n");
\r
467 BTC_TRACE(trace_buf);
\r
468 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
\r
469 } else if (bt_link_info->a2dp_exist) {
\r
470 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
471 "[BTCoex], A2DP only\n");
\r
472 BTC_TRACE(trace_buf);
\r
473 algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP;
\r
474 } else if (bt_link_info->pan_exist) {
\r
476 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
477 "[BTCoex], PAN(HS) only\n");
\r
478 BTC_TRACE(trace_buf);
\r
480 BT_8723B_2ANT_COEX_ALGO_PANHS;
\r
482 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
483 "[BTCoex], PAN(EDR) only\n");
\r
484 BTC_TRACE(trace_buf);
\r
486 BT_8723B_2ANT_COEX_ALGO_PANEDR;
\r
490 } else if (num_of_diff_profile == 2) {
\r
491 if (bt_link_info->sco_exist) {
\r
492 if (bt_link_info->hid_exist) {
\r
493 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
494 "[BTCoex], SCO + HID\n");
\r
495 BTC_TRACE(trace_buf);
\r
496 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
497 } else if (bt_link_info->a2dp_exist) {
\r
498 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
499 "[BTCoex], SCO + A2DP ==> SCO\n");
\r
500 BTC_TRACE(trace_buf);
\r
501 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
502 } else if (bt_link_info->pan_exist) {
\r
504 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
505 "[BTCoex], SCO + PAN(HS)\n");
\r
506 BTC_TRACE(trace_buf);
\r
507 algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
\r
509 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
510 "[BTCoex], SCO + PAN(EDR)\n");
\r
511 BTC_TRACE(trace_buf);
\r
513 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
517 if (bt_link_info->hid_exist &&
\r
518 bt_link_info->a2dp_exist) {
\r
520 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
521 "[BTCoex], HID + A2DP\n");
\r
522 BTC_TRACE(trace_buf);
\r
524 BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
\r
526 } else if (bt_link_info->hid_exist &&
\r
527 bt_link_info->pan_exist) {
\r
529 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
530 "[BTCoex], HID + PAN(HS)\n");
\r
531 BTC_TRACE(trace_buf);
\r
532 algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
\r
534 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
535 "[BTCoex], HID + PAN(EDR)\n");
\r
536 BTC_TRACE(trace_buf);
\r
538 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
540 } else if (bt_link_info->pan_exist &&
\r
541 bt_link_info->a2dp_exist) {
\r
543 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
544 "[BTCoex], A2DP + PAN(HS)\n");
\r
545 BTC_TRACE(trace_buf);
\r
547 BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS;
\r
549 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
550 "[BTCoex], A2DP + PAN(EDR)\n");
\r
551 BTC_TRACE(trace_buf);
\r
553 BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP;
\r
557 } else if (num_of_diff_profile == 3) {
\r
558 if (bt_link_info->sco_exist) {
\r
559 if (bt_link_info->hid_exist &&
\r
560 bt_link_info->a2dp_exist) {
\r
561 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
562 "[BTCoex], SCO + HID + A2DP ==> HID\n");
\r
563 BTC_TRACE(trace_buf);
\r
564 algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
565 } else if (bt_link_info->hid_exist &&
\r
566 bt_link_info->pan_exist) {
\r
568 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
569 "[BTCoex], SCO + HID + PAN(HS)\n");
\r
570 BTC_TRACE(trace_buf);
\r
572 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
574 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
575 "[BTCoex], SCO + HID + PAN(EDR)\n");
\r
576 BTC_TRACE(trace_buf);
\r
578 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
580 } else if (bt_link_info->pan_exist &&
\r
581 bt_link_info->a2dp_exist) {
\r
583 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
584 "[BTCoex], SCO + A2DP + PAN(HS)\n");
\r
585 BTC_TRACE(trace_buf);
\r
587 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
589 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
590 "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n");
\r
591 BTC_TRACE(trace_buf);
\r
593 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
597 if (bt_link_info->hid_exist &&
\r
598 bt_link_info->pan_exist &&
\r
599 bt_link_info->a2dp_exist) {
\r
601 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
602 "[BTCoex], HID + A2DP + PAN(HS)\n");
\r
603 BTC_TRACE(trace_buf);
\r
605 BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
\r
607 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
608 "[BTCoex], HID + A2DP + PAN(EDR)\n");
\r
609 BTC_TRACE(trace_buf);
\r
611 BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
\r
615 } else if (num_of_diff_profile >= 3) {
\r
616 if (bt_link_info->sco_exist) {
\r
617 if (bt_link_info->hid_exist &&
\r
618 bt_link_info->pan_exist &&
\r
619 bt_link_info->a2dp_exist) {
\r
621 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
622 "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n");
\r
623 BTC_TRACE(trace_buf);
\r
626 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
627 "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
\r
628 BTC_TRACE(trace_buf);
\r
630 BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
\r
639 void halbtc8723b2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
\r
640 IN u8 dac_swing_lvl)
\r
642 u8 h2c_parameter[1] = {0};
\r
644 /* There are several type of dacswing */
\r
645 /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
\r
646 h2c_parameter[0] = dac_swing_lvl;
\r
648 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
\r
651 void halbtc8723b2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
\r
652 IN u8 dec_bt_pwr_lvl)
\r
654 u8 h2c_parameter[1] = {0};
\r
656 h2c_parameter[0] = dec_bt_pwr_lvl;
\r
658 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
\r
661 void halbtc8723b2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
\r
662 IN boolean force_exec, IN u8 dec_bt_pwr_lvl)
\r
664 coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl;
\r
667 if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl)
\r
670 halbtc8723b2ant_set_fw_dec_bt_pwr(btcoexist,
\r
671 coex_dm->cur_bt_dec_pwr_lvl);
\r
673 coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl;
\r
676 void halbtc8723b2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
\r
677 IN boolean enable_auto_report)
\r
679 u8 h2c_parameter[1] = {0};
\r
681 h2c_parameter[0] = 0;
\r
683 if (enable_auto_report)
\r
684 h2c_parameter[0] |= BIT(0);
\r
686 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
\r
689 void halbtc8723b2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
\r
690 IN boolean force_exec, IN boolean enable_auto_report)
\r
692 coex_dm->cur_bt_auto_report = enable_auto_report;
\r
695 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
\r
698 halbtc8723b2ant_set_bt_auto_report(btcoexist,
\r
699 coex_dm->cur_bt_auto_report);
\r
701 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
\r
704 void halbtc8723b2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
\r
705 IN boolean force_exec, IN u8 fw_dac_swing_lvl)
\r
707 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
\r
710 if (coex_dm->pre_fw_dac_swing_lvl ==
\r
711 coex_dm->cur_fw_dac_swing_lvl)
\r
715 halbtc8723b2ant_set_fw_dac_swing_level(btcoexist,
\r
716 coex_dm->cur_fw_dac_swing_lvl);
\r
718 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
\r
721 void halbtc8723b2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist *btcoexist,
\r
722 IN boolean rx_rf_shrink_on)
\r
724 if (rx_rf_shrink_on) {
\r
725 /* Shrink RF Rx LPF corner */
\r
726 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
727 "[BTCoex], Shrink RF Rx LPF corner!!\n");
\r
728 BTC_TRACE(trace_buf);
\r
729 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff,
\r
732 /* Resume RF Rx LPF corner */
\r
733 /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */
\r
734 if (btcoexist->initilized) {
\r
735 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
736 "[BTCoex], Resume RF Rx LPF corner!!\n");
\r
737 BTC_TRACE(trace_buf);
\r
738 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
\r
739 0xfffff, coex_dm->bt_rf_0x1e_backup);
\r
744 void halbtc8723b2ant_rf_shrink(IN struct btc_coexist *btcoexist,
\r
745 IN boolean force_exec, IN boolean rx_rf_shrink_on)
\r
747 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
\r
750 if (coex_dm->pre_rf_rx_lpf_shrink ==
\r
751 coex_dm->cur_rf_rx_lpf_shrink)
\r
754 halbtc8723b2ant_set_sw_rf_rx_lpf_corner(btcoexist,
\r
755 coex_dm->cur_rf_rx_lpf_shrink);
\r
757 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
\r
760 void halbtc8723b2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist
\r
761 *btcoexist, IN boolean low_penalty_ra)
\r
763 u8 h2c_parameter[6] = {0};
\r
765 h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */
\r
767 if (low_penalty_ra) {
\r
768 h2c_parameter[1] |= BIT(0);
\r
770 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */
\r
771 h2c_parameter[3] = 0xf4; /* MCS7 or OFDM54 */
\r
772 h2c_parameter[4] = 0xf5; /* MCS6 or OFDM48 */
\r
773 h2c_parameter[5] = 0xf6; /* MCS5 or OFDM36 */
\r
776 btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
\r
779 void halbtc8723b2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
\r
780 IN boolean force_exec, IN boolean low_penalty_ra)
\r
782 coex_dm->cur_low_penalty_ra = low_penalty_ra;
\r
785 if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
\r
788 halbtc8723b2ant_set_sw_penalty_tx_rate_adaptive(btcoexist,
\r
789 coex_dm->cur_low_penalty_ra);
\r
791 coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
\r
794 void halbtc8723b2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist,
\r
797 u8 val = (u8)level;
\r
799 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
800 "[BTCoex], Write SwDacSwing = 0x%x\n", level);
\r
801 BTC_TRACE(trace_buf);
\r
802 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
\r
805 void halbtc8723b2ant_set_sw_full_time_dac_swing(IN struct btc_coexist
\r
806 *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl)
\r
808 if (sw_dac_swing_on)
\r
809 halbtc8723b2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
\r
811 halbtc8723b2ant_set_dac_swing_reg(btcoexist, 0x18);
\r
815 void halbtc8723b2ant_dac_swing(IN struct btc_coexist *btcoexist,
\r
816 IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl)
\r
818 coex_dm->cur_dac_swing_on = dac_swing_on;
\r
819 coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
\r
822 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
\r
823 (coex_dm->pre_dac_swing_lvl ==
\r
824 coex_dm->cur_dac_swing_lvl))
\r
828 halbtc8723b2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on,
\r
831 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
\r
832 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
\r
835 void halbtc8723b2ant_set_adc_back_off(IN struct btc_coexist *btcoexist,
\r
836 IN boolean adc_back_off)
\r
838 if (adc_back_off) {
\r
839 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
840 "[BTCoex], BB BackOff Level On!\n");
\r
841 BTC_TRACE(trace_buf);
\r
842 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x3);
\r
844 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
845 "[BTCoex], BB BackOff Level Off!\n");
\r
846 BTC_TRACE(trace_buf);
\r
847 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x1);
\r
851 void halbtc8723b2ant_adc_back_off(IN struct btc_coexist *btcoexist,
\r
852 IN boolean force_exec, IN boolean adc_back_off)
\r
854 coex_dm->cur_adc_back_off = adc_back_off;
\r
857 if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off)
\r
860 halbtc8723b2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off);
\r
862 coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off;
\r
865 void halbtc8723b2ant_set_agc_table(IN struct btc_coexist *btcoexist,
\r
866 IN boolean agc_table_en)
\r
868 u8 rssi_adjust_val = 0;
\r
870 /* =================BB AGC Gain Table */
\r
871 if (agc_table_en) {
\r
872 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
873 "[BTCoex], BB Agc Table On!\n");
\r
874 BTC_TRACE(trace_buf);
\r
875 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6e1A0001);
\r
876 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6d1B0001);
\r
877 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6c1C0001);
\r
878 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6b1D0001);
\r
879 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6a1E0001);
\r
880 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x691F0001);
\r
881 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x68200001);
\r
883 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
884 "[BTCoex], BB Agc Table Off!\n");
\r
885 BTC_TRACE(trace_buf);
\r
886 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
\r
887 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
\r
888 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
\r
889 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
\r
890 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
\r
891 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
\r
892 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa4200001);
\r
896 /* =================RF Gain */
\r
897 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
\r
898 if (agc_table_en) {
\r
899 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
900 "[BTCoex], Agc Table On!\n");
\r
901 BTC_TRACE(trace_buf);
\r
902 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
\r
904 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
\r
907 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
908 "[BTCoex], Agc Table Off!\n");
\r
909 BTC_TRACE(trace_buf);
\r
910 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
\r
912 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
\r
915 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
\r
917 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x1);
\r
918 if (agc_table_en) {
\r
919 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
920 "[BTCoex], Agc Table On!\n");
\r
921 BTC_TRACE(trace_buf);
\r
922 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
\r
924 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
\r
927 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
928 "[BTCoex], Agc Table Off!\n");
\r
929 BTC_TRACE(trace_buf);
\r
930 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
\r
932 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
\r
935 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x0);
\r
937 /* set rssi_adjust_val for wifi module. */
\r
939 rssi_adjust_val = 8;
\r
940 btcoexist->btc_set(btcoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
\r
944 void halbtc8723b2ant_agc_table(IN struct btc_coexist *btcoexist,
\r
945 IN boolean force_exec, IN boolean agc_table_en)
\r
947 coex_dm->cur_agc_table_en = agc_table_en;
\r
950 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
\r
953 halbtc8723b2ant_set_agc_table(btcoexist, agc_table_en);
\r
955 coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
\r
958 void halbtc8723b2ant_set_coex_table(IN struct btc_coexist *btcoexist,
\r
959 IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
\r
961 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
\r
963 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
\r
965 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
\r
967 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
\r
970 void halbtc8723b2ant_coex_table(IN struct btc_coexist *btcoexist,
\r
971 IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
\r
972 IN u32 val0x6c8, IN u8 val0x6cc)
\r
974 coex_dm->cur_val0x6c0 = val0x6c0;
\r
975 coex_dm->cur_val0x6c4 = val0x6c4;
\r
976 coex_dm->cur_val0x6c8 = val0x6c8;
\r
977 coex_dm->cur_val0x6cc = val0x6cc;
\r
980 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
\r
981 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
\r
982 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
\r
983 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
\r
986 halbtc8723b2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
\r
989 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
\r
990 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
\r
991 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
\r
992 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
\r
995 void halbtc8723b2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
\r
996 IN boolean force_exec, IN u8 type)
\r
998 coex_sta->coex_table_type = type;
\r
1002 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1003 0x55555555, 0x55555555, 0xffffff, 0x3);
\r
1006 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1007 0x55555555, 0x5afa5afa, 0xffffff, 0x3);
\r
1010 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1011 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3);
\r
1014 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1015 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3);
\r
1018 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1019 0xffffffff, 0xffffffff, 0xffffff, 0x3);
\r
1022 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1023 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3);
\r
1026 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1027 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3);
\r
1030 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1031 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
\r
1034 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1035 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
\r
1038 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1039 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
\r
1042 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1043 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
\r
1046 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1047 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
\r
1050 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1051 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
\r
1054 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1055 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3);
\r
1058 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1059 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3);
\r
1062 halbtc8723b2ant_coex_table(btcoexist, force_exec,
\r
1063 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3);
\r
1070 void halbtc8723b2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
\r
1071 IN boolean enable)
\r
1073 u8 h2c_parameter[1] = {0};
\r
1076 h2c_parameter[0] |= BIT(0); /* function enable */
\r
1079 btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
\r
1082 void halbtc8723b2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
\r
1083 IN u8 lps_val, IN u8 rpwm_val)
\r
1086 u8 rpwm = rpwm_val;
\r
1088 btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps);
\r
1089 btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
\r
1092 void halbtc8723b2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
\r
1093 IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
\r
1095 coex_dm->cur_lps = lps_val;
\r
1096 coex_dm->cur_rpwm = rpwm_val;
\r
1098 if (!force_exec) {
\r
1099 if ((coex_dm->pre_lps == coex_dm->cur_lps) &&
\r
1100 (coex_dm->pre_rpwm == coex_dm->cur_rpwm))
\r
1103 halbtc8723b2ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
\r
1105 coex_dm->pre_lps = coex_dm->cur_lps;
\r
1106 coex_dm->pre_rpwm = coex_dm->cur_rpwm;
\r
1109 void halbtc8723b2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
\r
1110 IN boolean force_exec, IN boolean enable)
\r
1112 coex_dm->cur_ignore_wlan_act = enable;
\r
1114 if (!force_exec) {
\r
1115 if (coex_dm->pre_ignore_wlan_act ==
\r
1116 coex_dm->cur_ignore_wlan_act)
\r
1119 halbtc8723b2ant_set_fw_ignore_wlan_act(btcoexist, enable);
\r
1121 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
\r
1124 void halbtc8723b2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
\r
1125 IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
\r
1127 u8 h2c_parameter[5] = {0};
\r
1130 if ((coex_sta->a2dp_exist) && (coex_sta->hid_exist))
\r
1131 byte5 = byte5 | 0x1;
\r
1133 h2c_parameter[0] = byte1;
\r
1134 h2c_parameter[1] = byte2;
\r
1135 h2c_parameter[2] = byte3;
\r
1136 h2c_parameter[3] = byte4;
\r
1137 h2c_parameter[4] = byte5;
\r
1139 coex_dm->ps_tdma_para[0] = byte1;
\r
1140 coex_dm->ps_tdma_para[1] = byte2;
\r
1141 coex_dm->ps_tdma_para[2] = byte3;
\r
1142 coex_dm->ps_tdma_para[3] = byte4;
\r
1143 coex_dm->ps_tdma_para[4] = byte5;
\r
1145 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
\r
1148 void halbtc8723b2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
\r
1149 IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
\r
1150 IN boolean limited_dig, IN boolean bt_lna_constrain)
\r
1155 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
\r
1157 if(BTC_WIFI_BW_HT40 != wifi_bw)
\r
1159 if (shrink_rx_lpf)
\r
1160 shrink_rx_lpf = false;
\r
1164 /* halbtc8723b2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); */
\r
1165 halbtc8723b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
\r
1168 void halbtc8723b2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
\r
1169 IN boolean agc_table_shift, IN boolean adc_back_off,
\r
1170 IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
\r
1172 /* halbtc8723b2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); */
\r
1173 /* halbtc8723b2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */
\r
1174 /* halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, dac_swing_lvl); */
\r
1177 void halbtc8723b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
\r
1178 IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off)
\r
1180 struct btc_board_info *board_info = &btcoexist->board_info;
\r
1181 PADAPTER pAdapter = btcoexist->Adapter;
\r
1182 u32 fw_ver = 0, u32tmp = 0, cnt_bt_cal_chk = 0;
\r
1183 boolean pg_ext_switch = false;
\r
1184 boolean use_ext_switch = false;
\r
1185 u8 h2c_parameter[2] = {0};
\r
1188 btcoexist->btc_get(btcoexist, BTC_GET_BL_EXT_SWITCH, &pg_ext_switch);
\r
1189 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER,
\r
1190 &fw_ver); /* [31:16]=fw ver, [15:0]=fw sub ver */
\r
1192 if ((fw_ver > 0 && fw_ver < 0xc0000) || pg_ext_switch)
\r
1193 use_ext_switch = true;
\r
1196 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x39, 0x8, 0x1);
\r
1197 btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
\r
1198 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x944, 0x3, 0x3);
\r
1199 btcoexist->btc_write_1byte(btcoexist, 0x930, 0x77);
\r
1200 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, 0x1);
\r
1202 if (fw_ver >= 0x180000) {
\r
1203 /* Use H2C to set GNT_BT to High to avoid A2DP click */
\r
1204 h2c_parameter[0] = 1;
\r
1205 btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
\r
1208 cnt_bt_cal_chk = 0;
\r
1211 if( pAdapter->bFWReady == FALSE )
\r
1213 //RT_TRACE(COMP_INIT , DBG_LOUD, ("halbtc8723b2ant_SetAntPath(): we don't need to wait for H2C command completion because of Fw download fail!!!\n"));
\r
1217 if( btcoexist->btc_read_1byte(btcoexist, 0x765) == 0x18 )
\r
1221 if( cnt_bt_cal_chk > 20 )
\r
1225 btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
\r
1226 u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
\r
1227 if( (u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
\r
1228 btcoexist->btc_write_4byte(btcoexist, 0x948, u32tmp_1[0]);
\r
1230 btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
\r
1232 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
\r
1233 0x0); /* WiFi TRx Mask off */
\r
1234 /* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */
\r
1235 /* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x01); //BT TRx Mask off */
\r
1237 if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
\r
1238 /* tell firmware "no antenna inverse" */
\r
1239 h2c_parameter[0] = 0;
\r
1241 /* tell firmware "antenna inverse" */
\r
1242 h2c_parameter[0] = 1;
\r
1245 if (use_ext_switch) {
\r
1246 /* ext switch type */
\r
1247 h2c_parameter[1] = 1;
\r
1249 /* int switch type */
\r
1250 h2c_parameter[1] = 0;
\r
1252 btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, h2c_parameter);
\r
1254 if (fw_ver >= 0x180000) {
\r
1255 /* Use H2C to set GNT_BT to "Control by PTA"*/
\r
1256 h2c_parameter[0] = 0;
\r
1257 btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
\r
1260 cnt_bt_cal_chk = 0;
\r
1263 if( pAdapter->bFWReady == FALSE )
\r
1265 //RT_TRACE(COMP_INIT , DBG_LOUD, ("halbtc8723b2ant_SetAntPath(): we don't need to wait for H2C command completion because of Fw download fail!!!\n"));
\r
1269 if( btcoexist->btc_read_1byte(btcoexist, 0x765) == 0x0 )
\r
1273 if( cnt_bt_cal_chk > 20 )
\r
1277 btcoexist->btc_write_1byte(btcoexist, 0x765, 0x0);
\r
1280 /* ext switch setting */
\r
1281 if (use_ext_switch) {
\r
1283 /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */
\r
1284 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
\r
1285 u32tmp &= ~BIT(23);
\r
1286 u32tmp |= BIT(24);
\r
1287 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
\r
1289 u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
\r
1290 if( (u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
\r
1291 btcoexist->btc_write_4byte(btcoexist, 0x948, u32tmp_1[0]);
\r
1293 btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
\r
1295 switch (ant_pos_type) {
\r
1296 case BTC_ANT_WIFI_AT_MAIN:
\r
1297 btcoexist->btc_write_1byte_bitmask(btcoexist,
\r
1299 0x1); /* ext switch main at wifi */
\r
1301 case BTC_ANT_WIFI_AT_AUX:
\r
1302 btcoexist->btc_write_1byte_bitmask(btcoexist,
\r
1304 0x2); /* ext switch aux at wifi */
\r
1307 } else { /* internal switch */
\r
1309 /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */
\r
1310 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
\r
1311 u32tmp |= BIT(23);
\r
1312 u32tmp &= ~BIT(24);
\r
1313 btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
\r
1316 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1,
\r
1317 0x0); /* fixed external switch S1->Main, S0->Aux */
\r
1318 switch (ant_pos_type) {
\r
1319 case BTC_ANT_WIFI_AT_MAIN:
\r
1320 u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
\r
1321 if( (u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
\r
1322 btcoexist->btc_write_4byte(btcoexist, 0x948, u32tmp_1[0]);
\r
1324 btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
\r
1326 case BTC_ANT_WIFI_AT_AUX:
\r
1327 u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
\r
1328 if( (u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
\r
1329 btcoexist->btc_write_4byte(btcoexist, 0x948, u32tmp_1[0]);
\r
1331 btcoexist->btc_write_4byte(btcoexist, 0x948, 0x280);
\r
1337 boolean halbtc8723b2ant_CoexSwitchThresCheck(IN struct btc_coexist *btcoexist)
\r
1339 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
\r
1340 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
1341 u8 wifi_rssi_state1, bt_rssi_state;
\r
1345 btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
\r
1347 /* if (vendor == BTC_VENDOR_LENOVO) */
\r
1348 /* offset = 20; */
\r
1350 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
1351 &prewifi_rssi_state, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES
\r
1352 - coex_dm->switch_thres_offset, 0);
\r
1353 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
\r
1354 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
1355 coex_dm->switch_thres_offset, 0);
\r
1357 if (BTC_RSSI_LOW(wifi_rssi_state1) || BTC_RSSI_LOW(bt_rssi_state))
\r
1364 void halbtc8723b2ant_ps_tdma(IN struct btc_coexist *btcoexist,
\r
1365 IN boolean force_exec, IN boolean turn_on, IN u8 type)
\r
1367 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
\r
1368 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
1369 u8 wifi_rssi_state1, bt_rssi_state;
\r
1370 s8 wifi_duration_adjust = 0x0;
\r
1371 u8 psTdmaByte4Modify = 0x0;
\r
1372 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
\r
1374 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
1375 &prewifi_rssi_state, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES
\r
1376 - coex_dm->switch_thres_offset, 0);
\r
1377 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
\r
1378 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
1379 coex_dm->switch_thres_offset, 0);
\r
1381 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
1382 "[BTCoex], %s turn %s PS TDMA, type=%d\n",
\r
1383 (force_exec ? "force to" : ""), (turn_on ? "ON" : "OFF"), type);
\r
1384 BTC_TRACE(trace_buf);
\r
1385 coex_dm->cur_ps_tdma_on = turn_on;
\r
1386 coex_dm->cur_ps_tdma = type;
\r
1388 if (!(BTC_RSSI_HIGH(wifi_rssi_state1) &&
\r
1389 BTC_RSSI_HIGH(bt_rssi_state)) && turn_on)
\r
1390 /* if (halbtc8723b2ant_CoexSwitchThresCheck(btcoexist) && turn_on) */
\r
1392 type = type + 100; /* for WiFi RSSI low or BT RSSI low */
\r
1393 coex_dm->is_switch_to_1dot5_ant = true;
\r
1395 coex_dm->is_switch_to_1dot5_ant = false;
\r
1398 if (!force_exec) {
\r
1399 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
\r
1400 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
\r
1404 if (coex_sta->scan_ap_num <= 5) {
\r
1405 if (coex_sta->a2dp_bit_pool >= 45)
\r
1406 wifi_duration_adjust = -15;
\r
1407 else if (coex_sta->a2dp_bit_pool >= 35)
\r
1408 wifi_duration_adjust = -10;
\r
1410 wifi_duration_adjust = 5;
\r
1411 } else if (coex_sta->scan_ap_num <= 20) {
\r
1412 if (coex_sta->a2dp_bit_pool >= 45)
\r
1413 wifi_duration_adjust = -15;
\r
1414 else if (coex_sta->a2dp_bit_pool >= 35)
\r
1415 wifi_duration_adjust = -10;
\r
1417 wifi_duration_adjust = 0;
\r
1418 } else if (coex_sta->scan_ap_num <= 40) {
\r
1419 if (coex_sta->a2dp_bit_pool >= 45)
\r
1420 wifi_duration_adjust = -15;
\r
1421 else if (coex_sta->a2dp_bit_pool >= 35)
\r
1422 wifi_duration_adjust = -10;
\r
1424 wifi_duration_adjust = -5;
\r
1426 if (coex_sta->a2dp_bit_pool >= 45)
\r
1427 wifi_duration_adjust = -15;
\r
1428 else if (coex_sta->a2dp_bit_pool >= 35)
\r
1429 wifi_duration_adjust = -10;
\r
1431 wifi_duration_adjust = -10;
\r
1434 if ((bt_link_info->slave_role == true) && (bt_link_info->a2dp_exist))
\r
1435 psTdmaByte4Modify =
\r
1436 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
\r
1443 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1444 0x3c + wifi_duration_adjust, 0x03, 0xf1,
\r
1445 0x90 | psTdmaByte4Modify);
\r
1448 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1449 0x2d + wifi_duration_adjust, 0x03, 0xf1,
\r
1450 0x90 | psTdmaByte4Modify);
\r
1453 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1454 0x1c, 0x3, 0xf1, 0x90 |
\r
1455 psTdmaByte4Modify);
\r
1458 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1459 0x10, 0x03, 0xf1, 0x90 |
\r
1460 psTdmaByte4Modify);
\r
1463 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1464 0x3c + wifi_duration_adjust, 0x3, 0x70,
\r
1465 0x90 | psTdmaByte4Modify);
\r
1468 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1469 0x2d + wifi_duration_adjust, 0x3, 0x70,
\r
1470 0x90 | psTdmaByte4Modify);
\r
1473 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1474 0x1c, 0x3, 0x70, 0x90 |
\r
1475 psTdmaByte4Modify);
\r
1478 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xa3,
\r
1479 0x10, 0x3, 0x70, 0x90 |
\r
1480 psTdmaByte4Modify);
\r
1484 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1485 0x3c + wifi_duration_adjust, 0x03, 0xf1,
\r
1486 0x90 | psTdmaByte4Modify);
\r
1488 /* Bryant Modify for BT no-profile busy case */
\r
1489 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1490 0x3c + wifi_duration_adjust, 0x03, 0xf1,
\r
1495 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1496 0x2d + wifi_duration_adjust, 0x03, 0xf1,
\r
1497 0x90 | psTdmaByte4Modify);
\r
1500 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1501 0x1c, 0x3, 0xf1, 0x90 |
\r
1502 psTdmaByte4Modify);
\r
1505 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1506 0x10, 0x3, 0xf1, 0x90 |
\r
1507 psTdmaByte4Modify);
\r
1511 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1512 0x3c + wifi_duration_adjust, 0x3, 0x70,
\r
1513 0x90 | psTdmaByte4Modify);
\r
1515 /* Bryant Modify for BT no-profile busy case */
\r
1516 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1517 0x3c + wifi_duration_adjust, 0x3, 0x70,
\r
1521 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1522 0x2d + wifi_duration_adjust, 0x3, 0x70,
\r
1523 0x90 | psTdmaByte4Modify);
\r
1526 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1527 0x1c, 0x3, 0x70, 0x90 |
\r
1528 psTdmaByte4Modify);
\r
1531 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1532 0x10, 0x3, 0x70, 0x90 |
\r
1533 psTdmaByte4Modify);
\r
1536 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xa3,
\r
1537 0x2f, 0x2f, 0x60, 0x90);
\r
1540 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1541 0x5, 0x5, 0xe1, 0x90);
\r
1544 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1545 0x25, 0x25, 0xe1, 0x90);
\r
1548 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1549 0x25, 0x25, 0x60, 0x90);
\r
1552 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1553 0x15, 0x03, 0x70, 0x90);
\r
1556 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1557 0x35, 0x03, 0xf1, 0x90);
\r
1560 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1561 0x35, 0x03, 0x71, 0x10);
\r
1565 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1566 0x1c, 0x3, 0xf1, 0x91);
\r
1570 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1571 0x3c + wifi_duration_adjust, 0x03, 0xf1,
\r
1578 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
\r
1579 0x3a + wifi_duration_adjust, 0x03, 0x70,
\r
1580 0x50 | psTdmaByte4Modify);
\r
1586 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
\r
1587 0x2d + wifi_duration_adjust, 0x03, 0x70,
\r
1588 0x50 | psTdmaByte4Modify);
\r
1594 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
\r
1595 0x1c, 0x03, 0x70, 0x50 |
\r
1596 psTdmaByte4Modify);
\r
1602 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
\r
1603 0x10, 0x03, 0x70, 0x50 |
\r
1604 psTdmaByte4Modify);
\r
1607 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1608 0x3c, 0x03, 0xf1, 0x90 |
\r
1609 psTdmaByte4Modify);
\r
1612 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1613 0x3c, 0x03, 0x70, 0x90 |
\r
1614 psTdmaByte4Modify);
\r
1617 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1618 0x15, 0x03, 0x70, 0x90 |
\r
1619 psTdmaByte4Modify);
\r
1622 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1623 0x35, 0x03, 0x71, 0x11);
\r
1626 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
\r
1627 0x35, 0x03, 0x71, 0x10);
\r
1630 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
\r
1631 0x1c, 0x3, 0x70, 0x51);
\r
1636 /* disable PS tdma */
\r
1639 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0,
\r
1640 0x0, 0x0, 0x40, 0x0);
\r
1643 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0,
\r
1644 0x0, 0x0, 0x48, 0x0);
\r
1647 halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0,
\r
1648 0x0, 0x0, 0x40, 0x0);
\r
1653 /* update pre state */
\r
1654 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
\r
1655 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
\r
1658 void halbtc8723b2ant_ps_tdma_check_for_power_save_state(
\r
1659 IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
\r
1661 u8 lps_mode = 0x0;
\r
1663 btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
\r
1665 if (lps_mode) { /* already under LPS state */
\r
1666 if (new_ps_state) {
\r
1667 /* keep state under LPS, do nothing. */
\r
1669 /* will leave LPS state, turn off psTdma first */
\r
1670 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
\r
1673 } else { /* NO PS state */
\r
1674 if (new_ps_state) {
\r
1675 /* will enter LPS state, turn off psTdma first */
\r
1676 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
\r
1679 /* keep state under NO PS state, do nothing. */
\r
1684 void halbtc8723b2ant_power_save_state(IN struct btc_coexist *btcoexist,
\r
1685 IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
\r
1687 boolean low_pwr_disable = false;
\r
1689 switch (ps_type) {
\r
1690 case BTC_PS_WIFI_NATIVE:
\r
1691 /* recover to original 32k low power setting */
\r
1692 low_pwr_disable = false;
\r
1693 btcoexist->btc_set(btcoexist,
\r
1694 BTC_SET_ACT_DISABLE_LOW_POWER,
\r
1695 &low_pwr_disable);
\r
1696 btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
\r
1698 coex_sta->force_lps_on = false;
\r
1700 case BTC_PS_LPS_ON:
\r
1701 halbtc8723b2ant_ps_tdma_check_for_power_save_state(
\r
1703 halbtc8723b2ant_lps_rpwm(btcoexist, NORMAL_EXEC,
\r
1704 lps_val, rpwm_val);
\r
1705 /* when coex force to enter LPS, do not enter 32k low power. */
\r
1706 low_pwr_disable = true;
\r
1707 btcoexist->btc_set(btcoexist,
\r
1708 BTC_SET_ACT_DISABLE_LOW_POWER,
\r
1709 &low_pwr_disable);
\r
1710 /* power save must executed before psTdma. */
\r
1711 btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
\r
1713 coex_sta->force_lps_on = true;
\r
1715 case BTC_PS_LPS_OFF:
\r
1716 halbtc8723b2ant_ps_tdma_check_for_power_save_state(
\r
1717 btcoexist, false);
\r
1718 btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
\r
1720 coex_sta->force_lps_on = false;
\r
1728 void halbtc8723b2ant_coex_all_off(IN struct btc_coexist *btcoexist)
\r
1731 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
\r
1733 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
\r
1734 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
\r
1735 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
1738 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
\r
1739 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
\r
1742 /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */
\r
1743 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
\r
1746 void halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
\r
1748 /* force to reset coex mechanism */
\r
1749 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
\r
1751 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
\r
1753 halbtc8723b2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
\r
1754 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
\r
1755 halbtc8723b2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0);
\r
1757 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
\r
1758 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
\r
1760 coex_sta->pop_event_cnt = 0;
\r
1764 void halbtc8723b2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
\r
1766 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
\r
1767 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
\r
1768 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
1769 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
\r
1770 boolean wifi_connected = false;
\r
1771 boolean low_pwr_disable = true;
\r
1772 boolean scan = false, link = false, roam = false;
\r
1773 boolean wifi_busy = false;
\r
1776 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
1777 &prewifi_rssi_state, 2, 15, 0);
\r
1778 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
1779 &prewifi_rssi_state1, 2,
\r
1780 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
\r
1781 coex_dm->switch_thres_offset, 0);
\r
1782 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
\r
1783 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
1784 coex_dm->switch_thres_offset, 0);
\r
1786 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
\r
1787 &low_pwr_disable);
\r
1788 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
\r
1791 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
\r
1792 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
\r
1793 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
\r
1794 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
\r
1796 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
\r
1799 if (coex_sta->bt_abnormal_scan) {
\r
1800 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
\r
1802 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
\r
1803 } else if (scan || link || roam) {
\r
1804 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
1805 "[BTCoex], Wifi link process + BT Inq/Page!!\n");
\r
1806 BTC_TRACE(trace_buf);
\r
1807 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
\r
1809 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
\r
1810 } else if (wifi_connected) {
\r
1811 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
1812 "[BTCoex], Wifi connected + BT Inq/Page!!\n");
\r
1813 BTC_TRACE(trace_buf);
\r
1814 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
\r
1818 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
\r
1820 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
\r
1822 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
1823 "[BTCoex], Wifi no-link + BT Inq/Page!!\n");
\r
1824 BTC_TRACE(trace_buf);
\r
1825 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
\r
1826 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
\r
1829 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
\r
1830 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
1832 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
\r
1833 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
\r
1835 coex_dm->need_recover0x948 = true;
\r
1836 coex_dm->backup0x948 = btcoexist->btc_read_4byte(btcoexist, 0x948);
\r
1838 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_AUX, false, false);
\r
1843 void halbtc8723b2ant_action_wifi_link_process(IN struct btc_coexist *btcoexist)
\r
1846 u8 u8tmpa, u8tmpb;
\r
1848 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 15);
\r
1849 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
\r
1851 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
\r
1852 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
\r
1855 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948);
\r
1856 u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765);
\r
1857 u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x76e);
\r
1859 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
1860 "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
\r
1861 u32tmp, u8tmpa, u8tmpb);
\r
1862 BTC_TRACE(trace_buf);
\r
1865 boolean halbtc8723b2ant_action_wifi_idle_process(IN struct btc_coexist
\r
1868 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
\r
1869 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
\r
1870 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
1871 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
\r
1874 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
1875 &prewifi_rssi_state, 2, 15, 0);
\r
1876 /* wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES-coex_dm->switch_thres_offset-coex_dm->switch_thres_offset, 0); */
\r
1877 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
1878 &prewifi_rssi_state1, 2,
\r
1879 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
\r
1880 coex_dm->switch_thres_offset - coex_dm->switch_thres_offset, 0);
\r
1881 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
\r
1882 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
1883 coex_dm->switch_thres_offset - coex_dm->switch_thres_offset, 0);
\r
1885 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &ap_num);
\r
1887 /* define the office environment */
\r
1888 if (BTC_RSSI_HIGH(wifi_rssi_state1) &&
\r
1889 (coex_sta->hid_exist == true) &&
\r
1890 (coex_sta->a2dp_exist == true)) {
\r
1892 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
1893 "[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n");
\r
1894 BTC_TRACE(trace_buf);
\r
1896 halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, true, 0x6);
\r
1897 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
1900 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false,
\r
1902 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false,
\r
1905 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
\r
1907 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
\r
1909 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
\r
1913 halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, true, 0x18);
\r
1922 boolean halbtc8723b2ant_is_common_action(IN struct btc_coexist *btcoexist)
\r
1924 boolean common = false, wifi_connected = false, wifi_busy = false;
\r
1925 boolean bt_hs_on = false, low_pwr_disable = false;
\r
1926 boolean asus_8723b = false;
\r
1928 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
\r
1929 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
\r
1931 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
\r
1933 if (!wifi_connected) {
\r
1934 low_pwr_disable = false;
\r
1935 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
\r
1936 &low_pwr_disable);
\r
1937 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
\r
1940 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
1941 "[BTCoex], Wifi non-connected idle!!\n");
\r
1942 BTC_TRACE(trace_buf);
\r
1944 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
\r
1946 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
\r
1948 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
\r
1950 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
\r
1951 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
\r
1952 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
1954 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false,
\r
1956 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false,
\r
1961 if (BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
\r
1962 coex_dm->bt_status) {
\r
1963 low_pwr_disable = false;
\r
1964 btcoexist->btc_set(btcoexist,
\r
1965 BTC_SET_ACT_DISABLE_LOW_POWER,
\r
1966 &low_pwr_disable);
\r
1967 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC,
\r
1968 false, false, 0x8);
\r
1970 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
1971 "[BTCoex], Wifi connected + BT non connected-idle!!\n");
\r
1972 BTC_TRACE(trace_buf);
\r
1974 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
\r
1976 halbtc8723b2ant_coex_table_with_type(btcoexist,
\r
1979 halbtc8723b2ant_power_save_state(btcoexist,
\r
1980 BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
1981 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
\r
1983 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
\r
1985 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
1987 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false,
\r
1989 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
1993 } else if (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE ==
\r
1994 coex_dm->bt_status) {
\r
1995 low_pwr_disable = true;
\r
1996 btcoexist->btc_set(btcoexist,
\r
1997 BTC_SET_ACT_DISABLE_LOW_POWER,
\r
1998 &low_pwr_disable);
\r
2002 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
2003 "[BTCoex], Wifi connected + BT connected-idle!!\n");
\r
2004 BTC_TRACE(trace_buf);
\r
2005 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC,
\r
2006 false, false, 0x8);
\r
2008 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
\r
2010 halbtc8723b2ant_coex_table_with_type(btcoexist,
\r
2013 halbtc8723b2ant_power_save_state(btcoexist,
\r
2014 BTC_PS_WIFI_NATIVE, 0x0, 0x0);
\r
2015 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
\r
2017 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
\r
2019 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
2021 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
\r
2023 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
2028 low_pwr_disable = true;
\r
2029 btcoexist->btc_set(btcoexist,
\r
2030 BTC_SET_ACT_DISABLE_LOW_POWER,
\r
2031 &low_pwr_disable);
\r
2034 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
2035 "[BTCoex], Wifi Connected-Busy + BT Busy!!\n");
\r
2036 BTC_TRACE(trace_buf);
\r
2037 /* btcoexist->btc_get(btcoexist,
\r
2038 BTC_GET_BL_IS_ASUS_8723B, &asus_8723b);
\r
2042 common = halbtc8723b2ant_action_wifi_idle_process(
\r
2046 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
2047 "[BTCoex], Wifi Connected-Idle + BT Busy!!\n");
\r
2048 BTC_TRACE(trace_buf);
\r
2049 /* common = false; */
\r
2050 common = halbtc8723b2ant_action_wifi_idle_process(
\r
2058 void halbtc8723b2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist,
\r
2059 IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval)
\r
2061 static s32 up, dn, m, n, wait_count;
\r
2062 s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
\r
2063 u8 retry_count = 0;
\r
2065 if (!coex_dm->auto_tdma_adjust) {
\r
2066 coex_dm->auto_tdma_adjust = true;
\r
2070 if (max_interval == 1) {
\r
2071 halbtc8723b2ant_ps_tdma(
\r
2072 btcoexist, NORMAL_EXEC,
\r
2074 coex_dm->ps_tdma_du_adj_type =
\r
2076 } else if (max_interval == 2) {
\r
2077 halbtc8723b2ant_ps_tdma(
\r
2078 btcoexist, NORMAL_EXEC,
\r
2080 coex_dm->ps_tdma_du_adj_type =
\r
2082 } else if (max_interval == 3) {
\r
2083 halbtc8723b2ant_ps_tdma(
\r
2084 btcoexist, NORMAL_EXEC,
\r
2086 coex_dm->ps_tdma_du_adj_type =
\r
2089 halbtc8723b2ant_ps_tdma(
\r
2090 btcoexist, NORMAL_EXEC,
\r
2092 coex_dm->ps_tdma_du_adj_type =
\r
2096 if (max_interval == 1) {
\r
2097 halbtc8723b2ant_ps_tdma(
\r
2098 btcoexist, NORMAL_EXEC,
\r
2100 coex_dm->ps_tdma_du_adj_type =
\r
2102 } else if (max_interval == 2) {
\r
2103 halbtc8723b2ant_ps_tdma(
\r
2104 btcoexist, NORMAL_EXEC,
\r
2106 coex_dm->ps_tdma_du_adj_type =
\r
2108 } else if (max_interval == 3) {
\r
2109 halbtc8723b2ant_ps_tdma(
\r
2110 btcoexist, NORMAL_EXEC,
\r
2112 coex_dm->ps_tdma_du_adj_type =
\r
2115 halbtc8723b2ant_ps_tdma(
\r
2116 btcoexist, NORMAL_EXEC,
\r
2118 coex_dm->ps_tdma_du_adj_type =
\r
2124 if (max_interval == 1) {
\r
2125 halbtc8723b2ant_ps_tdma(
\r
2126 btcoexist, NORMAL_EXEC,
\r
2128 coex_dm->ps_tdma_du_adj_type =
\r
2130 } else if (max_interval == 2) {
\r
2131 halbtc8723b2ant_ps_tdma(
\r
2132 btcoexist, NORMAL_EXEC,
\r
2134 coex_dm->ps_tdma_du_adj_type =
\r
2136 } else if (max_interval == 3) {
\r
2137 halbtc8723b2ant_ps_tdma(
\r
2138 btcoexist, NORMAL_EXEC,
\r
2140 coex_dm->ps_tdma_du_adj_type =
\r
2143 halbtc8723b2ant_ps_tdma(
\r
2144 btcoexist, NORMAL_EXEC,
\r
2146 coex_dm->ps_tdma_du_adj_type =
\r
2150 if (max_interval == 1) {
\r
2151 halbtc8723b2ant_ps_tdma(
\r
2152 btcoexist, NORMAL_EXEC,
\r
2154 coex_dm->ps_tdma_du_adj_type =
\r
2156 } else if (max_interval == 2) {
\r
2157 halbtc8723b2ant_ps_tdma(
\r
2158 btcoexist, NORMAL_EXEC,
\r
2160 coex_dm->ps_tdma_du_adj_type =
\r
2162 } else if (max_interval == 3) {
\r
2163 halbtc8723b2ant_ps_tdma(
\r
2164 btcoexist, NORMAL_EXEC,
\r
2166 coex_dm->ps_tdma_du_adj_type =
\r
2169 halbtc8723b2ant_ps_tdma(
\r
2170 btcoexist, NORMAL_EXEC,
\r
2172 coex_dm->ps_tdma_du_adj_type =
\r
2178 /* ============ */
\r
2186 /* accquire the BT TRx retry count from BT_Info byte2 */
\r
2187 retry_count = coex_sta->bt_retry_cnt;
\r
2189 if ((coex_sta->low_priority_tx) > 1050 ||
\r
2190 (coex_sta->low_priority_rx) > 1250)
\r
2196 if (retry_count ==
\r
2197 0) { /* no retry in the last 2-second duration */
\r
2204 if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */
\r
2211 } else if (retry_count <=
\r
2212 3) { /* <=3 retry in the last 2-second duration */
\r
2219 if (dn == 2) {/* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */
\r
2220 if (wait_count <= 2)
\r
2221 m++; /* to avoid loop between the two levels */
\r
2225 if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
\r
2234 } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */
\r
2235 if (wait_count == 1)
\r
2236 m++; /* to avoid loop between the two levels */
\r
2240 if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
\r
2250 if (max_interval == 1) {
\r
2252 if (coex_dm->cur_ps_tdma == 71) {
\r
2253 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2254 NORMAL_EXEC, true, 5);
\r
2255 coex_dm->ps_tdma_du_adj_type = 5;
\r
2256 } else if (coex_dm->cur_ps_tdma == 1) {
\r
2257 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2258 NORMAL_EXEC, true, 5);
\r
2259 coex_dm->ps_tdma_du_adj_type = 5;
\r
2260 } else if (coex_dm->cur_ps_tdma == 2) {
\r
2261 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2262 NORMAL_EXEC, true, 6);
\r
2263 coex_dm->ps_tdma_du_adj_type = 6;
\r
2264 } else if (coex_dm->cur_ps_tdma == 3) {
\r
2265 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2266 NORMAL_EXEC, true, 7);
\r
2267 coex_dm->ps_tdma_du_adj_type = 7;
\r
2268 } else if (coex_dm->cur_ps_tdma == 4) {
\r
2269 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2270 NORMAL_EXEC, true, 8);
\r
2271 coex_dm->ps_tdma_du_adj_type = 8;
\r
2273 if (coex_dm->cur_ps_tdma == 9) {
\r
2274 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2275 NORMAL_EXEC, true, 13);
\r
2276 coex_dm->ps_tdma_du_adj_type = 13;
\r
2277 } else if (coex_dm->cur_ps_tdma == 10) {
\r
2278 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2279 NORMAL_EXEC, true, 14);
\r
2280 coex_dm->ps_tdma_du_adj_type = 14;
\r
2281 } else if (coex_dm->cur_ps_tdma == 11) {
\r
2282 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2283 NORMAL_EXEC, true, 15);
\r
2284 coex_dm->ps_tdma_du_adj_type = 15;
\r
2285 } else if (coex_dm->cur_ps_tdma == 12) {
\r
2286 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2287 NORMAL_EXEC, true, 16);
\r
2288 coex_dm->ps_tdma_du_adj_type = 16;
\r
2291 if (result == -1) {
\r
2292 if (coex_dm->cur_ps_tdma == 5) {
\r
2293 halbtc8723b2ant_ps_tdma(
\r
2294 btcoexist, NORMAL_EXEC,
\r
2296 coex_dm->ps_tdma_du_adj_type =
\r
2298 } else if (coex_dm->cur_ps_tdma == 6) {
\r
2299 halbtc8723b2ant_ps_tdma(
\r
2300 btcoexist, NORMAL_EXEC,
\r
2302 coex_dm->ps_tdma_du_adj_type =
\r
2304 } else if (coex_dm->cur_ps_tdma == 7) {
\r
2305 halbtc8723b2ant_ps_tdma(
\r
2306 btcoexist, NORMAL_EXEC,
\r
2308 coex_dm->ps_tdma_du_adj_type =
\r
2310 } else if (coex_dm->cur_ps_tdma == 13) {
\r
2311 halbtc8723b2ant_ps_tdma(
\r
2312 btcoexist, NORMAL_EXEC,
\r
2314 coex_dm->ps_tdma_du_adj_type =
\r
2316 } else if (coex_dm->cur_ps_tdma == 14) {
\r
2317 halbtc8723b2ant_ps_tdma(
\r
2318 btcoexist, NORMAL_EXEC,
\r
2320 coex_dm->ps_tdma_du_adj_type =
\r
2322 } else if (coex_dm->cur_ps_tdma == 15) {
\r
2323 halbtc8723b2ant_ps_tdma(
\r
2324 btcoexist, NORMAL_EXEC,
\r
2326 coex_dm->ps_tdma_du_adj_type =
\r
2329 } else if (result == 1) {
\r
2330 if (coex_dm->cur_ps_tdma == 8) {
\r
2331 halbtc8723b2ant_ps_tdma(
\r
2332 btcoexist, NORMAL_EXEC,
\r
2334 coex_dm->ps_tdma_du_adj_type =
\r
2336 } else if (coex_dm->cur_ps_tdma == 7) {
\r
2337 halbtc8723b2ant_ps_tdma(
\r
2338 btcoexist, NORMAL_EXEC,
\r
2340 coex_dm->ps_tdma_du_adj_type =
\r
2342 } else if (coex_dm->cur_ps_tdma == 6) {
\r
2343 halbtc8723b2ant_ps_tdma(
\r
2344 btcoexist, NORMAL_EXEC,
\r
2346 coex_dm->ps_tdma_du_adj_type =
\r
2348 } else if (coex_dm->cur_ps_tdma == 16) {
\r
2349 halbtc8723b2ant_ps_tdma(
\r
2350 btcoexist, NORMAL_EXEC,
\r
2352 coex_dm->ps_tdma_du_adj_type =
\r
2354 } else if (coex_dm->cur_ps_tdma == 15) {
\r
2355 halbtc8723b2ant_ps_tdma(
\r
2356 btcoexist, NORMAL_EXEC,
\r
2358 coex_dm->ps_tdma_du_adj_type =
\r
2360 } else if (coex_dm->cur_ps_tdma == 14) {
\r
2361 halbtc8723b2ant_ps_tdma(
\r
2362 btcoexist, NORMAL_EXEC,
\r
2364 coex_dm->ps_tdma_du_adj_type =
\r
2369 if (coex_dm->cur_ps_tdma == 5) {
\r
2370 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2371 NORMAL_EXEC, true, 71);
\r
2372 coex_dm->ps_tdma_du_adj_type = 71;
\r
2373 } else if (coex_dm->cur_ps_tdma == 6) {
\r
2374 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2375 NORMAL_EXEC, true, 2);
\r
2376 coex_dm->ps_tdma_du_adj_type = 2;
\r
2377 } else if (coex_dm->cur_ps_tdma == 7) {
\r
2378 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2379 NORMAL_EXEC, true, 3);
\r
2380 coex_dm->ps_tdma_du_adj_type = 3;
\r
2381 } else if (coex_dm->cur_ps_tdma == 8) {
\r
2382 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2383 NORMAL_EXEC, true, 4);
\r
2384 coex_dm->ps_tdma_du_adj_type = 4;
\r
2386 if (coex_dm->cur_ps_tdma == 13) {
\r
2387 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2388 NORMAL_EXEC, true, 9);
\r
2389 coex_dm->ps_tdma_du_adj_type = 9;
\r
2390 } else if (coex_dm->cur_ps_tdma == 14) {
\r
2391 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2392 NORMAL_EXEC, true, 10);
\r
2393 coex_dm->ps_tdma_du_adj_type = 10;
\r
2394 } else if (coex_dm->cur_ps_tdma == 15) {
\r
2395 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2396 NORMAL_EXEC, true, 11);
\r
2397 coex_dm->ps_tdma_du_adj_type = 11;
\r
2398 } else if (coex_dm->cur_ps_tdma == 16) {
\r
2399 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2400 NORMAL_EXEC, true, 12);
\r
2401 coex_dm->ps_tdma_du_adj_type = 12;
\r
2404 if (result == -1) {
\r
2405 if (coex_dm->cur_ps_tdma == 71) {
\r
2406 halbtc8723b2ant_ps_tdma(
\r
2407 btcoexist, NORMAL_EXEC,
\r
2409 coex_dm->ps_tdma_du_adj_type =
\r
2411 } else if (coex_dm->cur_ps_tdma == 1) {
\r
2412 halbtc8723b2ant_ps_tdma(
\r
2413 btcoexist, NORMAL_EXEC,
\r
2415 coex_dm->ps_tdma_du_adj_type =
\r
2417 } else if (coex_dm->cur_ps_tdma == 2) {
\r
2418 halbtc8723b2ant_ps_tdma(
\r
2419 btcoexist, NORMAL_EXEC,
\r
2421 coex_dm->ps_tdma_du_adj_type =
\r
2423 } else if (coex_dm->cur_ps_tdma == 3) {
\r
2424 halbtc8723b2ant_ps_tdma(
\r
2425 btcoexist, NORMAL_EXEC,
\r
2427 coex_dm->ps_tdma_du_adj_type =
\r
2429 } else if (coex_dm->cur_ps_tdma == 9) {
\r
2430 halbtc8723b2ant_ps_tdma(
\r
2431 btcoexist, NORMAL_EXEC,
\r
2433 coex_dm->ps_tdma_du_adj_type =
\r
2435 } else if (coex_dm->cur_ps_tdma == 10) {
\r
2436 halbtc8723b2ant_ps_tdma(
\r
2437 btcoexist, NORMAL_EXEC,
\r
2439 coex_dm->ps_tdma_du_adj_type =
\r
2441 } else if (coex_dm->cur_ps_tdma == 11) {
\r
2442 halbtc8723b2ant_ps_tdma(
\r
2443 btcoexist, NORMAL_EXEC,
\r
2445 coex_dm->ps_tdma_du_adj_type =
\r
2448 } else if (result == 1) {
\r
2449 if (coex_dm->cur_ps_tdma == 4) {
\r
2450 halbtc8723b2ant_ps_tdma(
\r
2451 btcoexist, NORMAL_EXEC,
\r
2453 coex_dm->ps_tdma_du_adj_type =
\r
2455 } else if (coex_dm->cur_ps_tdma == 3) {
\r
2456 halbtc8723b2ant_ps_tdma(
\r
2457 btcoexist, NORMAL_EXEC,
\r
2459 coex_dm->ps_tdma_du_adj_type =
\r
2461 } else if (coex_dm->cur_ps_tdma == 2) {
\r
2462 halbtc8723b2ant_ps_tdma(
\r
2463 btcoexist, NORMAL_EXEC,
\r
2465 coex_dm->ps_tdma_du_adj_type =
\r
2467 } else if (coex_dm->cur_ps_tdma == 1) {
\r
2468 halbtc8723b2ant_ps_tdma(
\r
2469 btcoexist, NORMAL_EXEC,
\r
2471 coex_dm->ps_tdma_du_adj_type =
\r
2473 } else if (coex_dm->cur_ps_tdma == 12) {
\r
2474 halbtc8723b2ant_ps_tdma(
\r
2475 btcoexist, NORMAL_EXEC,
\r
2477 coex_dm->ps_tdma_du_adj_type =
\r
2479 } else if (coex_dm->cur_ps_tdma == 11) {
\r
2480 halbtc8723b2ant_ps_tdma(
\r
2481 btcoexist, NORMAL_EXEC,
\r
2483 coex_dm->ps_tdma_du_adj_type =
\r
2485 } else if (coex_dm->cur_ps_tdma == 10) {
\r
2486 halbtc8723b2ant_ps_tdma(
\r
2487 btcoexist, NORMAL_EXEC,
\r
2489 coex_dm->ps_tdma_du_adj_type =
\r
2494 } else if (max_interval == 2) {
\r
2496 if (coex_dm->cur_ps_tdma == 1) {
\r
2497 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2498 NORMAL_EXEC, true, 6);
\r
2499 coex_dm->ps_tdma_du_adj_type = 6;
\r
2500 } else if (coex_dm->cur_ps_tdma == 2) {
\r
2501 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2502 NORMAL_EXEC, true, 6);
\r
2503 coex_dm->ps_tdma_du_adj_type = 6;
\r
2504 } else if (coex_dm->cur_ps_tdma == 3) {
\r
2505 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2506 NORMAL_EXEC, true, 7);
\r
2507 coex_dm->ps_tdma_du_adj_type = 7;
\r
2508 } else if (coex_dm->cur_ps_tdma == 4) {
\r
2509 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2510 NORMAL_EXEC, true, 8);
\r
2511 coex_dm->ps_tdma_du_adj_type = 8;
\r
2513 if (coex_dm->cur_ps_tdma == 9) {
\r
2514 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2515 NORMAL_EXEC, true, 14);
\r
2516 coex_dm->ps_tdma_du_adj_type = 14;
\r
2517 } else if (coex_dm->cur_ps_tdma == 10) {
\r
2518 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2519 NORMAL_EXEC, true, 14);
\r
2520 coex_dm->ps_tdma_du_adj_type = 14;
\r
2521 } else if (coex_dm->cur_ps_tdma == 11) {
\r
2522 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2523 NORMAL_EXEC, true, 15);
\r
2524 coex_dm->ps_tdma_du_adj_type = 15;
\r
2525 } else if (coex_dm->cur_ps_tdma == 12) {
\r
2526 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2527 NORMAL_EXEC, true, 16);
\r
2528 coex_dm->ps_tdma_du_adj_type = 16;
\r
2530 if (result == -1) {
\r
2531 if (coex_dm->cur_ps_tdma == 5) {
\r
2532 halbtc8723b2ant_ps_tdma(
\r
2533 btcoexist, NORMAL_EXEC,
\r
2535 coex_dm->ps_tdma_du_adj_type =
\r
2537 } else if (coex_dm->cur_ps_tdma == 6) {
\r
2538 halbtc8723b2ant_ps_tdma(
\r
2539 btcoexist, NORMAL_EXEC,
\r
2541 coex_dm->ps_tdma_du_adj_type =
\r
2543 } else if (coex_dm->cur_ps_tdma == 7) {
\r
2544 halbtc8723b2ant_ps_tdma(
\r
2545 btcoexist, NORMAL_EXEC,
\r
2547 coex_dm->ps_tdma_du_adj_type =
\r
2549 } else if (coex_dm->cur_ps_tdma == 13) {
\r
2550 halbtc8723b2ant_ps_tdma(
\r
2551 btcoexist, NORMAL_EXEC,
\r
2553 coex_dm->ps_tdma_du_adj_type =
\r
2555 } else if (coex_dm->cur_ps_tdma == 14) {
\r
2556 halbtc8723b2ant_ps_tdma(
\r
2557 btcoexist, NORMAL_EXEC,
\r
2559 coex_dm->ps_tdma_du_adj_type =
\r
2561 } else if (coex_dm->cur_ps_tdma == 15) {
\r
2562 halbtc8723b2ant_ps_tdma(
\r
2563 btcoexist, NORMAL_EXEC,
\r
2565 coex_dm->ps_tdma_du_adj_type =
\r
2568 } else if (result == 1) {
\r
2569 if (coex_dm->cur_ps_tdma == 8) {
\r
2570 halbtc8723b2ant_ps_tdma(
\r
2571 btcoexist, NORMAL_EXEC,
\r
2573 coex_dm->ps_tdma_du_adj_type =
\r
2575 } else if (coex_dm->cur_ps_tdma == 7) {
\r
2576 halbtc8723b2ant_ps_tdma(
\r
2577 btcoexist, NORMAL_EXEC,
\r
2579 coex_dm->ps_tdma_du_adj_type =
\r
2581 } else if (coex_dm->cur_ps_tdma == 6) {
\r
2582 halbtc8723b2ant_ps_tdma(
\r
2583 btcoexist, NORMAL_EXEC,
\r
2585 coex_dm->ps_tdma_du_adj_type =
\r
2587 } else if (coex_dm->cur_ps_tdma == 16) {
\r
2588 halbtc8723b2ant_ps_tdma(
\r
2589 btcoexist, NORMAL_EXEC,
\r
2591 coex_dm->ps_tdma_du_adj_type =
\r
2593 } else if (coex_dm->cur_ps_tdma == 15) {
\r
2594 halbtc8723b2ant_ps_tdma(
\r
2595 btcoexist, NORMAL_EXEC,
\r
2597 coex_dm->ps_tdma_du_adj_type =
\r
2599 } else if (coex_dm->cur_ps_tdma == 14) {
\r
2600 halbtc8723b2ant_ps_tdma(
\r
2601 btcoexist, NORMAL_EXEC,
\r
2603 coex_dm->ps_tdma_du_adj_type =
\r
2608 if (coex_dm->cur_ps_tdma == 5) {
\r
2609 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2610 NORMAL_EXEC, true, 2);
\r
2611 coex_dm->ps_tdma_du_adj_type = 2;
\r
2612 } else if (coex_dm->cur_ps_tdma == 6) {
\r
2613 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2614 NORMAL_EXEC, true, 2);
\r
2615 coex_dm->ps_tdma_du_adj_type = 2;
\r
2616 } else if (coex_dm->cur_ps_tdma == 7) {
\r
2617 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2618 NORMAL_EXEC, true, 3);
\r
2619 coex_dm->ps_tdma_du_adj_type = 3;
\r
2620 } else if (coex_dm->cur_ps_tdma == 8) {
\r
2621 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2622 NORMAL_EXEC, true, 4);
\r
2623 coex_dm->ps_tdma_du_adj_type = 4;
\r
2625 if (coex_dm->cur_ps_tdma == 13) {
\r
2626 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2627 NORMAL_EXEC, true, 10);
\r
2628 coex_dm->ps_tdma_du_adj_type = 10;
\r
2629 } else if (coex_dm->cur_ps_tdma == 14) {
\r
2630 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2631 NORMAL_EXEC, true, 10);
\r
2632 coex_dm->ps_tdma_du_adj_type = 10;
\r
2633 } else if (coex_dm->cur_ps_tdma == 15) {
\r
2634 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2635 NORMAL_EXEC, true, 11);
\r
2636 coex_dm->ps_tdma_du_adj_type = 11;
\r
2637 } else if (coex_dm->cur_ps_tdma == 16) {
\r
2638 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2639 NORMAL_EXEC, true, 12);
\r
2640 coex_dm->ps_tdma_du_adj_type = 12;
\r
2642 if (result == -1) {
\r
2643 if (coex_dm->cur_ps_tdma == 1) {
\r
2644 halbtc8723b2ant_ps_tdma(
\r
2645 btcoexist, NORMAL_EXEC,
\r
2647 coex_dm->ps_tdma_du_adj_type =
\r
2649 } else if (coex_dm->cur_ps_tdma == 2) {
\r
2650 halbtc8723b2ant_ps_tdma(
\r
2651 btcoexist, NORMAL_EXEC,
\r
2653 coex_dm->ps_tdma_du_adj_type =
\r
2655 } else if (coex_dm->cur_ps_tdma == 3) {
\r
2656 halbtc8723b2ant_ps_tdma(
\r
2657 btcoexist, NORMAL_EXEC,
\r
2659 coex_dm->ps_tdma_du_adj_type =
\r
2661 } else if (coex_dm->cur_ps_tdma == 9) {
\r
2662 halbtc8723b2ant_ps_tdma(
\r
2663 btcoexist, NORMAL_EXEC,
\r
2665 coex_dm->ps_tdma_du_adj_type =
\r
2667 } else if (coex_dm->cur_ps_tdma == 10) {
\r
2668 halbtc8723b2ant_ps_tdma(
\r
2669 btcoexist, NORMAL_EXEC,
\r
2671 coex_dm->ps_tdma_du_adj_type =
\r
2673 } else if (coex_dm->cur_ps_tdma == 11) {
\r
2674 halbtc8723b2ant_ps_tdma(
\r
2675 btcoexist, NORMAL_EXEC,
\r
2677 coex_dm->ps_tdma_du_adj_type =
\r
2680 } else if (result == 1) {
\r
2681 if (coex_dm->cur_ps_tdma == 4) {
\r
2682 halbtc8723b2ant_ps_tdma(
\r
2683 btcoexist, NORMAL_EXEC,
\r
2685 coex_dm->ps_tdma_du_adj_type =
\r
2687 } else if (coex_dm->cur_ps_tdma == 3) {
\r
2688 halbtc8723b2ant_ps_tdma(
\r
2689 btcoexist, NORMAL_EXEC,
\r
2691 coex_dm->ps_tdma_du_adj_type =
\r
2693 } else if (coex_dm->cur_ps_tdma == 2) {
\r
2694 halbtc8723b2ant_ps_tdma(
\r
2695 btcoexist, NORMAL_EXEC,
\r
2697 coex_dm->ps_tdma_du_adj_type =
\r
2699 } else if (coex_dm->cur_ps_tdma == 12) {
\r
2700 halbtc8723b2ant_ps_tdma(
\r
2701 btcoexist, NORMAL_EXEC,
\r
2703 coex_dm->ps_tdma_du_adj_type =
\r
2705 } else if (coex_dm->cur_ps_tdma == 11) {
\r
2706 halbtc8723b2ant_ps_tdma(
\r
2707 btcoexist, NORMAL_EXEC,
\r
2709 coex_dm->ps_tdma_du_adj_type =
\r
2711 } else if (coex_dm->cur_ps_tdma == 10) {
\r
2712 halbtc8723b2ant_ps_tdma(
\r
2713 btcoexist, NORMAL_EXEC,
\r
2715 coex_dm->ps_tdma_du_adj_type =
\r
2720 } else if (max_interval == 3) {
\r
2722 if (coex_dm->cur_ps_tdma == 1) {
\r
2723 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2724 NORMAL_EXEC, true, 7);
\r
2725 coex_dm->ps_tdma_du_adj_type = 7;
\r
2726 } else if (coex_dm->cur_ps_tdma == 2) {
\r
2727 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2728 NORMAL_EXEC, true, 7);
\r
2729 coex_dm->ps_tdma_du_adj_type = 7;
\r
2730 } else if (coex_dm->cur_ps_tdma == 3) {
\r
2731 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2732 NORMAL_EXEC, true, 7);
\r
2733 coex_dm->ps_tdma_du_adj_type = 7;
\r
2734 } else if (coex_dm->cur_ps_tdma == 4) {
\r
2735 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2736 NORMAL_EXEC, true, 8);
\r
2737 coex_dm->ps_tdma_du_adj_type = 8;
\r
2739 if (coex_dm->cur_ps_tdma == 9) {
\r
2740 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2741 NORMAL_EXEC, true, 15);
\r
2742 coex_dm->ps_tdma_du_adj_type = 15;
\r
2743 } else if (coex_dm->cur_ps_tdma == 10) {
\r
2744 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2745 NORMAL_EXEC, true, 15);
\r
2746 coex_dm->ps_tdma_du_adj_type = 15;
\r
2747 } else if (coex_dm->cur_ps_tdma == 11) {
\r
2748 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2749 NORMAL_EXEC, true, 15);
\r
2750 coex_dm->ps_tdma_du_adj_type = 15;
\r
2751 } else if (coex_dm->cur_ps_tdma == 12) {
\r
2752 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2753 NORMAL_EXEC, true, 16);
\r
2754 coex_dm->ps_tdma_du_adj_type = 16;
\r
2756 if (result == -1) {
\r
2757 if (coex_dm->cur_ps_tdma == 5) {
\r
2758 halbtc8723b2ant_ps_tdma(
\r
2759 btcoexist, NORMAL_EXEC,
\r
2761 coex_dm->ps_tdma_du_adj_type =
\r
2763 } else if (coex_dm->cur_ps_tdma == 6) {
\r
2764 halbtc8723b2ant_ps_tdma(
\r
2765 btcoexist, NORMAL_EXEC,
\r
2767 coex_dm->ps_tdma_du_adj_type =
\r
2769 } else if (coex_dm->cur_ps_tdma == 7) {
\r
2770 halbtc8723b2ant_ps_tdma(
\r
2771 btcoexist, NORMAL_EXEC,
\r
2773 coex_dm->ps_tdma_du_adj_type =
\r
2775 } else if (coex_dm->cur_ps_tdma == 13) {
\r
2776 halbtc8723b2ant_ps_tdma(
\r
2777 btcoexist, NORMAL_EXEC,
\r
2779 coex_dm->ps_tdma_du_adj_type =
\r
2781 } else if (coex_dm->cur_ps_tdma == 14) {
\r
2782 halbtc8723b2ant_ps_tdma(
\r
2783 btcoexist, NORMAL_EXEC,
\r
2785 coex_dm->ps_tdma_du_adj_type =
\r
2787 } else if (coex_dm->cur_ps_tdma == 15) {
\r
2788 halbtc8723b2ant_ps_tdma(
\r
2789 btcoexist, NORMAL_EXEC,
\r
2791 coex_dm->ps_tdma_du_adj_type =
\r
2794 } else if (result == 1) {
\r
2795 if (coex_dm->cur_ps_tdma == 8) {
\r
2796 halbtc8723b2ant_ps_tdma(
\r
2797 btcoexist, NORMAL_EXEC,
\r
2799 coex_dm->ps_tdma_du_adj_type =
\r
2801 } else if (coex_dm->cur_ps_tdma == 7) {
\r
2802 halbtc8723b2ant_ps_tdma(
\r
2803 btcoexist, NORMAL_EXEC,
\r
2805 coex_dm->ps_tdma_du_adj_type =
\r
2807 } else if (coex_dm->cur_ps_tdma == 6) {
\r
2808 halbtc8723b2ant_ps_tdma(
\r
2809 btcoexist, NORMAL_EXEC,
\r
2811 coex_dm->ps_tdma_du_adj_type =
\r
2813 } else if (coex_dm->cur_ps_tdma == 16) {
\r
2814 halbtc8723b2ant_ps_tdma(
\r
2815 btcoexist, NORMAL_EXEC,
\r
2817 coex_dm->ps_tdma_du_adj_type =
\r
2819 } else if (coex_dm->cur_ps_tdma == 15) {
\r
2820 halbtc8723b2ant_ps_tdma(
\r
2821 btcoexist, NORMAL_EXEC,
\r
2823 coex_dm->ps_tdma_du_adj_type =
\r
2825 } else if (coex_dm->cur_ps_tdma == 14) {
\r
2826 halbtc8723b2ant_ps_tdma(
\r
2827 btcoexist, NORMAL_EXEC,
\r
2829 coex_dm->ps_tdma_du_adj_type =
\r
2834 if (coex_dm->cur_ps_tdma == 5) {
\r
2835 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2836 NORMAL_EXEC, true, 3);
\r
2837 coex_dm->ps_tdma_du_adj_type = 3;
\r
2838 } else if (coex_dm->cur_ps_tdma == 6) {
\r
2839 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2840 NORMAL_EXEC, true, 3);
\r
2841 coex_dm->ps_tdma_du_adj_type = 3;
\r
2842 } else if (coex_dm->cur_ps_tdma == 7) {
\r
2843 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2844 NORMAL_EXEC, true, 3);
\r
2845 coex_dm->ps_tdma_du_adj_type = 3;
\r
2846 } else if (coex_dm->cur_ps_tdma == 8) {
\r
2847 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2848 NORMAL_EXEC, true, 4);
\r
2849 coex_dm->ps_tdma_du_adj_type = 4;
\r
2851 if (coex_dm->cur_ps_tdma == 13) {
\r
2852 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2853 NORMAL_EXEC, true, 11);
\r
2854 coex_dm->ps_tdma_du_adj_type = 11;
\r
2855 } else if (coex_dm->cur_ps_tdma == 14) {
\r
2856 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2857 NORMAL_EXEC, true, 11);
\r
2858 coex_dm->ps_tdma_du_adj_type = 11;
\r
2859 } else if (coex_dm->cur_ps_tdma == 15) {
\r
2860 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2861 NORMAL_EXEC, true, 11);
\r
2862 coex_dm->ps_tdma_du_adj_type = 11;
\r
2863 } else if (coex_dm->cur_ps_tdma == 16) {
\r
2864 halbtc8723b2ant_ps_tdma(btcoexist,
\r
2865 NORMAL_EXEC, true, 12);
\r
2866 coex_dm->ps_tdma_du_adj_type = 12;
\r
2868 if (result == -1) {
\r
2869 if (coex_dm->cur_ps_tdma == 1) {
\r
2870 halbtc8723b2ant_ps_tdma(
\r
2871 btcoexist, NORMAL_EXEC,
\r
2873 coex_dm->ps_tdma_du_adj_type =
\r
2875 } else if (coex_dm->cur_ps_tdma == 2) {
\r
2876 halbtc8723b2ant_ps_tdma(
\r
2877 btcoexist, NORMAL_EXEC,
\r
2879 coex_dm->ps_tdma_du_adj_type =
\r
2881 } else if (coex_dm->cur_ps_tdma == 3) {
\r
2882 halbtc8723b2ant_ps_tdma(
\r
2883 btcoexist, NORMAL_EXEC,
\r
2885 coex_dm->ps_tdma_du_adj_type =
\r
2887 } else if (coex_dm->cur_ps_tdma == 9) {
\r
2888 halbtc8723b2ant_ps_tdma(
\r
2889 btcoexist, NORMAL_EXEC,
\r
2891 coex_dm->ps_tdma_du_adj_type =
\r
2893 } else if (coex_dm->cur_ps_tdma == 10) {
\r
2894 halbtc8723b2ant_ps_tdma(
\r
2895 btcoexist, NORMAL_EXEC,
\r
2897 coex_dm->ps_tdma_du_adj_type =
\r
2899 } else if (coex_dm->cur_ps_tdma == 11) {
\r
2900 halbtc8723b2ant_ps_tdma(
\r
2901 btcoexist, NORMAL_EXEC,
\r
2903 coex_dm->ps_tdma_du_adj_type =
\r
2906 } else if (result == 1) {
\r
2907 if (coex_dm->cur_ps_tdma == 4) {
\r
2908 halbtc8723b2ant_ps_tdma(
\r
2909 btcoexist, NORMAL_EXEC,
\r
2911 coex_dm->ps_tdma_du_adj_type =
\r
2913 } else if (coex_dm->cur_ps_tdma == 3) {
\r
2914 halbtc8723b2ant_ps_tdma(
\r
2915 btcoexist, NORMAL_EXEC,
\r
2917 coex_dm->ps_tdma_du_adj_type =
\r
2919 } else if (coex_dm->cur_ps_tdma == 2) {
\r
2920 halbtc8723b2ant_ps_tdma(
\r
2921 btcoexist, NORMAL_EXEC,
\r
2923 coex_dm->ps_tdma_du_adj_type =
\r
2925 } else if (coex_dm->cur_ps_tdma == 12) {
\r
2926 halbtc8723b2ant_ps_tdma(
\r
2927 btcoexist, NORMAL_EXEC,
\r
2929 coex_dm->ps_tdma_du_adj_type =
\r
2931 } else if (coex_dm->cur_ps_tdma == 11) {
\r
2932 halbtc8723b2ant_ps_tdma(
\r
2933 btcoexist, NORMAL_EXEC,
\r
2935 coex_dm->ps_tdma_du_adj_type =
\r
2937 } else if (coex_dm->cur_ps_tdma == 10) {
\r
2938 halbtc8723b2ant_ps_tdma(
\r
2939 btcoexist, NORMAL_EXEC,
\r
2941 coex_dm->ps_tdma_du_adj_type =
\r
2949 /* if current PsTdma not match with the recorded one (when scan, dhcp...), */
\r
2950 /* then we have to adjust it back to the previous record one. */
\r
2951 if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
\r
2952 boolean scan = false, link = false, roam = false;
\r
2953 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
2954 "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n",
\r
2955 coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
\r
2956 BTC_TRACE(trace_buf);
\r
2958 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
\r
2959 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
\r
2960 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
\r
2962 if (!scan && !link && !roam)
\r
2963 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
\r
2964 coex_dm->ps_tdma_du_adj_type);
\r
2966 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
2967 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
\r
2968 BTC_TRACE(trace_buf);
\r
2973 /* SCO only or SCO+PAN(HS) */
\r
2974 void halbtc8723b2ant_action_sco(IN struct btc_coexist *btcoexist)
\r
2976 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
\r
2977 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
2978 u8 wifi_rssi_state, bt_rssi_state;
\r
2981 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
2982 &prewifi_rssi_state, 2, 15, 0);
\r
2983 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
\r
2984 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
2985 coex_dm->switch_thres_offset, 0);
\r
2987 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
2989 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
\r
2991 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4);
\r
2993 if (BTC_RSSI_HIGH(bt_rssi_state))
\r
2994 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
\r
2996 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
2998 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
\r
3000 if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for SCO quality at 11b/g mode */
\r
3001 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
\r
3002 else /* for SCO quality & wifi performance balance at 11n mode */
\r
3003 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
\r
3005 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
\r
3007 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
\r
3008 0); /* for voice quality */
\r
3010 /* sw mechanism */
\r
3011 if (BTC_WIFI_BW_HT40 == wifi_bw) {
\r
3012 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3013 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3014 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
\r
3016 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3019 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
\r
3021 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3025 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3026 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3027 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
\r
3029 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3032 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
\r
3034 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3041 void halbtc8723b2ant_action_hid(IN struct btc_coexist *btcoexist)
\r
3043 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
\r
3044 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
3045 u8 wifi_rssi_state, bt_rssi_state;
\r
3048 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3049 &prewifi_rssi_state, 2, 15, 0);
\r
3050 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
\r
3051 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
3052 coex_dm->switch_thres_offset, 0);
\r
3054 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3056 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
\r
3058 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
\r
3060 if (BTC_RSSI_HIGH(bt_rssi_state))
\r
3061 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
\r
3063 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
3065 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
\r
3067 if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */
\r
3068 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
\r
3069 else /* for HID quality & wifi performance balance at 11n mode */
\r
3070 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 9);
\r
3072 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
\r
3075 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3076 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
\r
3077 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
\r
3079 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
\r
3081 /* sw mechanism */
\r
3082 if (BTC_WIFI_BW_HT40 == wifi_bw) {
\r
3083 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3084 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3085 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
\r
3087 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3090 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
\r
3092 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3096 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3097 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3098 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
\r
3100 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3103 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
\r
3105 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3111 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
\r
3112 void halbtc8723b2ant_action_a2dp(IN struct btc_coexist *btcoexist)
\r
3114 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
\r
3115 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
\r
3116 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
3117 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
\r
3121 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3122 &prewifi_rssi_state, 2, 15, 0);
\r
3123 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3124 &prewifi_rssi_state1, 2,
\r
3125 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
\r
3126 coex_dm->switch_thres_offset, 0);
\r
3127 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
\r
3128 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
3129 coex_dm->switch_thres_offset, 0);
\r
3131 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &ap_num);
\r
3133 /* define the office environment */
\r
3134 if ((ap_num >= 10) && BTC_RSSI_HIGH(wifi_rssi_state1) &&
\r
3135 BTC_RSSI_HIGH(bt_rssi_state)) {
\r
3136 /* dbg_print(" AP#>10(%d)\n", ap_num); */
\r
3137 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
\r
3140 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
\r
3142 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
\r
3144 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
\r
3145 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
\r
3147 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
\r
3149 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
\r
3151 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
\r
3153 /* sw mechanism */
\r
3154 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
\r
3155 if (BTC_WIFI_BW_HT40 == wifi_bw) {
\r
3156 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
\r
3158 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3161 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
\r
3163 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3170 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3171 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
\r
3173 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
\r
3175 if (BTC_RSSI_HIGH(bt_rssi_state))
\r
3176 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
\r
3178 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
3181 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
\r
3182 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
\r
3183 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
\r
3186 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
\r
3188 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
\r
3193 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3194 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
\r
3195 halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, false,
\r
3198 halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 1);
\r
3200 /* sw mechanism */
\r
3201 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
\r
3202 if (BTC_WIFI_BW_HT40 == wifi_bw) {
\r
3203 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3204 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3205 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
\r
3207 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3210 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
\r
3212 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3216 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3217 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3218 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
\r
3220 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3223 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
\r
3225 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3231 void halbtc8723b2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
\r
3233 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
\r
3234 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
\r
3235 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
3236 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
\r
3239 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3240 &prewifi_rssi_state, 2, 15, 0);
\r
3241 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3242 &prewifi_rssi_state1, 2,
\r
3243 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
\r
3244 coex_dm->switch_thres_offset, 0);
\r
3245 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
\r
3246 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
3247 coex_dm->switch_thres_offset, 0);
\r
3249 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3251 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
\r
3253 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
\r
3255 if (BTC_RSSI_HIGH(bt_rssi_state))
\r
3256 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
\r
3258 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
3260 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
\r
3261 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
\r
3262 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
\r
3265 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
\r
3267 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
\r
3271 halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 2);
\r
3273 /* sw mechanism */
\r
3274 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
\r
3275 if (BTC_WIFI_BW_HT40 == wifi_bw) {
\r
3276 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3277 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3278 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
\r
3280 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3283 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
\r
3285 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3289 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3290 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3291 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
\r
3293 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3296 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
\r
3298 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3304 void halbtc8723b2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
\r
3306 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
\r
3307 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
\r
3308 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
3309 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
\r
3312 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3313 &prewifi_rssi_state, 2, 15, 0);
\r
3314 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3315 &prewifi_rssi_state1, 2,
\r
3316 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
\r
3317 coex_dm->switch_thres_offset, 0);
\r
3318 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
\r
3319 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
3320 coex_dm->switch_thres_offset, 0);
\r
3322 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3324 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
\r
3326 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
\r
3328 if (BTC_RSSI_HIGH(bt_rssi_state))
\r
3329 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
\r
3331 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
3333 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
\r
3334 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
\r
3336 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
\r
3339 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
\r
3341 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
\r
3345 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3346 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
\r
3347 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
\r
3349 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
\r
3351 /* sw mechanism */
\r
3352 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
\r
3353 if (BTC_WIFI_BW_HT40 == wifi_bw) {
\r
3354 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3355 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3356 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
\r
3358 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3361 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
\r
3363 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3367 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3368 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3369 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
\r
3371 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3374 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
\r
3376 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3383 /* PAN(HS) only */
\r
3384 void halbtc8723b2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
\r
3386 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
\r
3387 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
\r
3388 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
3389 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
\r
3392 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3393 &prewifi_rssi_state, 2, 15, 0);
\r
3394 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3395 &prewifi_rssi_state1, 2,
\r
3396 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
\r
3397 coex_dm->switch_thres_offset, 0);
\r
3398 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
\r
3399 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
3400 coex_dm->switch_thres_offset, 0);
\r
3402 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3404 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
\r
3406 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
\r
3408 if (BTC_RSSI_HIGH(bt_rssi_state))
\r
3409 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
\r
3411 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
3413 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
\r
3415 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
\r
3417 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
\r
3419 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
\r
3420 if (BTC_WIFI_BW_HT40 == wifi_bw) {
\r
3421 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3422 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3423 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
\r
3425 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3428 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
\r
3430 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3434 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3435 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3436 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
\r
3438 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3441 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
\r
3443 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3449 /* PAN(EDR)+A2DP */
\r
3450 void halbtc8723b2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
\r
3452 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
\r
3453 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
\r
3454 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
3455 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
\r
3459 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3460 &prewifi_rssi_state, 2, 15, 0);
\r
3461 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3462 &prewifi_rssi_state1, 2,
\r
3463 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
\r
3464 coex_dm->switch_thres_offset, 0);
\r
3465 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
\r
3466 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
3467 coex_dm->switch_thres_offset, 0);
\r
3469 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3471 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
\r
3473 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
\r
3475 if (BTC_RSSI_HIGH(bt_rssi_state))
\r
3476 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
\r
3478 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
3480 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state))
\r
3481 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
\r
3484 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
\r
3487 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
\r
3488 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
\r
3491 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3492 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3493 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
\r
3497 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 1);
\r
3499 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 3);
\r
3502 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
\r
3505 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 1);
\r
3507 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 3);
\r
3510 /* sw mechanism */
\r
3511 if (BTC_WIFI_BW_HT40 == wifi_bw) {
\r
3512 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3513 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3514 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
\r
3516 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3519 halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
\r
3521 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3525 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3526 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3527 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
\r
3529 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3532 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
\r
3534 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3540 void halbtc8723b2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
\r
3542 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
\r
3543 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
\r
3544 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
3545 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
\r
3548 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3549 &prewifi_rssi_state, 2, 15, 0);
\r
3550 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3551 &prewifi_rssi_state1, 2,
\r
3552 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
\r
3553 coex_dm->switch_thres_offset, 0);
\r
3554 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
\r
3555 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
3556 coex_dm->switch_thres_offset, 0);
\r
3557 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
\r
3559 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
\r
3561 if (BTC_RSSI_HIGH(bt_rssi_state))
\r
3562 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
\r
3564 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
3566 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
\r
3567 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
\r
3568 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
\r
3571 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
\r
3573 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
\r
3577 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3578 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3579 if (BTC_WIFI_BW_HT40 == wifi_bw) {
\r
3580 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
\r
3582 /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11); */
\r
3583 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
\r
3586 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
\r
3588 /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); */
\r
3589 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
\r
3592 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 2);
\r
3594 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
\r
3595 /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14); */
\r
3596 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
\r
3598 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 2);
\r
3601 /* sw mechanism */
\r
3602 if (BTC_WIFI_BW_HT40 == wifi_bw) {
\r
3603 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3604 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3605 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
\r
3607 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3610 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
\r
3612 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3616 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3617 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3618 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
\r
3620 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3623 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
\r
3625 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3631 /* HID+A2DP+PAN(EDR) */
\r
3632 void halbtc8723b2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
\r
3634 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
\r
3635 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
\r
3636 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
3637 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
\r
3640 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3641 &prewifi_rssi_state, 2, 15, 0);
\r
3642 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3643 &prewifi_rssi_state1, 2,
\r
3644 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
\r
3645 coex_dm->switch_thres_offset, 0);
\r
3646 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
\r
3647 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
3648 coex_dm->switch_thres_offset, 0);
\r
3650 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3652 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
\r
3654 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
\r
3656 if (BTC_RSSI_HIGH(bt_rssi_state))
\r
3657 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
\r
3659 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
3661 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
\r
3662 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
\r
3663 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
\r
3666 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
\r
3668 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
\r
3672 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
\r
3674 if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3675 (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3676 if (BTC_WIFI_BW_HT40 == wifi_bw)
\r
3677 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
\r
3680 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
\r
3683 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 3);
\r
3685 /* sw mechanism */
\r
3686 if (BTC_WIFI_BW_HT40 == wifi_bw) {
\r
3687 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3688 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3689 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
\r
3691 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3694 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
\r
3696 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3700 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3701 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3702 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
\r
3704 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3707 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
\r
3709 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3715 void halbtc8723b2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
\r
3717 static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
\r
3718 prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
\r
3719 static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
\r
3720 u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
\r
3724 wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3725 &prewifi_rssi_state, 2, 15, 0);
\r
3726 /* bt_rssi_state = halbtc8723b2ant_bt_rssi_state(2, 29, 0); */
\r
3727 wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
\r
3728 &prewifi_rssi_state1, 2,
\r
3729 BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
\r
3730 coex_dm->switch_thres_offset, 0);
\r
3731 bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 3,
\r
3732 BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
\r
3733 coex_dm->switch_thres_offset, 37);
\r
3735 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
\r
3738 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
\r
3740 halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 0x5);
\r
3742 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
\r
3744 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
\r
3745 if (BTC_WIFI_BW_LEGACY == wifi_bw) {
\r
3746 if (BTC_RSSI_HIGH(bt_rssi_state))
\r
3747 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
\r
3748 else if (BTC_RSSI_MEDIUM(bt_rssi_state))
\r
3749 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
\r
3751 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
3753 /* only 802.11N mode we have to dec bt power to 4 degree */
\r
3754 if (BTC_RSSI_HIGH(bt_rssi_state)) {
\r
3755 /* need to check ap Number of Not */
\r
3757 halbtc8723b2ant_dec_bt_pwr(btcoexist,
\r
3760 halbtc8723b2ant_dec_bt_pwr(btcoexist,
\r
3762 } else if (BTC_RSSI_MEDIUM(bt_rssi_state))
\r
3763 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
\r
3765 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
3768 if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
\r
3769 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
\r
3770 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
\r
3773 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
\r
3775 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50,
\r
3779 if(BTC_RSSI_HIGH(bt_rssi_state)) {
\r
3781 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 1);
\r
3783 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 3);
\r
3785 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 18);
\r
3786 btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
\r
3787 btcoexist->btc_write_2byte(btcoexist, 0x42a, 0x0808);
\r
3788 btcoexist->btc_write_4byte(btcoexist, 0x430, 0x0);
\r
3789 btcoexist->btc_write_4byte(btcoexist, 0x434, 0x01010000);
\r
3792 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 1);
\r
3794 halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 3);
\r
3797 /* sw mechanism */
\r
3798 if (BTC_WIFI_BW_HT40 == wifi_bw) {
\r
3799 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3800 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3801 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
\r
3803 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3806 halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
\r
3808 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3812 if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
\r
3813 (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
\r
3814 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
\r
3816 halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
\r
3819 halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
\r
3821 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
\r
3827 void halbtc8723b2ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
\r
3829 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
3832 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
\r
3833 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
\r
3835 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
\r
3838 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
\r
3839 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
\r
3842 void halbtc8723b2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
\r
3844 halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
\r
3845 halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
\r
3848 halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
\r
3849 halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
\r
3852 /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */
\r
3853 halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
\r
3855 halbtc8723b2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0,
\r
3857 halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
\r
3860 void halbtc8723b2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
\r
3863 u32 num_of_wifi_link = 0;
\r
3864 u32 wifi_link_status = 0;
\r
3865 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
\r
3866 boolean miracast_plus_bt = false;
\r
3867 boolean scan = false, link = false, roam = false;
\r
3869 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3870 "[BTCoex], RunCoexistMechanism()===>\n");
\r
3871 BTC_TRACE(trace_buf);
\r
3873 if (btcoexist->manual_control) {
\r
3874 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3875 "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n");
\r
3876 BTC_TRACE(trace_buf);
\r
3880 if (coex_sta->under_ips) {
\r
3881 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3882 "[BTCoex], wifi is under IPS !!!\n");
\r
3883 BTC_TRACE(trace_buf);
\r
3887 if (coex_sta->bt_whck_test) {
\r
3888 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3889 "[BTCoex], BT is under WHCK TEST!!!\n");
\r
3890 BTC_TRACE(trace_buf);
\r
3891 halbtc8723b2ant_action_bt_whck_test(btcoexist);
\r
3895 algorithm = halbtc8723b2ant_action_algorithm(btcoexist);
\r
3896 if (coex_sta->c2h_bt_inquiry_page &&
\r
3897 (BT_8723B_2ANT_COEX_ALGO_PANHS != algorithm)) {
\r
3898 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3899 "[BTCoex], BT is under inquiry/page scan !!\n");
\r
3900 BTC_TRACE(trace_buf);
\r
3901 halbtc8723b2ant_action_bt_inquiry(btcoexist);
\r
3905 if(coex_dm->need_recover0x948)
\r
3907 coex_dm->need_recover0x948 = false;
\r
3908 btcoexist->btc_write_4byte(btcoexist, 0x948, coex_dm->backup0x948);
\r
3913 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
\r
3914 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
\r
3915 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
\r
3917 if (scan || link || roam) {
\r
3918 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3919 "[BTCoex], WiFi is under Link Process !!\n");
\r
3920 BTC_TRACE(trace_buf);
\r
3921 halbtc8723b2ant_action_wifi_link_process(btcoexist);
\r
3927 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
\r
3928 &wifi_link_status);
\r
3929 num_of_wifi_link = wifi_link_status >> 16;
\r
3931 if ((num_of_wifi_link >= 2) ||
\r
3932 (wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
\r
3933 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3934 "############# [BTCoex], Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n",
\r
3935 num_of_wifi_link, wifi_link_status);
\r
3936 BTC_TRACE(trace_buf);
\r
3938 if (bt_link_info->bt_link_exist)
\r
3939 miracast_plus_bt = true;
\r
3941 miracast_plus_bt = false;
\r
3943 btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
\r
3944 &miracast_plus_bt);
\r
3945 halbtc8723b2ant_action_wifi_multi_port(btcoexist);
\r
3949 miracast_plus_bt = false;
\r
3950 btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
\r
3951 &miracast_plus_bt);
\r
3954 coex_dm->cur_algorithm = algorithm;
\r
3955 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
\r
3956 coex_dm->cur_algorithm);
\r
3957 BTC_TRACE(trace_buf);
\r
3959 if (halbtc8723b2ant_is_common_action(btcoexist)) {
\r
3960 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3961 "[BTCoex], Action 2-Ant common.\n");
\r
3962 BTC_TRACE(trace_buf);
\r
3963 coex_dm->auto_tdma_adjust = false;
\r
3965 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
\r
3966 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3967 "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
\r
3968 coex_dm->pre_algorithm, coex_dm->cur_algorithm);
\r
3969 BTC_TRACE(trace_buf);
\r
3970 coex_dm->auto_tdma_adjust = false;
\r
3972 switch (coex_dm->cur_algorithm) {
\r
3973 case BT_8723B_2ANT_COEX_ALGO_SCO:
\r
3974 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3975 "[BTCoex], Action 2-Ant, algorithm = SCO.\n");
\r
3976 BTC_TRACE(trace_buf);
\r
3977 halbtc8723b2ant_action_sco(btcoexist);
\r
3979 case BT_8723B_2ANT_COEX_ALGO_HID:
\r
3980 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3981 "[BTCoex], Action 2-Ant, algorithm = HID.\n");
\r
3982 BTC_TRACE(trace_buf);
\r
3983 halbtc8723b2ant_action_hid(btcoexist);
\r
3985 case BT_8723B_2ANT_COEX_ALGO_A2DP:
\r
3986 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3987 "[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
\r
3988 BTC_TRACE(trace_buf);
\r
3989 halbtc8723b2ant_action_a2dp(btcoexist);
\r
3991 case BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS:
\r
3992 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3993 "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
\r
3994 BTC_TRACE(trace_buf);
\r
3995 halbtc8723b2ant_action_a2dp_pan_hs(btcoexist);
\r
3997 case BT_8723B_2ANT_COEX_ALGO_PANEDR:
\r
3998 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
3999 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
\r
4000 BTC_TRACE(trace_buf);
\r
4001 halbtc8723b2ant_action_pan_edr(btcoexist);
\r
4003 case BT_8723B_2ANT_COEX_ALGO_PANHS:
\r
4004 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4005 "[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
\r
4006 BTC_TRACE(trace_buf);
\r
4007 halbtc8723b2ant_action_pan_hs(btcoexist);
\r
4009 case BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP:
\r
4010 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4011 "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
\r
4012 BTC_TRACE(trace_buf);
\r
4013 halbtc8723b2ant_action_pan_edr_a2dp(btcoexist);
\r
4015 case BT_8723B_2ANT_COEX_ALGO_PANEDR_HID:
\r
4016 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4017 "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
\r
4018 BTC_TRACE(trace_buf);
\r
4019 halbtc8723b2ant_action_pan_edr_hid(btcoexist);
\r
4021 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
\r
4022 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4023 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
\r
4024 BTC_TRACE(trace_buf);
\r
4025 halbtc8723b2ant_action_hid_a2dp_pan_edr(
\r
4028 case BT_8723B_2ANT_COEX_ALGO_HID_A2DP:
\r
4029 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4030 "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
\r
4031 BTC_TRACE(trace_buf);
\r
4032 halbtc8723b2ant_action_hid_a2dp(btcoexist);
\r
4035 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4036 "[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
\r
4037 BTC_TRACE(trace_buf);
\r
4038 halbtc8723b2ant_coex_all_off(btcoexist);
\r
4041 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
\r
4045 void halbtc8723b2ant_wifi_off_hw_cfg(IN struct btc_coexist *btcoexist)
\r
4047 boolean is_in_mp_mode = false;
\r
4048 u8 h2c_parameter[2] = {0};
\r
4051 /* set wlan_act to low */
\r
4052 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
\r
4054 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
\r
4055 0x780); /* WiFi goto standby while GNT_BT 0-->1 */
\r
4056 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
\r
4057 if (fw_ver >= 0x180000) {
\r
4058 /* Use H2C to set GNT_BT to HIGH */
\r
4059 h2c_parameter[0] = 1;
\r
4060 btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1, h2c_parameter);
\r
4062 btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
\r
4064 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE,
\r
4066 if (!is_in_mp_mode)
\r
4067 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20,
\r
4068 0x0); /* BT select s0/s1 is controlled by BT */
\r
4070 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20,
\r
4071 0x1); /* BT select s0/s1 is controlled by WiFi */
\r
4074 void halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
\r
4075 IN boolean back_up)
\r
4081 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4082 "[BTCoex], 2Ant Init HW Config!!\n");
\r
4083 BTC_TRACE(trace_buf);
\r
4084 btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
\r
4085 if (vendor == BTC_VENDOR_LENOVO)
\r
4086 coex_dm->switch_thres_offset = 0;
\r
4087 else if (vendor == BTC_VENDOR_ASUS)
\r
4088 coex_dm->switch_thres_offset = 0;
\r
4090 coex_dm->switch_thres_offset = 20;
\r
4092 /* 0xf0[15:12] --> Chip Cut information */
\r
4093 coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
\r
4094 0xf1) & 0xf0) >> 4;
\r
4096 /* backup rf 0x1e value */
\r
4097 coex_dm->bt_rf_0x1e_backup =
\r
4098 btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff);
\r
4100 /* 0x790[5:0]=0x5 */
\r
4101 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
\r
4104 btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
\r
4106 /* Antenna config */
\r
4107 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, true,
\r
4109 coex_sta->dis_ver_info_cnt = 0;
\r
4111 /* PTA parameter */
\r
4112 halbtc8723b2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
\r
4114 /* Enable counter statistics */
\r
4115 btcoexist->btc_write_1byte(btcoexist, 0x76e,
\r
4116 0x4); /* 0x76e[3] =1, WLAN_Act control by PTA */
\r
4117 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
\r
4118 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
\r
4121 /* ************************************************************
\r
4122 * work around function start with wa_halbtc8723b2ant_
\r
4123 * ************************************************************
\r
4124 * ************************************************************
\r
4125 * extern function start with ex_halbtc8723b2ant_
\r
4126 * ************************************************************ */
\r
4127 void ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist *btcoexist)
\r
4129 struct btc_board_info *board_info = &btcoexist->board_info;
\r
4134 btcoexist->btc_write_1byte(btcoexist, 0x67, 0x20);
\r
4136 /* enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */
\r
4137 u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2);
\r
4138 btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1));
\r
4139 DbgPrint("--- TEST 5 ---\n");
\r
4141 btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
\r
4143 if (btcoexist->chip_interface == BTC_INTF_USB) {
\r
4144 /* fixed at S0 for USB interface */
\r
4145 board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT;
\r
4147 /* for PCIE and SDIO interface, we check efuse 0xc3[6] */
\r
4148 if (board_info->single_ant_path == 0) {
\r
4150 board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
\r
4151 } else if (board_info->single_ant_path == 1) {
\r
4153 board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT;
\r
4155 btcoexist->btc_set(btcoexist, BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
\r
4160 void ex_halbtc8723b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
\r
4162 struct btc_board_info *board_info = &btcoexist->board_info;
\r
4163 u8 u8tmp = 0x4; /* Set BIT2 by default since it's 2ant case */
\r
4166 /* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */
\r
4167 /* Local setting bit define */
\r
4168 /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */
\r
4169 /* BIT1: "0" for internal switch; "1" for external switch */
\r
4170 /* BIT2: "0" for one antenna; "1" for two antenna */
\r
4171 /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */
\r
4172 if (btcoexist->chip_interface == BTC_INTF_USB) {
\r
4173 /* fixed at S0 for USB interface */
\r
4174 u8tmp |= 0x1; /* antenna inverse */
\r
4175 btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp);
\r
4177 /* for PCIE and SDIO interface, we check efuse 0xc3[6] */
\r
4178 if (board_info->single_ant_path == 0) {
\r
4179 } else if (board_info->single_ant_path == 1) {
\r
4181 u8tmp |= 0x1; /* antenna inverse */
\r
4184 if (btcoexist->chip_interface == BTC_INTF_PCI)
\r
4185 btcoexist->btc_write_local_reg_1byte(btcoexist, 0x384,
\r
4187 else if (btcoexist->chip_interface == BTC_INTF_SDIO)
\r
4188 btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60,
\r
4193 void ex_halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
\r
4194 IN boolean wifi_only)
\r
4196 halbtc8723b2ant_init_hw_config(btcoexist, true);
\r
4199 void ex_halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
\r
4201 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4202 "[BTCoex], Coex Mechanism Init!!\n");
\r
4203 BTC_TRACE(trace_buf);
\r
4205 halbtc8723b2ant_init_coex_dm(btcoexist);
\r
4208 void ex_halbtc8723b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
\r
4210 struct btc_board_info *board_info = &btcoexist->board_info;
\r
4211 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
\r
4212 u8 *cli_buf = btcoexist->cli_buf;
\r
4213 u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
\r
4215 u32 fa_of_dm, fa_cck;
\r
4216 u32 fw_ver = 0, bt_patch_ver = 0;
\r
4217 static u8 pop_report_in_10s = 0;
\r
4219 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
\r
4220 "\r\n ============[BT Coexist info]============");
\r
4221 CL_PRINTF(cli_buf);
\r
4223 if (btcoexist->manual_control) {
\r
4224 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
\r
4225 "\r\n ============[Under Manual Control]============");
\r
4226 CL_PRINTF(cli_buf);
\r
4227 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
\r
4228 "\r\n ==========================================");
\r
4229 CL_PRINTF(cli_buf);
\r
4232 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
\r
4233 "Ant PG number/ Ant mechanism:",
\r
4234 board_info->pg_ant_num, board_info->btdm_ant_num);
\r
4235 CL_PRINTF(cli_buf);
\r
4237 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
\r
4238 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
\r
4239 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
\r
4240 "\r\n %-35s = %d_%x/ 0x%x/ 0x%x(%d)/ %c",
\r
4241 "Version Coex/ Fw/ Patch/ Cut",
\r
4242 glcoex_ver_date_8723b_2ant, glcoex_ver_8723b_2ant, fw_ver,
\r
4243 bt_patch_ver, bt_patch_ver, coex_sta->cut_version + 65);
\r
4244 CL_PRINTF(cli_buf);
\r
4246 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
\r
4247 "Wifi channel informed to BT",
\r
4248 coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
\r
4249 coex_dm->wifi_chnl_info[2]);
\r
4250 CL_PRINTF(cli_buf);
\r
4253 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
\r
4254 "============[Wifi Status]============");
\r
4255 CL_PRINTF(cli_buf);
\r
4256 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
\r
4258 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
\r
4259 "============[BT Status]============");
\r
4260 CL_PRINTF(cli_buf);
\r
4262 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
\r
4263 "BT Abnormal scan",
\r
4264 (coex_sta->bt_abnormal_scan) ? "Yes" : "No");
\r
4265 CL_PRINTF(cli_buf);
\r
4267 pop_report_in_10s++;
\r
4268 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ",
\r
4269 "BT [status/ rssi/ retryCnt/ popCnt]",
\r
4270 ((coex_sta->bt_disabled) ? ("disabled") : ((
\r
4271 coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan")
\r
4272 : ((BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
\r
4273 coex_dm->bt_status) ? "non-connected idle" :
\r
4274 ((BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
\r
4275 ? "connected-idle" : "busy")))),
\r
4276 coex_sta->bt_rssi - 100, coex_sta->bt_retry_cnt,
\r
4277 coex_sta->pop_event_cnt);
\r
4278 CL_PRINTF(cli_buf);
\r
4280 if (pop_report_in_10s >= 5) {
\r
4281 coex_sta->pop_event_cnt = 0;
\r
4282 pop_report_in_10s = 0;
\r
4286 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
\r
4287 "\r\n %-35s = %d / %d / %d / %d / %d / %d",
\r
4288 "SCO/HID/PAN/A2DP/NameReq/WHQL",
\r
4289 bt_link_info->sco_exist, bt_link_info->hid_exist,
\r
4290 bt_link_info->pan_exist, bt_link_info->a2dp_exist,
\r
4291 coex_sta->c2h_bt_remote_name_req,
\r
4292 coex_sta->bt_whck_test);
\r
4293 CL_PRINTF(cli_buf);
\r
4296 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
\r
4298 (bt_link_info->slave_role) ? "Slave" : "Master");
\r
4299 CL_PRINTF(cli_buf);
\r
4302 bt_info_ext = coex_sta->bt_info_ext;
\r
4303 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d",
\r
4304 "A2DP Rate/Bitpool",
\r
4305 (bt_info_ext & BIT(0)) ? "BR" : "EDR", coex_sta->a2dp_bit_pool);
\r
4306 CL_PRINTF(cli_buf);
\r
4308 for (i = 0; i < BT_INFO_SRC_8723B_2ANT_MAX; i++) {
\r
4309 if (coex_sta->bt_info_c2h_cnt[i]) {
\r
4310 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
\r
4311 "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)",
\r
4312 glbt_info_src_8723b_2ant[i],
\r
4313 coex_sta->bt_info_c2h[i][0],
\r
4314 coex_sta->bt_info_c2h[i][1],
\r
4315 coex_sta->bt_info_c2h[i][2],
\r
4316 coex_sta->bt_info_c2h[i][3],
\r
4317 coex_sta->bt_info_c2h[i][4],
\r
4318 coex_sta->bt_info_c2h[i][5],
\r
4319 coex_sta->bt_info_c2h[i][6],
\r
4320 coex_sta->bt_info_c2h_cnt[i]);
\r
4321 CL_PRINTF(cli_buf);
\r
4325 /* Sw mechanism */
\r
4326 if (btcoexist->manual_control)
\r
4327 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
\r
4328 "============[Sw mechanism] (before Manual)============");
\r
4330 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
\r
4331 "============[Sw mechanism]============");
\r
4333 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
\r
4334 "SM1[ShRf/ LpRA/ LimDig]",
\r
4335 coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra,
\r
4336 coex_dm->limited_dig);
\r
4337 CL_PRINTF(cli_buf);
\r
4338 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
\r
4339 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
\r
4340 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
\r
4341 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
\r
4342 CL_PRINTF(cli_buf);
\r
4344 /* Fw mechanism */
\r
4345 if (btcoexist->manual_control)
\r
4346 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
\r
4347 "============[Fw mechanism] (before Manual) ============");
\r
4349 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
\r
4350 "============[Fw mechanism]============");
\r
4352 ps_tdma_case = coex_dm->cur_ps_tdma;
\r
4354 if (coex_dm->is_switch_to_1dot5_ant)
\r
4355 ps_tdma_case = ps_tdma_case + 100;
\r
4357 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
\r
4358 "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)",
\r
4360 coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
\r
4361 coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
\r
4362 coex_dm->ps_tdma_para[4], ps_tdma_case,
\r
4363 (coex_dm->cur_ps_tdma_on ? "On" : "Off"),
\r
4364 (coex_dm->auto_tdma_adjust ? "Adj" : "Fix"));
\r
4365 CL_PRINTF(cli_buf);
\r
4367 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
\r
4368 "Coex Table Type",
\r
4369 coex_sta->coex_table_type);
\r
4370 CL_PRINTF(cli_buf);
\r
4372 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
\r
4373 "DecBtPwr/ IgnWlanAct",
\r
4374 coex_dm->cur_bt_dec_pwr_lvl, coex_dm->cur_ignore_wlan_act);
\r
4375 CL_PRINTF(cli_buf);
\r
4378 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
\r
4379 "============[Hw setting]============");
\r
4380 CL_PRINTF(cli_buf);
\r
4382 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
\r
4383 "RF-A, 0x1e initVal",
\r
4384 coex_dm->bt_rf_0x1e_backup);
\r
4385 CL_PRINTF(cli_buf);
\r
4387 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
\r
4388 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x880);
\r
4389 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
\r
4390 "0x778/0x880[29:25]",
\r
4391 u8tmp[0], (u32tmp[0] & 0x3e000000) >> 25);
\r
4392 CL_PRINTF(cli_buf);
\r
4395 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
\r
4396 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x67);
\r
4397 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x765);
\r
4398 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
\r
4399 "0x948/ 0x67[5] / 0x765",
\r
4400 u32tmp[0], ((u8tmp[0] & 0x20) >> 5), u8tmp[1]);
\r
4401 CL_PRINTF(cli_buf);
\r
4403 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x92c);
\r
4404 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x930);
\r
4405 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x944);
\r
4406 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
\r
4407 "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]",
\r
4408 u32tmp[0] & 0x3, u32tmp[1] & 0xff, u32tmp[2] & 0x3);
\r
4409 CL_PRINTF(cli_buf);
\r
4412 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x39);
\r
4413 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40);
\r
4414 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c);
\r
4415 u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x64);
\r
4416 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
\r
4417 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
\r
4418 "0x38[11]/0x40/0x4c[24:23]/0x64[0]",
\r
4419 ((u8tmp[0] & 0x8) >> 3), u8tmp[1],
\r
4420 ((u32tmp[0] & 0x01800000) >> 23), u8tmp[2] & 0x1);
\r
4421 CL_PRINTF(cli_buf);
\r
4423 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
\r
4424 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
\r
4425 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
\r
4426 "0x550(bcn ctrl)/0x522",
\r
4427 u32tmp[0], u8tmp[0]);
\r
4428 CL_PRINTF(cli_buf);
\r
4430 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
\r
4431 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x49c);
\r
4432 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
\r
4433 "0xc50(dig)/0x49c(null-drop)",
\r
4434 u32tmp[0] & 0xff, u8tmp[0]);
\r
4435 CL_PRINTF(cli_buf);
\r
4437 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xda0);
\r
4438 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xda4);
\r
4439 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0xda8);
\r
4440 u32tmp[3] = btcoexist->btc_read_4byte(btcoexist, 0xcf0);
\r
4442 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0xa5b);
\r
4443 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0xa5c);
\r
4445 fa_of_dm = ((u32tmp[0] & 0xffff0000) >> 16) + ((u32tmp[1] & 0xffff0000)
\r
4446 >> 16) + (u32tmp[1] & 0xffff) + (u32tmp[2] & 0xffff) + \
\r
4447 ((u32tmp[3] & 0xffff0000) >> 16) + (u32tmp[3] &
\r
4449 fa_cck = (u8tmp[0] << 8) + u8tmp[1];
\r
4451 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
\r
4452 "OFDM-CCA/OFDM-FA/CCK-FA",
\r
4453 u32tmp[0] & 0xffff, fa_of_dm, fa_cck);
\r
4454 CL_PRINTF(cli_buf);
\r
4456 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
\r
4457 "CRC_OK CCK/11g/11n/11n-Agg",
\r
4458 coex_sta->crc_ok_cck, coex_sta->crc_ok_11g,
\r
4459 coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_agg);
\r
4460 CL_PRINTF(cli_buf);
\r
4462 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
\r
4463 "CRC_Err CCK/11g/11n/11n-Agg",
\r
4464 coex_sta->crc_err_cck, coex_sta->crc_err_11g,
\r
4465 coex_sta->crc_err_11n, coex_sta->crc_err_11n_agg);
\r
4466 CL_PRINTF(cli_buf);
\r
4468 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
\r
4469 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
\r
4470 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
\r
4471 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
\r
4472 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
\r
4473 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
\r
4474 "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
\r
4475 u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
\r
4476 CL_PRINTF(cli_buf);
\r
4478 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
\r
4479 "0x770(high-pri rx/tx)",
\r
4480 coex_sta->high_priority_rx, coex_sta->high_priority_tx);
\r
4481 CL_PRINTF(cli_buf);
\r
4482 CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
\r
4483 "0x774(low-pri rx/tx)",
\r
4484 coex_sta->low_priority_rx, coex_sta->low_priority_tx);
\r
4485 CL_PRINTF(cli_buf);
\r
4486 #if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 1)
\r
4487 /* halbtc8723b2ant_monitor_bt_ctr(btcoexist); */
\r
4489 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
\r
4493 void ex_halbtc8723b2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
\r
4495 if (BTC_IPS_ENTER == type) {
\r
4496 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4497 "[BTCoex], IPS ENTER notify\n");
\r
4498 BTC_TRACE(trace_buf);
\r
4499 coex_sta->under_ips = true;
\r
4500 halbtc8723b2ant_wifi_off_hw_cfg(btcoexist);
\r
4501 halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
\r
4502 halbtc8723b2ant_coex_all_off(btcoexist);
\r
4503 } else if (BTC_IPS_LEAVE == type) {
\r
4504 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4505 "[BTCoex], IPS LEAVE notify\n");
\r
4506 BTC_TRACE(trace_buf);
\r
4507 coex_sta->under_ips = false;
\r
4508 halbtc8723b2ant_init_hw_config(btcoexist, false);
\r
4509 halbtc8723b2ant_init_coex_dm(btcoexist);
\r
4510 halbtc8723b2ant_query_bt_info(btcoexist);
\r
4514 void ex_halbtc8723b2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
\r
4516 if (BTC_LPS_ENABLE == type) {
\r
4517 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4518 "[BTCoex], LPS ENABLE notify\n");
\r
4519 BTC_TRACE(trace_buf);
\r
4520 coex_sta->under_lps = true;
\r
4521 } else if (BTC_LPS_DISABLE == type) {
\r
4522 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4523 "[BTCoex], LPS DISABLE notify\n");
\r
4524 BTC_TRACE(trace_buf);
\r
4525 coex_sta->under_lps = false;
\r
4529 void ex_halbtc8723b2ant_scan_notify(IN struct btc_coexist *btcoexist,
\r
4533 u8 u8tmpa, u8tmpb;
\r
4537 u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948);
\r
4538 u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765);
\r
4539 u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x76e);
\r
4541 if (BTC_SCAN_START == type) {
\r
4542 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4543 "[BTCoex], SCAN START notify\n");
\r
4544 BTC_TRACE(trace_buf);
\r
4545 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE);
\r
4546 } else if (BTC_SCAN_FINISH == type) {
\r
4547 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4548 "[BTCoex], SCAN FINISH notify\n");
\r
4549 BTC_TRACE(trace_buf);
\r
4550 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
\r
4551 &coex_sta->scan_ap_num);
\r
4554 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4555 "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
\r
4556 u32tmp, u8tmpa, u8tmpb);
\r
4557 BTC_TRACE(trace_buf);
\r
4560 void ex_halbtc8723b2ant_connect_notify(IN struct btc_coexist *btcoexist,
\r
4563 if (BTC_ASSOCIATE_START == type) {
\r
4564 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4565 "[BTCoex], CONNECT START notify\n");
\r
4566 BTC_TRACE(trace_buf);
\r
4567 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE);
\r
4568 } else if (BTC_ASSOCIATE_FINISH == type) {
\r
4569 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4570 "[BTCoex], CONNECT FINISH notify\n");
\r
4571 BTC_TRACE(trace_buf);
\r
4575 void ex_halbtc8723b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
\r
4578 u8 h2c_parameter[3] = {0};
\r
4580 u8 wifi_central_chnl;
\r
4583 if (BTC_MEDIA_CONNECT == type) {
\r
4584 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4585 "[BTCoex], MEDIA connect notify\n");
\r
4586 BTC_TRACE(trace_buf);
\r
4587 halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, FALSE, FALSE);
\r
4589 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4590 "[BTCoex], MEDIA disconnect notify\n");
\r
4591 BTC_TRACE(trace_buf);
\r
4594 /* only 2.4G we need to inform bt the chnl mask */
\r
4595 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
\r
4596 &wifi_central_chnl);
\r
4597 if ((BTC_MEDIA_CONNECT == type) &&
\r
4598 (wifi_central_chnl <= 14)) {
\r
4599 h2c_parameter[0] = 0x1;
\r
4600 h2c_parameter[1] = wifi_central_chnl;
\r
4601 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
\r
4602 if (BTC_WIFI_BW_HT40 == wifi_bw)
\r
4603 h2c_parameter[2] = 0x30;
\r
4605 btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
\r
4608 h2c_parameter[2] = 0x30;
\r
4610 h2c_parameter[2] = 0x20;
\r
4614 coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
\r
4615 coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
\r
4616 coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
\r
4618 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
\r
4621 void ex_halbtc8723b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
\r
4624 if (type == BTC_PACKET_DHCP) {
\r
4625 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4626 "[BTCoex], DHCP Packet notify\n");
\r
4627 BTC_TRACE(trace_buf);
\r
4631 void ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
\r
4632 IN u8 *tmp_buf, IN u8 length)
\r
4635 u8 i, rsp_source = 0;
\r
4636 boolean bt_busy = false, limited_dig = false;
\r
4637 boolean wifi_connected = false;
\r
4639 coex_sta->c2h_bt_info_req_sent = false;
\r
4641 rsp_source = tmp_buf[0] & 0xf;
\r
4642 if (rsp_source >= BT_INFO_SRC_8723B_2ANT_MAX)
\r
4643 rsp_source = BT_INFO_SRC_8723B_2ANT_WIFI_FW;
\r
4644 coex_sta->bt_info_c2h_cnt[rsp_source]++;
\r
4646 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4647 "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source,
\r
4649 BTC_TRACE(trace_buf);
\r
4650 for (i = 0; i < length; i++) {
\r
4651 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
\r
4653 bt_info = tmp_buf[i];
\r
4654 if (i == length - 1) {
\r
4655 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
\r
4657 BTC_TRACE(trace_buf);
\r
4659 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
\r
4661 BTC_TRACE(trace_buf);
\r
4665 if (btcoexist->manual_control) {
\r
4666 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4667 "[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n");
\r
4668 BTC_TRACE(trace_buf);
\r
4672 /* if 0xff, it means BT is under WHCK test */
\r
4673 if (bt_info == 0xff)
\r
4674 coex_sta->bt_whck_test = true;
\r
4676 coex_sta->bt_whck_test = false;
\r
4678 if (BT_INFO_SRC_8723B_2ANT_WIFI_FW != rsp_source) {
\r
4679 coex_sta->bt_retry_cnt = /* [3:0] */
\r
4680 coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
\r
4682 if (coex_sta->bt_retry_cnt >= 1)
\r
4683 coex_sta->pop_event_cnt++;
\r
4685 coex_sta->bt_rssi =
\r
4686 coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
\r
4688 coex_sta->bt_info_ext =
\r
4689 coex_sta->bt_info_c2h[rsp_source][4];
\r
4691 if (coex_sta->bt_info_c2h[rsp_source][2] & 0x20)
\r
4692 coex_sta->c2h_bt_remote_name_req = true;
\r
4694 coex_sta->c2h_bt_remote_name_req = false;
\r
4696 if (coex_sta->bt_info_c2h[rsp_source][1] == 0x49) {
\r
4697 coex_sta->a2dp_bit_pool =
\r
4698 coex_sta->bt_info_c2h[rsp_source][6];
\r
4700 coex_sta->a2dp_bit_pool = 0;
\r
4702 coex_sta->bt_tx_rx_mask = (coex_sta->bt_info_c2h[rsp_source][2]
\r
4704 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TX_RX_MASK,
\r
4705 &coex_sta->bt_tx_rx_mask);
\r
4706 if (coex_sta->bt_tx_rx_mask) {
\r
4707 /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */
\r
4708 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4709 "[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n");
\r
4710 BTC_TRACE(trace_buf);
\r
4711 btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF,
\r
4715 /* Here we need to resend some wifi info to BT */
\r
4716 /* because bt is reset and loss of the info. */
\r
4717 if ((coex_sta->bt_info_ext & BIT(1))) {
\r
4718 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4719 "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
\r
4720 BTC_TRACE(trace_buf);
\r
4721 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
\r
4723 if (wifi_connected)
\r
4724 ex_halbtc8723b2ant_media_status_notify(
\r
4725 btcoexist, BTC_MEDIA_CONNECT);
\r
4727 ex_halbtc8723b2ant_media_status_notify(
\r
4728 btcoexist, BTC_MEDIA_DISCONNECT);
\r
4731 if ((coex_sta->bt_info_ext & BIT(3))) {
\r
4732 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4733 "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
\r
4734 BTC_TRACE(trace_buf);
\r
4735 halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC,
\r
4738 /* BT already NOT ignore Wlan active, do nothing here. */
\r
4740 #if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
\r
4741 if ((coex_sta->bt_info_ext & BIT(4))) {
\r
4742 /* BT auto report already enabled, do nothing */
\r
4744 halbtc8723b2ant_bt_auto_report(btcoexist, FORCE_EXEC,
\r
4749 /* check BIT2 first ==> check if bt is under inquiry or page scan */
\r
4750 if (bt_info & BT_INFO_8723B_2ANT_B_INQ_PAGE)
\r
4751 coex_sta->c2h_bt_inquiry_page = true;
\r
4753 coex_sta->c2h_bt_inquiry_page = false;
\r
4755 /* set link exist status */
\r
4756 if (!(bt_info & BT_INFO_8723B_2ANT_B_CONNECTION)) {
\r
4757 coex_sta->bt_link_exist = false;
\r
4758 coex_sta->pan_exist = false;
\r
4759 coex_sta->a2dp_exist = false;
\r
4760 coex_sta->hid_exist = false;
\r
4761 coex_sta->sco_exist = false;
\r
4762 } else { /* connection exists */
\r
4763 coex_sta->bt_link_exist = true;
\r
4764 if (bt_info & BT_INFO_8723B_2ANT_B_FTP)
\r
4765 coex_sta->pan_exist = true;
\r
4767 coex_sta->pan_exist = false;
\r
4768 if (bt_info & BT_INFO_8723B_2ANT_B_A2DP)
\r
4769 coex_sta->a2dp_exist = true;
\r
4771 coex_sta->a2dp_exist = false;
\r
4772 if (bt_info & BT_INFO_8723B_2ANT_B_HID)
\r
4773 coex_sta->hid_exist = true;
\r
4775 coex_sta->hid_exist = false;
\r
4776 if (bt_info & BT_INFO_8723B_2ANT_B_SCO_ESCO)
\r
4777 coex_sta->sco_exist = true;
\r
4779 coex_sta->sco_exist = false;
\r
4781 if ((coex_sta->hid_exist == false) &&
\r
4782 (coex_sta->c2h_bt_inquiry_page == false) &&
\r
4783 (coex_sta->sco_exist == false)) {
\r
4784 if (coex_sta->high_priority_tx +
\r
4785 coex_sta->high_priority_rx >= 160) {
\r
4786 coex_sta->hid_exist = true;
\r
4787 bt_info = bt_info | 0x28;
\r
4792 halbtc8723b2ant_update_bt_link_info(btcoexist);
\r
4794 if (!(bt_info & BT_INFO_8723B_2ANT_B_CONNECTION)) {
\r
4795 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
\r
4796 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4797 "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
\r
4798 BTC_TRACE(trace_buf);
\r
4799 } else if (bt_info ==
\r
4800 BT_INFO_8723B_2ANT_B_CONNECTION) { /* connection exists but no busy */
\r
4801 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE;
\r
4802 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4803 "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
\r
4804 BTC_TRACE(trace_buf);
\r
4805 } else if ((bt_info & BT_INFO_8723B_2ANT_B_SCO_ESCO) ||
\r
4806 (bt_info & BT_INFO_8723B_2ANT_B_SCO_BUSY)) {
\r
4807 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_SCO_BUSY;
\r
4808 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4809 "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
\r
4810 BTC_TRACE(trace_buf);
\r
4811 } else if (bt_info & BT_INFO_8723B_2ANT_B_ACL_BUSY) {
\r
4812 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_ACL_BUSY;
\r
4813 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4814 "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
\r
4815 BTC_TRACE(trace_buf);
\r
4817 coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_MAX;
\r
4818 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4819 "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
\r
4820 BTC_TRACE(trace_buf);
\r
4823 if ((BT_8723B_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
\r
4824 (BT_8723B_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
\r
4825 (BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
\r
4827 limited_dig = true;
\r
4830 limited_dig = false;
\r
4833 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
\r
4835 coex_dm->limited_dig = limited_dig;
\r
4836 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
\r
4838 halbtc8723b2ant_run_coexist_mechanism(btcoexist);
\r
4841 void ex_halbtc8723b2ant_halt_notify(IN struct btc_coexist *btcoexist)
\r
4843 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
\r
4844 BTC_TRACE(trace_buf);
\r
4846 halbtc8723b2ant_wifi_off_hw_cfg(btcoexist);
\r
4847 /* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */
\r
4848 /* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x15); //BT goto standby while GNT_BT 1-->0 */
\r
4849 halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
\r
4851 ex_halbtc8723b2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
\r
4854 void ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
\r
4857 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n");
\r
4858 BTC_TRACE(trace_buf);
\r
4860 if (BTC_WIFI_PNP_SLEEP == pnp_state) {
\r
4861 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4862 "[BTCoex], Pnp notify to SLEEP\n");
\r
4863 BTC_TRACE(trace_buf);
\r
4865 /* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */
\r
4866 /* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */
\r
4867 /* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */
\r
4868 coex_sta->under_ips = false;
\r
4869 coex_sta->under_lps = false;
\r
4870 } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
\r
4871 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4872 "[BTCoex], Pnp notify to WAKE UP\n");
\r
4873 BTC_TRACE(trace_buf);
\r
4874 halbtc8723b2ant_init_hw_config(btcoexist, false);
\r
4875 halbtc8723b2ant_init_coex_dm(btcoexist);
\r
4876 halbtc8723b2ant_query_bt_info(btcoexist);
\r
4880 void ex_halbtc8723b2ant_periodical(IN struct btc_coexist *btcoexist)
\r
4882 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
\r
4884 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4885 "[BTCoex], ==========================Periodical===========================\n");
\r
4886 BTC_TRACE(trace_buf);
\r
4887 if (coex_sta->dis_ver_info_cnt <= 5) {
\r
4888 coex_sta->dis_ver_info_cnt += 1;
\r
4889 if (coex_sta->dis_ver_info_cnt == 3) {
\r
4890 /* Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial */
\r
4891 BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
\r
4892 "[BTCoex], Set GNT_BT control by PTA\n");
\r
4893 BTC_TRACE(trace_buf);
\r
4894 halbtc8723b2ant_set_ant_path(btcoexist,
\r
4895 BTC_ANT_WIFI_AT_MAIN, false, false);
\r
4899 #if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
\r
4900 halbtc8723b2ant_query_bt_info(btcoexist);
\r
4901 halbtc8723b2ant_monitor_bt_enable_disable(btcoexist);
\r
4903 halbtc8723b2ant_monitor_bt_ctr(btcoexist);
\r
4904 halbtc8723b2ant_monitor_wifi_ctr(btcoexist);
\r
4906 /* for some BT speaker that Hi-Pri pkt appear begore start play, this will cause HID exist */
\r
4907 if ((coex_sta->high_priority_tx + coex_sta->high_priority_rx < 50) &&
\r
4908 (bt_link_info->hid_exist == true))
\r
4909 bt_link_info->hid_exist = false;
\r
4911 if (halbtc8723b2ant_is_wifi_status_changed(btcoexist) ||
\r
4912 coex_dm->auto_tdma_adjust)
\r
4913 halbtc8723b2ant_run_coexist_mechanism(btcoexist);
\r
4919 #endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */
\r