drivers/net/wireless/rockchip_wlan/rtl8723ds/hal/phydm/txbf/haltxbf8814a.c

   1 //============================================================\r
   2 // Description:\r
   3 //\r
   4 // This file is for 8814A TXBF mechanism\r
   5 //\r
   6 //============================================================\r
   7 \r
   8 #include "mp_precomp.h"\r
   9 #include "../phydm_precomp.h"\r
  10 \r
  11 #if (BEAMFORMING_SUPPORT == 1)\r
  12 #if (RTL8814A_SUPPORT == 1)\r
  13 \r
  14 VOID\r
  15 HalTxbf8814A_setNDPArate(\r
  16         IN PVOID                        pDM_VOID,\r
  17         IN u1Byte       BW,\r
  18         IN u1Byte       Rate\r
  19 )\r
  20 {\r
  21         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
  22         \r
  23         ODM_Write1Byte(pDM_Odm, REG_NDPA_OPT_CTRL_8814A, BW);\r
  24         ODM_Write1Byte(pDM_Odm, REG_NDPA_RATE_8814A, (u1Byte) Rate);\r
  25 \r
  26 }\r
  27 \r
  28 #define PHYDM_MEMORY_MAP_BUF_READ       0x8000\r
  29 #define PHYDM_CTRL_INFO_PAGE                    0x660\r
  30 \r
  31 VOID\r
  32 phydm_DataRate_8814A(\r
  33         IN      PDM_ODM_T                       pDM_Odm,\r
  34         IN      u1Byte                          macId,  \r
  35         OUT     pu4Byte                         data,\r
  36         IN      u1Byte                          dataLen\r
  37         )\r
  38 {\r
  39         u1Byte  i = 0;\r
  40         u2Byte  XReadDataAddr = 0;\r
  41 \r
  42         ODM_Write2Byte(pDM_Odm, REG_PKTBUF_DBG_CTRL_8814A, PHYDM_CTRL_INFO_PAGE);\r
  43         XReadDataAddr = PHYDM_MEMORY_MAP_BUF_READ + macId*32; /*Ctrl Info: 32Bytes for each macid(n)*/\r
  44         \r
  45         if ((XReadDataAddr < PHYDM_MEMORY_MAP_BUF_READ) || (XReadDataAddr > 0x8FFF)) {\r
  46                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("XReadDataAddr(0x%x) is not correct!\n", XReadDataAddr));\r
  47                 return; \r
  48         }\r
  49         \r
  50         /* Read data */\r
  51         for (i = 0; i < dataLen; i++)\r
  52                 *(data+i) = ODM_Read2Byte(pDM_Odm, XReadDataAddr+i);    \r
  53         \r
  54 }\r
  55 \r
  56 VOID\r
  57 HalTxbf8814A_GetTxRate(\r
  58         IN PVOID                        pDM_VOID\r
  59 )\r
  60 {\r
  61         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
  62         PRT_BEAMFORMING_INFO    pBeamInfo = &pDM_Odm->BeamformingInfo;\r
  63         PRT_BEAMFORMEE_ENTRY    pEntry;\r
  64         u4Byte  TxRptData = 0;\r
  65         u1Byte  DataRate = 0xFF;\r
  66 \r
  67         pEntry = &(pBeamInfo->BeamformeeEntry[pBeamInfo->BeamformeeCurIdx]);\r
  68         \r
  69         phydm_DataRate_8814A(pDM_Odm, (u1Byte)pEntry->MacId, &TxRptData, 1);\r
  70         DataRate = (u1Byte)TxRptData;\r
  71         DataRate &= bMask7bits;   /*Bit7 indicates SGI*/\r
  72 \r
  73         pDM_Odm->TxBfDataRate = DataRate;\r
  74 \r
  75         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] pDM_Odm->TxBfDataRate = 0x%x\n", __func__, pDM_Odm->TxBfDataRate));\r
  76 }\r
  77 \r
  78 VOID\r
  79 HalTxbf8814A_ResetTxPath(\r
  80         IN PVOID                        pDM_VOID,\r
  81         IN      u1Byte                          idx\r
  82 )\r
  83 {\r
  84         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
  85 #if DEV_BUS_TYPE == RT_USB_INTERFACE\r
  86         PRT_BEAMFORMING_INFO    pBeamformingInfo = &pDM_Odm->BeamformingInfo;\r
  87         RT_BEAMFORMEE_ENTRY     BeamformeeEntry;\r
  88         u1Byte  Nr_index = 0, txSS = 0;\r
  89 \r
  90         if (idx < BEAMFORMEE_ENTRY_NUM)\r
  91                 BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx];\r
  92         else\r
  93                 return;\r
  94 \r
  95         if ((pDM_Odm->LastUSBHub) != (*pDM_Odm->HubUsbMode)) {\r
  96                 Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), BeamformeeEntry.CompSteeringNumofBFer);\r
  97 \r
  98                 if (*pDM_Odm->HubUsbMode == 2) {\r
  99                         if (pDM_Odm->RFType == ODM_4T4R)\r
 100                                 txSS = 0xf;\r
 101                         else if (pDM_Odm->RFType == ODM_3T3R)\r
 102                                 txSS = 0xe;\r
 103                         else\r
 104                                 txSS = 0x6;\r
 105                 } else if (*pDM_Odm->HubUsbMode == 1)   /*USB 2.0 always 2Tx*/\r
 106                         txSS = 0x6;\r
 107                 else\r
 108                         txSS = 0x6;\r
 109 \r
 110                 if (txSS == 0xf) {\r
 111                         ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1_8814A, bMaskByte3 | bMaskByte2HighNibble, 0x93f);\r
 112                         ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1_8814A, bMaskDWord, 0x93f93f0);\r
 113                 } else if (txSS == 0xe) {\r
 114                         ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1_8814A, bMaskByte3 | bMaskByte2HighNibble, 0x93e);\r
 115                         ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2_8814A, bMaskDWord, 0x93e93e0);\r
 116                 } else if (txSS == 0x6) {\r
 117                         ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1_8814A, bMaskByte3 | bMaskByte2HighNibble, 0x936);\r
 118                         ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2_8814A, bMaskLWord, 0x9360);\r
 119                 }\r
 120 \r
 121                 if (idx == 0) {\r
 122                         switch (Nr_index) {\r
 123                         case 0:\r
 124                         break;\r
 125 \r
 126                         case 1:                 /*Nsts = 2      BC*/\r
 127                         ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0_8814A, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366);               /*tx2path, BC*/\r
 128                         break;\r
 129 \r
 130                         case 2:                 /*Nsts = 3      BCD*/\r
 131                         ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0_8814A, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee);    /*tx3path, BCD*/\r
 132                         break;\r
 133 \r
 134                         default:                        /*Nr>3, same as Case 3*/\r
 135                         ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0_8814A, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff);    /*tx4path, ABCD*/\r
 136                         break;\r
 137                         }\r
 138                 } else  {\r
 139                         switch (Nr_index) {\r
 140                         case 0:\r
 141                                 break;\r
 142 \r
 143                         case 1:                 /*Nsts = 2      BC*/\r
 144                         ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1_8814A, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366);               /*tx2path, BC*/\r
 145                         break;\r
 146 \r
 147                         case 2:                 /*Nsts = 3      BCD*/\r
 148                         ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1_8814A, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee);    /*tx3path, BCD*/\r
 149                         break;\r
 150 \r
 151                         default:                        /*Nr>3, same as Case 3*/\r
 152                         ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1_8814A, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff);    /*tx4path, ABCD*/\r
 153                         break;\r
 154                         }\r
 155                 }\r
 156 \r
 157                 pDM_Odm->LastUSBHub = *pDM_Odm->HubUsbMode;\r
 158         } else\r
 159                 return;\r
 160 #endif\r
 161 }\r
 162 \r
 163 \r
 164 u1Byte\r
 165 halTxbf8814A_GetNtx(\r
 166         IN PVOID                        pDM_VOID\r
 167 )\r
 168 {\r
 169         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 170         u1Byte          Ntx = 0, txSS = 3;\r
 171 \r
 172 #if DEV_BUS_TYPE == RT_USB_INTERFACE\r
 173         txSS = *pDM_Odm->HubUsbMode;\r
 174 #endif\r
 175         if (txSS == 3 || txSS == 2) {\r
 176                 if (pDM_Odm->RFType == ODM_4T4R)\r
 177                         Ntx = 3;\r
 178                 else if (pDM_Odm->RFType == ODM_3T3R)\r
 179                         Ntx = 2;\r
 180                 else\r
 181                         Ntx = 1;\r
 182         } else if (txSS == 1)   /*USB 2.0 always 2Tx*/\r
 183                 Ntx = 1;\r
 184         else\r
 185                 Ntx = 1;\r
 186 \r
 187         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Ntx = %d\n", __func__, Ntx));\r
 188         return Ntx;\r
 189 }\r
 190 \r
 191 u1Byte\r
 192 halTxbf8814A_GetNrx(\r
 193         IN PVOID                        pDM_VOID\r
 194 )\r
 195 {\r
 196         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 197         u1Byte                  Nrx = 0;\r
 198 \r
 199         if (pDM_Odm->RFType == ODM_4T4R)\r
 200                 Nrx = 3;\r
 201         else if (pDM_Odm->RFType == ODM_3T3R)\r
 202                 Nrx = 2;\r
 203         else if (pDM_Odm->RFType == ODM_2T2R)\r
 204                 Nrx = 1;\r
 205         else if (pDM_Odm->RFType == ODM_2T3R)\r
 206                 Nrx = 2;\r
 207         else if (pDM_Odm->RFType == ODM_2T4R)\r
 208                 Nrx = 3;\r
 209         else if (pDM_Odm->RFType == ODM_1T1R)\r
 210                 Nrx = 0;\r
 211         else if (pDM_Odm->RFType == ODM_1T2R)\r
 212                 Nrx = 1;\r
 213         else\r
 214                 Nrx = 0;\r
 215 \r
 216         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Nrx = %d\n", __func__, Nrx));\r
 217         return Nrx;\r
 218 }\r
 219 \r
 220 VOID\r
 221 halTxbf8814A_RfMode(\r
 222         IN PVOID                        pDM_VOID,\r
 223         IN      PRT_BEAMFORMING_INFO    pBeamformingInfo,\r
 224         IN      u1Byte                                  idx\r
 225 )\r
 226 {\r
 227         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 228         u1Byte                          i, Nr_index = 0;\r
 229         u1Byte                          txSS = 3;               /*default use 3 Tx*/\r
 230         RT_BEAMFORMEE_ENTRY     BeamformeeEntry;\r
 231 \r
 232         if (idx < BEAMFORMEE_ENTRY_NUM)\r
 233                 BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[idx];\r
 234         else\r
 235                 return;\r
 236 \r
 237         Nr_index = TxBF_Nr(halTxbf8814A_GetNtx(pDM_Odm), BeamformeeEntry.CompSteeringNumofBFer);\r
 238 \r
 239         if (pDM_Odm->RFType == ODM_1T1R)\r
 240                 return;\r
 241 \r
 242         for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) {\r
 243                 ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)i, RF_WeLut_Jaguar, 0x80000, 0x1);\r
 244                 /*RF Mode table write enable*/\r
 245         }\r
 246 \r
 247         if (pBeamformingInfo->beamformee_su_cnt > 0) {\r
 248                 for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) {\r
 249                         ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)i, RF_ModeTableAddr, 0xfffff, 0x18000);\r
 250                         /*Select RX mode*/\r
 251                         ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)i, RF_ModeTableData0, 0xfffff, 0xBE77F);\r
 252                         /*Set Table data*/\r
 253                         ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)i, RF_ModeTableData1, 0xfffff, 0x226BF);\r
 254                         /*Enable TXIQGEN in RX mode*/\r
 255                 }\r
 256                 ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff, 0xE26BF);\r
 257                 /*Enable TXIQGEN in RX mode*/\r
 258         }\r
 259 \r
 260         for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++) {\r
 261                 ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)i, RF_WeLut_Jaguar, 0x80000, 0x0);\r
 262                 /*RF Mode table write disable*/\r
 263         }\r
 264 \r
 265         if (pBeamformingInfo->beamformee_su_cnt > 0) {\r
 266 #if DEV_BUS_TYPE == RT_USB_INTERFACE\r
 267                 pDM_Odm->LastUSBHub = *pDM_Odm->HubUsbMode;\r
 268                 txSS = *pDM_Odm->HubUsbMode;\r
 269 #endif\r
 270                 if (txSS == 3 || txSS == 2) {\r
 271                         if (pDM_Odm->RFType == ODM_4T4R)\r
 272                                 txSS = 0xf;\r
 273                         else if (pDM_Odm->RFType == ODM_3T3R)\r
 274                                 txSS = 0xe;\r
 275                         else\r
 276                                 txSS = 0x6;\r
 277                 } else if (txSS == 1)   /*USB 2.0 always 2Tx*/\r
 278                         txSS = 0x6;\r
 279                 else\r
 280                         txSS = 0x6;\r
 281 \r
 282                 if (txSS == 0xf) {\r
 283                         ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1_8814A, bMaskByte3 | bMaskByte2HighNibble, 0x93f);\r
 284                         ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1_8814A, bMaskDWord, 0x93f93f0);\r
 285                 } else if (txSS == 0xe) {\r
 286                         ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1_8814A, bMaskByte3 | bMaskByte2HighNibble, 0x93e);\r
 287                         ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2_8814A, bMaskDWord, 0x93e93e0);\r
 288                 } else if (txSS == 0x6) {\r
 289                         ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1_8814A, bMaskByte3 | bMaskByte2HighNibble, 0x936);\r
 290                         ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2_8814A, bMaskLWord, 0x9360);\r
 291                 }\r
 292 \r
 293                 /*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/\r
 294                 ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT28 | BIT29, 0x2);                       /*enable BB TxBF ant mapping register*/\r
 295                 \r
 296                 if (idx == 0) {\r
 297                         switch (Nr_index) {\r
 298                         case 0:\r
 299                         break;\r
 300 \r
 301                         case 1:                 /*Nsts = 2      BC*/\r
 302                         ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0_8814A, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366);               /*tx2path, BC*/\r
 303                         break;\r
 304 \r
 305                         case 2:                 /*Nsts = 3      BCD*/\r
 306                         ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0_8814A, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee);    /*tx3path, BCD*/\r
 307                         break;\r
 308 \r
 309                         default:                        /*Nr>3, same as Case 3*/\r
 310                         ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF0_8814A, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff);    /*tx4path, ABCD*/\r
 311                         \r
 312                         break;\r
 313                         }\r
 314                 } else {\r
 315                         switch (Nr_index) {\r
 316                         case 0:\r
 317                         break;\r
 318 \r
 319                         case 1:                 /*Nsts = 2      BC*/\r
 320                         ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1_8814A, bMaskByte3LowNibble | bMaskL3Bytes, 0x9366);               /*tx2path, BC*/\r
 321                         break;\r
 322 \r
 323                         case 2:                 /*Nsts = 3      BCD*/\r
 324                         ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1_8814A, bMaskByte3LowNibble | bMaskL3Bytes, 0x93e93ee);    /*tx3path, BCD*/\r
 325                         break;\r
 326 \r
 327                         default:                        /*Nr>3, same as Case 3*/\r
 328                         ODM_SetBBReg(pDM_Odm, REG_BB_TXBF_ANT_SET_BF1_8814A, bMaskByte3LowNibble | bMaskL3Bytes, 0x93f93ff);    /*tx4path, ABCD*/\r
 329                         break;\r
 330                         }\r
 331                 }\r
 332         }\r
 333 \r
 334         if ((pBeamformingInfo->beamformee_su_cnt == 0) && (pBeamformingInfo->beamformer_su_cnt == 0)) {\r
 335                 ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_1_8814A, bMaskByte3 | bMaskByte2HighNibble, 0x932);    /*set TxPath selection for 8814a BFer bug refine*/\r
 336                 ODM_SetBBReg(pDM_Odm, REG_BB_TX_PATH_SEL_2_8814A, bMaskDWord, 0x93e9360);\r
 337         }\r
 338 }\r
 339 #if 0\r
 340 VOID\r
 341 halTxbf8814A_DownloadNDPA(\r
 342         IN PVOID                        pDM_VOID,\r
 343         IN      u1Byte                          Idx\r
 344 )\r
 345 {\r
 346         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 347         u1Byte                  u1bTmp = 0, tmpReg422 = 0;\r
 348         u1Byte                  BcnValidReg = 0, count = 0, DLBcnCount = 0;\r
 349         u2Byte                  Head_Page = 0x7FE;\r
 350         BOOLEAN                 bSendBeacon = FALSE;\r
 351         u2Byte                  TxPageBndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/\r
 352         PRT_BEAMFORMING_INFO    pBeamInfo = &pDM_Odm->BeamformingInfo;\r
 353         PRT_BEAMFORMEE_ENTRY    pBeamEntry = pBeamInfo->BeamformeeEntry + Idx;\r
 354         PADAPTER                Adapter = pDM_Odm->Adapter;\r
 355 \r
 356 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 357         *pDM_Odm->pbFwDwRsvdPageInProgress = TRUE;\r
 358 #endif\r
 359         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));\r
 360 \r
 361         Adapter->HalFunc.GetHalDefVarHandler(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (pu2Byte)&TxPageBndy);\r
 362 \r
 363         /*Set REG_CR bit 8. DMA beacon by SW.*/\r
 364         u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8814A + 1);\r
 365         ODM_Write1Byte(pDM_Odm,  REG_CR_8814A + 1, (u1bTmp | BIT0));\r
 366 \r
 367 \r
 368         /*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/\r
 369         tmpReg422 = ODM_Read1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8814A + 2);\r
 370         ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8814A + 2,  tmpReg422 & (~BIT6));\r
 371 \r
 372         if (tmpReg422 & BIT6) {\r
 373                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: There is an Adapter is sending beacon.\n", __func__));\r
 374                 bSendBeacon = TRUE;\r
 375         }\r
 376 \r
 377         /*0x204[11:0]   Beacon Head for TXDMA*/\r
 378         ODM_Write2Byte(pDM_Odm, REG_FIFOPAGE_CTRL_2_8814A, Head_Page);\r
 379 \r
 380         do {\r
 381                 /*Clear beacon valid check bit.*/\r
 382                 BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_FIFOPAGE_CTRL_2_8814A + 1);\r
 383                 ODM_Write1Byte(pDM_Odm, REG_FIFOPAGE_CTRL_2_8814A + 1, (BcnValidReg | BIT7));\r
 384 \r
 385                 /*download NDPA rsvd page.*/\r
 386                 if (pBeamEntry->BeamformEntryCap & BEAMFORMER_CAP_VHT_SU)\r
 387                         Beamforming_SendVHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->AID, pBeamEntry->SoundBW, BEACON_QUEUE);\r
 388                 else\r
 389                         Beamforming_SendHTNDPAPacket(pDM_Odm, pBeamEntry->MacAddr, pBeamEntry->SoundBW, BEACON_QUEUE);\r
 390 \r
 391                 /*check rsvd page download OK.*/\r
 392                 BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_FIFOPAGE_CTRL_2_8814A + 1);\r
 393                 count = 0;\r
 394                 while (!(BcnValidReg & BIT7) && count < 20) {\r
 395                         count++;\r
 396                         ODM_delay_ms(10);\r
 397                         BcnValidReg = ODM_Read1Byte(pDM_Odm, REG_FIFOPAGE_CTRL_2_8814A + 2);\r
 398                 }\r
 399                 DLBcnCount++;\r
 400         } while (!(BcnValidReg & BIT7) && DLBcnCount < 5);\r
 401 \r
 402         if (!(BcnValidReg & BIT7))\r
 403                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Download RSVD page failed!\n", __func__));\r
 404 \r
 405         /*0x204[11:0]   Beacon Head for TXDMA*/\r
 406         ODM_Write2Byte(pDM_Odm, REG_FIFOPAGE_CTRL_2_8814A, TxPageBndy);\r
 407 \r
 408         /*To make sure that if there exists an adapter which would like to send beacon.*/\r
 409         /*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/\r
 410         /*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */\r
 411         /*the beacon cannot be sent by HW.*/\r
 412         /*2010.06.23. Added by tynli.*/\r
 413         if (bSendBeacon)\r
 414                 ODM_Write1Byte(pDM_Odm, REG_FWHW_TXQ_CTRL_8814A + 2, tmpReg422);\r
 415 \r
 416         /*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/\r
 417         /*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/\r
 418         u1bTmp = ODM_Read1Byte(pDM_Odm, REG_CR_8814A + 1);\r
 419         ODM_Write1Byte(pDM_Odm, REG_CR_8814A + 1, (u1bTmp & (~BIT0)));\r
 420 \r
 421         pBeamEntry->BeamformEntryState = BEAMFORMING_ENTRY_STATE_PROGRESSED;\r
 422 \r
 423 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
 424         *pDM_Odm->pbFwDwRsvdPageInProgress = FALSE;\r
 425 #endif\r
 426 }\r
 427 \r
 428 VOID\r
 429 halTxbf8814A_FwTxBFCmd(\r
 430         IN PVOID                        pDM_VOID\r
 431 )\r
 432 {\r
 433         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 434         u1Byte  Idx, Period = 0;\r
 435         u1Byte  PageNum0 = 0xFF, PageNum1 = 0xFF;\r
 436         u1Byte  u1TxBFParm[3] = {0};\r
 437         PRT_BEAMFORMING_INFO pBeamInfo = &pDM_Odm->BeamformingInfo;\r
 438 \r
 439         for (Idx = 0; Idx < BEAMFORMEE_ENTRY_NUM; Idx++) {\r
 440                 if (pBeamInfo->BeamformeeEntry[Idx].bUsed && pBeamInfo->BeamformeeEntry[Idx].BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) {\r
 441                         if (pBeamInfo->BeamformeeEntry[Idx].bSound) {\r
 442                                 PageNum0 = 0xFE;\r
 443                                 PageNum1 = 0x07;\r
 444                                 Period = (u1Byte)(pBeamInfo->BeamformeeEntry[Idx].SoundPeriod);\r
 445                         } else if (PageNum0 == 0xFF) {\r
 446                                 PageNum0 = 0xFF; /*stop sounding*/\r
 447                                 PageNum1 = 0x0F;\r
 448                         }\r
 449                 }\r
 450         }\r
 451 \r
 452         u1TxBFParm[0] = PageNum0;\r
 453         u1TxBFParm[1] = PageNum1;\r
 454         u1TxBFParm[2] = Period;\r
 455         ODM_FillH2CCmd(pDM_Odm, PHYDM_H2C_TXBF, 3, u1TxBFParm);\r
 456 \r
 457         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, \r
 458                 ("[%s] PageNum0 = %d, PageNum1 = %d Period = %d\n", __func__, PageNum0, PageNum1, Period));\r
 459 }\r
 460 #endif\r
 461 VOID\r
 462 HalTxbf8814A_Enter(\r
 463         IN PVOID                        pDM_VOID,\r
 464         IN u1Byte                               BFerBFeeIdx\r
 465 )\r
 466 {\r
 467         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 468         u1Byte                                  i = 0;\r
 469         u1Byte                                  BFerIdx = (BFerBFeeIdx & 0xF0) >> 4;\r
 470         u1Byte                                  BFeeIdx = (BFerBFeeIdx & 0xF);\r
 471         PRT_BEAMFORMING_INFO    pBeamformingInfo = &pDM_Odm->BeamformingInfo;\r
 472         RT_BEAMFORMEE_ENTRY     BeamformeeEntry;\r
 473         RT_BEAMFORMER_ENTRY     BeamformerEntry;\r
 474         u2Byte                                  STAid = 0, CSI_Param = 0;\r
 475         u1Byte                                  Nc_index = 0, Nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0;\r
 476 \r
 477         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] BFerIdx=%d, BFeeIdx=%d\n", __func__, BFerIdx, BFeeIdx));\r
 478         ODM_SetMACReg(pDM_Odm, REG_SND_PTCL_CTRL_8814A, bMaskByte1 | bMaskByte2, 0x0202);\r
 479 \r
 480         if ((pBeamformingInfo->beamformer_su_cnt > 0) && (BFerIdx < BEAMFORMER_ENTRY_NUM)) {\r
 481                 BeamformerEntry = pBeamformingInfo->BeamformerEntry[BFerIdx];\r
 482                 /*Sounding protocol control*/\r
 483                 ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A, 0xDB);\r
 484 \r
 485                 /*MAC address/Partial AID of Beamformer*/\r
 486                 if (BFerIdx == 0) {\r
 487                         for (i = 0; i < 6 ; i++)\r
 488                                 ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER0_INFO_8814A + i), BeamformerEntry.MacAddr[i]);\r
 489                 } else {\r
 490                         for (i = 0; i < 6 ; i++)\r
 491                                 ODM_Write1Byte(pDM_Odm, (REG_ASSOCIATED_BFMER1_INFO_8814A + i), BeamformerEntry.MacAddr[i]);\r
 492                 }\r
 493 \r
 494                 /*CSI report parameters of Beamformer*/\r
 495                 Nc_index = halTxbf8814A_GetNrx(pDM_Odm);        /*for 8814A Nrx = 3(4 Ant), min=0(1 Ant)*/\r
 496                 Nr_index = BeamformerEntry.NumofSoundingDim;    /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so Nr_index don't care*/\r
 497 \r
 498                 grouping = 0;\r
 499 \r
 500                 /*for ac = 1, for n = 3*/\r
 501                 if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_VHT_SU)\r
 502                         codebookinfo = 1;\r
 503                 else if (BeamformerEntry.BeamformEntryCap & BEAMFORMEE_CAP_HT_EXPLICIT)\r
 504                         codebookinfo = 3;\r
 505 \r
 506                 coefficientsize = 3;\r
 507 \r
 508                 CSI_Param = (u2Byte)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (Nr_index << 3) | (Nc_index));\r
 509 \r
 510                 if (BFerIdx == 0)\r
 511                         ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A, CSI_Param);\r
 512                 else\r
 513                         ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, CSI_Param);\r
 514                 /*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/\r
 515                 ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A + 3, 0x40);\r
 516 \r
 517         }\r
 518 \r
 519         if ((pBeamformingInfo->beamformee_su_cnt > 0) && (BFeeIdx < BEAMFORMEE_ENTRY_NUM)) {\r
 520                 BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[BFeeIdx];\r
 521 \r
 522                 halTxbf8814A_RfMode(pDM_Odm, pBeamformingInfo, BFeeIdx);\r
 523 \r
 524                 if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS))\r
 525                         STAid = BeamformeeEntry.MacId;\r
 526                 else\r
 527                         STAid = BeamformeeEntry.P_AID;\r
 528 \r
 529                 /*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/\r
 530                 if (BFeeIdx == 0) {\r
 531                         ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, STAid);\r
 532                         ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3) | BIT4 | BIT6 | BIT7);\r
 533                 } else\r
 534                         ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 2, STAid | BIT14 | BIT15 | BIT12);\r
 535 \r
 536                 /*CSI report parameters of Beamformee*/\r
 537                 if (BFeeIdx == 0) {\r
 538                         /*Get BIT24 & BIT25*/\r
 539                         u1Byte  tmp = ODM_Read1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3) & 0x3;\r
 540 \r
 541                         ODM_Write1Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3, tmp | 0x60);\r
 542                         ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A, STAid | BIT9);\r
 543                 } else\r
 544                         ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, STAid | 0xE200);    /*Set BIT25*/\r
 545 \r
 546                 phydm_Beamforming_Notify(pDM_Odm);\r
 547         }\r
 548 \r
 549 }\r
 550 \r
 551 \r
 552 VOID\r
 553 HalTxbf8814A_Leave(\r
 554         IN PVOID                        pDM_VOID,\r
 555         IN u1Byte                               Idx\r
 556 )\r
 557 {\r
 558         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 559         PRT_BEAMFORMING_INFO    pBeamformingInfo = &pDM_Odm->BeamformingInfo;\r
 560         RT_BEAMFORMER_ENTRY     BeamformerEntry;\r
 561         RT_BEAMFORMEE_ENTRY     BeamformeeEntry;\r
 562 \r
 563         if (Idx < BEAMFORMER_ENTRY_NUM) {\r
 564                 BeamformerEntry = pBeamformingInfo->BeamformerEntry[Idx];\r
 565                 BeamformeeEntry = pBeamformingInfo->BeamformeeEntry[Idx];\r
 566         } else\r
 567                 return;\r
 568 \r
 569         /*Clear P_AID of Beamformee*/\r
 570         /*Clear MAC address of Beamformer*/\r
 571         /*Clear Associated Bfmee Sel*/\r
 572 \r
 573         if (BeamformerEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) {\r
 574                 ODM_Write1Byte(pDM_Odm, REG_SND_PTCL_CTRL_8814A, 0xD8);\r
 575                 if (Idx == 0) {\r
 576                         ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8814A, 0);\r
 577                         ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER0_INFO_8814A + 4, 0);\r
 578                         ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A, 0);\r
 579                 } else {\r
 580                         ODM_Write4Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8814A, 0);\r
 581                         ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMER1_INFO_8814A + 4, 0);\r
 582                         ODM_Write2Byte(pDM_Odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, 0);\r
 583                 }\r
 584         }\r
 585 \r
 586         if (BeamformeeEntry.BeamformEntryCap == BEAMFORMING_CAP_NONE) {\r
 587                 halTxbf8814A_RfMode(pDM_Odm, pBeamformingInfo, Idx);\r
 588                 if (Idx == 0) {\r
 589                         ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, 0x0);\r
 590                         ODM_Write1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3, ODM_Read1Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 3) | BIT4 | BIT6 | BIT7);\r
 591                         ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A, 0);\r
 592                 } else {\r
 593                         ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A + 2, 0x0 | BIT14 | BIT15 | BIT12);\r
 594 \r
 595                         ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, ODM_Read2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2) & 0x60);\r
 596                 }\r
 597         }\r
 598 }\r
 599 \r
 600 VOID\r
 601 HalTxbf8814A_Status(\r
 602         IN PVOID                        pDM_VOID,\r
 603         IN u1Byte                               Idx\r
 604 )\r
 605 {\r
 606         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 607         u2Byte                                  BeamCtrlVal, tmpVal;\r
 608         u4Byte                                  BeamCtrlReg;\r
 609         PRT_BEAMFORMING_INFO    pBeamformingInfo = &pDM_Odm->BeamformingInfo;\r
 610         RT_BEAMFORMEE_ENTRY     BeamformEntry;\r
 611 \r
 612         if (Idx < BEAMFORMEE_ENTRY_NUM)\r
 613                 BeamformEntry = pBeamformingInfo->BeamformeeEntry[Idx];\r
 614         else\r
 615                 return;\r
 616 \r
 617         if (phydm_actingDetermine(pDM_Odm, PhyDM_ACTING_AS_IBSS))\r
 618                 BeamCtrlVal = BeamformEntry.MacId;\r
 619         else\r
 620                 BeamCtrlVal = BeamformEntry.P_AID;\r
 621 \r
 622         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, BeamformEntry.BeamformEntryState = %d", __func__, BeamformEntry.BeamformEntryState));\r
 623 \r
 624         if (Idx == 0)\r
 625                 BeamCtrlReg = REG_TXBF_CTRL_8814A;\r
 626         else {\r
 627                 BeamCtrlReg = REG_TXBF_CTRL_8814A + 2;\r
 628                 BeamCtrlVal |= BIT12 | BIT14 | BIT15;\r
 629         }\r
 630 \r
 631         if ((BeamformEntry.BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSED) && (pBeamformingInfo->applyVmatrix == TRUE)) {\r
 632                 if (BeamformEntry.SoundBW == CHANNEL_WIDTH_20)\r
 633                         BeamCtrlVal |= BIT9;\r
 634                 else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_40)\r
 635                         BeamCtrlVal |= (BIT9 | BIT10);\r
 636                 else if (BeamformEntry.SoundBW == CHANNEL_WIDTH_80)\r
 637                         BeamCtrlVal |= (BIT9 | BIT10 | BIT11);\r
 638         } else {\r
 639                 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, Don't apply Vmatrix",  __func__));\r
 640                 BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11);\r
 641         }\r
 642 \r
 643         ODM_Write2Byte(pDM_Odm, BeamCtrlReg, BeamCtrlVal);\r
 644         /*disable NDP packet use beamforming */\r
 645         tmpVal = ODM_Read2Byte(pDM_Odm, REG_TXBF_CTRL_8814A);\r
 646         ODM_Write2Byte(pDM_Odm, REG_TXBF_CTRL_8814A, tmpVal | BIT15);\r
 647 \r
 648 }\r
 649 \r
 650 \r
 651 \r
 652 \r
 653 \r
 654 VOID\r
 655 HalTxbf8814A_FwTxBF(\r
 656         IN PVOID                        pDM_VOID,\r
 657         IN      u1Byte                          Idx\r
 658 )\r
 659 {\r
 660 #if 0\r
 661         PDM_ODM_T       pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
 662         PRT_BEAMFORMING_INFO    pBeamInfo = &pDM_Odm->BeamformingInfo;\r
 663         PRT_BEAMFORMEE_ENTRY    pBeamEntry = pBeamInfo->BeamformeeEntry + Idx;\r
 664 \r
 665         ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));\r
 666 \r
 667         if (pBeamEntry->BeamformEntryState == BEAMFORMING_ENTRY_STATE_PROGRESSING)\r
 668                 halTxbf8814A_DownloadNDPA(pDM_Odm, Idx);\r
 669 \r
 670         halTxbf8814A_FwTxBFCmd(pDM_Odm);\r
 671 #endif\r
 672 }\r
 673 \r
 674 #endif  /* (RTL8814A_SUPPORT == 1)*/\r
 675 \r
 676 #endif\r
 677 \r