drivers/net/wireless/rockchip_wlan/rtl8723ds/include/rtw_pwrctrl.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #ifndef __RTW_PWRCTRL_H_
  21 #define __RTW_PWRCTRL_H_
  22
  23
  24 #define FW_PWR0 0
  25 #define FW_PWR1 1
  26 #define FW_PWR2 2
  27 #define FW_PWR3 3
  28
  29
  30 #define HW_PWR0 7
  31 #define HW_PWR1 6
  32 #define HW_PWR2 2
  33 #define HW_PWR3 0
  34 #define HW_PWR4 8
  35
  36 #define FW_PWRMSK       0x7
  37
  38
  39 #define XMIT_ALIVE      BIT(0)
  40 #define RECV_ALIVE      BIT(1)
  41 #define CMD_ALIVE       BIT(2)
  42 #define EVT_ALIVE       BIT(3)
  43 #ifdef CONFIG_BT_COEXIST
  44 #define BTCOEX_ALIVE    BIT(4)
  45 #endif /* CONFIG_BT_COEXIST */
  46
  47 #ifdef CONFIG_WOWLAN
  48 #ifdef CONFIG_DEFAULT_PATTERNS_EN
  49         #ifdef CONFIG_PLATFORM_ANDROID_INTEL_X86
  50                 /* TCP/ICMP/UDP multicast with specific IP addr */
  51                 #define DEFAULT_PATTERN_NUM 3
  52         #else
  53                 /* TCP/ICMP */
  54                 #define DEFAULT_PATTERN_NUM 2
  55         #endif
  56 #else
  57         #define DEFAULT_PATTERN_NUM 0
  58 #endif /*CONFIG_DEFAULT_PATTERNS_EN*/
  59
  60 #define MAX_WKFM_NUM 16 /* Frame Mask Cam number for pattern match */
  61 #define MAX_WKFM_SIZE   16 /* (16 bytes for WKFM bit mask, 16*8 = 128 bits) */
  62 #define MAX_WKFM_PATTERN_SIZE   128
  63 #define WKFMCAM_ADDR_NUM 6
  64 #define WKFMCAM_SIZE 24 /* each entry need 6*4 bytes */
  65 enum pattern_type {
  66         PATTERN_BROADCAST = 0,
  67         PATTERN_MULTICAST,
  68         PATTERN_UNICAST,
  69         PATTERN_VALID,
  70         PATTERN_INVALID,
  71 };
  72
  73 typedef struct rtl_priv_pattern {
  74         int len;
  75         char content[MAX_WKFM_PATTERN_SIZE];
  76         char mask[MAX_WKFM_SIZE];
  77 } rtl_priv_pattern_t;
  78
  79 struct rtl_wow_pattern {
  80         u16     crc;
  81         u8      type;
  82         u32     mask[4];
  83 };
  84
  85 struct aoac_report {
  86         u8 iv[8];
  87         u8 replay_counter_eapol_key[8];
  88         u8 group_key[32];
  89         u8 key_index;
  90         u8 scurity_type;
  91 };
  92 #endif /* CONFIG_WOWLAN */
  93
  94 enum Power_Mgnt {
  95         PS_MODE_ACTIVE  = 0     ,
  96         PS_MODE_MIN                     ,
  97         PS_MODE_MAX                     ,
  98         PS_MODE_DTIM                    ,       /* PS_MODE_SELF_DEFINED */
  99         PS_MODE_VOIP                    ,
 100         PS_MODE_UAPSD_WMM       ,
 101         PS_MODE_UAPSD                   ,
 102         PS_MODE_IBSS                    ,
 103         PS_MODE_WWLAN           ,
 104         PM_Radio_Off                    ,
 105         PM_Card_Disable         ,
 106         PS_MODE_NUM,
 107 };
 108
 109 #ifdef CONFIG_PNO_SUPPORT
 110 #define MAX_PNO_LIST_COUNT 16
 111 #define MAX_SCAN_LIST_COUNT 14  /* 2.4G only */
 112 #define MAX_HIDDEN_AP 8         /* 8 hidden AP */
 113 #endif
 114
 115 /*
 116         BIT[2:0] = HW state
 117         BIT[3] = Protocol PS state,   0: register active state , 1: register sleep state
 118         BIT[4] = sub-state
 119 */
 120
 121 #define PS_DPS                          BIT(0)
 122 #define PS_LCLK                         (PS_DPS)
 123 #define PS_RF_OFF                       BIT(1)
 124 #define PS_ALL_ON                       BIT(2)
 125 #define PS_ST_ACTIVE            BIT(3)
 126
 127 #define PS_ISR_ENABLE           BIT(4)
 128 #define PS_IMR_ENABLE           BIT(5)
 129 #define PS_ACK                          BIT(6)
 130 #define PS_TOGGLE                       BIT(7)
 131
 132 #define PS_STATE_MASK           (0x0F)
 133 #define PS_STATE_HW_MASK        (0x07)
 134 #define PS_SEQ_MASK                     (0xc0)
 135
 136 #define PS_STATE(x)             (PS_STATE_MASK & (x))
 137 #define PS_STATE_HW(x)  (PS_STATE_HW_MASK & (x))
 138 #define PS_SEQ(x)               (PS_SEQ_MASK & (x))
 139
 140 #define PS_STATE_S0             (PS_DPS)
 141 #define PS_STATE_S1             (PS_LCLK)
 142 #define PS_STATE_S2             (PS_RF_OFF)
 143 #define PS_STATE_S3             (PS_ALL_ON)
 144 #define PS_STATE_S4             ((PS_ST_ACTIVE) | (PS_ALL_ON))
 145
 146
 147 #define PS_IS_RF_ON(x)  ((x) & (PS_ALL_ON))
 148 #define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE))
 149 #define CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
 150
 151
 152 struct reportpwrstate_parm {
 153         unsigned char mode;
 154         unsigned char state; /* the CPWM value */
 155         unsigned short rsvd;
 156 };
 157
 158
 159 typedef _sema _pwrlock;
 160
 161
 162 __inline static void _init_pwrlock(_pwrlock *plock)
 163 {
 164         _rtw_init_sema(plock, 1);
 165 }
 166
 167 __inline static void _free_pwrlock(_pwrlock *plock)
 168 {
 169         _rtw_free_sema(plock);
 170 }
 171
 172
 173 __inline static void _enter_pwrlock(_pwrlock *plock)
 174 {
 175         _rtw_down_sema(plock);
 176 }
 177
 178
 179 __inline static void _exit_pwrlock(_pwrlock *plock)
 180 {
 181         _rtw_up_sema(plock);
 182 }
 183
 184 #define LPS_DELAY_TIME  1*HZ /* 1 sec */
 185
 186 #define EXE_PWR_NONE    0x01
 187 #define EXE_PWR_IPS             0x02
 188 #define EXE_PWR_LPS             0x04
 189
 190 /* RF state. */
 191 typedef enum _rt_rf_power_state {
 192         rf_on,          /* RF is on after RFSleep or RFOff */
 193         rf_sleep,       /* 802.11 Power Save mode */
 194         rf_off,         /* HW/SW Radio OFF or Inactive Power Save */
 195         /* =====Add the new RF state above this line===== */
 196         rf_max
 197 } rt_rf_power_state;
 198
 199 /* RF Off Level for IPS or HW/SW radio off */
 200 #define RT_RF_OFF_LEVL_ASPM                     BIT(0)  /* PCI ASPM */
 201 #define RT_RF_OFF_LEVL_CLK_REQ          BIT(1)  /* PCI clock request */
 202 #define RT_RF_OFF_LEVL_PCI_D3                   BIT(2)  /* PCI D3 mode */
 203 #define RT_RF_OFF_LEVL_HALT_NIC         BIT(3)  /* NIC halt, re-initialize hw parameters */
 204 #define RT_RF_OFF_LEVL_FREE_FW          BIT(4)  /* FW free, re-download the FW */
 205 #define RT_RF_OFF_LEVL_FW_32K           BIT(5)  /* FW in 32k */
 206 #define RT_RF_PS_LEVEL_ALWAYS_ASPM      BIT(6)  /* Always enable ASPM and Clock Req in initialization. */
 207 #define RT_RF_LPS_DISALBE_2R                    BIT(30) /* When LPS is on, disable 2R if no packet is received or transmittd. */
 208 #define RT_RF_LPS_LEVEL_ASPM                    BIT(31) /* LPS with ASPM */
 209
 210 #define RT_IN_PS_LEVEL(ppsc, _PS_FLAG)          ((ppsc->cur_ps_level & _PS_FLAG) ? _TRUE : _FALSE)
 211 #define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG)       (ppsc->cur_ps_level &= (~(_PS_FLAG)))
 212 #define RT_SET_PS_LEVEL(ppsc, _PS_FLAG)         (ppsc->cur_ps_level |= _PS_FLAG)
 213
 214 /* ASPM OSC Control bit, added by Roger, 2013.03.29. */
 215 #define RT_PCI_ASPM_OSC_IGNORE          0        /* PCI ASPM ignore OSC control in default */
 216 #define RT_PCI_ASPM_OSC_ENABLE          BIT0 /* PCI ASPM controlled by OS according to ACPI Spec 5.0 */
 217 #define RT_PCI_ASPM_OSC_DISABLE         BIT1 /* PCI ASPM controlled by driver or BIOS, i.e., force enable ASPM */
 218
 219
 220 enum _PS_BBRegBackup_ {
 221         PSBBREG_RF0 = 0,
 222         PSBBREG_RF1,
 223         PSBBREG_RF2,
 224         PSBBREG_AFE0,
 225         PSBBREG_TOTALCNT
 226 };
 227
 228 enum { /* for ips_mode */
 229         IPS_NONE = 0,
 230         IPS_NORMAL,
 231         IPS_LEVEL_2,
 232         IPS_NUM
 233 };
 234
 235 /* Design for pwrctrl_priv.ips_deny, 32 bits for 32 reasons at most */
 236 typedef enum _PS_DENY_REASON {
 237         PS_DENY_DRV_INITIAL = 0,
 238         PS_DENY_SCAN,
 239         PS_DENY_JOIN,
 240         PS_DENY_DISCONNECT,
 241         PS_DENY_SUSPEND,
 242         PS_DENY_IOCTL,
 243         PS_DENY_MGNT_TX,
 244         PS_DENY_DRV_REMOVE = 30,
 245         PS_DENY_OTHERS = 31
 246 } PS_DENY_REASON;
 247
 248 #ifdef CONFIG_PNO_SUPPORT
 249 typedef struct pno_nlo_info {
 250         u32 fast_scan_period;                           /* Fast scan period */
 251         u8      ssid_num;                               /* number of entry */
 252         u8      hidden_ssid_num;
 253         u32     slow_scan_period;                       /* slow scan period */
 254         u32     fast_scan_iterations;                   /* Fast scan iterations */
 255         u8      ssid_length[MAX_PNO_LIST_COUNT];        /* SSID Length Array */
 256         u8      ssid_cipher_info[MAX_PNO_LIST_COUNT];   /* Cipher information for security */
 257         u8      ssid_channel_info[MAX_PNO_LIST_COUNT];  /* channel information */
 258         u8      loc_probe_req[MAX_HIDDEN_AP];           /* loc_probeReq */
 259 } pno_nlo_info_t;
 260
 261 typedef struct pno_ssid {
 262         u32             SSID_len;
 263         u8              SSID[32];
 264 } pno_ssid_t;
 265
 266 typedef struct pno_ssid_list {
 267         pno_ssid_t      node[MAX_PNO_LIST_COUNT];
 268 } pno_ssid_list_t;
 269
 270 typedef struct pno_scan_channel_info {
 271         u8      channel;
 272         u8      tx_power;
 273         u8      timeout;
 274         u8      active;                         /* set 1 means active scan, or pasivite scan. */
 275 } pno_scan_channel_info_t;
 276
 277 typedef struct pno_scan_info {
 278         u8      enableRFE;                      /* Enable RFE */
 279         u8      period_scan_time;               /* exclusive with fast_scan_period and slow_scan_period */
 280         u8      periodScan;                     /* exclusive with fast_scan_period and slow_scan_period */
 281         u8      orig_80_offset;                 /* original channel 80 offset */
 282         u8      orig_40_offset;                 /* original channel 40 offset */
 283         u8      orig_bw;                        /* original bandwidth */
 284         u8      orig_ch;                        /* original channel */
 285         u8      channel_num;                    /* number of channel */
 286         u64     rfe_type;                       /* rfe_type && 0x00000000000000ff */
 287         pno_scan_channel_info_t ssid_channel_info[MAX_SCAN_LIST_COUNT];
 288 } pno_scan_info_t;
 289 #endif /* CONFIG_PNO_SUPPORT */
 290
 291 #ifdef CONFIG_LPS_POFF
 292 /* Driver context for LPS 32K Close IO Power */
 293 typedef struct lps_poff_info {
 294         bool    bEn;
 295         u8      *pStaticFile;
 296         u8      *pDynamicFile;
 297         u32     ConfFileOffset;
 298         u32     tx_bndy_static;
 299         u32     tx_bndy_dynamic;
 300         u16     ConfLenForPTK;
 301         u16     ConfLenForGTK;
 302         ATOMIC_T bEnterPOFF;
 303         ATOMIC_T bTxBoundInProgress;
 304         ATOMIC_T bSetPOFFParm;
 305 } lps_poff_info_t;
 306 #endif /*CONFIG_LPS_POFF*/
 307
 308 struct pwrctrl_priv {
 309         _pwrlock        lock;
 310         _pwrlock        check_32k_lock;
 311         volatile u8 rpwm; /* requested power state for fw */
 312         volatile u8 cpwm; /* fw current power state. updated when 1. read from HCPWM 2. driver lowers power level */
 313         volatile u8 tog; /* toggling */
 314         volatile u8 cpwm_tog; /* toggling */
 315
 316         u8      pwr_mode;
 317         u8      smart_ps;
 318         u8      bcn_ant_mode;
 319         u8      dtim;
 320
 321         u32     alives;
 322         _workitem cpwm_event;
 323 #ifdef CONFIG_LPS_RPWM_TIMER
 324         u8 brpwmtimeout;
 325         _workitem rpwmtimeoutwi;
 326         _timer pwr_rpwm_timer;
 327 #endif /* CONFIG_LPS_RPWM_TIMER */
 328         u8      bpower_saving; /* for LPS/IPS */
 329
 330         u8      b_hw_radio_off;
 331         u8      reg_rfoff;
 332         u8      reg_pdnmode; /* powerdown mode */
 333         u32     rfoff_reason;
 334
 335         /* RF OFF Level */
 336         u32     cur_ps_level;
 337         u32     reg_rfps_level;
 338
 339         uint    ips_enter_cnts;
 340         uint    ips_leave_cnts;
 341         uint    lps_enter_cnts;
 342         uint    lps_leave_cnts;
 343
 344         u8      ips_mode;
 345         u8      ips_org_mode;
 346         u8      ips_mode_req; /* used to accept the mode setting request, will update to ipsmode later */
 347         uint bips_processing;
 348         u32 ips_deny_time; /* will deny IPS when system time is smaller than this */
 349         u8 pre_ips_type;/* 0: default flow, 1: carddisbale flow */
 350
 351         /* ps_deny: if 0, power save is free to go; otherwise deny all kinds of power save. */
 352         /* Use PS_DENY_REASON to decide reason. */
 353         /* Don't access this variable directly without control function, */
 354         /* and this variable should be protected by lock. */
 355         u32 ps_deny;
 356
 357         u8 ps_processing; /* temporarily used to mark whether in rtw_ps_processor */
 358
 359         u8 fw_psmode_iface_id;
 360         u8      bLeisurePs;
 361         u8      LpsIdleCount;
 362         u8      power_mgnt;
 363         u8      org_power_mgnt;
 364         u8      bFwCurrentInPSMode;
 365         u32     DelayLPSLastTimeStamp;
 366         s32             pnp_current_pwr_state;
 367         u8              pnp_bstop_trx;
 368
 369
 370         u8              bInternalAutoSuspend;
 371         u8              bInSuspend;
 372 #ifdef CONFIG_BT_COEXIST
 373         u8              bAutoResume;
 374         u8              autopm_cnt;
 375 #endif
 376         u8              bSupportRemoteWakeup;
 377         u8              wowlan_wake_reason;
 378         u8              wowlan_last_wake_reason;
 379         u8              wowlan_ap_mode;
 380         u8              wowlan_mode;
 381         u8              wowlan_p2p_mode;
 382         u8              wowlan_pno_enable;
 383 #ifdef CONFIG_GPIO_WAKEUP
 384         u8              is_high_active;
 385 #endif /* CONFIG_GPIO_WAKEUP */
 386 #ifdef CONFIG_WOWLAN
 387         u8              wowlan_txpause_status;
 388         u8              wowlan_pattern_idx;
 389         u8              wowlan_in_resume;
 390         u64             wowlan_fw_iv;
 391         struct rtl_priv_pattern patterns[MAX_WKFM_NUM];
 392         struct aoac_report wowlan_aoac_rpt;
 393         u8              wowlan_aoac_rpt_loc;
 394 #ifdef CONFIG_PNO_SUPPORT
 395         u8              pno_inited;
 396         pno_nlo_info_t  *pnlo_info;
 397         pno_scan_info_t *pscan_info;
 398         pno_ssid_list_t *pno_ssid_list;
 399 #endif /* CONFIG_PNO_SUPPORT */
 400 #endif /* CONFIG_WOWLAN */
 401         _timer  pwr_state_check_timer;
 402         int             pwr_state_check_interval;
 403         u8              pwr_state_check_cnts;
 404
 405         int             ps_flag; /* used by autosuspend */
 406
 407         rt_rf_power_state       rf_pwrstate;/* cur power state, only for IPS */
 408         /* rt_rf_power_state    current_rfpwrstate; */
 409         rt_rf_power_state       change_rfpwrstate;
 410
 411         u8              bHWPowerdown; /* power down mode selection. 0:radio off, 1:power down */
 412         u8              bHWPwrPindetect; /* come from registrypriv.hwpwrp_detect. enable power down function. 0:disable, 1:enable */
 413         u8              bkeepfwalive;
 414         u8              brfoffbyhw;
 415         unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
 416
 417 #ifdef CONFIG_RESUME_IN_WORKQUEUE
 418         struct workqueue_struct *rtw_workqueue;
 419         _workitem resume_work;
 420 #endif
 421
 422 #ifdef CONFIG_HAS_EARLYSUSPEND
 423         struct early_suspend early_suspend;
 424         u8 do_late_resume;
 425 #endif /* CONFIG_HAS_EARLYSUSPEND */
 426
 427 #ifdef CONFIG_ANDROID_POWER
 428         android_early_suspend_t early_suspend;
 429         u8 do_late_resume;
 430 #endif
 431
 432 #ifdef CONFIG_INTEL_PROXIM
 433         u8      stored_power_mgnt;
 434 #endif
 435
 436 #ifdef CONFIG_LPS_POFF
 437         lps_poff_info_t *plps_poff_info;
 438 #endif
 439
 440 #ifdef CONFIG_LPS_PG
 441         u8 lpspg_rsvd_page_locate;
 442         u8 blpspg_info_up;
 443 #endif
 444 };
 445
 446 #define rtw_get_ips_mode_req(pwrctl) \
 447         (pwrctl)->ips_mode_req
 448
 449 #define rtw_ips_mode_req(pwrctl, ips_mode) \
 450         (pwrctl)->ips_mode_req = (ips_mode)
 451
 452 #define RTW_PWR_STATE_CHK_INTERVAL 2000
 453
 454 #define _rtw_set_pwr_state_check_timer(pwrctl, ms) \
 455         do { \
 456                 /*RTW_INFO("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __FUNCTION__, (pwrctl), (ms));*/ \
 457                 _set_timer(&(pwrctl)->pwr_state_check_timer, (ms)); \
 458         } while (0)
 459
 460 #define rtw_set_pwr_state_check_timer(pwrctl) \
 461         _rtw_set_pwr_state_check_timer((pwrctl), (pwrctl)->pwr_state_check_interval)
 462
 463 extern void rtw_init_pwrctrl_priv(_adapter *adapter);
 464 extern void rtw_free_pwrctrl_priv(_adapter *adapter);
 465
 466 #ifdef CONFIG_LPS_LCLK
 467 s32 rtw_register_task_alive(PADAPTER, u32 task);
 468 void rtw_unregister_task_alive(PADAPTER, u32 task);
 469 extern s32 rtw_register_tx_alive(PADAPTER padapter);
 470 extern void rtw_unregister_tx_alive(PADAPTER padapter);
 471 extern s32 rtw_register_rx_alive(PADAPTER padapter);
 472 extern void rtw_unregister_rx_alive(PADAPTER padapter);
 473 extern s32 rtw_register_cmd_alive(PADAPTER padapter);
 474 extern void rtw_unregister_cmd_alive(PADAPTER padapter);
 475 extern s32 rtw_register_evt_alive(PADAPTER padapter);
 476 extern void rtw_unregister_evt_alive(PADAPTER padapter);
 477 extern void cpwm_int_hdl(PADAPTER padapter, struct reportpwrstate_parm *preportpwrstate);
 478 extern void LPS_Leave_check(PADAPTER padapter);
 479 #endif
 480
 481 extern void LeaveAllPowerSaveMode(PADAPTER Adapter);
 482 extern void LeaveAllPowerSaveModeDirect(PADAPTER Adapter);
 483 #ifdef CONFIG_IPS
 484 void _ips_enter(_adapter *padapter);
 485 void ips_enter(_adapter *padapter);
 486 int _ips_leave(_adapter *padapter);
 487 int ips_leave(_adapter *padapter);
 488 #endif
 489
 490 void rtw_ps_processor(_adapter *padapter);
 491
 492 #ifdef CONFIG_AUTOSUSPEND
 493 int autoresume_enter(_adapter *padapter);
 494 #endif
 495 #ifdef SUPPORT_HW_RFOFF_DETECTED
 496 rt_rf_power_state RfOnOffDetect(IN      PADAPTER pAdapter);
 497 #endif
 498
 499
 500 int rtw_fw_ps_state(PADAPTER padapter);
 501
 502 #ifdef CONFIG_LPS
 503 s32 LPS_RF_ON_check(PADAPTER padapter, u32 delay_ms);
 504 void LPS_Enter(PADAPTER padapter, const char *msg);
 505 void LPS_Leave(PADAPTER padapter, const char *msg);
 506 void traffic_check_for_leave_lps(PADAPTER padapter, u8 tx, u32 tx_packets);
 507 void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode, const char *msg);
 508 void rtw_set_fw_in_ips_mode(PADAPTER padapter, u8 enable);
 509 void rtw_set_rpwm(_adapter *padapter, u8 val8);
 510 #endif
 511
 512 #ifdef CONFIG_RESUME_IN_WORKQUEUE
 513 void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv);
 514 #endif /* CONFIG_RESUME_IN_WORKQUEUE */
 515
 516 #if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER)
 517 bool rtw_is_earlysuspend_registered(struct pwrctrl_priv *pwrpriv);
 518 bool rtw_is_do_late_resume(struct pwrctrl_priv *pwrpriv);
 519 void rtw_set_do_late_resume(struct pwrctrl_priv *pwrpriv, bool enable);
 520 void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv);
 521 void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv);
 522 #else
 523 #define rtw_is_earlysuspend_registered(pwrpriv) _FALSE
 524 #define rtw_is_do_late_resume(pwrpriv) _FALSE
 525 #define rtw_set_do_late_resume(pwrpriv, enable) do {} while (0)
 526 #define rtw_register_early_suspend(pwrpriv) do {} while (0)
 527 #define rtw_unregister_early_suspend(pwrpriv) do {} while (0)
 528 #endif /* CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER */
 529
 530 u8 rtw_interface_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val);
 531 void rtw_set_ips_deny(_adapter *padapter, u32 ms);
 532 int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller);
 533 #define rtw_pwr_wakeup(adapter) _rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __FUNCTION__)
 534 #define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) _rtw_pwr_wakeup(adapter, ips_deffer_ms, __FUNCTION__)
 535 int rtw_pm_set_ips(_adapter *padapter, u8 mode);
 536 int rtw_pm_set_lps(_adapter *padapter, u8 mode);
 537
 538 void rtw_ps_deny(PADAPTER padapter, PS_DENY_REASON reason);
 539 void rtw_ps_deny_cancel(PADAPTER padapter, PS_DENY_REASON reason);
 540 u32 rtw_ps_deny_get(PADAPTER padapter);
 541
 542 #if defined(CONFIG_WOWLAN)
 543 void rtw_get_current_ip_address(PADAPTER padapter, u8 *pcurrentip);
 544 void rtw_get_sec_iv(PADAPTER padapter, u8 *pcur_dot11txpn, u8 *StaAddr);
 545 bool rtw_check_pattern_valid(u8 *input, u8 len);
 546 bool rtw_write_to_frame_mask(_adapter *adapter, u8 idx,
 547                              struct rtl_wow_pattern *content);
 548
 549 bool rtw_read_from_frame_mask(_adapter *adapter, u8 idx);
 550 bool rtw_wowlan_parser_pattern_cmd(u8 *input, char *pattern,
 551                                 int *pattern_len, char *bit_mask);
 552 u8 rtw_set_default_pattern(_adapter *adapter);
 553 void rtw_dump_priv_pattern(_adapter *adapter, u8 idx);
 554 void rtw_clean_pattern(_adapter *adapter);
 555 #endif /* CONFIG_WOWLAN */
 556 #endif /* __RTL871X_PWRCTRL_H_ */