drivers/net/wireless/rtl8180_dev.c

   1
   2 /*
   3  * Linux device driver for RTL8180 / RTL8185
   4  *
   5  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   6  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   7  *
   8  * Based on the r8180 driver, which is:
   9  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  10  *
  11  * Thanks to Realtek for their support!
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/pci.h>
  20 #include <linux/delay.h>
  21 #include <linux/etherdevice.h>
  22 #include <linux/eeprom_93cx6.h>
  23 #include <net/mac80211.h>
  24
  25 #include "rtl8180.h"
  26 #include "rtl8180_rtl8225.h"
  27 #include "rtl8180_sa2400.h"
  28 #include "rtl8180_max2820.h"
  29 #include "rtl8180_grf5101.h"
  30
  31 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  32 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  33 MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver");
  34 MODULE_LICENSE("GPL");
  35
  36 static struct pci_device_id rtl8180_table[] __devinitdata = {
  37         /* rtl8185 */
  38         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
  39         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) },
  40
  41         /* rtl8180 */
  42         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) },
  43         { PCI_DEVICE(0x1799, 0x6001) },
  44         { PCI_DEVICE(0x1799, 0x6020) },
  45         { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) },
  46         { }
  47 };
  48
  49 MODULE_DEVICE_TABLE(pci, rtl8180_table);
  50
  51 void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  52 {
  53         struct rtl8180_priv *priv = dev->priv;
  54         int i = 10;
  55         u32 buf;
  56
  57         buf = (data << 8) | addr;
  58
  59         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80);
  60         while (i--) {
  61                 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf);
  62                 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
  63                         return;
  64         }
  65 }
  66
  67 static void rtl8180_handle_rx(struct ieee80211_hw *dev)
  68 {
  69         struct rtl8180_priv *priv = dev->priv;
  70         unsigned int count = 32;
  71
  72         while (count--) {
  73                 struct rtl8180_rx_desc *entry = &priv->rx_ring[priv->rx_idx];
  74                 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
  75                 u32 flags = le32_to_cpu(entry->flags);
  76
  77                 if (flags & RTL8180_RX_DESC_FLAG_OWN)
  78                         return;
  79
  80                 if (unlikely(flags & (RTL8180_RX_DESC_FLAG_DMA_FAIL |
  81                                       RTL8180_RX_DESC_FLAG_FOF |
  82                                       RTL8180_RX_DESC_FLAG_RX_ERR)))
  83                         goto done;
  84                 else {
  85                         u32 flags2 = le32_to_cpu(entry->flags2);
  86                         struct ieee80211_rx_status rx_status = {0};
  87                         struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE);
  88
  89                         if (unlikely(!new_skb))
  90                                 goto done;
  91
  92                         pci_unmap_single(priv->pdev,
  93                                          *((dma_addr_t *)skb->cb),
  94                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
  95                         skb_put(skb, flags & 0xFFF);
  96
  97                         rx_status.antenna = (flags2 >> 15) & 1;
  98                         /* TODO: improve signal/rssi reporting */
  99                         rx_status.signal = flags2 & 0xFF;
 100                         rx_status.ssi = (flags2 >> 8) & 0x7F;
 101                         rx_status.rate = (flags >> 20) & 0xF;
 102                         rx_status.freq = dev->conf.freq;
 103                         rx_status.channel = dev->conf.channel;
 104                         rx_status.phymode = dev->conf.phymode;
 105                         rx_status.mactime = le64_to_cpu(entry->tsft);
 106                         rx_status.flag |= RX_FLAG_TSFT;
 107                         if (flags & RTL8180_RX_DESC_FLAG_CRC32_ERR)
 108                                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 109
 110                         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 111
 112                         skb = new_skb;
 113                         priv->rx_buf[priv->rx_idx] = skb;
 114                         *((dma_addr_t *) skb->cb) =
 115                                 pci_map_single(priv->pdev, skb_tail_pointer(skb),
 116                                                MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 117                 }
 118
 119         done:
 120                 entry->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
 121                 entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
 122                                            MAX_RX_SIZE);
 123                 if (priv->rx_idx == 31)
 124                         entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
 125                 priv->rx_idx = (priv->rx_idx + 1) % 32;
 126         }
 127 }
 128
 129 static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
 130 {
 131         struct rtl8180_priv *priv = dev->priv;
 132         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 133
 134         while (skb_queue_len(&ring->queue)) {
 135                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 136                 struct sk_buff *skb;
 137                 struct ieee80211_tx_status status = { {0} };
 138                 struct ieee80211_tx_control *control;
 139                 u32 flags = le32_to_cpu(entry->flags);
 140
 141                 if (flags & RTL8180_TX_DESC_FLAG_OWN)
 142                         return;
 143
 144                 ring->idx = (ring->idx + 1) % ring->entries;
 145                 skb = __skb_dequeue(&ring->queue);
 146                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 147                                  skb->len, PCI_DMA_TODEVICE);
 148
 149                 control = *((struct ieee80211_tx_control **)skb->cb);
 150                 if (control)
 151                         memcpy(&status.control, control, sizeof(*control));
 152                 kfree(control);
 153
 154                 if (!(status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
 155                         if (flags & RTL8180_TX_DESC_FLAG_TX_OK)
 156                                 status.flags = IEEE80211_TX_STATUS_ACK;
 157                         else
 158                                 status.excessive_retries = 1;
 159                 }
 160                 status.retry_count = flags & 0xFF;
 161
 162                 ieee80211_tx_status_irqsafe(dev, skb, &status);
 163                 if (ring->entries - skb_queue_len(&ring->queue) == 2)
 164                         ieee80211_wake_queue(dev, prio);
 165         }
 166 }
 167
 168 static irqreturn_t rtl8180_interrupt(int irq, void *dev_id)
 169 {
 170         struct ieee80211_hw *dev = dev_id;
 171         struct rtl8180_priv *priv = dev->priv;
 172         u16 reg;
 173
 174         spin_lock(&priv->lock);
 175         reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
 176         if (unlikely(reg == 0xFFFF)) {
 177                 spin_unlock(&priv->lock);
 178                 return IRQ_HANDLED;
 179         }
 180
 181         rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
 182
 183         if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR))
 184                 rtl8180_handle_tx(dev, 3);
 185
 186         if (reg & (RTL818X_INT_TXH_OK | RTL818X_INT_TXH_ERR))
 187                 rtl8180_handle_tx(dev, 2);
 188
 189         if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR))
 190                 rtl8180_handle_tx(dev, 1);
 191
 192         if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR))
 193                 rtl8180_handle_tx(dev, 0);
 194
 195         if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
 196                 rtl8180_handle_rx(dev);
 197
 198         spin_unlock(&priv->lock);
 199
 200         return IRQ_HANDLED;
 201 }
 202
 203 static int rtl8180_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
 204                       struct ieee80211_tx_control *control)
 205 {
 206         struct rtl8180_priv *priv = dev->priv;
 207         struct rtl8180_tx_ring *ring;
 208         struct rtl8180_tx_desc *entry;
 209         unsigned long flags;
 210         unsigned int idx, prio;
 211         dma_addr_t mapping;
 212         u32 tx_flags;
 213         u16 plcp_len = 0;
 214         __le16 rts_duration = 0;
 215
 216         prio = control->queue;
 217         ring = &priv->tx_ring[prio];
 218
 219         mapping = pci_map_single(priv->pdev, skb->data,
 220                                  skb->len, PCI_DMA_TODEVICE);
 221
 222         tx_flags = RTL8180_TX_DESC_FLAG_OWN | RTL8180_TX_DESC_FLAG_FS |
 223                    RTL8180_TX_DESC_FLAG_LS | (control->tx_rate << 24) |
 224                    (control->rts_cts_rate << 19) | skb->len;
 225
 226         if (priv->r8185)
 227                 tx_flags |= RTL8180_TX_DESC_FLAG_DMA |
 228                             RTL8180_TX_DESC_FLAG_NO_ENC;
 229
 230         if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
 231                 tx_flags |= RTL8180_TX_DESC_FLAG_RTS;
 232         else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
 233                 tx_flags |= RTL8180_TX_DESC_FLAG_CTS;
 234
 235         *((struct ieee80211_tx_control **) skb->cb) =
 236                 kmemdup(control, sizeof(*control), GFP_ATOMIC);
 237
 238         if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
 239                 rts_duration = ieee80211_rts_duration(dev, priv->if_id, skb->len, control);
 240
 241         if (!priv->r8185) {
 242                 unsigned int remainder;
 243
 244                 plcp_len = DIV_ROUND_UP(16 * (skb->len + 4),
 245                                         (control->rate->rate * 2) / 10);
 246                 remainder = (16 * (skb->len + 4)) %
 247                             ((control->rate->rate * 2) / 10);
 248                 if (remainder > 0 && remainder <= 6)
 249                         plcp_len |= 1 << 15;
 250         }
 251
 252         spin_lock_irqsave(&priv->lock, flags);
 253         idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
 254         entry = &ring->desc[idx];
 255
 256         entry->rts_duration = rts_duration;
 257         entry->plcp_len = cpu_to_le16(plcp_len);
 258         entry->tx_buf = cpu_to_le32(mapping);
 259         entry->frame_len = cpu_to_le32(skb->len);
 260         entry->flags2 = control->alt_retry_rate != -1 ?
 261                         control->alt_retry_rate << 4 : 0;
 262         entry->retry_limit = control->retry_limit;
 263         entry->flags = cpu_to_le32(tx_flags);
 264         __skb_queue_tail(&ring->queue, skb);
 265         if (ring->entries - skb_queue_len(&ring->queue) < 2)
 266                 ieee80211_stop_queue(dev, control->queue);
 267         spin_unlock_irqrestore(&priv->lock, flags);
 268
 269         rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << (prio + 4)));
 270
 271         return 0;
 272 }
 273
 274 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
 275 {
 276         u8 reg;
 277
 278         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 279         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 280         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 281                  reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 282         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
 283         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 284                  reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 285         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 286 }
 287
 288 static int rtl8180_init_hw(struct ieee80211_hw *dev)
 289 {
 290         struct rtl8180_priv *priv = dev->priv;
 291         u16 reg;
 292
 293         rtl818x_iowrite8(priv, &priv->map->CMD, 0);
 294         rtl818x_ioread8(priv, &priv->map->CMD);
 295         msleep(10);
 296
 297         /* reset */
 298         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 299         rtl818x_ioread8(priv, &priv->map->CMD);
 300
 301         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 302         reg &= (1 << 1);
 303         reg |= RTL818X_CMD_RESET;
 304         rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
 305         rtl818x_ioread8(priv, &priv->map->CMD);
 306         msleep(200);
 307
 308         /* check success of reset */
 309         if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
 310                 printk(KERN_ERR "%s: reset timeout!\n", wiphy_name(dev->wiphy));
 311                 return -ETIMEDOUT;
 312         }
 313
 314         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 315         rtl818x_ioread8(priv, &priv->map->CMD);
 316         msleep(200);
 317
 318         if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
 319                 /* For cardbus */
 320                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 321                 reg |= 1 << 1;
 322                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 323                 reg = rtl818x_ioread16(priv, &priv->map->FEMR);
 324                 reg |= (1 << 15) | (1 << 14) | (1 << 4);
 325                 rtl818x_iowrite16(priv, &priv->map->FEMR, reg);
 326         }
 327
 328         rtl818x_iowrite8(priv, &priv->map->MSR, 0);
 329
 330         if (!priv->r8185)
 331                 rtl8180_set_anaparam(priv, priv->anaparam);
 332
 333         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 334         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 335         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 336         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 337         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 338
 339         /* TODO: necessary? specs indicate not */
 340         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 341         reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 342         rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
 343         if (priv->r8185) {
 344                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 345                 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
 346         }
 347         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 348
 349         /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
 350
 351         /* TODO: turn off hw wep on rtl8180 */
 352
 353         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 354
 355         if (priv->r8185) {
 356                 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 357                 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 358                 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 359
 360                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 361
 362                 /* TODO: set ClkRun enable? necessary? */
 363                 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
 364                 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
 365                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 366                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 367                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
 368                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 369         } else {
 370                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1);
 371                 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
 372
 373                 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
 374                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
 375         }
 376
 377         priv->rf->init(dev);
 378         if (priv->r8185)
 379                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 380         return 0;
 381 }
 382
 383 static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
 384 {
 385         struct rtl8180_priv *priv = dev->priv;
 386         struct rtl8180_rx_desc *entry;
 387         int i;
 388
 389         priv->rx_ring = pci_alloc_consistent(priv->pdev,
 390                                              sizeof(*priv->rx_ring) * 32,
 391                                              &priv->rx_ring_dma);
 392
 393         if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
 394                 printk(KERN_ERR "%s: Cannot allocate RX ring\n",
 395                        wiphy_name(dev->wiphy));
 396                 return -ENOMEM;
 397         }
 398
 399         memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * 32);
 400         priv->rx_idx = 0;
 401
 402         for (i = 0; i < 32; i++) {
 403                 struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE);
 404                 dma_addr_t *mapping;
 405                 entry = &priv->rx_ring[i];
 406                 if (!skb)
 407                         return 0;
 408
 409                 priv->rx_buf[i] = skb;
 410                 mapping = (dma_addr_t *)skb->cb;
 411                 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
 412                                           MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 413                 entry->rx_buf = cpu_to_le32(*mapping);
 414                 entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
 415                                            MAX_RX_SIZE);
 416         }
 417         entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
 418         return 0;
 419 }
 420
 421 static void rtl8180_free_rx_ring(struct ieee80211_hw *dev)
 422 {
 423         struct rtl8180_priv *priv = dev->priv;
 424         int i;
 425
 426         for (i = 0; i < 32; i++) {
 427                 struct sk_buff *skb = priv->rx_buf[i];
 428                 if (!skb)
 429                         continue;
 430
 431                 pci_unmap_single(priv->pdev,
 432                                  *((dma_addr_t *)skb->cb),
 433                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 434                 kfree_skb(skb);
 435         }
 436
 437         pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * 32,
 438                             priv->rx_ring, priv->rx_ring_dma);
 439         priv->rx_ring = NULL;
 440 }
 441
 442 static int rtl8180_init_tx_ring(struct ieee80211_hw *dev,
 443                                 unsigned int prio, unsigned int entries)
 444 {
 445         struct rtl8180_priv *priv = dev->priv;
 446         struct rtl8180_tx_desc *ring;
 447         dma_addr_t dma;
 448         int i;
 449
 450         ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
 451         if (!ring || (unsigned long)ring & 0xFF) {
 452                 printk(KERN_ERR "%s: Cannot allocate TX ring (prio = %d)\n",
 453                        wiphy_name(dev->wiphy), prio);
 454                 return -ENOMEM;
 455         }
 456
 457         memset(ring, 0, sizeof(*ring)*entries);
 458         priv->tx_ring[prio].desc = ring;
 459         priv->tx_ring[prio].dma = dma;
 460         priv->tx_ring[prio].idx = 0;
 461         priv->tx_ring[prio].entries = entries;
 462         skb_queue_head_init(&priv->tx_ring[prio].queue);
 463
 464         for (i = 0; i < entries; i++)
 465                 ring[i].next_tx_desc =
 466                         cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
 467
 468         return 0;
 469 }
 470
 471 static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio)
 472 {
 473         struct rtl8180_priv *priv = dev->priv;
 474         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 475
 476         while (skb_queue_len(&ring->queue)) {
 477                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 478                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
 479
 480                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 481                                  skb->len, PCI_DMA_TODEVICE);
 482                 kfree(*((struct ieee80211_tx_control **) skb->cb));
 483                 kfree_skb(skb);
 484                 ring->idx = (ring->idx + 1) % ring->entries;
 485         }
 486
 487         pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
 488                             ring->desc, ring->dma);
 489         ring->desc = NULL;
 490 }
 491
 492 static int rtl8180_start(struct ieee80211_hw *dev)
 493 {
 494         struct rtl8180_priv *priv = dev->priv;
 495         int ret, i;
 496         u32 reg;
 497
 498         ret = rtl8180_init_rx_ring(dev);
 499         if (ret)
 500                 return ret;
 501
 502         for (i = 0; i < 4; i++)
 503                 if ((ret = rtl8180_init_tx_ring(dev, i, 16)))
 504                         goto err_free_rings;
 505
 506         ret = rtl8180_init_hw(dev);
 507         if (ret)
 508                 goto err_free_rings;
 509
 510         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 511         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 512         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 513         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 514         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 515
 516         ret = request_irq(priv->pdev->irq, &rtl8180_interrupt,
 517                           IRQF_SHARED, KBUILD_MODNAME, dev);
 518         if (ret) {
 519                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 520                        wiphy_name(dev->wiphy));
 521                 goto err_free_rings;
 522         }
 523
 524         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 525
 526         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 527         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 528
 529         reg = RTL818X_RX_CONF_ONLYERLPKT |
 530               RTL818X_RX_CONF_RX_AUTORESETPHY |
 531               RTL818X_RX_CONF_MGMT |
 532               RTL818X_RX_CONF_DATA |
 533               (7 << 8 /* MAX RX DMA */) |
 534               RTL818X_RX_CONF_BROADCAST |
 535               RTL818X_RX_CONF_NICMAC;
 536
 537         if (priv->r8185)
 538                 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
 539         else {
 540                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
 541                         ? RTL818X_RX_CONF_CSDM1 : 0;
 542                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
 543                         ? RTL818X_RX_CONF_CSDM2 : 0;
 544         }
 545
 546         priv->rx_conf = reg;
 547         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 548
 549         if (priv->r8185) {
 550                 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 551                 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 552                 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 553                 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 554
 555                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 556                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 557                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 558                 reg |=  RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 559                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 560
 561                 /* disable early TX */
 562                 rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f);
 563         }
 564
 565         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 566         reg |= (6 << 21 /* MAX TX DMA */) |
 567                RTL818X_TX_CONF_NO_ICV;
 568
 569         if (priv->r8185)
 570                 reg &= ~RTL818X_TX_CONF_PROBE_DTS;
 571         else
 572                 reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
 573
 574         /* different meaning, same value on both rtl8185 and rtl8180 */
 575         reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
 576
 577         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 578
 579         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 580         reg |= RTL818X_CMD_RX_ENABLE;
 581         reg |= RTL818X_CMD_TX_ENABLE;
 582         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 583
 584         priv->mode = IEEE80211_IF_TYPE_MNTR;
 585         return 0;
 586
 587  err_free_rings:
 588         rtl8180_free_rx_ring(dev);
 589         for (i = 0; i < 4; i++)
 590                 if (priv->tx_ring[i].desc)
 591                         rtl8180_free_tx_ring(dev, i);
 592
 593         return ret;
 594 }
 595
 596 static void rtl8180_stop(struct ieee80211_hw *dev)
 597 {
 598         struct rtl8180_priv *priv = dev->priv;
 599         u8 reg;
 600         int i;
 601
 602         priv->mode = IEEE80211_IF_TYPE_INVALID;
 603
 604         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 605
 606         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 607         reg &= ~RTL818X_CMD_TX_ENABLE;
 608         reg &= ~RTL818X_CMD_RX_ENABLE;
 609         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 610
 611         priv->rf->stop(dev);
 612
 613         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 614         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 615         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 616         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 617
 618         free_irq(priv->pdev->irq, dev);
 619
 620         rtl8180_free_rx_ring(dev);
 621         for (i = 0; i < 4; i++)
 622                 rtl8180_free_tx_ring(dev, i);
 623 }
 624
 625 static int rtl8180_add_interface(struct ieee80211_hw *dev,
 626                                  struct ieee80211_if_init_conf *conf)
 627 {
 628         struct rtl8180_priv *priv = dev->priv;
 629
 630         if (priv->mode != IEEE80211_IF_TYPE_MNTR)
 631                 return -EOPNOTSUPP;
 632
 633         switch (conf->type) {
 634         case IEEE80211_IF_TYPE_STA:
 635                 priv->mode = conf->type;
 636                 break;
 637         default:
 638                 return -EOPNOTSUPP;
 639         }
 640
 641         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 642         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
 643                           cpu_to_le32(*(u32 *)conf->mac_addr));
 644         rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
 645                           cpu_to_le16(*(u16 *)(conf->mac_addr + 4)));
 646         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 647
 648         return 0;
 649 }
 650
 651 static void rtl8180_remove_interface(struct ieee80211_hw *dev,
 652                                      struct ieee80211_if_init_conf *conf)
 653 {
 654         struct rtl8180_priv *priv = dev->priv;
 655         priv->mode = IEEE80211_IF_TYPE_MNTR;
 656 }
 657
 658 static int rtl8180_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
 659 {
 660         struct rtl8180_priv *priv = dev->priv;
 661
 662         priv->rf->set_chan(dev, conf);
 663
 664         return 0;
 665 }
 666
 667 static int rtl8180_config_interface(struct ieee80211_hw *dev, int if_id,
 668                                     struct ieee80211_if_conf *conf)
 669 {
 670         struct rtl8180_priv *priv = dev->priv;
 671         int i;
 672
 673         priv->if_id = if_id;
 674
 675         for (i = 0; i < ETH_ALEN; i++)
 676                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
 677
 678         if (is_valid_ether_addr(conf->bssid))
 679                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
 680         else
 681                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
 682
 683         return 0;
 684 }
 685
 686 static void rtl8180_configure_filter(struct ieee80211_hw *dev,
 687                                      unsigned int changed_flags,
 688                                      unsigned int *total_flags,
 689                                      int mc_count, struct dev_addr_list *mclist)
 690 {
 691         struct rtl8180_priv *priv = dev->priv;
 692
 693         if (changed_flags & FIF_FCSFAIL)
 694                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
 695         if (changed_flags & FIF_CONTROL)
 696                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
 697         if (changed_flags & FIF_OTHER_BSS)
 698                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
 699         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
 700                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
 701         else
 702                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
 703
 704         *total_flags = 0;
 705
 706         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
 707                 *total_flags |= FIF_FCSFAIL;
 708         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
 709                 *total_flags |= FIF_CONTROL;
 710         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
 711                 *total_flags |= FIF_OTHER_BSS;
 712         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
 713                 *total_flags |= FIF_ALLMULTI;
 714
 715         rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
 716 }
 717
 718 static const struct ieee80211_ops rtl8180_ops = {
 719         .tx                     = rtl8180_tx,
 720         .start                  = rtl8180_start,
 721         .stop                   = rtl8180_stop,
 722         .add_interface          = rtl8180_add_interface,
 723         .remove_interface       = rtl8180_remove_interface,
 724         .config                 = rtl8180_config,
 725         .config_interface       = rtl8180_config_interface,
 726         .configure_filter       = rtl8180_configure_filter,
 727 };
 728
 729 static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
 730 {
 731         struct ieee80211_hw *dev = eeprom->data;
 732         struct rtl8180_priv *priv = dev->priv;
 733         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 734
 735         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
 736         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
 737         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
 738         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
 739 }
 740
 741 static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom)
 742 {
 743         struct ieee80211_hw *dev = eeprom->data;
 744         struct rtl8180_priv *priv = dev->priv;
 745         u8 reg = 2 << 6;
 746
 747         if (eeprom->reg_data_in)
 748                 reg |= RTL818X_EEPROM_CMD_WRITE;
 749         if (eeprom->reg_data_out)
 750                 reg |= RTL818X_EEPROM_CMD_READ;
 751         if (eeprom->reg_data_clock)
 752                 reg |= RTL818X_EEPROM_CMD_CK;
 753         if (eeprom->reg_chip_select)
 754                 reg |= RTL818X_EEPROM_CMD_CS;
 755
 756         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
 757         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 758         udelay(10);
 759 }
 760
 761 static int __devinit rtl8180_probe(struct pci_dev *pdev,
 762                                    const struct pci_device_id *id)
 763 {
 764         struct ieee80211_hw *dev;
 765         struct rtl8180_priv *priv;
 766         unsigned long mem_addr, mem_len;
 767         unsigned int io_addr, io_len;
 768         int err, i;
 769         struct eeprom_93cx6 eeprom;
 770         const char *chip_name, *rf_name = NULL;
 771         u32 reg;
 772         u16 eeprom_val;
 773         DECLARE_MAC_BUF(mac);
 774
 775         err = pci_enable_device(pdev);
 776         if (err) {
 777                 printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n",
 778                        pci_name(pdev));
 779                 return err;
 780         }
 781
 782         err = pci_request_regions(pdev, KBUILD_MODNAME);
 783         if (err) {
 784                 printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n",
 785                        pci_name(pdev));
 786                 return err;
 787         }
 788
 789         io_addr = pci_resource_start(pdev, 0);
 790         io_len = pci_resource_len(pdev, 0);
 791         mem_addr = pci_resource_start(pdev, 1);
 792         mem_len = pci_resource_len(pdev, 1);
 793
 794         if (mem_len < sizeof(struct rtl818x_csr) ||
 795             io_len < sizeof(struct rtl818x_csr)) {
 796                 printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n",
 797                        pci_name(pdev));
 798                 err = -ENOMEM;
 799                 goto err_free_reg;
 800         }
 801
 802         if ((err = pci_set_dma_mask(pdev, 0xFFFFFF00ULL)) ||
 803             (err = pci_set_consistent_dma_mask(pdev, 0xFFFFFF00ULL))) {
 804                 printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n",
 805                        pci_name(pdev));
 806                 goto err_free_reg;
 807         }
 808
 809         pci_set_master(pdev);
 810
 811         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops);
 812         if (!dev) {
 813                 printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n",
 814                        pci_name(pdev));
 815                 err = -ENOMEM;
 816                 goto err_free_reg;
 817         }
 818
 819         priv = dev->priv;
 820         priv->pdev = pdev;
 821
 822         SET_IEEE80211_DEV(dev, &pdev->dev);
 823         pci_set_drvdata(pdev, dev);
 824
 825         priv->map = pci_iomap(pdev, 1, mem_len);
 826         if (!priv->map)
 827                 priv->map = pci_iomap(pdev, 0, io_len);
 828
 829         if (!priv->map) {
 830                 printk(KERN_ERR "%s (rtl8180): Cannot map device memory\n",
 831                        pci_name(pdev));
 832                 goto err_free_dev;
 833         }
 834
 835         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
 836         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
 837         priv->modes[0].mode = MODE_IEEE80211G;
 838         priv->modes[0].num_rates = ARRAY_SIZE(rtl818x_rates);
 839         priv->modes[0].rates = priv->rates;
 840         priv->modes[0].num_channels = ARRAY_SIZE(rtl818x_channels);
 841         priv->modes[0].channels = priv->channels;
 842         priv->modes[1].mode = MODE_IEEE80211B;
 843         priv->modes[1].num_rates = 4;
 844         priv->modes[1].rates = priv->rates;
 845         priv->modes[1].num_channels = ARRAY_SIZE(rtl818x_channels);
 846         priv->modes[1].channels = priv->channels;
 847         priv->mode = IEEE80211_IF_TYPE_INVALID;
 848         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
 849                      IEEE80211_HW_RX_INCLUDES_FCS;
 850         dev->queues = 1;
 851         dev->max_rssi = 65;
 852
 853         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 854         reg &= RTL818X_TX_CONF_HWVER_MASK;
 855         switch (reg) {
 856         case RTL818X_TX_CONF_R8180_ABCD:
 857                 chip_name = "RTL8180";
 858                 break;
 859         case RTL818X_TX_CONF_R8180_F:
 860                 chip_name = "RTL8180vF";
 861                 break;
 862         case RTL818X_TX_CONF_R8185_ABC:
 863                 chip_name = "RTL8185";
 864                 break;
 865         case RTL818X_TX_CONF_R8185_D:
 866                 chip_name = "RTL8185vD";
 867                 break;
 868         default:
 869                 printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n",
 870                        pci_name(pdev), reg >> 25);
 871                 goto err_iounmap;
 872         }
 873
 874         priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC;
 875         if (priv->r8185) {
 876                 if ((err = ieee80211_register_hwmode(dev, &priv->modes[0])))
 877                         goto err_iounmap;
 878
 879                 pci_try_set_mwi(pdev);
 880         }
 881
 882         if ((err = ieee80211_register_hwmode(dev, &priv->modes[1])))
 883                 goto err_iounmap;
 884
 885         eeprom.data = dev;
 886         eeprom.register_read = rtl8180_eeprom_register_read;
 887         eeprom.register_write = rtl8180_eeprom_register_write;
 888         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
 889                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
 890         else
 891                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
 892
 893         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM);
 894         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 895         udelay(10);
 896
 897         eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val);
 898         eeprom_val &= 0xFF;
 899         switch (eeprom_val) {
 900         case 1: rf_name = "Intersil";
 901                 break;
 902         case 2: rf_name = "RFMD";
 903                 break;
 904         case 3: priv->rf = &sa2400_rf_ops;
 905                 break;
 906         case 4: priv->rf = &max2820_rf_ops;
 907                 break;
 908         case 5: priv->rf = &grf5101_rf_ops;
 909                 break;
 910         case 9: priv->rf = rtl8180_detect_rf(dev);
 911                 break;
 912         case 10:
 913                 rf_name = "RTL8255";
 914                 break;
 915         default:
 916                 printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n",
 917                        pci_name(pdev), eeprom_val);
 918                 goto err_iounmap;
 919         }
 920
 921         if (!priv->rf) {
 922                 printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n",
 923                        pci_name(pdev), rf_name);
 924                 goto err_iounmap;
 925         }
 926
 927         eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val);
 928         priv->csthreshold = eeprom_val >> 8;
 929         if (!priv->r8185) {
 930                 __le32 anaparam;
 931                 eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2);
 932                 priv->anaparam = le32_to_cpu(anaparam);
 933                 eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam);
 934         }
 935
 936         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)dev->wiphy->perm_addr, 3);
 937         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
 938                 printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using"
 939                        " randomly generated MAC addr\n", pci_name(pdev));
 940                 random_ether_addr(dev->wiphy->perm_addr);
 941         }
 942
 943         /* CCK TX power */
 944         for (i = 0; i < 14; i += 2) {
 945                 u16 txpwr;
 946                 eeprom_93cx6_read(&eeprom, 0x10 + (i >> 1), &txpwr);
 947                 priv->channels[i].val = txpwr & 0xFF;
 948                 priv->channels[i + 1].val = txpwr >> 8;
 949         }
 950
 951         /* OFDM TX power */
 952         if (priv->r8185) {
 953                 for (i = 0; i < 14; i += 2) {
 954                         u16 txpwr;
 955                         eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr);
 956                         priv->channels[i].val |= (txpwr & 0xFF) << 8;
 957                         priv->channels[i + 1].val |= txpwr & 0xFF00;
 958                 }
 959         }
 960
 961         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 962
 963         spin_lock_init(&priv->lock);
 964
 965         err = ieee80211_register_hw(dev);
 966         if (err) {
 967                 printk(KERN_ERR "%s (rtl8180): Cannot register device\n",
 968                        pci_name(pdev));
 969                 goto err_iounmap;
 970         }
 971
 972         printk(KERN_INFO "%s: hwaddr %s, %s + %s\n",
 973                wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
 974                chip_name, priv->rf->name);
 975
 976         return 0;
 977
 978  err_iounmap:
 979         iounmap(priv->map);
 980
 981  err_free_dev:
 982         pci_set_drvdata(pdev, NULL);
 983         ieee80211_free_hw(dev);
 984
 985  err_free_reg:
 986         pci_release_regions(pdev);
 987         pci_disable_device(pdev);
 988         return err;
 989 }
 990
 991 static void __devexit rtl8180_remove(struct pci_dev *pdev)
 992 {
 993         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 994         struct rtl8180_priv *priv;
 995
 996         if (!dev)
 997                 return;
 998
 999         ieee80211_unregister_hw(dev);
1000
1001         priv = dev->priv;
1002
1003         pci_iounmap(pdev, priv->map);
1004         pci_release_regions(pdev);
1005         pci_disable_device(pdev);
1006         ieee80211_free_hw(dev);
1007 }
1008
1009 #ifdef CONFIG_PM
1010 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
1011 {
1012         pci_save_state(pdev);
1013         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1014         return 0;
1015 }
1016
1017 static int rtl8180_resume(struct pci_dev *pdev)
1018 {
1019         pci_set_power_state(pdev, PCI_D0);
1020         pci_restore_state(pdev);
1021         return 0;
1022 }
1023
1024 #endif /* CONFIG_PM */
1025
1026 static struct pci_driver rtl8180_driver = {
1027         .name           = KBUILD_MODNAME,
1028         .id_table       = rtl8180_table,
1029         .probe          = rtl8180_probe,
1030         .remove         = __devexit_p(rtl8180_remove),
1031 #ifdef CONFIG_PM
1032         .suspend        = rtl8180_suspend,
1033         .resume         = rtl8180_resume,
1034 #endif /* CONFIG_PM */
1035 };
1036
1037 static int __init rtl8180_init(void)
1038 {
1039         return pci_register_driver(&rtl8180_driver);
1040 }
1041
1042 static void __exit rtl8180_exit(void)
1043 {
1044         pci_unregister_driver(&rtl8180_driver);
1045 }
1046
1047 module_init(rtl8180_init);
1048 module_exit(rtl8180_exit);