1 /******************************************************************************
3 * Copyright(c) 2009-2012 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
26 * Larry Finger <Larry.Finger@lwfinger.net>
28 *****************************************************************************/
36 #include <linux/interrupt.h>
37 #include <linux/export.h>
38 #include <linux/kmemleak.h>
39 #include <linux/module.h>
41 MODULE_AUTHOR("lizhaoming <chaoming_li@realsil.com.cn>");
42 MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>");
43 MODULE_AUTHOR("Larry Finger <Larry.FInger@lwfinger.net>");
44 MODULE_LICENSE("GPL");
45 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
47 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
54 static const u8 ac_to_hwq[] = {
61 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
64 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
65 __le16 fc = rtl_get_fc(skb);
66 u8 queue_index = skb_get_queue_mapping(skb);
68 if (unlikely(ieee80211_is_beacon(fc)))
70 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
72 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
73 if (ieee80211_is_nullfunc(fc))
76 return ac_to_hwq[queue_index];
79 /* Update PCI dependent default settings*/
80 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
82 struct rtl_priv *rtlpriv = rtl_priv(hw);
83 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
84 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
85 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
86 u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
89 ppsc->reg_rfps_level = 0;
90 ppsc->support_aspm = false;
92 /*Update PCI ASPM setting */
93 ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
94 switch (rtlpci->const_pci_aspm) {
100 /*ASPM dynamically enabled/disable. */
101 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
105 /*ASPM with Clock Req dynamically enabled/disable. */
106 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
107 RT_RF_OFF_LEVL_CLK_REQ);
112 * Always enable ASPM and Clock Req
113 * from initialization to halt.
115 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
116 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
117 RT_RF_OFF_LEVL_CLK_REQ);
122 * Always enable ASPM without Clock Req
123 * from initialization to halt.
125 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
126 RT_RF_OFF_LEVL_CLK_REQ);
127 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
131 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
133 /*Update Radio OFF setting */
134 switch (rtlpci->const_hwsw_rfoff_d3) {
136 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
137 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
141 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
142 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
143 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
147 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
151 /*Set HW definition to determine if it supports ASPM. */
152 switch (rtlpci->const_support_pciaspm) {
154 /*Not support ASPM. */
155 bool support_aspm = false;
156 ppsc->support_aspm = support_aspm;
161 bool support_aspm = true;
162 bool support_backdoor = true;
163 ppsc->support_aspm = support_aspm;
165 /*if (priv->oem_id == RT_CID_TOSHIBA &&
166 !priv->ndis_adapter.amd_l1_patch)
167 support_backdoor = false; */
169 ppsc->support_backdoor = support_backdoor;
174 /*ASPM value set by chipset. */
175 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
176 bool support_aspm = true;
177 ppsc->support_aspm = support_aspm;
181 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
182 "switch case not processed\n");
186 /* toshiba aspm issue, toshiba will set aspm selfly
187 * so we should not set aspm in driver */
188 pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
189 if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
191 ppsc->support_aspm = false;
194 static bool _rtl_pci_platform_switch_device_pci_aspm(
195 struct ieee80211_hw *hw,
198 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
199 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
201 if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
204 pci_write_config_byte(rtlpci->pdev, 0x80, value);
209 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
210 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
212 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
213 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
215 pci_write_config_byte(rtlpci->pdev, 0x81, value);
217 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
221 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
222 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
224 struct rtl_priv *rtlpriv = rtl_priv(hw);
225 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
226 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
227 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
228 u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
229 u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
230 /*Retrieve original configuration settings. */
231 u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
232 u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
233 pcibridge_linkctrlreg;
237 if (!ppsc->support_aspm)
240 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
241 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
242 "PCI(Bridge) UNKNOWN\n");
247 if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
248 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
249 _rtl_pci_switch_clk_req(hw, 0x0);
252 /*for promising device will in L0 state after an I/O. */
253 pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
255 /*Set corresponding value. */
256 aspmlevel |= BIT(0) | BIT(1);
257 linkctrl_reg &= ~aspmlevel;
258 pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
260 _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
263 /*4 Disable Pci Bridge ASPM */
264 pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
265 pcibridge_linkctrlreg);
271 *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
272 *power saving We should follow the sequence to enable
273 *RTL8192SE first then enable Pci Bridge ASPM
274 *or the system will show bluescreen.
276 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
278 struct rtl_priv *rtlpriv = rtl_priv(hw);
279 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
280 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
281 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
282 u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
283 u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
285 u8 u_pcibridge_aspmsetting;
286 u8 u_device_aspmsetting;
288 if (!ppsc->support_aspm)
291 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
292 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
293 "PCI(Bridge) UNKNOWN\n");
297 /*4 Enable Pci Bridge ASPM */
299 u_pcibridge_aspmsetting =
300 pcipriv->ndis_adapter.pcibridge_linkctrlreg |
301 rtlpci->const_hostpci_aspm_setting;
303 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
304 u_pcibridge_aspmsetting &= ~BIT(0);
306 pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
307 u_pcibridge_aspmsetting);
309 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
310 "PlatformEnableASPM(): Write reg[%x] = %x\n",
311 (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
312 u_pcibridge_aspmsetting);
316 /*Get ASPM level (with/without Clock Req) */
317 aspmlevel = rtlpci->const_devicepci_aspm_setting;
318 u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
320 /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
321 /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
323 u_device_aspmsetting |= aspmlevel;
325 _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
327 if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
328 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
329 RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
330 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
335 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
337 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
343 pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
345 pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
347 if (offset_e0 == 0xA0) {
348 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
349 if (offset_e4 & BIT(23))
356 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
357 struct rtl_priv **buddy_priv)
359 struct rtl_priv *rtlpriv = rtl_priv(hw);
360 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
361 bool find_buddy_priv = false;
362 struct rtl_priv *tpriv = NULL;
363 struct rtl_pci_priv *tpcipriv = NULL;
365 if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
366 list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
369 tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
370 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
371 "pcipriv->ndis_adapter.funcnumber %x\n",
372 pcipriv->ndis_adapter.funcnumber);
373 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
374 "tpcipriv->ndis_adapter.funcnumber %x\n",
375 tpcipriv->ndis_adapter.funcnumber);
377 if ((pcipriv->ndis_adapter.busnumber ==
378 tpcipriv->ndis_adapter.busnumber) &&
379 (pcipriv->ndis_adapter.devnumber ==
380 tpcipriv->ndis_adapter.devnumber) &&
381 (pcipriv->ndis_adapter.funcnumber !=
382 tpcipriv->ndis_adapter.funcnumber)) {
383 find_buddy_priv = true;
390 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
391 "find_buddy_priv %d\n", find_buddy_priv);
396 return find_buddy_priv;
399 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
401 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
402 struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
403 u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
407 num4bbytes = (capabilityoffset + 0x10) / 4;
409 /*Read Link Control Register */
410 pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
412 pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
415 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
416 struct ieee80211_hw *hw)
418 struct rtl_priv *rtlpriv = rtl_priv(hw);
419 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
424 /*Link Control Register */
425 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
426 pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
428 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
429 pcipriv->ndis_adapter.linkctrl_reg);
431 pci_read_config_byte(pdev, 0x98, &tmp);
433 pci_write_config_byte(pdev, 0x98, tmp);
436 pci_write_config_byte(pdev, 0x70f, tmp);
439 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
441 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
443 _rtl_pci_update_default_setting(hw);
445 if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
446 /*Always enable ASPM & Clock Req. */
447 rtl_pci_enable_aspm(hw);
448 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
453 static void _rtl_pci_io_handler_init(struct device *dev,
454 struct ieee80211_hw *hw)
456 struct rtl_priv *rtlpriv = rtl_priv(hw);
458 rtlpriv->io.dev = dev;
460 rtlpriv->io.write8_async = pci_write8_async;
461 rtlpriv->io.write16_async = pci_write16_async;
462 rtlpriv->io.write32_async = pci_write32_async;
464 rtlpriv->io.read8_sync = pci_read8_sync;
465 rtlpriv->io.read16_sync = pci_read16_sync;
466 rtlpriv->io.read32_sync = pci_read32_sync;
470 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
471 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
473 struct rtl_priv *rtlpriv = rtl_priv(hw);
474 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
475 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
476 struct sk_buff *next_skb;
477 u8 additionlen = FCS_LEN;
479 /* here open is 4, wep/tkip is 8, aes is 12*/
480 if (info->control.hw_key)
481 additionlen += info->control.hw_key->icv_len;
483 /* The most skb num is 6 */
484 tcb_desc->empkt_num = 0;
485 spin_lock_bh(&rtlpriv->locks.waitq_lock);
486 skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
487 struct ieee80211_tx_info *next_info;
489 next_info = IEEE80211_SKB_CB(next_skb);
490 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
491 tcb_desc->empkt_len[tcb_desc->empkt_num] =
492 next_skb->len + additionlen;
493 tcb_desc->empkt_num++;
498 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
502 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
505 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
510 /* just for early mode now */
511 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
513 struct rtl_priv *rtlpriv = rtl_priv(hw);
514 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
515 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
516 struct sk_buff *skb = NULL;
517 struct ieee80211_tx_info *info = NULL;
518 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
521 if (!rtlpriv->rtlhal.earlymode_enable)
524 if (rtlpriv->dm.supp_phymode_switch &&
525 (rtlpriv->easy_concurrent_ctl.switch_in_process ||
526 (rtlpriv->buddy_priv &&
527 rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
529 /* we juse use em for BE/BK/VI/VO */
530 for (tid = 7; tid >= 0; tid--) {
531 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
532 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
533 while (!mac->act_scanning &&
534 rtlpriv->psc.rfpwr_state == ERFON) {
535 struct rtl_tcb_desc tcb_desc;
536 memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
538 spin_lock_bh(&rtlpriv->locks.waitq_lock);
539 if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
540 (ring->entries - skb_queue_len(&ring->queue) >
541 rtlhal->max_earlymode_num)) {
542 skb = skb_dequeue(&mac->skb_waitq[tid]);
544 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
547 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
549 /* Some macaddr can't do early mode. like
550 * multicast/broadcast/no_qos data */
551 info = IEEE80211_SKB_CB(skb);
552 if (info->flags & IEEE80211_TX_CTL_AMPDU)
553 _rtl_update_earlymode_info(hw, skb,
556 rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
562 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
564 struct rtl_priv *rtlpriv = rtl_priv(hw);
565 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
567 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
569 while (skb_queue_len(&ring->queue)) {
571 struct ieee80211_tx_info *info;
576 if (rtlpriv->use_new_trx_flow)
577 entry = (u8 *)(&ring->buffer_desc[ring->idx]);
579 entry = (u8 *)(&ring->desc[ring->idx]);
581 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
583 ring->idx = (ring->idx + 1) % ring->entries;
585 skb = __skb_dequeue(&ring->queue);
586 pci_unmap_single(rtlpci->pdev,
588 get_desc((u8 *)entry, true,
589 HW_DESC_TXBUFF_ADDR),
590 skb->len, PCI_DMA_TODEVICE);
592 /* remove early mode header */
593 if (rtlpriv->rtlhal.earlymode_enable)
594 skb_pull(skb, EM_HDR_LEN);
596 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
597 "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
599 skb_queue_len(&ring->queue),
600 *(u16 *)(skb->data + 22));
602 if (prio == TXCMD_QUEUE) {
608 /* for sw LPS, just after NULL skb send out, we can
609 * sure AP knows we are sleeping, we should not let
612 fc = rtl_get_fc(skb);
613 if (ieee80211_is_nullfunc(fc)) {
614 if (ieee80211_has_pm(fc)) {
615 rtlpriv->mac80211.offchan_delay = true;
616 rtlpriv->psc.state_inap = true;
618 rtlpriv->psc.state_inap = false;
621 if (ieee80211_is_action(fc)) {
622 struct ieee80211_mgmt *action_frame =
623 (struct ieee80211_mgmt *)skb->data;
624 if (action_frame->u.action.u.ht_smps.action ==
625 WLAN_HT_ACTION_SMPS) {
631 /* update tid tx pkt num */
632 tid = rtl_get_tid(skb);
634 rtlpriv->link_info.tidtx_inperiod[tid]++;
636 info = IEEE80211_SKB_CB(skb);
637 ieee80211_tx_info_clear_status(info);
639 info->flags |= IEEE80211_TX_STAT_ACK;
640 /*info->status.rates[0].count = 1; */
642 ieee80211_tx_status_irqsafe(hw, skb);
644 if ((ring->entries - skb_queue_len(&ring->queue))
647 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
648 "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
650 skb_queue_len(&ring->queue));
652 ieee80211_wake_queue(hw,
653 skb_get_queue_mapping
660 if (((rtlpriv->link_info.num_rx_inperiod +
661 rtlpriv->link_info.num_tx_inperiod) > 8) ||
662 (rtlpriv->link_info.num_rx_inperiod > 2)) {
663 rtlpriv->enter_ps = false;
664 schedule_work(&rtlpriv->works.lps_change_work);
668 static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
669 u8 *entry, int rxring_idx, int desc_idx)
671 struct rtl_priv *rtlpriv = rtl_priv(hw);
672 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
677 skb = dev_alloc_skb(rtlpci->rxbuffersize);
680 rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
682 /* just set skb->cb to mapping addr for pci_unmap_single use */
683 *((dma_addr_t *)skb->cb) =
684 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
685 rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
686 bufferaddress = *((dma_addr_t *)skb->cb);
687 if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
689 if (rtlpriv->use_new_trx_flow) {
690 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
692 (u8 *)&bufferaddress);
694 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
696 (u8 *)&bufferaddress);
697 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
699 (u8 *)&rtlpci->rxbuffersize);
700 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
707 /* inorder to receive 8K AMSDU we have set skb to
708 * 9100bytes in init rx ring, but if this packet is
709 * not a AMSDU, this large packet will be sent to
710 * TCP/IP directly, this cause big packet ping fail
711 * like: "ping -s 65507", so here we will realloc skb
712 * based on the true size of packet, Mac80211
713 * Probably will do it better, but does not yet.
715 * Some platform will fail when alloc skb sometimes.
716 * in this condition, we will send the old skb to
717 * mac80211 directly, this will not cause any other
718 * issues, but only this packet will be lost by TCP/IP
720 static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
722 struct ieee80211_rx_status rx_status)
724 if (unlikely(!rtl_action_proc(hw, skb, false))) {
725 dev_kfree_skb_any(skb);
727 struct sk_buff *uskb = NULL;
730 uskb = dev_alloc_skb(skb->len + 128);
732 memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
734 pdata = (u8 *)skb_put(uskb, skb->len);
735 memcpy(pdata, skb->data, skb->len);
736 dev_kfree_skb_any(skb);
737 ieee80211_rx_irqsafe(hw, uskb);
739 ieee80211_rx_irqsafe(hw, skb);
744 /*hsisr interrupt handler*/
745 static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
747 struct rtl_priv *rtlpriv = rtl_priv(hw);
748 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
750 rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
751 rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
752 rtlpci->sys_irq_mask);
755 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
757 struct rtl_priv *rtlpriv = rtl_priv(hw);
758 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
759 int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
760 struct ieee80211_rx_status rx_status = { 0 };
761 unsigned int count = rtlpci->rxringcount;
764 bool unicast = false;
766 unsigned int rx_remained_cnt;
767 struct rtl_stats stats = {
774 struct ieee80211_hdr *hdr;
777 /*rx buffer descriptor */
778 struct rtl_rx_buffer_desc *buffer_desc = NULL;
779 /*if use new trx flow, it means wifi info */
780 struct rtl_rx_desc *pdesc = NULL;
782 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
783 rtlpci->rx_ring[rxring_idx].idx];
785 if (rtlpriv->use_new_trx_flow) {
787 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
789 if (rx_remained_cnt < 1)
792 } else { /* rx descriptor */
793 pdesc = &rtlpci->rx_ring[rxring_idx].desc[
794 rtlpci->rx_ring[rxring_idx].idx];
796 own = (u8)rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
799 if (own) /* wait data to be filled by hardware */
803 /* Reaching this point means: data is filled already
805 * We can NOT access 'skb' before 'pci_unmap_single'
807 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
808 rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
810 if (rtlpriv->use_new_trx_flow) {
812 &rtlpci->rx_ring[rxring_idx].buffer_desc
813 [rtlpci->rx_ring[rxring_idx].idx];
814 /*means rx wifi info*/
815 pdesc = (struct rtl_rx_desc *)skb->data;
817 memset(&rx_status , 0 , sizeof(rx_status));
818 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
819 &rx_status, (u8 *)pdesc, skb);
821 if (rtlpriv->use_new_trx_flow)
822 rtlpriv->cfg->ops->rx_check_dma_ok(hw,
826 len = rtlpriv->cfg->ops->get_desc((u8 *)pdesc, false,
829 if (skb->end - skb->tail > len) {
831 if (rtlpriv->use_new_trx_flow)
832 skb_reserve(skb, stats.rx_drvinfo_size +
833 stats.rx_bufshift + 24);
835 skb_reserve(skb, stats.rx_drvinfo_size +
839 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
840 "skb->end - skb->tail = %d, len is %d\n",
841 skb->end - skb->tail, len);
844 /* handle command packet here */
845 if (rtlpriv->cfg->ops->rx_command_packet(hw, stats, skb)) {
846 dev_kfree_skb_any(skb);
851 * NOTICE This can not be use for mac80211,
852 * this is done in mac80211 code,
853 * if done here sec DHCP will fail
854 * skb_trim(skb, skb->len - 4);
857 hdr = rtl_get_hdr(skb);
858 fc = rtl_get_fc(skb);
860 if (!stats.crc && !stats.hwerror) {
861 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
864 if (is_broadcast_ether_addr(hdr->addr1)) {
866 } else if (is_multicast_ether_addr(hdr->addr1)) {
870 rtlpriv->stats.rxbytesunicast += skb->len;
872 rtl_is_special_data(hw, skb, false);
874 if (ieee80211_is_data(fc)) {
875 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
877 rtlpriv->link_info.num_rx_inperiod++;
879 /* static bcn for roaming */
880 rtl_beacon_statistic(hw, skb);
881 rtl_p2p_info(hw, (void *)skb->data, skb->len);
883 rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
884 rtl_recognize_peer(hw, (void *)skb->data, skb->len);
885 if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
886 (rtlpriv->rtlhal.current_bandtype ==
888 (ieee80211_is_beacon(fc) ||
889 ieee80211_is_probe_resp(fc))) {
890 dev_kfree_skb_any(skb);
892 _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
895 dev_kfree_skb_any(skb);
897 if (rtlpriv->use_new_trx_flow) {
898 rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
899 rtlpci->rx_ring[hw_queue].next_rx_rp %=
900 RTL_PCI_MAX_RX_COUNT;
903 rtl_write_word(rtlpriv, 0x3B4,
904 rtlpci->rx_ring[hw_queue].next_rx_rp);
906 if (((rtlpriv->link_info.num_rx_inperiod +
907 rtlpriv->link_info.num_tx_inperiod) > 8) ||
908 (rtlpriv->link_info.num_rx_inperiod > 2)) {
909 rtlpriv->enter_ps = false;
910 schedule_work(&rtlpriv->works.lps_change_work);
913 if (rtlpriv->use_new_trx_flow) {
914 _rtl_pci_init_one_rxdesc(hw, (u8 *)buffer_desc,
916 rtlpci->rx_ring[rxring_idx].idx);
918 _rtl_pci_init_one_rxdesc(hw, (u8 *)pdesc, rxring_idx,
919 rtlpci->rx_ring[rxring_idx].idx);
921 if (rtlpci->rx_ring[rxring_idx].idx ==
922 rtlpci->rxringcount - 1)
923 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
928 rtlpci->rx_ring[rxring_idx].idx =
929 (rtlpci->rx_ring[rxring_idx].idx + 1) %
934 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
936 struct ieee80211_hw *hw = dev_id;
937 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
938 struct rtl_priv *rtlpriv = rtl_priv(hw);
939 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
943 irqreturn_t ret = IRQ_HANDLED;
945 if (rtlpci->irq_enabled == 0)
948 spin_lock_irqsave(&rtlpriv->locks.irq_th_lock , flags);
949 rtlpriv->cfg->ops->disable_interrupt(hw);
951 /*read ISR: 4/8bytes */
952 rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
954 /*Shared IRQ or HW disappared */
955 if (!inta || inta == 0xffff)
958 /*<1> beacon related */
959 if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
960 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
961 "beacon ok interrupt!\n");
964 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
965 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
966 "beacon err interrupt!\n");
969 if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
970 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
973 if (inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
974 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
975 "prepare beacon for interrupt!\n");
976 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
980 if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
981 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
983 if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
984 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
985 "Manage ok interrupt!\n");
986 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
989 if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
990 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
991 "HIGH_QUEUE ok interrupt!\n");
992 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
995 if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
996 rtlpriv->link_info.num_tx_inperiod++;
998 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
999 "BK Tx OK interrupt!\n");
1000 _rtl_pci_tx_isr(hw, BK_QUEUE);
1003 if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
1004 rtlpriv->link_info.num_tx_inperiod++;
1006 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1007 "BE TX OK interrupt!\n");
1008 _rtl_pci_tx_isr(hw, BE_QUEUE);
1011 if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
1012 rtlpriv->link_info.num_tx_inperiod++;
1014 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1015 "VI TX OK interrupt!\n");
1016 _rtl_pci_tx_isr(hw, VI_QUEUE);
1019 if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
1020 rtlpriv->link_info.num_tx_inperiod++;
1022 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1023 "Vo TX OK interrupt!\n");
1024 _rtl_pci_tx_isr(hw, VO_QUEUE);
1027 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1028 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1029 rtlpriv->link_info.num_tx_inperiod++;
1031 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1032 "CMD TX OK interrupt!\n");
1033 _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1038 if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1039 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1040 _rtl_pci_rx_interrupt(hw);
1043 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1044 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1045 "rx descriptor unavailable!\n");
1046 _rtl_pci_rx_interrupt(hw);
1049 if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1050 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1051 _rtl_pci_rx_interrupt(hw);
1055 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1056 if (inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1057 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1058 "firmware interrupt!\n");
1059 queue_delayed_work(rtlpriv->works.rtl_wq,
1060 &rtlpriv->works.fwevt_wq, 0);
1064 /*<5> hsisr related*/
1065 /* Only 8188EE & 8723BE Supported.
1066 * If Other ICs Come in, System will corrupt,
1067 * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1068 * are not initialized
1070 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1071 rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1072 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1073 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1074 "hsisr interrupt!\n");
1075 _rtl_pci_hs_interrupt(hw);
1079 if (rtlpriv->rtlhal.earlymode_enable)
1080 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1083 rtlpriv->cfg->ops->enable_interrupt(hw);
1084 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1088 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
1090 _rtl_pci_tx_chk_waitq(hw);
1093 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
1095 struct rtl_priv *rtlpriv = rtl_priv(hw);
1096 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1097 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1098 struct rtl8192_tx_ring *ring = NULL;
1099 struct ieee80211_hdr *hdr = NULL;
1100 struct ieee80211_tx_info *info = NULL;
1101 struct sk_buff *pskb = NULL;
1102 struct rtl_tx_desc *pdesc = NULL;
1103 struct rtl_tcb_desc tcb_desc;
1104 /*This is for new trx flow*/
1105 struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1108 memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1109 ring = &rtlpci->tx_ring[BEACON_QUEUE];
1110 pskb = __skb_dequeue(&ring->queue);
1114 /*NB: the beacon data buffer must be 32-bit aligned. */
1115 pskb = ieee80211_beacon_get(hw, mac->vif);
1118 hdr = rtl_get_hdr(pskb);
1119 info = IEEE80211_SKB_CB(pskb);
1120 pdesc = &ring->desc[0];
1121 if (rtlpriv->use_new_trx_flow)
1122 pbuffer_desc = &ring->buffer_desc[0];
1124 rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1125 (u8 *)pbuffer_desc, info, NULL, pskb,
1126 BEACON_QUEUE, &tcb_desc);
1128 __skb_queue_tail(&ring->queue, pskb);
1130 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1136 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1138 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1139 struct rtl_priv *rtlpriv = rtl_priv(hw);
1140 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1144 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1145 desc_num = TX_DESC_NUM_92E;
1147 desc_num = RT_TXDESC_NUM;
1149 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1150 rtlpci->txringcount[i] = desc_num;
1153 *we just alloc 2 desc for beacon queue,
1154 *because we just need first desc in hw beacon.
1156 rtlpci->txringcount[BEACON_QUEUE] = 2;
1158 /*BE queue need more descriptor for performance
1159 *consideration or, No more tx desc will happen,
1160 *and may cause mac80211 mem leakage.
1162 if (!rtl_priv(hw)->use_new_trx_flow)
1163 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1165 rtlpci->rxbuffersize = 9100; /*2048/1024; */
1166 rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT; /*64; */
1169 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1170 struct pci_dev *pdev)
1172 struct rtl_priv *rtlpriv = rtl_priv(hw);
1173 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1174 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1175 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1177 rtlpci->up_first_time = true;
1178 rtlpci->being_init_adapter = false;
1181 rtlpci->pdev = pdev;
1183 /*Tx/Rx related var */
1184 _rtl_pci_init_trx_var(hw);
1186 /*IBSS*/ mac->beacon_interval = 100;
1189 mac->min_space_cfg = 0;
1190 mac->max_mss_density = 0;
1191 /*set sane AMPDU defaults */
1192 mac->current_ampdu_density = 7;
1193 mac->current_ampdu_factor = 3;
1196 rtlpci->acm_method = EACMWAY2_SW;
1199 tasklet_init(&rtlpriv->works.irq_tasklet,
1200 (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1202 tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1203 (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1205 INIT_WORK(&rtlpriv->works.lps_change_work,
1206 rtl_lps_change_work_callback);
1209 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1210 unsigned int prio, unsigned int entries)
1212 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1213 struct rtl_priv *rtlpriv = rtl_priv(hw);
1214 struct rtl_tx_buffer_desc *buffer_desc;
1215 struct rtl_tx_desc *desc;
1216 dma_addr_t buffer_desc_dma, desc_dma;
1217 u32 nextdescaddress;
1220 /* alloc tx buffer desc for new trx flow*/
1221 if (rtlpriv->use_new_trx_flow) {
1223 pci_zalloc_consistent(rtlpci->pdev,
1224 sizeof(*buffer_desc) * entries,
1227 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1228 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1229 "Cannot allocate TX ring (prio = %d)\n",
1234 rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1235 rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1237 rtlpci->tx_ring[prio].cur_tx_rp = 0;
1238 rtlpci->tx_ring[prio].cur_tx_wp = 0;
1239 rtlpci->tx_ring[prio].avl_desc = entries;
1242 /* alloc dma for this ring */
1243 desc = pci_zalloc_consistent(rtlpci->pdev,
1244 sizeof(*desc) * entries, &desc_dma);
1246 if (!desc || (unsigned long)desc & 0xFF) {
1247 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1248 "Cannot allocate TX ring (prio = %d)\n", prio);
1252 rtlpci->tx_ring[prio].desc = desc;
1253 rtlpci->tx_ring[prio].dma = desc_dma;
1255 rtlpci->tx_ring[prio].idx = 0;
1256 rtlpci->tx_ring[prio].entries = entries;
1257 skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1259 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1262 /* init every desc in this ring */
1263 if (!rtlpriv->use_new_trx_flow) {
1264 for (i = 0; i < entries; i++) {
1265 nextdescaddress = (u32)desc_dma +
1266 ((i + 1) % entries) *
1269 rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1271 HW_DESC_TX_NEXTDESC_ADDR,
1272 (u8 *)&nextdescaddress);
1278 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1280 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1281 struct rtl_priv *rtlpriv = rtl_priv(hw);
1284 if (rtlpriv->use_new_trx_flow) {
1285 struct rtl_rx_buffer_desc *entry = NULL;
1286 /* alloc dma for this ring */
1287 rtlpci->rx_ring[rxring_idx].buffer_desc =
1288 pci_zalloc_consistent(rtlpci->pdev,
1289 sizeof(*rtlpci->rx_ring[rxring_idx].
1291 rtlpci->rxringcount,
1292 &rtlpci->rx_ring[rxring_idx].dma);
1293 if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1294 (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1295 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1296 "Cannot allocate RX ring\n");
1300 /* init every desc in this ring */
1301 rtlpci->rx_ring[rxring_idx].idx = 0;
1302 for (i = 0; i < rtlpci->rxringcount; i++) {
1303 entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1304 if (!_rtl_pci_init_one_rxdesc(hw, (u8 *)entry,
1309 struct rtl_rx_desc *entry = NULL;
1311 /* alloc dma for this ring */
1312 rtlpci->rx_ring[rxring_idx].desc =
1313 pci_zalloc_consistent(rtlpci->pdev,
1314 sizeof(*rtlpci->rx_ring[rxring_idx].
1315 desc) * rtlpci->rxringcount,
1316 &rtlpci->rx_ring[rxring_idx].dma);
1317 if (!rtlpci->rx_ring[rxring_idx].desc ||
1318 (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1319 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1320 "Cannot allocate RX ring\n");
1324 /* init every desc in this ring */
1325 rtlpci->rx_ring[rxring_idx].idx = 0;
1327 for (i = 0; i < rtlpci->rxringcount; i++) {
1328 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1329 if (!_rtl_pci_init_one_rxdesc(hw, (u8 *)entry,
1334 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1335 HW_DESC_RXERO, &tmp_one);
1340 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1343 struct rtl_priv *rtlpriv = rtl_priv(hw);
1344 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1345 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1347 /* free every desc in this ring */
1348 while (skb_queue_len(&ring->queue)) {
1350 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1352 if (rtlpriv->use_new_trx_flow)
1353 entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1355 entry = (u8 *)(&ring->desc[ring->idx]);
1357 pci_unmap_single(rtlpci->pdev,
1359 ops->get_desc((u8 *)entry, true,
1360 HW_DESC_TXBUFF_ADDR),
1361 skb->len, PCI_DMA_TODEVICE);
1363 ring->idx = (ring->idx + 1) % ring->entries;
1366 /* free dma of this ring */
1367 pci_free_consistent(rtlpci->pdev,
1368 sizeof(*ring->desc) * ring->entries,
1369 ring->desc, ring->dma);
1371 if (rtlpriv->use_new_trx_flow) {
1372 pci_free_consistent(rtlpci->pdev,
1373 sizeof(*ring->desc) * ring->entries,
1374 ring->buffer_desc, ring->buffer_desc_dma);
1379 static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1381 struct rtl_priv *rtlpriv = rtl_priv(hw);
1382 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1385 /* free every desc in this ring */
1386 for (i = 0; i < rtlpci->rxringcount; i++) {
1387 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1391 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
1392 rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
1396 /* free dma of this ring */
1397 if (rtlpriv->use_new_trx_flow) {
1398 pci_free_consistent(rtlpci->pdev,
1399 sizeof(*rtlpci->rx_ring[rxring_idx].
1400 buffer_desc) * rtlpci->rxringcount,
1401 rtlpci->rx_ring[rxring_idx].buffer_desc,
1402 rtlpci->rx_ring[rxring_idx].dma);
1403 rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1405 pci_free_consistent(rtlpci->pdev,
1406 sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1407 rtlpci->rxringcount,
1408 rtlpci->rx_ring[rxring_idx].desc,
1409 rtlpci->rx_ring[rxring_idx].dma);
1410 rtlpci->rx_ring[rxring_idx].desc = NULL;
1414 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1416 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1420 /* rxring_idx 0:RX_MPDU_QUEUE
1421 * rxring_idx 1:RX_CMD_QUEUE
1423 for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1424 ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1429 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1430 ret = _rtl_pci_init_tx_ring(hw, i,
1431 rtlpci->txringcount[i]);
1433 goto err_free_rings;
1439 for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1440 _rtl_pci_free_rx_ring(hw, rxring_idx);
1442 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1443 if (rtlpci->tx_ring[i].desc ||
1444 rtlpci->tx_ring[i].buffer_desc)
1445 _rtl_pci_free_tx_ring(hw, i);
1450 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1455 for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1456 _rtl_pci_free_rx_ring(hw, rxring_idx);
1459 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1460 _rtl_pci_free_tx_ring(hw, i);
1465 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1467 struct rtl_priv *rtlpriv = rtl_priv(hw);
1468 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1470 unsigned long flags;
1473 /* rxring_idx 0:RX_MPDU_QUEUE */
1474 /* rxring_idx 1:RX_CMD_QUEUE */
1475 for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1476 /* force the rx_ring[RX_MPDU_QUEUE/
1477 * RX_CMD_QUEUE].idx to the first one
1478 *new trx flow, do nothing
1480 if (!rtlpriv->use_new_trx_flow &&
1481 rtlpci->rx_ring[rxring_idx].desc) {
1482 struct rtl_rx_desc *entry = NULL;
1484 rtlpci->rx_ring[rxring_idx].idx = 0;
1485 for (i = 0; i < rtlpci->rxringcount; i++) {
1486 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1488 rtlpriv->cfg->ops->get_desc((u8 *)entry,
1489 false , HW_DESC_RXBUFF_ADDR);
1490 memset((u8 *)entry , 0 ,
1491 sizeof(*rtlpci->rx_ring
1492 [rxring_idx].desc));/*clear one entry*/
1493 if (rtlpriv->use_new_trx_flow) {
1494 rtlpriv->cfg->ops->set_desc(hw,
1497 (u8 *)&bufferaddress);
1499 rtlpriv->cfg->ops->set_desc(hw,
1501 HW_DESC_RXBUFF_ADDR,
1502 (u8 *)&bufferaddress);
1503 rtlpriv->cfg->ops->set_desc(hw,
1506 (u8 *)&rtlpci->rxbuffersize);
1507 rtlpriv->cfg->ops->set_desc(hw,
1513 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1514 HW_DESC_RXERO, (u8 *)&tmp_one);
1516 rtlpci->rx_ring[rxring_idx].idx = 0;
1520 *after reset, release previous pending packet,
1521 *and force the tx idx to the first one
1523 spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1524 for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1525 if (rtlpci->tx_ring[i].desc ||
1526 rtlpci->tx_ring[i].buffer_desc) {
1527 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1529 while (skb_queue_len(&ring->queue)) {
1531 struct sk_buff *skb =
1532 __skb_dequeue(&ring->queue);
1533 if (rtlpriv->use_new_trx_flow)
1534 entry = (u8 *)(&ring->buffer_desc
1537 entry = (u8 *)(&ring->desc[ring->idx]);
1539 pci_unmap_single(rtlpci->pdev,
1544 HW_DESC_TXBUFF_ADDR),
1545 skb->len, PCI_DMA_TODEVICE);
1546 ring->idx = (ring->idx + 1) % ring->entries;
1548 ring->idx = (ring->idx + 1) % ring->entries;
1553 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1558 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1559 struct ieee80211_sta *sta,
1560 struct sk_buff *skb)
1562 struct rtl_priv *rtlpriv = rtl_priv(hw);
1563 struct rtl_sta_info *sta_entry = NULL;
1564 u8 tid = rtl_get_tid(skb);
1565 __le16 fc = rtl_get_fc(skb);
1569 sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1571 if (!rtlpriv->rtlhal.earlymode_enable)
1573 if (ieee80211_is_nullfunc(fc))
1575 if (ieee80211_is_qos_nullfunc(fc))
1577 if (ieee80211_is_pspoll(fc))
1579 if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1581 if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1586 /* maybe every tid should be checked */
1587 if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1590 spin_lock_bh(&rtlpriv->locks.waitq_lock);
1591 skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1592 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1597 static int rtl_pci_tx(struct ieee80211_hw *hw,
1598 struct ieee80211_sta *sta,
1599 struct sk_buff *skb,
1600 struct rtl_tcb_desc *ptcb_desc)
1602 struct rtl_priv *rtlpriv = rtl_priv(hw);
1603 struct rtl_sta_info *sta_entry = NULL;
1604 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1605 struct rtl8192_tx_ring *ring;
1606 struct rtl_tx_desc *pdesc;
1607 struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1609 u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1610 unsigned long flags;
1611 struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1612 __le16 fc = rtl_get_fc(skb);
1613 u8 *pda_addr = hdr->addr1;
1614 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1621 if (ieee80211_is_mgmt(fc))
1622 rtl_tx_mgmt_proc(hw, skb);
1624 if (rtlpriv->psc.sw_ps_enabled) {
1625 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1626 !ieee80211_has_pm(fc))
1627 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1630 rtl_action_proc(hw, skb, true);
1632 if (is_multicast_ether_addr(pda_addr))
1633 rtlpriv->stats.txbytesmulticast += skb->len;
1634 else if (is_broadcast_ether_addr(pda_addr))
1635 rtlpriv->stats.txbytesbroadcast += skb->len;
1637 rtlpriv->stats.txbytesunicast += skb->len;
1639 spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1640 ring = &rtlpci->tx_ring[hw_queue];
1641 if (hw_queue != BEACON_QUEUE) {
1642 if (rtlpriv->use_new_trx_flow)
1643 idx = ring->cur_tx_wp;
1645 idx = (ring->idx + skb_queue_len(&ring->queue)) %
1651 pdesc = &ring->desc[idx];
1652 if (rtlpriv->use_new_trx_flow) {
1653 ptx_bd_desc = &ring->buffer_desc[idx];
1655 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
1658 if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1659 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1660 "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1661 hw_queue, ring->idx, idx,
1662 skb_queue_len(&ring->queue));
1664 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1670 if (ieee80211_is_data_qos(fc)) {
1671 tid = rtl_get_tid(skb);
1673 sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1674 seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1675 IEEE80211_SCTL_SEQ) >> 4;
1678 if (!ieee80211_has_morefrags(hdr->frame_control))
1679 sta_entry->tids[tid].seq_number = seq_number;
1683 if (ieee80211_is_data(fc))
1684 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1686 rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1687 (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1689 __skb_queue_tail(&ring->queue, skb);
1691 if (rtlpriv->use_new_trx_flow) {
1692 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1693 HW_DESC_OWN, &hw_queue);
1695 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1696 HW_DESC_OWN, &temp_one);
1699 if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1700 hw_queue != BEACON_QUEUE) {
1701 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1702 "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1703 hw_queue, ring->idx, idx,
1704 skb_queue_len(&ring->queue));
1706 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1709 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1711 rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1716 static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1718 struct rtl_priv *rtlpriv = rtl_priv(hw);
1719 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1720 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1721 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1724 struct rtl8192_tx_ring *ring;
1729 for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1732 if (((queues >> queue_id) & 0x1) == 0) {
1736 ring = &pcipriv->dev.tx_ring[queue_id];
1737 queue_len = skb_queue_len(&ring->queue);
1738 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1739 queue_id == TXCMD_QUEUE) {
1747 /* we just wait 1s for all queues */
1748 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1749 is_hal_stop(rtlhal) || i >= 200)
1754 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1756 struct rtl_priv *rtlpriv = rtl_priv(hw);
1757 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1759 _rtl_pci_deinit_trx_ring(hw);
1761 synchronize_irq(rtlpci->pdev->irq);
1762 tasklet_kill(&rtlpriv->works.irq_tasklet);
1763 cancel_work_sync(&rtlpriv->works.lps_change_work);
1765 flush_workqueue(rtlpriv->works.rtl_wq);
1766 destroy_workqueue(rtlpriv->works.rtl_wq);
1770 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1772 struct rtl_priv *rtlpriv = rtl_priv(hw);
1775 _rtl_pci_init_struct(hw, pdev);
1777 err = _rtl_pci_init_trx_ring(hw);
1779 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1780 "tx ring initialization failed\n");
1787 static int rtl_pci_start(struct ieee80211_hw *hw)
1789 struct rtl_priv *rtlpriv = rtl_priv(hw);
1790 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1791 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1792 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1796 rtl_pci_reset_trx_ring(hw);
1798 rtlpci->driver_is_goingto_unload = false;
1799 if (rtlpriv->cfg->ops->get_btc_status()) {
1800 rtlpriv->btcoexist.btc_ops->btc_init_variables(rtlpriv);
1801 rtlpriv->btcoexist.btc_ops->btc_init_hal_vars(rtlpriv);
1803 err = rtlpriv->cfg->ops->hw_init(hw);
1805 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1806 "Failed to config hardware!\n");
1810 rtlpriv->cfg->ops->enable_interrupt(hw);
1811 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1813 rtl_init_rx_config(hw);
1815 /*should be after adapter start and interrupt enable. */
1816 set_hal_start(rtlhal);
1818 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1820 rtlpci->up_first_time = false;
1822 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "rtl_pci_start OK\n");
1826 static void rtl_pci_stop(struct ieee80211_hw *hw)
1828 struct rtl_priv *rtlpriv = rtl_priv(hw);
1829 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1830 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1831 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1832 unsigned long flags;
1833 u8 RFInProgressTimeOut = 0;
1835 if (rtlpriv->cfg->ops->get_btc_status())
1836 rtlpriv->btcoexist.btc_ops->btc_halt_notify();
1839 *should be before disable interrupt&adapter
1840 *and will do it immediately.
1842 set_hal_stop(rtlhal);
1844 rtlpci->driver_is_goingto_unload = true;
1845 rtlpriv->cfg->ops->disable_interrupt(hw);
1846 cancel_work_sync(&rtlpriv->works.lps_change_work);
1848 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1849 while (ppsc->rfchange_inprogress) {
1850 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1851 if (RFInProgressTimeOut > 100) {
1852 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1856 RFInProgressTimeOut++;
1857 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1859 ppsc->rfchange_inprogress = true;
1860 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1862 rtlpriv->cfg->ops->hw_disable(hw);
1863 /* some things are not needed if firmware not available */
1864 if (!rtlpriv->max_fw_size)
1866 rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1868 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1869 ppsc->rfchange_inprogress = false;
1870 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1872 rtl_pci_enable_aspm(hw);
1875 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1876 struct ieee80211_hw *hw)
1878 struct rtl_priv *rtlpriv = rtl_priv(hw);
1879 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1880 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1881 struct pci_dev *bridge_pdev = pdev->bus->self;
1888 pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1889 venderid = pdev->vendor;
1890 deviceid = pdev->device;
1891 pci_read_config_byte(pdev, 0x8, &revisionid);
1892 pci_read_config_word(pdev, 0x3C, &irqline);
1894 /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1895 * r8192e_pci, and RTL8192SE, which uses this driver. If the
1896 * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1897 * the correct driver is r8192e_pci, thus this routine should
1900 if (deviceid == RTL_PCI_8192SE_DID &&
1901 revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1904 if (deviceid == RTL_PCI_8192_DID ||
1905 deviceid == RTL_PCI_0044_DID ||
1906 deviceid == RTL_PCI_0047_DID ||
1907 deviceid == RTL_PCI_8192SE_DID ||
1908 deviceid == RTL_PCI_8174_DID ||
1909 deviceid == RTL_PCI_8173_DID ||
1910 deviceid == RTL_PCI_8172_DID ||
1911 deviceid == RTL_PCI_8171_DID) {
1912 switch (revisionid) {
1913 case RTL_PCI_REVISION_ID_8192PCIE:
1914 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1915 "8192 PCI-E is found - vid/did=%x/%x\n",
1916 venderid, deviceid);
1917 rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1919 case RTL_PCI_REVISION_ID_8192SE:
1920 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1921 "8192SE is found - vid/did=%x/%x\n",
1922 venderid, deviceid);
1923 rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1926 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1927 "Err: Unknown device - vid/did=%x/%x\n",
1928 venderid, deviceid);
1929 rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1933 } else if (deviceid == RTL_PCI_8723AE_DID) {
1934 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1935 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1936 "8723AE PCI-E is found - "
1937 "vid/did=%x/%x\n", venderid, deviceid);
1938 } else if (deviceid == RTL_PCI_8192CET_DID ||
1939 deviceid == RTL_PCI_8192CE_DID ||
1940 deviceid == RTL_PCI_8191CE_DID ||
1941 deviceid == RTL_PCI_8188CE_DID) {
1942 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1943 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1944 "8192C PCI-E is found - vid/did=%x/%x\n",
1945 venderid, deviceid);
1946 } else if (deviceid == RTL_PCI_8192DE_DID ||
1947 deviceid == RTL_PCI_8192DE_DID2) {
1948 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1949 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1950 "8192D PCI-E is found - vid/did=%x/%x\n",
1951 venderid, deviceid);
1952 } else if (deviceid == RTL_PCI_8188EE_DID) {
1953 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1954 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1955 "Find adapter, Hardware type is 8188EE\n");
1956 } else if (deviceid == RTL_PCI_8723BE_DID) {
1957 rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
1958 RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1959 "Find adapter, Hardware type is 8723BE\n");
1960 } else if (deviceid == RTL_PCI_8192EE_DID) {
1961 rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
1962 RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1963 "Find adapter, Hardware type is 8192EE\n");
1964 } else if (deviceid == RTL_PCI_8821AE_DID) {
1965 rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
1966 RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1967 "Find adapter, Hardware type is 8821AE\n");
1968 } else if (deviceid == RTL_PCI_8812AE_DID) {
1969 rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
1970 RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1971 "Find adapter, Hardware type is 8812AE\n");
1973 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1974 "Err: Unknown device - vid/did=%x/%x\n",
1975 venderid, deviceid);
1977 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1980 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1981 if (revisionid == 0 || revisionid == 1) {
1982 if (revisionid == 0) {
1983 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1984 "Find 92DE MAC0\n");
1985 rtlhal->interfaceindex = 0;
1986 } else if (revisionid == 1) {
1987 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1988 "Find 92DE MAC1\n");
1989 rtlhal->interfaceindex = 1;
1992 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1993 "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
1994 venderid, deviceid, revisionid);
1995 rtlhal->interfaceindex = 0;
1999 /* 92ee use new trx flow */
2000 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
2001 rtlpriv->use_new_trx_flow = true;
2003 rtlpriv->use_new_trx_flow = false;
2006 pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2007 pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2008 pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2010 /*find bridge info */
2011 pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2012 /* some ARM have no bridge_pdev and will crash here
2013 * so we should check if bridge_pdev is NULL
2016 /*find bridge info if available */
2017 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2018 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2019 if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2020 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2021 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2022 "Pci Bridge Vendor is found index: %d\n",
2029 if (pcipriv->ndis_adapter.pcibridge_vendor !=
2030 PCI_BRIDGE_VENDOR_UNKNOWN) {
2031 pcipriv->ndis_adapter.pcibridge_busnum =
2032 bridge_pdev->bus->number;
2033 pcipriv->ndis_adapter.pcibridge_devnum =
2034 PCI_SLOT(bridge_pdev->devfn);
2035 pcipriv->ndis_adapter.pcibridge_funcnum =
2036 PCI_FUNC(bridge_pdev->devfn);
2037 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2038 pci_pcie_cap(bridge_pdev);
2039 pcipriv->ndis_adapter.num4bytes =
2040 (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2042 rtl_pci_get_linkcontrol_field(hw);
2044 if (pcipriv->ndis_adapter.pcibridge_vendor ==
2045 PCI_BRIDGE_VENDOR_AMD) {
2046 pcipriv->ndis_adapter.amd_l1_patch =
2047 rtl_pci_get_amd_l1_patch(hw);
2051 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2052 "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2053 pcipriv->ndis_adapter.busnumber,
2054 pcipriv->ndis_adapter.devnumber,
2055 pcipriv->ndis_adapter.funcnumber,
2056 pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2058 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2059 "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2060 pcipriv->ndis_adapter.pcibridge_busnum,
2061 pcipriv->ndis_adapter.pcibridge_devnum,
2062 pcipriv->ndis_adapter.pcibridge_funcnum,
2063 pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2064 pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2065 pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2066 pcipriv->ndis_adapter.amd_l1_patch);
2068 rtl_pci_parse_configuration(pdev, hw);
2069 list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2074 static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2076 struct rtl_priv *rtlpriv = rtl_priv(hw);
2077 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2078 struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2081 ret = pci_enable_msi(rtlpci->pdev);
2085 ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2086 IRQF_SHARED, KBUILD_MODNAME, hw);
2088 pci_disable_msi(rtlpci->pdev);
2092 rtlpci->using_msi = true;
2094 RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2095 "MSI Interrupt Mode!\n");
2099 static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2101 struct rtl_priv *rtlpriv = rtl_priv(hw);
2102 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2103 struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2106 ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2107 IRQF_SHARED, KBUILD_MODNAME, hw);
2111 rtlpci->using_msi = false;
2112 RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2113 "Pin-based Interrupt Mode!\n");
2117 static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2119 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2120 struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2123 if (rtlpci->msi_support) {
2124 ret = rtl_pci_intr_mode_msi(hw);
2126 ret = rtl_pci_intr_mode_legacy(hw);
2128 ret = rtl_pci_intr_mode_legacy(hw);
2133 int rtl_pci_probe(struct pci_dev *pdev,
2134 const struct pci_device_id *id)
2136 struct ieee80211_hw *hw = NULL;
2138 struct rtl_priv *rtlpriv = NULL;
2139 struct rtl_pci_priv *pcipriv = NULL;
2140 struct rtl_pci *rtlpci;
2141 unsigned long pmem_start, pmem_len, pmem_flags;
2144 err = pci_enable_device(pdev);
2146 RT_ASSERT(false, "%s : Cannot enable new PCI device\n",
2151 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
2152 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
2154 "Unable to obtain 32bit DMA for consistent allocations\n");
2160 pci_set_master(pdev);
2162 hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2163 sizeof(struct rtl_priv), &rtl_ops);
2166 "%s : ieee80211 alloc failed\n", pci_name(pdev));
2171 SET_IEEE80211_DEV(hw, &pdev->dev);
2172 pci_set_drvdata(pdev, hw);
2176 pcipriv = (void *)rtlpriv->priv;
2177 pcipriv->dev.pdev = pdev;
2178 init_completion(&rtlpriv->firmware_loading_complete);
2179 /*proximity init here*/
2180 rtlpriv->proximity.proxim_on = false;
2182 pcipriv = (void *)rtlpriv->priv;
2183 pcipriv->dev.pdev = pdev;
2185 /* init cfg & intf_ops */
2186 rtlpriv->rtlhal.interface = INTF_PCI;
2187 rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2188 rtlpriv->intf_ops = &rtl_pci_ops;
2189 rtlpriv->glb_var = &rtl_global_var;
2192 *init dbgp flags before all
2193 *other functions, because we will
2194 *use it in other funtions like
2195 *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
2196 *you can not use these macro
2199 rtl_dbgp_flag_init(hw);
2202 err = pci_request_regions(pdev, KBUILD_MODNAME);
2204 RT_ASSERT(false, "Can't obtain PCI resources\n");
2208 pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2209 pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2210 pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2212 /*shared mem start */
2213 rtlpriv->io.pci_mem_start =
2214 (unsigned long)pci_iomap(pdev,
2215 rtlpriv->cfg->bar_id, pmem_len);
2216 if (rtlpriv->io.pci_mem_start == 0) {
2217 RT_ASSERT(false, "Can't map PCI mem\n");
2222 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2223 "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2224 pmem_start, pmem_len, pmem_flags,
2225 rtlpriv->io.pci_mem_start);
2227 /* Disable Clk Request */
2228 pci_write_config_byte(pdev, 0x81, 0);
2230 pci_write_config_byte(pdev, 0x44, 0);
2231 pci_write_config_byte(pdev, 0x04, 0x06);
2232 pci_write_config_byte(pdev, 0x04, 0x07);
2235 if (!_rtl_pci_find_adapter(pdev, hw)) {
2240 /* Init IO handler */
2241 _rtl_pci_io_handler_init(&pdev->dev, hw);
2243 /*like read eeprom and so on */
2244 rtlpriv->cfg->ops->read_eeprom_info(hw);
2246 /* Init mac80211 sw */
2247 err = rtl_init_core(hw);
2249 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2250 "Can't allocate sw for mac80211\n");
2255 err = rtl_pci_init(hw, pdev);
2257 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Failed to init PCI\n");
2261 if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2262 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");
2266 rtlpriv->cfg->ops->init_sw_leds(hw);
2269 rtl_pci_init_aspm(hw);
2271 err = ieee80211_register_hw(hw);
2273 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2274 "Can't register mac80211 hw.\n");
2278 rtlpriv->mac80211.mac80211_registered = 1;
2280 err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
2282 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2283 "failed to create sysfs device attributes\n");
2288 rtl_init_rfkill(hw); /* Init PCI sw */
2290 rtlpci = rtl_pcidev(pcipriv);
2291 err = rtl_pci_intr_mode_decide(hw);
2293 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2294 "%s: failed to register IRQ handler\n",
2295 wiphy_name(hw->wiphy));
2298 rtlpci->irq_alloc = 1;
2300 set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2304 pci_set_drvdata(pdev, NULL);
2305 rtl_deinit_core(hw);
2307 if (rtlpriv->io.pci_mem_start != 0)
2308 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2311 pci_release_regions(pdev);
2312 complete(&rtlpriv->firmware_loading_complete);
2316 ieee80211_free_hw(hw);
2317 pci_disable_device(pdev);
2322 EXPORT_SYMBOL(rtl_pci_probe);
2324 void rtl_pci_disconnect(struct pci_dev *pdev)
2326 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2327 struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2328 struct rtl_priv *rtlpriv = rtl_priv(hw);
2329 struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2330 struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2332 /* just in case driver is removed before firmware callback */
2333 wait_for_completion(&rtlpriv->firmware_loading_complete);
2334 clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2336 sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
2338 /*ieee80211_unregister_hw will call ops_stop */
2339 if (rtlmac->mac80211_registered == 1) {
2340 ieee80211_unregister_hw(hw);
2341 rtlmac->mac80211_registered = 0;
2343 rtl_deinit_deferred_work(hw);
2344 rtlpriv->intf_ops->adapter_stop(hw);
2346 rtlpriv->cfg->ops->disable_interrupt(hw);
2349 rtl_deinit_rfkill(hw);
2352 rtl_deinit_core(hw);
2353 rtlpriv->cfg->ops->deinit_sw_vars(hw);
2355 if (rtlpci->irq_alloc) {
2356 synchronize_irq(rtlpci->pdev->irq);
2357 free_irq(rtlpci->pdev->irq, hw);
2358 rtlpci->irq_alloc = 0;
2361 if (rtlpci->using_msi)
2362 pci_disable_msi(rtlpci->pdev);
2364 list_del(&rtlpriv->list);
2365 if (rtlpriv->io.pci_mem_start != 0) {
2366 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2367 pci_release_regions(pdev);
2370 pci_disable_device(pdev);
2372 rtl_pci_disable_aspm(hw);
2374 pci_set_drvdata(pdev, NULL);
2376 ieee80211_free_hw(hw);
2378 EXPORT_SYMBOL(rtl_pci_disconnect);
2380 #ifdef CONFIG_PM_SLEEP
2381 /***************************************
2382 kernel pci power state define:
2383 PCI_D0 ((pci_power_t __force) 0)
2384 PCI_D1 ((pci_power_t __force) 1)
2385 PCI_D2 ((pci_power_t __force) 2)
2386 PCI_D3hot ((pci_power_t __force) 3)
2387 PCI_D3cold ((pci_power_t __force) 4)
2388 PCI_UNKNOWN ((pci_power_t __force) 5)
2390 This function is called when system
2391 goes into suspend state mac80211 will
2392 call rtl_mac_stop() from the mac80211
2393 suspend function first, So there is
2394 no need to call hw_disable here.
2395 ****************************************/
2396 int rtl_pci_suspend(struct device *dev)
2398 struct pci_dev *pdev = to_pci_dev(dev);
2399 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2400 struct rtl_priv *rtlpriv = rtl_priv(hw);
2402 rtlpriv->cfg->ops->hw_suspend(hw);
2403 rtl_deinit_rfkill(hw);
2407 EXPORT_SYMBOL(rtl_pci_suspend);
2409 int rtl_pci_resume(struct device *dev)
2411 struct pci_dev *pdev = to_pci_dev(dev);
2412 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2413 struct rtl_priv *rtlpriv = rtl_priv(hw);
2415 rtlpriv->cfg->ops->hw_resume(hw);
2416 rtl_init_rfkill(hw);
2419 EXPORT_SYMBOL(rtl_pci_resume);
2420 #endif /* CONFIG_PM_SLEEP */
2422 struct rtl_intf_ops rtl_pci_ops = {
2423 .read_efuse_byte = read_efuse_byte,
2424 .adapter_start = rtl_pci_start,
2425 .adapter_stop = rtl_pci_stop,
2426 .check_buddy_priv = rtl_pci_check_buddy_priv,
2427 .adapter_tx = rtl_pci_tx,
2428 .flush = rtl_pci_flush,
2429 .reset_trx_ring = rtl_pci_reset_trx_ring,
2430 .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2432 .disable_aspm = rtl_pci_disable_aspm,
2433 .enable_aspm = rtl_pci_enable_aspm,