drivers/net/wireless/rtlwifi/rtl8188ee/pwrseqcmd.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2013  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include "pwrseq.h"
  31
  32
  33 /*      Description:
  34  *              This routine deal with the Power Configuration CMDs
  35  *               parsing for RTL8723/RTL8188E Series IC.
  36  *      Assumption:
  37  *              We should follow specific format which was released from HW SD.
  38  *
  39  *      2011.07.07, added by Roger.
  40  */
  41
  42 bool rtl88_hal_pwrseqcmdparsing(struct rtl_priv *rtlpriv, u8 cut_version,
  43                                 u8 fab_version, u8 interface_type,
  44                                 struct wlan_pwr_cfg pwrcfgcmd[])
  45 {
  46         struct wlan_pwr_cfg cmd = {0};
  47         bool polling_bit = false;
  48         u32 ary_idx = 0;
  49         u8 val = 0;
  50         u32 offset = 0;
  51         u32 polling_count = 0;
  52         u32 max_polling_cnt = 5000;
  53
  54         do {
  55                 cmd = pwrcfgcmd[ary_idx];
  56                 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  57                          "rtl88_hal_pwrseqcmdparsing(): offset(%#x), cut_msk(%#x), fab_msk(%#x),"
  58                          "interface_msk(%#x), base(%#x), cmd(%#x), msk(%#x), val(%#x)\n",
  59                          GET_PWR_CFG_OFFSET(cmd),
  60                          GET_PWR_CFG_CUT_MASK(cmd),
  61                          GET_PWR_CFG_FAB_MASK(cmd),
  62                          GET_PWR_CFG_INTF_MASK(cmd),
  63                          GET_PWR_CFG_BASE(cmd),
  64                          GET_PWR_CFG_CMD(cmd),
  65                          GET_PWR_CFG_MASK(cmd),
  66                          GET_PWR_CFG_VALUE(cmd));
  67
  68                 if ((GET_PWR_CFG_FAB_MASK(cmd) & fab_version) &&
  69                     (GET_PWR_CFG_CUT_MASK(cmd) & cut_version) &&
  70                     (GET_PWR_CFG_INTF_MASK(cmd) & interface_type)) {
  71                         switch (GET_PWR_CFG_CMD(cmd)) {
  72                         case PWR_CMD_READ:
  73                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  74                                          "rtl88_hal_pwrseqcmdparsing(): PWR_CMD_READ\n");
  75                                 break;
  76                         case PWR_CMD_WRITE: {
  77                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  78                                          "rtl88_hal_pwrseqcmdparsing(): PWR_CMD_WRITE\n");
  79                                 offset = GET_PWR_CFG_OFFSET(cmd);
  80
  81                                         /*Read the val from system register*/
  82                                         val = rtl_read_byte(rtlpriv, offset);
  83                                         val &= (~(GET_PWR_CFG_MASK(cmd)));
  84                                         val |= (GET_PWR_CFG_VALUE(cmd) &
  85                                                 GET_PWR_CFG_MASK(cmd));
  86
  87                                         /*Write the val back to sytem register*/
  88                                         rtl_write_byte(rtlpriv, offset, val);
  89                                 }
  90                                 break;
  91                         case PWR_CMD_POLLING:
  92                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
  93                                          "rtl88_hal_pwrseqcmdparsing(): PWR_CMD_POLLING\n");
  94                                 polling_bit = false;
  95                                 offset = GET_PWR_CFG_OFFSET(cmd);
  96
  97                                 do {
  98                                         val = rtl_read_byte(rtlpriv, offset);
  99
 100                                         val = val & GET_PWR_CFG_MASK(cmd);
 101                                         if (val == (GET_PWR_CFG_VALUE(cmd) &
 102                                                     GET_PWR_CFG_MASK(cmd)))
 103                                                 polling_bit = true;
 104                                         else
 105                                                 udelay(10);
 106
 107                                         if (polling_count++ > max_polling_cnt) {
 108                                                 RT_TRACE(rtlpriv, COMP_INIT,
 109                                                          DBG_LOUD,
 110                                                          "polling fail in pwrseqcmd\n");
 111                                                 return false;
 112                                         }
 113                                 } while (!polling_bit);
 114
 115                                 break;
 116                         case PWR_CMD_DELAY:
 117                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
 118                                          "rtl88_hal_pwrseqcmdparsing(): PWR_CMD_DELAY\n");
 119                                 if (GET_PWR_CFG_VALUE(cmd) == PWRSEQ_DELAY_US)
 120                                         udelay(GET_PWR_CFG_OFFSET(cmd));
 121                                 else
 122                                         mdelay(GET_PWR_CFG_OFFSET(cmd));
 123                                 break;
 124                         case PWR_CMD_END:
 125                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
 126                                          "rtl88_hal_pwrseqcmdparsing(): PWR_CMD_END\n");
 127                                 return true;
 128                                 break;
 129                         default:
 130                                 RT_ASSERT(false,
 131                                           "rtl88_hal_pwrseqcmdparsing(): Unknown CMD!!\n");
 132                                 break;
 133                         }
 134                 }
 135
 136                 ary_idx++;
 137         } while (1);
 138
 139         return true;
 140 }