1 /******************************************************************************
3 * Copyright(c) 2009-2012 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
26 * Larry Finger <Larry.Finger@lwfinger.net>
28 *****************************************************************************/
38 static const u32 edca_setting_dl[PEER_MAX] = {
39 0xa44f, /* 0 UNKNOWN */
40 0x5ea44f, /* 1 REALTEK_90 */
41 0x5ea44f, /* 2 REALTEK_92SE */
49 static const u32 edca_setting_dl_gmode[PEER_MAX] = {
50 0x4322, /* 0 UNKNOWN */
51 0xa44f, /* 1 REALTEK_90 */
52 0x5ea44f, /* 2 REALTEK_92SE */
57 0x5ea44f, /* 7 MARV */
60 static const u32 edca_setting_ul[PEER_MAX] = {
61 0x5e4322, /* 0 UNKNOWN */
62 0xa44f, /* 1 REALTEK_90 */
63 0x5ea44f, /* 2 REALTEK_92SE */
64 0x5ea322, /* 3 BROAD */
67 0x3ea44f, /* 6 CISCO */
68 0x5ea44f, /* 7 MARV */
71 static void _rtl92s_dm_check_edca_turbo(struct ieee80211_hw *hw)
73 struct rtl_priv *rtlpriv = rtl_priv(hw);
74 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
76 static u64 last_txok_cnt;
77 static u64 last_rxok_cnt;
81 u32 edca_be_ul = edca_setting_ul[mac->vendor];
82 u32 edca_be_dl = edca_setting_dl[mac->vendor];
83 u32 edca_gmode = edca_setting_dl_gmode[mac->vendor];
85 if (mac->link_state != MAC80211_LINKED) {
86 rtlpriv->dm.current_turbo_edca = false;
87 goto dm_checkedcaturbo_exit;
90 if ((!rtlpriv->dm.is_any_nonbepkts) &&
91 (!rtlpriv->dm.disable_framebursting)) {
92 cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
93 cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
95 if (rtlpriv->phy.rf_type == RF_1T2R) {
96 if (cur_txok_cnt > 4 * cur_rxok_cnt) {
97 /* Uplink TP is present. */
98 if (rtlpriv->dm.is_cur_rdlstate ||
99 !rtlpriv->dm.current_turbo_edca) {
100 rtl_write_dword(rtlpriv, EDCAPARA_BE,
102 rtlpriv->dm.is_cur_rdlstate = false;
104 } else {/* Balance TP is present. */
105 if (!rtlpriv->dm.is_cur_rdlstate ||
106 !rtlpriv->dm.current_turbo_edca) {
107 if (mac->mode == WIRELESS_MODE_G ||
108 mac->mode == WIRELESS_MODE_B)
109 rtl_write_dword(rtlpriv,
113 rtl_write_dword(rtlpriv,
116 rtlpriv->dm.is_cur_rdlstate = true;
119 rtlpriv->dm.current_turbo_edca = true;
121 if (cur_rxok_cnt > 4 * cur_txok_cnt) {
122 if (!rtlpriv->dm.is_cur_rdlstate ||
123 !rtlpriv->dm.current_turbo_edca) {
124 if (mac->mode == WIRELESS_MODE_G ||
125 mac->mode == WIRELESS_MODE_B)
126 rtl_write_dword(rtlpriv,
130 rtl_write_dword(rtlpriv,
133 rtlpriv->dm.is_cur_rdlstate = true;
136 if (rtlpriv->dm.is_cur_rdlstate ||
137 !rtlpriv->dm.current_turbo_edca) {
138 rtl_write_dword(rtlpriv, EDCAPARA_BE,
140 rtlpriv->dm.is_cur_rdlstate = false;
143 rtlpriv->dm.current_turbo_edca = true;
146 if (rtlpriv->dm.current_turbo_edca) {
148 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
150 rtlpriv->dm.current_turbo_edca = false;
154 dm_checkedcaturbo_exit:
155 rtlpriv->dm.is_any_nonbepkts = false;
156 last_txok_cnt = rtlpriv->stats.txbytesunicast;
157 last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
160 static void _rtl92s_dm_txpowertracking_callback_thermalmeter(
161 struct ieee80211_hw *hw)
163 struct rtl_priv *rtlpriv = rtl_priv(hw);
164 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
167 rtlpriv->dm.txpower_trackinginit = true;
169 thermalvalue = (u8)rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0x1f);
171 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
172 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermal meter 0x%x\n",
174 rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter);
177 rtlpriv->dm.thermalvalue = thermalvalue;
178 rtl92s_phy_set_fw_cmd(hw, FW_CMD_TXPWR_TRACK_THERMAL);
181 rtlpriv->dm.txpowercount = 0;
184 static void _rtl92s_dm_check_txpowertracking_thermalmeter(
185 struct ieee80211_hw *hw)
187 struct rtl_priv *rtlpriv = rtl_priv(hw);
188 struct rtl_phy *rtlphy = &(rtlpriv->phy);
189 static u8 tm_trigger;
190 u8 tx_power_checkcnt = 5;
193 if (rtlphy->rf_type == RF_2T2R)
196 if (!rtlpriv->dm.txpower_tracking)
199 if (rtlpriv->dm.txpowercount <= tx_power_checkcnt) {
200 rtlpriv->dm.txpowercount++;
205 rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER,
206 RFREG_OFFSET_MASK, 0x60);
209 _rtl92s_dm_txpowertracking_callback_thermalmeter(hw);
214 static void _rtl92s_dm_refresh_rateadaptive_mask(struct ieee80211_hw *hw)
216 struct rtl_priv *rtlpriv = rtl_priv(hw);
217 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
218 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
219 struct rate_adaptive *ra = &(rtlpriv->ra);
221 u32 low_rssi_thresh = 0;
222 u32 middle_rssi_thresh = 0;
223 u32 high_rssi_thresh = 0;
224 struct ieee80211_sta *sta = NULL;
226 if (is_hal_stop(rtlhal))
229 if (!rtlpriv->dm.useramask)
232 if (!rtlpriv->dm.inform_fw_driverctrldm) {
233 rtl92s_phy_set_fw_cmd(hw, FW_CMD_CTRL_DM_BY_DRIVER);
234 rtlpriv->dm.inform_fw_driverctrldm = true;
238 if (mac->opmode == NL80211_IFTYPE_STATION)
239 sta = get_sta(hw, mac->vif, mac->bssid);
240 if ((mac->link_state == MAC80211_LINKED) &&
241 (mac->opmode == NL80211_IFTYPE_STATION)) {
242 switch (ra->pre_ratr_state) {
243 case DM_RATR_STA_HIGH:
244 high_rssi_thresh = 40;
245 middle_rssi_thresh = 30;
246 low_rssi_thresh = 20;
248 case DM_RATR_STA_MIDDLE:
249 high_rssi_thresh = 44;
250 middle_rssi_thresh = 30;
251 low_rssi_thresh = 20;
253 case DM_RATR_STA_LOW:
254 high_rssi_thresh = 44;
255 middle_rssi_thresh = 34;
256 low_rssi_thresh = 20;
258 case DM_RATR_STA_ULTRALOW:
259 high_rssi_thresh = 44;
260 middle_rssi_thresh = 34;
261 low_rssi_thresh = 24;
264 high_rssi_thresh = 44;
265 middle_rssi_thresh = 34;
266 low_rssi_thresh = 24;
270 if (rtlpriv->dm.undec_sm_pwdb > (long)high_rssi_thresh) {
271 ra->ratr_state = DM_RATR_STA_HIGH;
272 } else if (rtlpriv->dm.undec_sm_pwdb >
273 (long)middle_rssi_thresh) {
274 ra->ratr_state = DM_RATR_STA_LOW;
275 } else if (rtlpriv->dm.undec_sm_pwdb >
276 (long)low_rssi_thresh) {
277 ra->ratr_state = DM_RATR_STA_LOW;
279 ra->ratr_state = DM_RATR_STA_ULTRALOW;
282 if (ra->pre_ratr_state != ra->ratr_state) {
283 RT_TRACE(rtlpriv, COMP_RATE, DBG_LOUD,
284 "RSSI = %ld RSSI_LEVEL = %d PreState = %d, CurState = %d\n",
285 rtlpriv->dm.undec_sm_pwdb, ra->ratr_state,
286 ra->pre_ratr_state, ra->ratr_state);
288 rtlpriv->cfg->ops->update_rate_tbl(hw, sta,
290 ra->pre_ratr_state = ra->ratr_state;
296 static void _rtl92s_dm_switch_baseband_mrc(struct ieee80211_hw *hw)
298 struct rtl_priv *rtlpriv = rtl_priv(hw);
299 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
300 struct rtl_phy *rtlphy = &(rtlpriv->phy);
301 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
303 bool enable_mrc = true;
304 long tmpentry_maxpwdb = 0;
308 if (is_hal_stop(rtlhal))
311 if ((rtlphy->rf_type == RF_1T1R) || (rtlphy->rf_type == RF_2T2R))
314 rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_MRC, (u8 *)(¤t_mrc));
316 if (mac->link_state >= MAC80211_LINKED) {
317 if (rtlpriv->dm.undec_sm_pwdb > tmpentry_maxpwdb) {
318 rssi_a = rtlpriv->stats.rx_rssi_percentage[RF90_PATH_A];
319 rssi_b = rtlpriv->stats.rx_rssi_percentage[RF90_PATH_B];
323 /* MRC settings would NOT affect TP on Wireless B mode. */
324 if (mac->mode != WIRELESS_MODE_B) {
325 if ((rssi_a == 0) && (rssi_b == 0)) {
327 } else if (rssi_b > 30) {
330 } else if (rssi_b < 5) {
331 /* Turn off B-path */
333 /* Take care of RSSI differentiation. */
334 } else if (rssi_a > 15 && (rssi_a >= rssi_b)) {
335 if ((rssi_a - rssi_b) > 15)
336 /* Turn off B-path */
338 else if ((rssi_a - rssi_b) < 10)
342 enable_mrc = current_mrc;
349 /* Update MRC settings if needed. */
350 if (enable_mrc != current_mrc)
351 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_MRC,
356 void rtl92s_dm_init_edca_turbo(struct ieee80211_hw *hw)
358 struct rtl_priv *rtlpriv = rtl_priv(hw);
360 rtlpriv->dm.current_turbo_edca = false;
361 rtlpriv->dm.is_any_nonbepkts = false;
362 rtlpriv->dm.is_cur_rdlstate = false;
365 static void _rtl92s_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
367 struct rtl_priv *rtlpriv = rtl_priv(hw);
368 struct rate_adaptive *ra = &(rtlpriv->ra);
370 ra->ratr_state = DM_RATR_STA_MAX;
371 ra->pre_ratr_state = DM_RATR_STA_MAX;
373 if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
374 rtlpriv->dm.useramask = true;
376 rtlpriv->dm.useramask = false;
378 rtlpriv->dm.useramask = false;
379 rtlpriv->dm.inform_fw_driverctrldm = false;
382 static void _rtl92s_dm_init_txpowertracking_thermalmeter(
383 struct ieee80211_hw *hw)
385 struct rtl_priv *rtlpriv = rtl_priv(hw);
387 rtlpriv->dm.txpower_tracking = true;
388 rtlpriv->dm.txpowercount = 0;
389 rtlpriv->dm.txpower_trackinginit = false;
392 static void _rtl92s_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
394 struct rtl_priv *rtlpriv = rtl_priv(hw);
395 struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
398 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, MASKDWORD);
399 falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
401 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, MASKDWORD);
402 falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
403 falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
404 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, MASKDWORD);
405 falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
407 falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
408 falsealm_cnt->cnt_rate_illegal + falsealm_cnt->cnt_crc8_fail +
409 falsealm_cnt->cnt_mcs_fail;
411 /* read CCK false alarm */
412 ret_value = rtl_get_bbreg(hw, 0xc64, MASKDWORD);
413 falsealm_cnt->cnt_cck_fail = (ret_value & 0xffff);
414 falsealm_cnt->cnt_all = falsealm_cnt->cnt_ofdm_fail +
415 falsealm_cnt->cnt_cck_fail;
418 static void rtl92s_backoff_enable_flag(struct ieee80211_hw *hw)
420 struct rtl_priv *rtlpriv = rtl_priv(hw);
421 struct dig_t *digtable = &rtlpriv->dm_digtable;
422 struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
424 if (falsealm_cnt->cnt_all > digtable->fa_highthresh) {
425 if ((digtable->back_val - 6) <
426 digtable->backoffval_range_min)
427 digtable->back_val = digtable->backoffval_range_min;
429 digtable->back_val -= 6;
430 } else if (falsealm_cnt->cnt_all < digtable->fa_lowthresh) {
431 if ((digtable->back_val + 6) >
432 digtable->backoffval_range_max)
434 digtable->backoffval_range_max;
436 digtable->back_val += 6;
440 static void _rtl92s_dm_initial_gain_sta_beforeconnect(struct ieee80211_hw *hw)
442 struct rtl_priv *rtlpriv = rtl_priv(hw);
443 struct dig_t *digtable = &rtlpriv->dm_digtable;
444 struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
445 static u8 initialized, force_write;
448 if ((digtable->pre_sta_cstate == digtable->cur_sta_cstate) ||
449 (digtable->cur_sta_cstate == DIG_STA_BEFORE_CONNECT)) {
450 if (digtable->cur_sta_cstate == DIG_STA_BEFORE_CONNECT) {
451 if (rtlpriv->psc.rfpwr_state != ERFON)
454 if (digtable->backoff_enable_flag)
455 rtl92s_backoff_enable_flag(hw);
457 digtable->back_val = DM_DIG_BACKOFF;
459 if ((digtable->rssi_val + 10 - digtable->back_val) >
460 digtable->rx_gain_range_max)
461 digtable->cur_igvalue =
462 digtable->rx_gain_range_max;
463 else if ((digtable->rssi_val + 10 - digtable->back_val)
464 < digtable->rx_gain_range_min)
465 digtable->cur_igvalue =
466 digtable->rx_gain_range_min;
468 digtable->cur_igvalue = digtable->rssi_val + 10
469 - digtable->back_val;
471 if (falsealm_cnt->cnt_all > 10000)
472 digtable->cur_igvalue =
473 (digtable->cur_igvalue > 0x33) ?
474 digtable->cur_igvalue : 0x33;
476 if (falsealm_cnt->cnt_all > 16000)
477 digtable->cur_igvalue =
478 digtable->rx_gain_range_max;
479 /* connected -> connected or disconnected -> disconnected */
481 /* Firmware control DIG, do nothing in driver dm */
484 /* disconnected -> connected or connected ->
485 * disconnected or beforeconnect->(dis)connected */
488 digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
489 rtl92s_phy_set_fw_cmd(hw, FW_CMD_DIG_ENABLE);
491 digtable->back_val = DM_DIG_BACKOFF;
492 digtable->cur_igvalue = rtlpriv->phy.default_initialgain[0];
493 digtable->pre_igvalue = 0;
497 /* Forced writing to prevent from fw-dig overwriting. */
498 if (digtable->pre_igvalue != rtl_get_bbreg(hw, ROFDM0_XAAGCCORE1,
502 if ((digtable->pre_igvalue != digtable->cur_igvalue) ||
503 !initialized || force_write) {
505 rtl92s_phy_set_fw_cmd(hw, FW_CMD_DIG_DISABLE);
507 initial_gain = (u8)digtable->cur_igvalue;
509 /* Set initial gain. */
510 rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, MASKBYTE0, initial_gain);
511 rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, MASKBYTE0, initial_gain);
512 digtable->pre_igvalue = digtable->cur_igvalue;
518 static void _rtl92s_dm_ctrl_initgain_bytwoport(struct ieee80211_hw *hw)
520 struct rtl_priv *rtlpriv = rtl_priv(hw);
521 struct dig_t *dig = &rtlpriv->dm_digtable;
523 if (rtlpriv->mac80211.act_scanning)
526 /* Decide the current status and if modify initial gain or not */
527 if (rtlpriv->mac80211.link_state >= MAC80211_LINKED ||
528 rtlpriv->mac80211.opmode == NL80211_IFTYPE_ADHOC)
529 dig->cur_sta_cstate = DIG_STA_CONNECT;
531 dig->cur_sta_cstate = DIG_STA_DISCONNECT;
533 dig->rssi_val = rtlpriv->dm.undec_sm_pwdb;
535 /* Change dig mode to rssi */
536 if (dig->cur_sta_cstate != DIG_STA_DISCONNECT) {
537 if (dig->dig_twoport_algorithm ==
538 DIG_TWO_PORT_ALGO_FALSE_ALARM) {
539 dig->dig_twoport_algorithm = DIG_TWO_PORT_ALGO_RSSI;
540 rtl92s_phy_set_fw_cmd(hw, FW_CMD_DIG_MODE_SS);
544 _rtl92s_dm_false_alarm_counter_statistics(hw);
545 _rtl92s_dm_initial_gain_sta_beforeconnect(hw);
547 dig->pre_sta_cstate = dig->cur_sta_cstate;
550 static void _rtl92s_dm_ctrl_initgain_byrssi(struct ieee80211_hw *hw)
552 struct rtl_priv *rtlpriv = rtl_priv(hw);
553 struct rtl_phy *rtlphy = &(rtlpriv->phy);
554 struct dig_t *digtable = &rtlpriv->dm_digtable;
557 if (rtlphy->rf_type == RF_2T2R)
560 if (!rtlpriv->dm.dm_initialgain_enable)
563 if (digtable->dig_enable_flag == false)
566 _rtl92s_dm_ctrl_initgain_bytwoport(hw);
569 static void _rtl92s_dm_dynamic_txpower(struct ieee80211_hw *hw)
571 struct rtl_priv *rtlpriv = rtl_priv(hw);
572 struct rtl_phy *rtlphy = &(rtlpriv->phy);
573 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
575 long txpwr_threshold_lv1, txpwr_threshold_lv2;
578 if (rtlphy->rf_type == RF_2T2R)
581 if (!rtlpriv->dm.dynamic_txpower_enable ||
582 rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
583 rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL;
587 if ((mac->link_state < MAC80211_LINKED) &&
588 (rtlpriv->dm.entry_min_undec_sm_pwdb == 0)) {
589 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
590 "Not connected to any\n");
592 rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL;
594 rtlpriv->dm.last_dtp_lvl = TX_HIGHPWR_LEVEL_NORMAL;
598 if (mac->link_state >= MAC80211_LINKED) {
599 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
600 undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb;
601 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
602 "AP Client PWDB = 0x%lx\n",
605 undec_sm_pwdb = rtlpriv->dm.undec_sm_pwdb;
606 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
607 "STA Default Port PWDB = 0x%lx\n",
611 undec_sm_pwdb = rtlpriv->dm.entry_min_undec_sm_pwdb;
613 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
614 "AP Ext Port PWDB = 0x%lx\n",
618 txpwr_threshold_lv2 = TX_POWER_NEAR_FIELD_THRESH_LVL2;
619 txpwr_threshold_lv1 = TX_POWER_NEAR_FIELD_THRESH_LVL1;
621 if (rtl_get_bbreg(hw, 0xc90, MASKBYTE0) == 1)
622 rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL;
623 else if (undec_sm_pwdb >= txpwr_threshold_lv2)
624 rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL2;
625 else if ((undec_sm_pwdb < (txpwr_threshold_lv2 - 3)) &&
626 (undec_sm_pwdb >= txpwr_threshold_lv1))
627 rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL1;
628 else if (undec_sm_pwdb < (txpwr_threshold_lv1 - 3))
629 rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL;
631 if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl))
632 rtl92s_phy_set_txpower(hw, rtlphy->current_channel);
634 rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
637 static void _rtl92s_dm_init_dig(struct ieee80211_hw *hw)
639 struct rtl_priv *rtlpriv = rtl_priv(hw);
640 struct dig_t *digtable = &rtlpriv->dm_digtable;
642 /* Disable DIG scheme now.*/
643 digtable->dig_enable_flag = true;
644 digtable->backoff_enable_flag = true;
646 if ((rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER) &&
647 (hal_get_firmwareversion(rtlpriv) >= 0x3c))
648 digtable->dig_algorithm = DIG_ALGO_BY_TOW_PORT;
650 digtable->dig_algorithm =
651 DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM;
653 digtable->dig_twoport_algorithm = DIG_TWO_PORT_ALGO_RSSI;
654 digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
655 /* off=by real rssi value, on=by digtable->rssi_val for new dig */
656 digtable->dig_dbgmode = DM_DBG_OFF;
657 digtable->dig_slgorithm_switch = 0;
659 /* 2007/10/04 MH Define init gain threshol. */
660 digtable->dig_state = DM_STA_DIG_MAX;
661 digtable->dig_highpwrstate = DM_STA_DIG_MAX;
663 digtable->cur_sta_cstate = DIG_STA_DISCONNECT;
664 digtable->pre_sta_cstate = DIG_STA_DISCONNECT;
665 digtable->cur_ap_cstate = DIG_AP_DISCONNECT;
666 digtable->pre_ap_cstate = DIG_AP_DISCONNECT;
668 digtable->rssi_lowthresh = DM_DIG_THRESH_LOW;
669 digtable->rssi_highthresh = DM_DIG_THRESH_HIGH;
671 digtable->fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
672 digtable->fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
674 digtable->rssi_highpower_lowthresh = DM_DIG_HIGH_PWR_THRESH_LOW;
675 digtable->rssi_highpower_highthresh = DM_DIG_HIGH_PWR_THRESH_HIGH;
677 /* for dig debug rssi value */
678 digtable->rssi_val = 50;
679 digtable->back_val = DM_DIG_BACKOFF;
680 digtable->rx_gain_range_max = DM_DIG_MAX;
682 digtable->rx_gain_range_min = DM_DIG_MIN;
684 digtable->backoffval_range_max = DM_DIG_BACKOFF_MAX;
685 digtable->backoffval_range_min = DM_DIG_BACKOFF_MIN;
688 static void _rtl92s_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
690 struct rtl_priv *rtlpriv = rtl_priv(hw);
692 if ((hal_get_firmwareversion(rtlpriv) >= 60) &&
693 (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER))
694 rtlpriv->dm.dynamic_txpower_enable = true;
696 rtlpriv->dm.dynamic_txpower_enable = false;
698 rtlpriv->dm.last_dtp_lvl = TX_HIGHPWR_LEVEL_NORMAL;
699 rtlpriv->dm.dynamic_txhighpower_lvl = TX_HIGHPWR_LEVEL_NORMAL;
702 void rtl92s_dm_init(struct ieee80211_hw *hw)
704 struct rtl_priv *rtlpriv = rtl_priv(hw);
706 rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
707 rtlpriv->dm.undec_sm_pwdb = -1;
709 _rtl92s_dm_init_dynamic_txpower(hw);
710 rtl92s_dm_init_edca_turbo(hw);
711 _rtl92s_dm_init_rate_adaptive_mask(hw);
712 _rtl92s_dm_init_txpowertracking_thermalmeter(hw);
713 _rtl92s_dm_init_dig(hw);
715 rtl_write_dword(rtlpriv, WFM5, FW_CCA_CHK_ENABLE);
718 void rtl92s_dm_watchdog(struct ieee80211_hw *hw)
720 _rtl92s_dm_check_edca_turbo(hw);
721 _rtl92s_dm_check_txpowertracking_thermalmeter(hw);
722 _rtl92s_dm_ctrl_initgain_byrssi(hw);
723 _rtl92s_dm_dynamic_txpower(hw);
724 _rtl92s_dm_refresh_rateadaptive_mask(hw);
725 _rtl92s_dm_switch_baseband_mrc(hw);