2 * HCI based Driver for NXP PN544 NFC Chip
4 * Copyright (C) 2012 Intel Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the
17 * Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 #include <linux/crc-ccitt.h>
22 #include <linux/module.h>
23 #include <linux/delay.h>
24 #include <linux/slab.h>
25 #include <linux/miscdevice.h>
26 #include <linux/interrupt.h>
27 #include <linux/gpio.h>
28 #include <linux/i2c.h>
30 #include <linux/nfc.h>
31 #include <net/nfc/hci.h>
32 #include <net/nfc/llc.h>
34 #include <linux/nfc/pn544.h>
36 #define DRIVER_DESC "HCI NFC driver for PN544"
38 #define PN544_HCI_DRIVER_NAME "pn544_hci"
40 /* Timing restrictions (ms) */
41 #define PN544_HCI_RESETVEN_TIME 30
43 static struct i2c_device_id pn544_hci_id_table[] = {
48 MODULE_DEVICE_TABLE(i2c, pn544_hci_id_table);
53 /* framing in HCI mode */
54 #define PN544_HCI_LLC_LEN 1
55 #define PN544_HCI_LLC_CRC 2
56 #define PN544_HCI_LLC_LEN_CRC (PN544_HCI_LLC_LEN + PN544_HCI_LLC_CRC)
57 #define PN544_HCI_LLC_MIN_SIZE (1 + PN544_HCI_LLC_LEN_CRC)
58 #define PN544_HCI_LLC_MAX_PAYLOAD 29
59 #define PN544_HCI_LLC_MAX_SIZE (PN544_HCI_LLC_LEN_CRC + 1 + \
60 PN544_HCI_LLC_MAX_PAYLOAD)
68 #define FULL_VERSION_LEN 11
70 /* Proprietary commands */
71 #define PN544_WRITE 0x3f
73 /* Proprietary gates, events, commands and registers */
75 /* NFC_HCI_RF_READER_A_GATE additional registers and commands */
76 #define PN544_RF_READER_A_AUTO_ACTIVATION 0x10
77 #define PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION 0x12
78 #define PN544_MIFARE_CMD 0x21
80 /* Commands that apply to all RF readers */
81 #define PN544_RF_READER_CMD_PRESENCE_CHECK 0x30
82 #define PN544_RF_READER_CMD_ACTIVATE_NEXT 0x32
84 /* NFC_HCI_ID_MGMT_GATE additional registers */
85 #define PN544_ID_MGMT_FULL_VERSION_SW 0x10
87 #define PN544_RF_READER_ISO15693_GATE 0x12
89 #define PN544_RF_READER_F_GATE 0x14
90 #define PN544_FELICA_ID 0x04
91 #define PN544_FELICA_RAW 0x20
93 #define PN544_RF_READER_JEWEL_GATE 0x15
94 #define PN544_JEWEL_RAW_CMD 0x23
96 #define PN544_RF_READER_NFCIP1_INITIATOR_GATE 0x30
97 #define PN544_RF_READER_NFCIP1_TARGET_GATE 0x31
99 #define PN544_SYS_MGMT_GATE 0x90
100 #define PN544_SYS_MGMT_INFO_NOTIFICATION 0x02
102 #define PN544_POLLING_LOOP_MGMT_GATE 0x94
103 #define PN544_PL_RDPHASES 0x06
104 #define PN544_PL_EMULATION 0x07
105 #define PN544_PL_NFCT_DEACTIVATED 0x09
107 #define PN544_SWP_MGMT_GATE 0xA0
109 #define PN544_NFC_WI_MGMT_GATE 0xA1
111 static struct nfc_hci_gate pn544_gates[] = {
112 {NFC_HCI_ADMIN_GATE, NFC_HCI_INVALID_PIPE},
113 {NFC_HCI_LOOPBACK_GATE, NFC_HCI_INVALID_PIPE},
114 {NFC_HCI_ID_MGMT_GATE, NFC_HCI_INVALID_PIPE},
115 {NFC_HCI_LINK_MGMT_GATE, NFC_HCI_INVALID_PIPE},
116 {NFC_HCI_RF_READER_B_GATE, NFC_HCI_INVALID_PIPE},
117 {NFC_HCI_RF_READER_A_GATE, NFC_HCI_INVALID_PIPE},
118 {PN544_SYS_MGMT_GATE, NFC_HCI_INVALID_PIPE},
119 {PN544_SWP_MGMT_GATE, NFC_HCI_INVALID_PIPE},
120 {PN544_POLLING_LOOP_MGMT_GATE, NFC_HCI_INVALID_PIPE},
121 {PN544_NFC_WI_MGMT_GATE, NFC_HCI_INVALID_PIPE},
122 {PN544_RF_READER_F_GATE, NFC_HCI_INVALID_PIPE},
123 {PN544_RF_READER_JEWEL_GATE, NFC_HCI_INVALID_PIPE},
124 {PN544_RF_READER_ISO15693_GATE, NFC_HCI_INVALID_PIPE},
125 {PN544_RF_READER_NFCIP1_INITIATOR_GATE, NFC_HCI_INVALID_PIPE},
126 {PN544_RF_READER_NFCIP1_TARGET_GATE, NFC_HCI_INVALID_PIPE}
129 /* Largest headroom needed for outgoing custom commands */
130 #define PN544_CMDS_HEADROOM 2
131 #define PN544_FRAME_HEADROOM 1
132 #define PN544_FRAME_TAILROOM 2
134 struct pn544_hci_info {
135 struct i2c_client *i2c_dev;
136 struct nfc_hci_dev *hdev;
138 enum pn544_state state;
140 struct mutex info_lock;
142 unsigned int gpio_en;
143 unsigned int gpio_irq;
144 unsigned int gpio_fw;
145 unsigned int en_polarity;
148 * < 0 if hardware error occured (e.g. i2c err)
149 * and prevents normal operation.
152 data_exchange_cb_t async_cb;
153 void *async_cb_context;
156 static void pn544_hci_platform_init(struct pn544_hci_info *info)
158 int polarity, retry, ret;
159 char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 };
160 int count = sizeof(rset_cmd);
162 pr_info(DRIVER_DESC ": %s\n", __func__);
163 dev_info(&info->i2c_dev->dev, "Detecting nfc_en polarity\n");
165 /* Disable fw download */
166 gpio_set_value(info->gpio_fw, 0);
168 for (polarity = 0; polarity < 2; polarity++) {
169 info->en_polarity = polarity;
173 gpio_set_value(info->gpio_en, !info->en_polarity);
174 usleep_range(10000, 15000);
177 gpio_set_value(info->gpio_en, info->en_polarity);
178 usleep_range(10000, 15000);
181 dev_dbg(&info->i2c_dev->dev, "Sending reset cmd\n");
182 ret = i2c_master_send(info->i2c_dev, rset_cmd, count);
184 dev_info(&info->i2c_dev->dev,
185 "nfc_en polarity : active %s\n",
186 (polarity == 0 ? "low" : "high"));
192 dev_err(&info->i2c_dev->dev,
193 "Could not detect nfc_en polarity, fallback to active high\n");
196 gpio_set_value(info->gpio_en, !info->en_polarity);
199 static int pn544_hci_enable(struct pn544_hci_info *info, int mode)
201 pr_info(DRIVER_DESC ": %s\n", __func__);
203 gpio_set_value(info->gpio_fw, 0);
204 gpio_set_value(info->gpio_en, info->en_polarity);
205 usleep_range(10000, 15000);
210 static void pn544_hci_disable(struct pn544_hci_info *info)
212 pr_info(DRIVER_DESC ": %s\n", __func__);
214 gpio_set_value(info->gpio_fw, 0);
215 gpio_set_value(info->gpio_en, !info->en_polarity);
216 usleep_range(10000, 15000);
218 gpio_set_value(info->gpio_en, info->en_polarity);
219 usleep_range(10000, 15000);
221 gpio_set_value(info->gpio_en, !info->en_polarity);
222 usleep_range(10000, 15000);
225 static int pn544_hci_i2c_write(struct i2c_client *client, u8 *buf, int len)
229 usleep_range(3000, 6000);
231 r = i2c_master_send(client, buf, len);
233 if (r == -EREMOTEIO) { /* Retry, chip was in standby */
234 usleep_range(6000, 10000);
235 r = i2c_master_send(client, buf, len);
238 if (r >= 0 && r != len)
244 static int check_crc(u8 *buf, int buflen)
250 crc = crc_ccitt(0xffff, buf, len - 2);
253 if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) {
254 pr_err(PN544_HCI_DRIVER_NAME ": CRC error 0x%x != 0x%x 0x%x\n",
255 crc, buf[len - 1], buf[len - 2]);
257 pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__);
258 print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,
259 16, 2, buf, buflen, false);
266 * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
267 * that i2c bus will be flushed and that next read will start on a new frame.
268 * returned skb contains only LLC header and payload.
270 * -EREMOTEIO : i2c read error (fatal)
271 * -EBADMSG : frame was incorrect and discarded
272 * -ENOMEM : cannot allocate skb, frame dropped
274 static int pn544_hci_i2c_read(struct i2c_client *client, struct sk_buff **skb)
278 u8 tmp[PN544_HCI_LLC_MAX_SIZE - 1];
280 r = i2c_master_recv(client, &len, 1);
282 dev_err(&client->dev, "cannot read len byte\n");
286 if ((len < (PN544_HCI_LLC_MIN_SIZE - 1)) ||
287 (len > (PN544_HCI_LLC_MAX_SIZE - 1))) {
288 dev_err(&client->dev, "invalid len byte\n");
293 *skb = alloc_skb(1 + len, GFP_KERNEL);
299 *skb_put(*skb, 1) = len;
301 r = i2c_master_recv(client, skb_put(*skb, len), len);
307 r = check_crc((*skb)->data, (*skb)->len);
315 skb_trim(*skb, (*skb)->len - 2);
317 usleep_range(3000, 6000);
322 if (i2c_master_recv(client, tmp, sizeof(tmp)) < 0)
325 usleep_range(3000, 6000);
331 * Reads an shdlc frame from the chip. This is not as straightforward as it
332 * seems. There are cases where we could loose the frame start synchronization.
333 * The frame format is len-data-crc, and corruption can occur anywhere while
334 * transiting on i2c bus, such that we could read an invalid len.
335 * In order to recover synchronization with the next frame, we must be sure
336 * to read the real amount of data without using the len byte. We do this by
337 * assuming the following:
338 * - the chip will always present only one single complete frame on the bus
339 * before triggering the interrupt
340 * - the chip will not present a new frame until we have completely read
341 * the previous one (or until we have handled the interrupt).
342 * The tricky case is when we read a corrupted len that is less than the real
343 * len. We must detect this here in order to determine that we need to flush
344 * the bus. This is the reason why we check the crc here.
346 static irqreturn_t pn544_hci_irq_thread_fn(int irq, void *dev_id)
348 struct pn544_hci_info *info = dev_id;
349 struct i2c_client *client = info->i2c_dev;
350 struct sk_buff *skb = NULL;
354 BUG_ON(irq != info->i2c_dev->irq);
356 dev_dbg(&client->dev, "IRQ\n");
358 if (info->hard_fault != 0)
361 r = pn544_hci_i2c_read(client, &skb);
362 if (r == -EREMOTEIO) {
363 info->hard_fault = r;
365 nfc_hci_recv_frame(info->hdev, NULL);
368 } else if ((r == -ENOMEM) || (r == -EBADMSG)) {
372 nfc_hci_recv_frame(info->hdev, skb);
377 static int pn544_hci_open(struct nfc_hci_dev *hdev)
379 struct pn544_hci_info *info = nfc_hci_get_clientdata(hdev);
382 mutex_lock(&info->info_lock);
384 if (info->state != PN544_ST_COLD) {
389 r = pn544_hci_enable(info, HCI_MODE);
392 info->state = PN544_ST_READY;
395 mutex_unlock(&info->info_lock);
399 static void pn544_hci_close(struct nfc_hci_dev *hdev)
401 struct pn544_hci_info *info = nfc_hci_get_clientdata(hdev);
403 mutex_lock(&info->info_lock);
405 if (info->state == PN544_ST_COLD)
408 pn544_hci_disable(info);
410 info->state = PN544_ST_COLD;
413 mutex_unlock(&info->info_lock);
416 static int pn544_hci_ready(struct nfc_hci_dev *hdev)
419 static struct hw_config {
423 {{0x9f, 0x9a}, 0x00},
425 {{0x98, 0x10}, 0xbc},
427 {{0x9e, 0x71}, 0x00},
429 {{0x98, 0x09}, 0x00},
431 {{0x9e, 0xb4}, 0x00},
433 {{0x9e, 0xd9}, 0xff},
434 {{0x9e, 0xda}, 0xff},
435 {{0x9e, 0xdb}, 0x23},
436 {{0x9e, 0xdc}, 0x21},
437 {{0x9e, 0xdd}, 0x22},
438 {{0x9e, 0xde}, 0x24},
440 {{0x9c, 0x01}, 0x08},
442 {{0x9e, 0xaa}, 0x01},
444 {{0x9b, 0xd1}, 0x0d},
445 {{0x9b, 0xd2}, 0x24},
446 {{0x9b, 0xd3}, 0x0a},
447 {{0x9b, 0xd4}, 0x22},
448 {{0x9b, 0xd5}, 0x08},
449 {{0x9b, 0xd6}, 0x1e},
450 {{0x9b, 0xdd}, 0x1c},
452 {{0x9b, 0x84}, 0x13},
453 {{0x99, 0x81}, 0x7f},
454 {{0x99, 0x31}, 0x70},
456 {{0x98, 0x00}, 0x3f},
458 {{0x9f, 0x09}, 0x00},
460 {{0x9f, 0x0a}, 0x05},
462 {{0x9e, 0xd1}, 0xa1},
463 {{0x99, 0x23}, 0x00},
465 {{0x9e, 0x74}, 0x80},
467 {{0x9f, 0x28}, 0x10},
469 {{0x9f, 0x35}, 0x14},
471 {{0x9f, 0x36}, 0x60},
473 {{0x9c, 0x31}, 0x00},
475 {{0x9c, 0x32}, 0xc8},
477 {{0x9c, 0x19}, 0x40},
479 {{0x9c, 0x1a}, 0x40},
481 {{0x9c, 0x0c}, 0x00},
483 {{0x9c, 0x0d}, 0x00},
485 {{0x9c, 0x12}, 0x00},
487 {{0x9c, 0x13}, 0x00},
489 {{0x98, 0xa2}, 0x0e},
491 {{0x98, 0x93}, 0x40},
493 {{0x98, 0x7d}, 0x02},
494 {{0x98, 0x7e}, 0x00},
495 {{0x9f, 0xc8}, 0x01},
497 struct hw_config *p = hw_config;
498 int count = ARRAY_SIZE(hw_config);
499 struct sk_buff *res_skb;
505 param[1] = p->adr[0];
506 param[2] = p->adr[1];
509 r = nfc_hci_send_cmd(hdev, PN544_SYS_MGMT_GATE, PN544_WRITE,
514 if (res_skb->len != 1) {
519 if (res_skb->data[0] != p->value) {
529 param[0] = NFC_HCI_UICC_HOST_ID;
530 r = nfc_hci_set_param(hdev, NFC_HCI_ADMIN_GATE,
531 NFC_HCI_ADMIN_WHITELIST, param, 1);
536 r = nfc_hci_set_param(hdev, PN544_SYS_MGMT_GATE,
537 PN544_SYS_MGMT_INFO_NOTIFICATION, param, 1);
542 r = nfc_hci_set_param(hdev, NFC_HCI_RF_READER_A_GATE,
543 PN544_RF_READER_A_AUTO_ACTIVATION, param, 1);
547 r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
548 NFC_HCI_EVT_END_OPERATION, NULL, 0);
553 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
554 PN544_PL_NFCT_DEACTIVATED, param, 1);
559 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
560 PN544_PL_RDPHASES, param, 1);
564 r = nfc_hci_get_param(hdev, NFC_HCI_ID_MGMT_GATE,
565 PN544_ID_MGMT_FULL_VERSION_SW, &skb);
569 if (skb->len != FULL_VERSION_LEN) {
574 print_hex_dump(KERN_DEBUG, "FULL VERSION SOFTWARE INFO: ",
575 DUMP_PREFIX_NONE, 16, 1,
576 skb->data, FULL_VERSION_LEN, false);
583 static void pn544_hci_add_len_crc(struct sk_buff *skb)
589 *skb_push(skb, 1) = len;
591 crc = crc_ccitt(0xffff, skb->data, skb->len);
593 *skb_put(skb, 1) = crc & 0xff;
594 *skb_put(skb, 1) = crc >> 8;
597 static void pn544_hci_remove_len_crc(struct sk_buff *skb)
599 skb_pull(skb, PN544_FRAME_HEADROOM);
600 skb_trim(skb, PN544_FRAME_TAILROOM);
603 static int pn544_hci_xmit(struct nfc_hci_dev *hdev, struct sk_buff *skb)
605 struct pn544_hci_info *info = nfc_hci_get_clientdata(hdev);
606 struct i2c_client *client = info->i2c_dev;
609 if (info->hard_fault != 0)
610 return info->hard_fault;
612 pn544_hci_add_len_crc(skb);
613 r = pn544_hci_i2c_write(client, skb->data, skb->len);
614 pn544_hci_remove_len_crc(skb);
619 static int pn544_hci_start_poll(struct nfc_hci_dev *hdev,
620 u32 im_protocols, u32 tm_protocols)
627 pr_info(DRIVER_DESC ": %s protocols 0x%x 0x%x\n",
628 __func__, im_protocols, tm_protocols);
630 r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
631 NFC_HCI_EVT_END_OPERATION, NULL, 0);
637 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
638 PN544_PL_EMULATION, duration, 2);
643 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
644 PN544_PL_NFCT_DEACTIVATED, &activated, 1);
648 if (im_protocols & (NFC_PROTO_ISO14443_MASK | NFC_PROTO_MIFARE_MASK |
649 NFC_PROTO_JEWEL_MASK))
650 phases |= 1; /* Type A */
651 if (im_protocols & NFC_PROTO_FELICA_MASK) {
652 phases |= (1 << 2); /* Type F 212 */
653 phases |= (1 << 3); /* Type F 424 */
656 phases |= (1 << 5); /* NFC active */
658 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
659 PN544_PL_RDPHASES, &phases, 1);
663 r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
664 NFC_HCI_EVT_READER_REQUESTED, NULL, 0);
666 nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
667 NFC_HCI_EVT_END_OPERATION, NULL, 0);
672 static int pn544_hci_target_from_gate(struct nfc_hci_dev *hdev, u8 gate,
673 struct nfc_target *target)
676 case PN544_RF_READER_F_GATE:
677 target->supported_protocols = NFC_PROTO_FELICA_MASK;
679 case PN544_RF_READER_JEWEL_GATE:
680 target->supported_protocols = NFC_PROTO_JEWEL_MASK;
681 target->sens_res = 0x0c00;
690 static int pn544_hci_complete_target_discovered(struct nfc_hci_dev *hdev,
692 struct nfc_target *target)
694 struct sk_buff *uid_skb;
697 if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
698 if (target->nfcid1_len != 4 && target->nfcid1_len != 7 &&
699 target->nfcid1_len != 10)
702 r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
703 PN544_RF_READER_CMD_ACTIVATE_NEXT,
704 target->nfcid1, target->nfcid1_len, NULL);
705 } else if (target->supported_protocols & NFC_PROTO_FELICA_MASK) {
706 r = nfc_hci_get_param(hdev, PN544_RF_READER_F_GATE,
707 PN544_FELICA_ID, &uid_skb);
711 if (uid_skb->len != 8) {
716 r = nfc_hci_send_cmd(hdev, PN544_RF_READER_F_GATE,
717 PN544_RF_READER_CMD_ACTIVATE_NEXT,
718 uid_skb->data, uid_skb->len, NULL);
720 } else if (target->supported_protocols & NFC_PROTO_ISO14443_MASK) {
722 * TODO: maybe other ISO 14443 require some kind of continue
723 * activation, but for now we've seen only this one below.
725 if (target->sens_res == 0x4403) /* Type 4 Mifare DESFire */
726 r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
727 PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION,
734 #define PN544_CB_TYPE_READER_F 1
736 static void pn544_hci_data_exchange_cb(void *context, struct sk_buff *skb,
739 struct pn544_hci_info *info = context;
741 switch (info->async_cb_type) {
742 case PN544_CB_TYPE_READER_F:
745 info->async_cb(info->async_cb_context, skb, err);
754 #define MIFARE_CMD_AUTH_KEY_A 0x60
755 #define MIFARE_CMD_AUTH_KEY_B 0x61
756 #define MIFARE_CMD_HEADER 2
757 #define MIFARE_UID_LEN 4
758 #define MIFARE_KEY_LEN 6
759 #define MIFARE_CMD_LEN 12
762 * <= 0: driver handled the data exchange
763 * 1: driver doesn't especially handle, please do standard processing
765 static int pn544_hci_data_exchange(struct nfc_hci_dev *hdev,
766 struct nfc_target *target,
767 struct sk_buff *skb, data_exchange_cb_t cb,
770 struct pn544_hci_info *info = nfc_hci_get_clientdata(hdev);
772 pr_info(DRIVER_DESC ": %s for gate=%d\n", __func__,
773 target->hci_reader_gate);
775 switch (target->hci_reader_gate) {
776 case NFC_HCI_RF_READER_A_GATE:
777 if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
779 * It seems that pn544 is inverting key and UID for
780 * MIFARE authentication commands.
782 if (skb->len == MIFARE_CMD_LEN &&
783 (skb->data[0] == MIFARE_CMD_AUTH_KEY_A ||
784 skb->data[0] == MIFARE_CMD_AUTH_KEY_B)) {
785 u8 uid[MIFARE_UID_LEN];
786 u8 *data = skb->data + MIFARE_CMD_HEADER;
788 memcpy(uid, data + MIFARE_KEY_LEN,
790 memmove(data + MIFARE_UID_LEN, data,
792 memcpy(data, uid, MIFARE_UID_LEN);
795 return nfc_hci_send_cmd_async(hdev,
796 target->hci_reader_gate,
802 case PN544_RF_READER_F_GATE:
803 *skb_push(skb, 1) = 0;
804 *skb_push(skb, 1) = 0;
806 info->async_cb_type = PN544_CB_TYPE_READER_F;
808 info->async_cb_context = cb_context;
810 return nfc_hci_send_cmd_async(hdev, target->hci_reader_gate,
811 PN544_FELICA_RAW, skb->data,
813 pn544_hci_data_exchange_cb, info);
814 case PN544_RF_READER_JEWEL_GATE:
815 return nfc_hci_send_cmd_async(hdev, target->hci_reader_gate,
816 PN544_JEWEL_RAW_CMD, skb->data,
817 skb->len, cb, cb_context);
823 static int pn544_hci_check_presence(struct nfc_hci_dev *hdev,
824 struct nfc_target *target)
826 return nfc_hci_send_cmd(hdev, target->hci_reader_gate,
827 PN544_RF_READER_CMD_PRESENCE_CHECK,
831 static struct nfc_hci_ops pn544_hci_ops = {
832 .open = pn544_hci_open,
833 .close = pn544_hci_close,
834 .hci_ready = pn544_hci_ready,
835 .xmit = pn544_hci_xmit,
836 .start_poll = pn544_hci_start_poll,
837 .target_from_gate = pn544_hci_target_from_gate,
838 .complete_target_discovered = pn544_hci_complete_target_discovered,
839 .data_exchange = pn544_hci_data_exchange,
840 .check_presence = pn544_hci_check_presence,
843 static int __devinit pn544_hci_probe(struct i2c_client *client,
844 const struct i2c_device_id *id)
846 struct pn544_hci_info *info;
847 struct pn544_nfc_platform_data *pdata;
850 struct nfc_hci_init_data init_data;
852 dev_dbg(&client->dev, "%s\n", __func__);
853 dev_dbg(&client->dev, "IRQ: %d\n", client->irq);
855 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
856 dev_err(&client->dev, "Need I2C_FUNC_I2C\n");
860 info = kzalloc(sizeof(struct pn544_hci_info), GFP_KERNEL);
862 dev_err(&client->dev,
863 "Cannot allocate memory for pn544_hci_info.\n");
868 info->i2c_dev = client;
869 info->state = PN544_ST_COLD;
870 mutex_init(&info->info_lock);
871 i2c_set_clientdata(client, info);
873 pdata = client->dev.platform_data;
875 dev_err(&client->dev, "No platform data\n");
880 if (pdata->request_resources == NULL) {
881 dev_err(&client->dev, "request_resources() missing\n");
886 r = pdata->request_resources(client);
888 dev_err(&client->dev, "Cannot get platform resources\n");
892 info->gpio_en = pdata->get_gpio(NFC_GPIO_ENABLE);
893 info->gpio_fw = pdata->get_gpio(NFC_GPIO_FW_RESET);
894 info->gpio_irq = pdata->get_gpio(NFC_GPIO_IRQ);
896 pn544_hci_platform_init(info);
898 r = request_threaded_irq(client->irq, NULL, pn544_hci_irq_thread_fn,
899 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
900 PN544_HCI_DRIVER_NAME, info);
902 dev_err(&client->dev, "Unable to register IRQ handler\n");
906 init_data.gate_count = ARRAY_SIZE(pn544_gates);
908 memcpy(init_data.gates, pn544_gates, sizeof(pn544_gates));
911 * TODO: Session id must include the driver name + some bus addr
912 * persistent info to discriminate 2 identical chips
914 strcpy(init_data.session_id, "ID544HCI");
916 protocols = NFC_PROTO_JEWEL_MASK |
917 NFC_PROTO_MIFARE_MASK |
918 NFC_PROTO_FELICA_MASK |
919 NFC_PROTO_ISO14443_MASK |
920 NFC_PROTO_ISO14443_B_MASK |
921 NFC_PROTO_NFC_DEP_MASK;
923 info->hdev = nfc_hci_allocate_device(&pn544_hci_ops, &init_data,
924 protocols, LLC_SHDLC_NAME,
925 PN544_FRAME_HEADROOM +
927 PN544_FRAME_TAILROOM,
928 PN544_HCI_LLC_MAX_PAYLOAD);
930 dev_err(&client->dev, "Cannot allocate nfc hdev.\n");
935 nfc_hci_set_clientdata(info->hdev, info);
937 r = nfc_hci_register_device(info->hdev);
944 nfc_hci_free_device(info->hdev);
947 free_irq(client->irq, info);
950 if (pdata->free_resources != NULL)
951 pdata->free_resources();
960 static __devexit int pn544_hci_remove(struct i2c_client *client)
962 struct pn544_hci_info *info = i2c_get_clientdata(client);
963 struct pn544_nfc_platform_data *pdata = client->dev.platform_data;
965 dev_dbg(&client->dev, "%s\n", __func__);
967 nfc_hci_free_device(info->hdev);
969 if (info->state != PN544_ST_COLD) {
974 free_irq(client->irq, info);
975 if (pdata->free_resources)
976 pdata->free_resources();
983 static struct i2c_driver pn544_hci_driver = {
985 .name = PN544_HCI_DRIVER_NAME,
987 .probe = pn544_hci_probe,
988 .id_table = pn544_hci_id_table,
989 .remove = __devexit_p(pn544_hci_remove),
992 static int __init pn544_hci_init(void)
996 pr_debug(DRIVER_DESC ": %s\n", __func__);
998 r = i2c_add_driver(&pn544_hci_driver);
1000 pr_err(PN544_HCI_DRIVER_NAME ": driver registration failed\n");
1007 static void __exit pn544_hci_exit(void)
1009 i2c_del_driver(&pn544_hci_driver);
1012 module_init(pn544_hci_init);
1013 module_exit(pn544_hci_exit);
1015 MODULE_LICENSE("GPL");
1016 MODULE_DESCRIPTION(DRIVER_DESC);