2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/bitops.h>
16 #include <linux/blkdev.h>
17 #include <linux/blk-mq.h>
18 #include <linux/cpu.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
22 #include <linux/genhd.h>
23 #include <linux/hdreg.h>
24 #include <linux/idr.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
28 #include <linux/kdev_t.h>
29 #include <linux/kthread.h>
30 #include <linux/kernel.h>
31 #include <linux/list_sort.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/t10-pi.h>
41 #include <linux/types.h>
43 #include <asm-generic/io-64-nonatomic-lo-hi.h>
45 #include <uapi/linux/nvme_ioctl.h>
48 #define NVME_MINORS (1U << MINORBITS)
49 #define NVME_Q_DEPTH 1024
50 #define NVME_AQ_DEPTH 256
51 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
52 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
53 #define ADMIN_TIMEOUT (admin_timeout * HZ)
54 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
56 static unsigned char admin_timeout = 60;
57 module_param(admin_timeout, byte, 0644);
58 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
60 unsigned char nvme_io_timeout = 30;
61 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
62 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
64 static unsigned char shutdown_timeout = 5;
65 module_param(shutdown_timeout, byte, 0644);
66 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
68 static int nvme_major;
69 module_param(nvme_major, int, 0);
71 static int nvme_char_major;
72 module_param(nvme_char_major, int, 0);
74 static int use_threaded_interrupts;
75 module_param(use_threaded_interrupts, int, 0);
77 static bool use_cmb_sqes = true;
78 module_param(use_cmb_sqes, bool, 0644);
79 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
81 static DEFINE_SPINLOCK(dev_list_lock);
82 static LIST_HEAD(dev_list);
83 static struct task_struct *nvme_thread;
84 static struct workqueue_struct *nvme_workq;
85 static wait_queue_head_t nvme_kthread_wait;
87 static struct class *nvme_class;
89 static int __nvme_reset(struct nvme_dev *dev);
90 static int nvme_reset(struct nvme_dev *dev);
91 static int nvme_process_cq(struct nvme_queue *nvmeq);
92 static void nvme_dead_ctrl(struct nvme_dev *dev);
94 struct async_cmd_info {
95 struct kthread_work work;
96 struct kthread_worker *worker;
104 * An NVM Express queue. Each device has at least two (one for admin
105 * commands and one for I/O commands).
108 struct device *q_dmadev;
109 struct nvme_dev *dev;
110 char irqname[24]; /* nvme4294967295-65535\0 */
112 struct nvme_command *sq_cmds;
113 struct nvme_command __iomem *sq_cmds_io;
114 volatile struct nvme_completion *cqes;
115 struct blk_mq_tags **tags;
116 dma_addr_t sq_dma_addr;
117 dma_addr_t cq_dma_addr;
127 struct async_cmd_info cmdinfo;
131 * Check we didin't inadvertently grow the command struct
133 static inline void _nvme_check_size(void)
135 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
136 BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
137 BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
138 BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
139 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
140 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
141 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
142 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
143 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
144 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
145 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
146 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
149 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
150 struct nvme_completion *);
152 struct nvme_cmd_info {
153 nvme_completion_fn fn;
156 struct nvme_queue *nvmeq;
157 struct nvme_iod iod[0];
161 * Max size of iod being embedded in the request payload
163 #define NVME_INT_PAGES 2
164 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
165 #define NVME_INT_MASK 0x01
168 * Will slightly overestimate the number of pages needed. This is OK
169 * as it only leads to a small amount of wasted memory for the lifetime of
172 static int nvme_npages(unsigned size, struct nvme_dev *dev)
174 unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
175 return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
178 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
180 unsigned int ret = sizeof(struct nvme_cmd_info);
182 ret += sizeof(struct nvme_iod);
183 ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
184 ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
189 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
190 unsigned int hctx_idx)
192 struct nvme_dev *dev = data;
193 struct nvme_queue *nvmeq = dev->queues[0];
195 WARN_ON(hctx_idx != 0);
196 WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
197 WARN_ON(nvmeq->tags);
199 hctx->driver_data = nvmeq;
200 nvmeq->tags = &dev->admin_tagset.tags[0];
204 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
206 struct nvme_queue *nvmeq = hctx->driver_data;
211 static int nvme_admin_init_request(void *data, struct request *req,
212 unsigned int hctx_idx, unsigned int rq_idx,
213 unsigned int numa_node)
215 struct nvme_dev *dev = data;
216 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
217 struct nvme_queue *nvmeq = dev->queues[0];
224 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
225 unsigned int hctx_idx)
227 struct nvme_dev *dev = data;
228 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
231 nvmeq->tags = &dev->tagset.tags[hctx_idx];
233 WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
234 hctx->driver_data = nvmeq;
238 static int nvme_init_request(void *data, struct request *req,
239 unsigned int hctx_idx, unsigned int rq_idx,
240 unsigned int numa_node)
242 struct nvme_dev *dev = data;
243 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
244 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
251 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
252 nvme_completion_fn handler)
257 blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
260 static void *iod_get_private(struct nvme_iod *iod)
262 return (void *) (iod->private & ~0x1UL);
266 * If bit 0 is set, the iod is embedded in the request payload.
268 static bool iod_should_kfree(struct nvme_iod *iod)
270 return (iod->private & NVME_INT_MASK) == 0;
273 /* Special values must be less than 0x1000 */
274 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
275 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
276 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
277 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
279 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
280 struct nvme_completion *cqe)
282 if (ctx == CMD_CTX_CANCELLED)
284 if (ctx == CMD_CTX_COMPLETED) {
285 dev_warn(nvmeq->q_dmadev,
286 "completed id %d twice on queue %d\n",
287 cqe->command_id, le16_to_cpup(&cqe->sq_id));
290 if (ctx == CMD_CTX_INVALID) {
291 dev_warn(nvmeq->q_dmadev,
292 "invalid id %d completed on queue %d\n",
293 cqe->command_id, le16_to_cpup(&cqe->sq_id));
296 dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
299 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
306 cmd->fn = special_completion;
307 cmd->ctx = CMD_CTX_CANCELLED;
311 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
312 struct nvme_completion *cqe)
314 u32 result = le32_to_cpup(&cqe->result);
315 u16 status = le16_to_cpup(&cqe->status) >> 1;
317 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
318 ++nvmeq->dev->event_limit;
319 if (status != NVME_SC_SUCCESS)
322 switch (result & 0xff07) {
323 case NVME_AER_NOTICE_NS_CHANGED:
324 dev_info(nvmeq->q_dmadev, "rescanning\n");
325 schedule_work(&nvmeq->dev->scan_work);
327 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
331 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
332 struct nvme_completion *cqe)
334 struct request *req = ctx;
336 u16 status = le16_to_cpup(&cqe->status) >> 1;
337 u32 result = le32_to_cpup(&cqe->result);
339 blk_mq_free_request(req);
341 dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
342 ++nvmeq->dev->abort_limit;
345 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
346 struct nvme_completion *cqe)
348 struct async_cmd_info *cmdinfo = ctx;
349 cmdinfo->result = le32_to_cpup(&cqe->result);
350 cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
351 queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
352 blk_mq_free_request(cmdinfo->req);
355 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
358 struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
360 return blk_mq_rq_to_pdu(req);
364 * Called with local interrupts disabled and the q_lock held. May not sleep.
366 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
367 nvme_completion_fn *fn)
369 struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
371 if (tag >= nvmeq->q_depth) {
372 *fn = special_completion;
373 return CMD_CTX_INVALID;
378 cmd->fn = special_completion;
379 cmd->ctx = CMD_CTX_COMPLETED;
384 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
385 * @nvmeq: The queue to use
386 * @cmd: The command to send
388 * Safe to use from interrupt context
390 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
391 struct nvme_command *cmd)
393 u16 tail = nvmeq->sq_tail;
395 if (nvmeq->sq_cmds_io)
396 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
398 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
400 if (++tail == nvmeq->q_depth)
402 writel(tail, nvmeq->q_db);
403 nvmeq->sq_tail = tail;
406 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
409 spin_lock_irqsave(&nvmeq->q_lock, flags);
410 __nvme_submit_cmd(nvmeq, cmd);
411 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
414 static __le64 **iod_list(struct nvme_iod *iod)
416 return ((void *)iod) + iod->offset;
419 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
420 unsigned nseg, unsigned long private)
422 iod->private = private;
423 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
425 iod->length = nbytes;
429 static struct nvme_iod *
430 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
431 unsigned long priv, gfp_t gfp)
433 struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
434 sizeof(__le64 *) * nvme_npages(bytes, dev) +
435 sizeof(struct scatterlist) * nseg, gfp);
438 iod_init(iod, bytes, nseg, priv);
443 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
446 unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
447 sizeof(struct nvme_dsm_range);
448 struct nvme_iod *iod;
450 if (rq->nr_phys_segments <= NVME_INT_PAGES &&
451 size <= NVME_INT_BYTES(dev)) {
452 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
455 iod_init(iod, size, rq->nr_phys_segments,
456 (unsigned long) rq | NVME_INT_MASK);
460 return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
461 (unsigned long) rq, gfp);
464 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
466 const int last_prp = dev->page_size / 8 - 1;
468 __le64 **list = iod_list(iod);
469 dma_addr_t prp_dma = iod->first_dma;
471 if (iod->npages == 0)
472 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
473 for (i = 0; i < iod->npages; i++) {
474 __le64 *prp_list = list[i];
475 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
476 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
477 prp_dma = next_prp_dma;
480 if (iod_should_kfree(iod))
484 static int nvme_error_status(u16 status)
486 switch (status & 0x7ff) {
487 case NVME_SC_SUCCESS:
489 case NVME_SC_CAP_EXCEEDED:
496 #ifdef CONFIG_BLK_DEV_INTEGRITY
497 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
499 if (be32_to_cpu(pi->ref_tag) == v)
500 pi->ref_tag = cpu_to_be32(p);
503 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
505 if (be32_to_cpu(pi->ref_tag) == p)
506 pi->ref_tag = cpu_to_be32(v);
510 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
512 * The virtual start sector is the one that was originally submitted by the
513 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
514 * start sector may be different. Remap protection information to match the
515 * physical LBA on writes, and back to the original seed on reads.
517 * Type 0 and 3 do not have a ref tag, so no remapping required.
519 static void nvme_dif_remap(struct request *req,
520 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
522 struct nvme_ns *ns = req->rq_disk->private_data;
523 struct bio_integrity_payload *bip;
524 struct t10_pi_tuple *pi;
526 u32 i, nlb, ts, phys, virt;
528 if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
531 bip = bio_integrity(req->bio);
535 pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
538 virt = bip_get_seed(bip);
539 phys = nvme_block_nr(ns, blk_rq_pos(req));
540 nlb = (blk_rq_bytes(req) >> ns->lba_shift);
541 ts = ns->disk->queue->integrity.tuple_size;
543 for (i = 0; i < nlb; i++, virt++, phys++) {
544 pi = (struct t10_pi_tuple *)p;
545 dif_swap(phys, virt, pi);
551 static void nvme_init_integrity(struct nvme_ns *ns)
553 struct blk_integrity integrity;
555 switch (ns->pi_type) {
556 case NVME_NS_DPS_PI_TYPE3:
557 integrity.profile = &t10_pi_type3_crc;
559 case NVME_NS_DPS_PI_TYPE1:
560 case NVME_NS_DPS_PI_TYPE2:
561 integrity.profile = &t10_pi_type1_crc;
564 integrity.profile = NULL;
567 integrity.tuple_size = ns->ms;
568 blk_integrity_register(ns->disk, &integrity);
569 blk_queue_max_integrity_segments(ns->queue, 1);
571 #else /* CONFIG_BLK_DEV_INTEGRITY */
572 static void nvme_dif_remap(struct request *req,
573 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
576 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
579 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
582 static void nvme_init_integrity(struct nvme_ns *ns)
587 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
588 struct nvme_completion *cqe)
590 struct nvme_iod *iod = ctx;
591 struct request *req = iod_get_private(iod);
592 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
593 u16 status = le16_to_cpup(&cqe->status) >> 1;
594 bool requeue = false;
597 if (unlikely(status)) {
598 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
599 && (jiffies - req->start_time) < req->timeout) {
603 blk_mq_requeue_request(req);
604 spin_lock_irqsave(req->q->queue_lock, flags);
605 if (!blk_queue_stopped(req->q))
606 blk_mq_kick_requeue_list(req->q);
607 spin_unlock_irqrestore(req->q->queue_lock, flags);
611 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
612 if (cmd_rq->ctx == CMD_CTX_CANCELLED)
617 error = nvme_error_status(status);
621 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
622 u32 result = le32_to_cpup(&cqe->result);
623 req->special = (void *)(uintptr_t)result;
627 dev_warn(nvmeq->dev->dev,
628 "completing aborted command with status:%04x\n",
633 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
634 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
635 if (blk_integrity_rq(req)) {
636 if (!rq_data_dir(req))
637 nvme_dif_remap(req, nvme_dif_complete);
638 dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
639 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
642 nvme_free_iod(nvmeq->dev, iod);
644 if (likely(!requeue))
645 blk_mq_complete_request(req, error);
648 /* length is in bytes. gfp flags indicates whether we may sleep. */
649 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
650 int total_len, gfp_t gfp)
652 struct dma_pool *pool;
653 int length = total_len;
654 struct scatterlist *sg = iod->sg;
655 int dma_len = sg_dma_len(sg);
656 u64 dma_addr = sg_dma_address(sg);
657 u32 page_size = dev->page_size;
658 int offset = dma_addr & (page_size - 1);
660 __le64 **list = iod_list(iod);
664 length -= (page_size - offset);
668 dma_len -= (page_size - offset);
670 dma_addr += (page_size - offset);
673 dma_addr = sg_dma_address(sg);
674 dma_len = sg_dma_len(sg);
677 if (length <= page_size) {
678 iod->first_dma = dma_addr;
682 nprps = DIV_ROUND_UP(length, page_size);
683 if (nprps <= (256 / 8)) {
684 pool = dev->prp_small_pool;
687 pool = dev->prp_page_pool;
691 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
693 iod->first_dma = dma_addr;
695 return (total_len - length) + page_size;
698 iod->first_dma = prp_dma;
701 if (i == page_size >> 3) {
702 __le64 *old_prp_list = prp_list;
703 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
705 return total_len - length;
706 list[iod->npages++] = prp_list;
707 prp_list[0] = old_prp_list[i - 1];
708 old_prp_list[i - 1] = cpu_to_le64(prp_dma);
711 prp_list[i++] = cpu_to_le64(dma_addr);
712 dma_len -= page_size;
713 dma_addr += page_size;
721 dma_addr = sg_dma_address(sg);
722 dma_len = sg_dma_len(sg);
728 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
729 struct nvme_iod *iod)
731 struct nvme_command cmnd;
733 memcpy(&cmnd, req->cmd, sizeof(cmnd));
734 cmnd.rw.command_id = req->tag;
735 if (req->nr_phys_segments) {
736 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
737 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
740 __nvme_submit_cmd(nvmeq, &cmnd);
744 * We reuse the small pool to allocate the 16-byte range here as it is not
745 * worth having a special pool for these or additional cases to handle freeing
748 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
749 struct request *req, struct nvme_iod *iod)
751 struct nvme_dsm_range *range =
752 (struct nvme_dsm_range *)iod_list(iod)[0];
753 struct nvme_command cmnd;
755 range->cattr = cpu_to_le32(0);
756 range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
757 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
759 memset(&cmnd, 0, sizeof(cmnd));
760 cmnd.dsm.opcode = nvme_cmd_dsm;
761 cmnd.dsm.command_id = req->tag;
762 cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
763 cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
765 cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
767 __nvme_submit_cmd(nvmeq, &cmnd);
770 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
773 struct nvme_command cmnd;
775 memset(&cmnd, 0, sizeof(cmnd));
776 cmnd.common.opcode = nvme_cmd_flush;
777 cmnd.common.command_id = cmdid;
778 cmnd.common.nsid = cpu_to_le32(ns->ns_id);
780 __nvme_submit_cmd(nvmeq, &cmnd);
783 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
786 struct request *req = iod_get_private(iod);
787 struct nvme_command cmnd;
791 if (req->cmd_flags & REQ_FUA)
792 control |= NVME_RW_FUA;
793 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
794 control |= NVME_RW_LR;
796 if (req->cmd_flags & REQ_RAHEAD)
797 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
799 memset(&cmnd, 0, sizeof(cmnd));
800 cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
801 cmnd.rw.command_id = req->tag;
802 cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
803 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
804 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
805 cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
806 cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
809 switch (ns->pi_type) {
810 case NVME_NS_DPS_PI_TYPE3:
811 control |= NVME_RW_PRINFO_PRCHK_GUARD;
813 case NVME_NS_DPS_PI_TYPE1:
814 case NVME_NS_DPS_PI_TYPE2:
815 control |= NVME_RW_PRINFO_PRCHK_GUARD |
816 NVME_RW_PRINFO_PRCHK_REF;
817 cmnd.rw.reftag = cpu_to_le32(
818 nvme_block_nr(ns, blk_rq_pos(req)));
821 if (blk_integrity_rq(req))
823 cpu_to_le64(sg_dma_address(iod->meta_sg));
825 control |= NVME_RW_PRINFO_PRACT;
828 cmnd.rw.control = cpu_to_le16(control);
829 cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
831 __nvme_submit_cmd(nvmeq, &cmnd);
837 * NOTE: ns is NULL when called on the admin queue.
839 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
840 const struct blk_mq_queue_data *bd)
842 struct nvme_ns *ns = hctx->queue->queuedata;
843 struct nvme_queue *nvmeq = hctx->driver_data;
844 struct nvme_dev *dev = nvmeq->dev;
845 struct request *req = bd->rq;
846 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
847 struct nvme_iod *iod;
848 enum dma_data_direction dma_dir;
851 * If formated with metadata, require the block layer provide a buffer
852 * unless this namespace is formated such that the metadata can be
853 * stripped/generated by the controller with PRACT=1.
855 if (ns && ns->ms && !blk_integrity_rq(req)) {
856 if (!(ns->pi_type && ns->ms == 8) &&
857 req->cmd_type != REQ_TYPE_DRV_PRIV) {
858 blk_mq_complete_request(req, -EFAULT);
859 return BLK_MQ_RQ_QUEUE_OK;
863 iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
865 return BLK_MQ_RQ_QUEUE_BUSY;
867 if (req->cmd_flags & REQ_DISCARD) {
870 * We reuse the small pool to allocate the 16-byte range here
871 * as it is not worth having a special pool for these or
872 * additional cases to handle freeing the iod.
874 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
878 iod_list(iod)[0] = (__le64 *)range;
880 } else if (req->nr_phys_segments) {
881 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
883 sg_init_table(iod->sg, req->nr_phys_segments);
884 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
888 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
891 if (blk_rq_bytes(req) !=
892 nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
893 dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
896 if (blk_integrity_rq(req)) {
897 if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
900 sg_init_table(iod->meta_sg, 1);
901 if (blk_rq_map_integrity_sg(
902 req->q, req->bio, iod->meta_sg) != 1)
905 if (rq_data_dir(req))
906 nvme_dif_remap(req, nvme_dif_prep);
908 if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
913 nvme_set_info(cmd, iod, req_completion);
914 spin_lock_irq(&nvmeq->q_lock);
915 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
916 nvme_submit_priv(nvmeq, req, iod);
917 else if (req->cmd_flags & REQ_DISCARD)
918 nvme_submit_discard(nvmeq, ns, req, iod);
919 else if (req->cmd_flags & REQ_FLUSH)
920 nvme_submit_flush(nvmeq, ns, req->tag);
922 nvme_submit_iod(nvmeq, iod, ns);
924 nvme_process_cq(nvmeq);
925 spin_unlock_irq(&nvmeq->q_lock);
926 return BLK_MQ_RQ_QUEUE_OK;
929 nvme_free_iod(dev, iod);
930 return BLK_MQ_RQ_QUEUE_ERROR;
932 nvme_free_iod(dev, iod);
933 return BLK_MQ_RQ_QUEUE_BUSY;
936 static int nvme_process_cq(struct nvme_queue *nvmeq)
940 head = nvmeq->cq_head;
941 phase = nvmeq->cq_phase;
945 nvme_completion_fn fn;
946 struct nvme_completion cqe = nvmeq->cqes[head];
947 if ((le16_to_cpu(cqe.status) & 1) != phase)
949 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
950 if (++head == nvmeq->q_depth) {
954 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
955 fn(nvmeq, ctx, &cqe);
958 /* If the controller ignores the cq head doorbell and continuously
959 * writes to the queue, it is theoretically possible to wrap around
960 * the queue twice and mistakenly return IRQ_NONE. Linux only
961 * requires that 0.1% of your interrupts are handled, so this isn't
964 if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
967 writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
968 nvmeq->cq_head = head;
969 nvmeq->cq_phase = phase;
975 static irqreturn_t nvme_irq(int irq, void *data)
978 struct nvme_queue *nvmeq = data;
979 spin_lock(&nvmeq->q_lock);
980 nvme_process_cq(nvmeq);
981 result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
983 spin_unlock(&nvmeq->q_lock);
987 static irqreturn_t nvme_irq_check(int irq, void *data)
989 struct nvme_queue *nvmeq = data;
990 struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
991 if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
993 return IRQ_WAKE_THREAD;
997 * Returns 0 on success. If the result is negative, it's a Linux error code;
998 * if the result is positive, it's an NVM Express status code
1000 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1001 void *buffer, void __user *ubuffer, unsigned bufflen,
1002 u32 *result, unsigned timeout)
1004 bool write = cmd->common.opcode & 1;
1005 struct bio *bio = NULL;
1006 struct request *req;
1009 req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1011 return PTR_ERR(req);
1013 req->cmd_type = REQ_TYPE_DRV_PRIV;
1014 req->cmd_flags |= REQ_FAILFAST_DRIVER;
1015 req->__data_len = 0;
1016 req->__sector = (sector_t) -1;
1017 req->bio = req->biotail = NULL;
1019 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1021 req->cmd = (unsigned char *)cmd;
1022 req->cmd_len = sizeof(struct nvme_command);
1023 req->special = (void *)0;
1025 if (buffer && bufflen) {
1026 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1029 } else if (ubuffer && bufflen) {
1030 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1036 blk_execute_rq(req->q, NULL, req, 0);
1038 blk_rq_unmap_user(bio);
1040 *result = (u32)(uintptr_t)req->special;
1043 blk_mq_free_request(req);
1047 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1048 void *buffer, unsigned bufflen)
1050 return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1053 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1055 struct nvme_queue *nvmeq = dev->queues[0];
1056 struct nvme_command c;
1057 struct nvme_cmd_info *cmd_info;
1058 struct request *req;
1060 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1062 return PTR_ERR(req);
1064 req->cmd_flags |= REQ_NO_TIMEOUT;
1065 cmd_info = blk_mq_rq_to_pdu(req);
1066 nvme_set_info(cmd_info, NULL, async_req_completion);
1068 memset(&c, 0, sizeof(c));
1069 c.common.opcode = nvme_admin_async_event;
1070 c.common.command_id = req->tag;
1072 blk_mq_free_request(req);
1073 __nvme_submit_cmd(nvmeq, &c);
1077 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1078 struct nvme_command *cmd,
1079 struct async_cmd_info *cmdinfo, unsigned timeout)
1081 struct nvme_queue *nvmeq = dev->queues[0];
1082 struct request *req;
1083 struct nvme_cmd_info *cmd_rq;
1085 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1087 return PTR_ERR(req);
1089 req->timeout = timeout;
1090 cmd_rq = blk_mq_rq_to_pdu(req);
1092 nvme_set_info(cmd_rq, cmdinfo, async_completion);
1093 cmdinfo->status = -EINTR;
1095 cmd->common.command_id = req->tag;
1097 nvme_submit_cmd(nvmeq, cmd);
1101 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1103 struct nvme_command c;
1105 memset(&c, 0, sizeof(c));
1106 c.delete_queue.opcode = opcode;
1107 c.delete_queue.qid = cpu_to_le16(id);
1109 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1112 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1113 struct nvme_queue *nvmeq)
1115 struct nvme_command c;
1116 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1119 * Note: we (ab)use the fact the the prp fields survive if no data
1120 * is attached to the request.
1122 memset(&c, 0, sizeof(c));
1123 c.create_cq.opcode = nvme_admin_create_cq;
1124 c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1125 c.create_cq.cqid = cpu_to_le16(qid);
1126 c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1127 c.create_cq.cq_flags = cpu_to_le16(flags);
1128 c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1130 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1133 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1134 struct nvme_queue *nvmeq)
1136 struct nvme_command c;
1137 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1140 * Note: we (ab)use the fact the the prp fields survive if no data
1141 * is attached to the request.
1143 memset(&c, 0, sizeof(c));
1144 c.create_sq.opcode = nvme_admin_create_sq;
1145 c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1146 c.create_sq.sqid = cpu_to_le16(qid);
1147 c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1148 c.create_sq.sq_flags = cpu_to_le16(flags);
1149 c.create_sq.cqid = cpu_to_le16(qid);
1151 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1154 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1156 return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1159 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1161 return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1164 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1166 struct nvme_command c = { };
1169 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1170 c.identify.opcode = nvme_admin_identify;
1171 c.identify.cns = cpu_to_le32(1);
1173 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1177 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1178 sizeof(struct nvme_id_ctrl));
1184 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1185 struct nvme_id_ns **id)
1187 struct nvme_command c = { };
1190 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1191 c.identify.opcode = nvme_admin_identify,
1192 c.identify.nsid = cpu_to_le32(nsid),
1194 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1198 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1199 sizeof(struct nvme_id_ns));
1205 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1206 dma_addr_t dma_addr, u32 *result)
1208 struct nvme_command c;
1210 memset(&c, 0, sizeof(c));
1211 c.features.opcode = nvme_admin_get_features;
1212 c.features.nsid = cpu_to_le32(nsid);
1213 c.features.prp1 = cpu_to_le64(dma_addr);
1214 c.features.fid = cpu_to_le32(fid);
1216 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1220 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1221 dma_addr_t dma_addr, u32 *result)
1223 struct nvme_command c;
1225 memset(&c, 0, sizeof(c));
1226 c.features.opcode = nvme_admin_set_features;
1227 c.features.prp1 = cpu_to_le64(dma_addr);
1228 c.features.fid = cpu_to_le32(fid);
1229 c.features.dword11 = cpu_to_le32(dword11);
1231 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1235 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1237 struct nvme_command c = { };
1240 c.common.opcode = nvme_admin_get_log_page,
1241 c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1242 c.common.cdw10[0] = cpu_to_le32(
1243 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1246 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1250 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1251 sizeof(struct nvme_smart_log));
1258 * nvme_abort_req - Attempt aborting a request
1260 * Schedule controller reset if the command was already aborted once before and
1261 * still hasn't been returned to the driver, or if this is the admin queue.
1263 static void nvme_abort_req(struct request *req)
1265 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1266 struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1267 struct nvme_dev *dev = nvmeq->dev;
1268 struct request *abort_req;
1269 struct nvme_cmd_info *abort_cmd;
1270 struct nvme_command cmd;
1272 if (!nvmeq->qid || cmd_rq->aborted) {
1273 spin_lock(&dev_list_lock);
1274 if (!__nvme_reset(dev)) {
1276 "I/O %d QID %d timeout, reset controller\n",
1277 req->tag, nvmeq->qid);
1279 spin_unlock(&dev_list_lock);
1283 if (!dev->abort_limit)
1286 abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1288 if (IS_ERR(abort_req))
1291 abort_cmd = blk_mq_rq_to_pdu(abort_req);
1292 nvme_set_info(abort_cmd, abort_req, abort_completion);
1294 memset(&cmd, 0, sizeof(cmd));
1295 cmd.abort.opcode = nvme_admin_abort_cmd;
1296 cmd.abort.cid = req->tag;
1297 cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1298 cmd.abort.command_id = abort_req->tag;
1301 cmd_rq->aborted = 1;
1303 dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1305 nvme_submit_cmd(dev->queues[0], &cmd);
1308 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1310 struct nvme_queue *nvmeq = data;
1312 nvme_completion_fn fn;
1313 struct nvme_cmd_info *cmd;
1314 struct nvme_completion cqe;
1316 if (!blk_mq_request_started(req))
1319 cmd = blk_mq_rq_to_pdu(req);
1321 if (cmd->ctx == CMD_CTX_CANCELLED)
1324 if (blk_queue_dying(req->q))
1325 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1327 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1330 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1331 req->tag, nvmeq->qid);
1332 ctx = cancel_cmd_info(cmd, &fn);
1333 fn(nvmeq, ctx, &cqe);
1336 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1338 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1339 struct nvme_queue *nvmeq = cmd->nvmeq;
1341 dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1343 spin_lock_irq(&nvmeq->q_lock);
1344 nvme_abort_req(req);
1345 spin_unlock_irq(&nvmeq->q_lock);
1348 * The aborted req will be completed on receiving the abort req.
1349 * We enable the timer again. If hit twice, it'll cause a device reset,
1350 * as the device then is in a faulty state.
1352 return BLK_EH_RESET_TIMER;
1355 static void nvme_free_queue(struct nvme_queue *nvmeq)
1357 dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1358 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1360 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1361 nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1365 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1369 for (i = dev->queue_count - 1; i >= lowest; i--) {
1370 struct nvme_queue *nvmeq = dev->queues[i];
1372 dev->queues[i] = NULL;
1373 nvme_free_queue(nvmeq);
1378 * nvme_suspend_queue - put queue into suspended state
1379 * @nvmeq - queue to suspend
1381 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1385 spin_lock_irq(&nvmeq->q_lock);
1386 if (nvmeq->cq_vector == -1) {
1387 spin_unlock_irq(&nvmeq->q_lock);
1390 vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1391 nvmeq->dev->online_queues--;
1392 nvmeq->cq_vector = -1;
1393 spin_unlock_irq(&nvmeq->q_lock);
1395 if (!nvmeq->qid && nvmeq->dev->admin_q)
1396 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1398 irq_set_affinity_hint(vector, NULL);
1399 free_irq(vector, nvmeq);
1404 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1406 spin_lock_irq(&nvmeq->q_lock);
1407 if (nvmeq->tags && *nvmeq->tags)
1408 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1409 spin_unlock_irq(&nvmeq->q_lock);
1412 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1414 struct nvme_queue *nvmeq = dev->queues[qid];
1418 if (nvme_suspend_queue(nvmeq))
1421 /* Don't tell the adapter to delete the admin queue.
1422 * Don't tell a removed adapter to delete IO queues. */
1423 if (qid && readl(&dev->bar->csts) != -1) {
1424 adapter_delete_sq(dev, qid);
1425 adapter_delete_cq(dev, qid);
1428 spin_lock_irq(&nvmeq->q_lock);
1429 nvme_process_cq(nvmeq);
1430 spin_unlock_irq(&nvmeq->q_lock);
1433 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1436 int q_depth = dev->q_depth;
1437 unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1439 if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1440 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1441 mem_per_q = round_down(mem_per_q, dev->page_size);
1442 q_depth = div_u64(mem_per_q, entry_size);
1445 * Ensure the reduced q_depth is above some threshold where it
1446 * would be better to map queues in system memory with the
1456 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1459 if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1460 unsigned offset = (qid - 1) *
1461 roundup(SQ_SIZE(depth), dev->page_size);
1462 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1463 nvmeq->sq_cmds_io = dev->cmb + offset;
1465 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1466 &nvmeq->sq_dma_addr, GFP_KERNEL);
1467 if (!nvmeq->sq_cmds)
1474 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1477 struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1481 nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1482 &nvmeq->cq_dma_addr, GFP_KERNEL);
1486 if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1489 nvmeq->q_dmadev = dev->dev;
1491 snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1492 dev->instance, qid);
1493 spin_lock_init(&nvmeq->q_lock);
1495 nvmeq->cq_phase = 1;
1496 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1497 nvmeq->q_depth = depth;
1499 nvmeq->cq_vector = -1;
1500 dev->queues[qid] = nvmeq;
1502 /* make sure queue descriptor is set before queue count, for kthread */
1509 dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1510 nvmeq->cq_dma_addr);
1516 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1519 if (use_threaded_interrupts)
1520 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1521 nvme_irq_check, nvme_irq, IRQF_SHARED,
1523 return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1524 IRQF_SHARED, name, nvmeq);
1527 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1529 struct nvme_dev *dev = nvmeq->dev;
1531 spin_lock_irq(&nvmeq->q_lock);
1534 nvmeq->cq_phase = 1;
1535 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1536 memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1537 dev->online_queues++;
1538 spin_unlock_irq(&nvmeq->q_lock);
1541 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1543 struct nvme_dev *dev = nvmeq->dev;
1546 nvmeq->cq_vector = qid - 1;
1547 result = adapter_alloc_cq(dev, qid, nvmeq);
1551 result = adapter_alloc_sq(dev, qid, nvmeq);
1555 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1559 nvme_init_queue(nvmeq, qid);
1563 adapter_delete_sq(dev, qid);
1565 adapter_delete_cq(dev, qid);
1569 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1571 unsigned long timeout;
1572 u32 bit = enabled ? NVME_CSTS_RDY : 0;
1574 timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1576 while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1578 if (fatal_signal_pending(current))
1580 if (time_after(jiffies, timeout)) {
1582 "Device not ready; aborting %s\n", enabled ?
1583 "initialisation" : "reset");
1592 * If the device has been passed off to us in an enabled state, just clear
1593 * the enabled bit. The spec says we should set the 'shutdown notification
1594 * bits', but doing so may cause the device to complete commands to the
1595 * admin queue ... and we don't know what memory that might be pointing at!
1597 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1599 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1600 dev->ctrl_config &= ~NVME_CC_ENABLE;
1601 writel(dev->ctrl_config, &dev->bar->cc);
1603 return nvme_wait_ready(dev, cap, false);
1606 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1608 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1609 dev->ctrl_config |= NVME_CC_ENABLE;
1610 writel(dev->ctrl_config, &dev->bar->cc);
1612 return nvme_wait_ready(dev, cap, true);
1615 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1617 unsigned long timeout;
1619 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1620 dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1622 writel(dev->ctrl_config, &dev->bar->cc);
1624 timeout = SHUTDOWN_TIMEOUT + jiffies;
1625 while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1626 NVME_CSTS_SHST_CMPLT) {
1628 if (fatal_signal_pending(current))
1630 if (time_after(jiffies, timeout)) {
1632 "Device shutdown incomplete; abort shutdown\n");
1640 static struct blk_mq_ops nvme_mq_admin_ops = {
1641 .queue_rq = nvme_queue_rq,
1642 .map_queue = blk_mq_map_queue,
1643 .init_hctx = nvme_admin_init_hctx,
1644 .exit_hctx = nvme_admin_exit_hctx,
1645 .init_request = nvme_admin_init_request,
1646 .timeout = nvme_timeout,
1649 static struct blk_mq_ops nvme_mq_ops = {
1650 .queue_rq = nvme_queue_rq,
1651 .map_queue = blk_mq_map_queue,
1652 .init_hctx = nvme_init_hctx,
1653 .init_request = nvme_init_request,
1654 .timeout = nvme_timeout,
1657 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1659 if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1660 blk_cleanup_queue(dev->admin_q);
1661 blk_mq_free_tag_set(&dev->admin_tagset);
1665 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1667 if (!dev->admin_q) {
1668 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1669 dev->admin_tagset.nr_hw_queues = 1;
1670 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1671 dev->admin_tagset.reserved_tags = 1;
1672 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1673 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1674 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1675 dev->admin_tagset.driver_data = dev;
1677 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1680 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1681 if (IS_ERR(dev->admin_q)) {
1682 blk_mq_free_tag_set(&dev->admin_tagset);
1685 if (!blk_get_queue(dev->admin_q)) {
1686 nvme_dev_remove_admin(dev);
1687 dev->admin_q = NULL;
1691 blk_mq_unfreeze_queue(dev->admin_q);
1696 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1700 u64 cap = readq(&dev->bar->cap);
1701 struct nvme_queue *nvmeq;
1702 unsigned page_shift = PAGE_SHIFT;
1703 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1704 unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1706 if (page_shift < dev_page_min) {
1708 "Minimum device page size (%u) too large for "
1709 "host (%u)\n", 1 << dev_page_min,
1713 if (page_shift > dev_page_max) {
1715 "Device maximum page size (%u) smaller than "
1716 "host (%u); enabling work-around\n",
1717 1 << dev_page_max, 1 << page_shift);
1718 page_shift = dev_page_max;
1721 dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1722 NVME_CAP_NSSRC(cap) : 0;
1724 if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1725 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1727 result = nvme_disable_ctrl(dev, cap);
1731 nvmeq = dev->queues[0];
1733 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1738 aqa = nvmeq->q_depth - 1;
1741 dev->page_size = 1 << page_shift;
1743 dev->ctrl_config = NVME_CC_CSS_NVM;
1744 dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1745 dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1746 dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1748 writel(aqa, &dev->bar->aqa);
1749 writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1750 writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1752 result = nvme_enable_ctrl(dev, cap);
1756 nvmeq->cq_vector = 0;
1757 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1759 nvmeq->cq_vector = -1;
1766 nvme_free_queues(dev, 0);
1770 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1772 struct nvme_dev *dev = ns->dev;
1773 struct nvme_user_io io;
1774 struct nvme_command c;
1775 unsigned length, meta_len;
1777 dma_addr_t meta_dma = 0;
1779 void __user *metadata;
1781 if (copy_from_user(&io, uio, sizeof(io)))
1784 switch (io.opcode) {
1785 case nvme_cmd_write:
1787 case nvme_cmd_compare:
1793 length = (io.nblocks + 1) << ns->lba_shift;
1794 meta_len = (io.nblocks + 1) * ns->ms;
1795 metadata = (void __user *)(uintptr_t)io.metadata;
1796 write = io.opcode & 1;
1803 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1806 meta = dma_alloc_coherent(dev->dev, meta_len,
1807 &meta_dma, GFP_KERNEL);
1814 if (copy_from_user(meta, metadata, meta_len)) {
1821 memset(&c, 0, sizeof(c));
1822 c.rw.opcode = io.opcode;
1823 c.rw.flags = io.flags;
1824 c.rw.nsid = cpu_to_le32(ns->ns_id);
1825 c.rw.slba = cpu_to_le64(io.slba);
1826 c.rw.length = cpu_to_le16(io.nblocks);
1827 c.rw.control = cpu_to_le16(io.control);
1828 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1829 c.rw.reftag = cpu_to_le32(io.reftag);
1830 c.rw.apptag = cpu_to_le16(io.apptag);
1831 c.rw.appmask = cpu_to_le16(io.appmask);
1832 c.rw.metadata = cpu_to_le64(meta_dma);
1834 status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1835 (void __user *)(uintptr_t)io.addr, length, NULL, 0);
1838 if (status == NVME_SC_SUCCESS && !write) {
1839 if (copy_to_user(metadata, meta, meta_len))
1842 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1847 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1848 struct nvme_passthru_cmd __user *ucmd)
1850 struct nvme_passthru_cmd cmd;
1851 struct nvme_command c;
1852 unsigned timeout = 0;
1855 if (!capable(CAP_SYS_ADMIN))
1857 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1860 memset(&c, 0, sizeof(c));
1861 c.common.opcode = cmd.opcode;
1862 c.common.flags = cmd.flags;
1863 c.common.nsid = cpu_to_le32(cmd.nsid);
1864 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1865 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1866 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1867 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1868 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1869 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1870 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1871 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1874 timeout = msecs_to_jiffies(cmd.timeout_ms);
1876 status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1877 NULL, (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1878 &cmd.result, timeout);
1880 if (put_user(cmd.result, &ucmd->result))
1887 static int nvme_subsys_reset(struct nvme_dev *dev)
1889 if (!dev->subsystem)
1892 writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1896 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1899 struct nvme_ns *ns = bdev->bd_disk->private_data;
1903 force_successful_syscall_return();
1905 case NVME_IOCTL_ADMIN_CMD:
1906 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1907 case NVME_IOCTL_IO_CMD:
1908 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1909 case NVME_IOCTL_SUBMIT_IO:
1910 return nvme_submit_io(ns, (void __user *)arg);
1911 case SG_GET_VERSION_NUM:
1912 return nvme_sg_get_version_num((void __user *)arg);
1914 return nvme_sg_io(ns, (void __user *)arg);
1920 #ifdef CONFIG_COMPAT
1921 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1922 unsigned int cmd, unsigned long arg)
1926 return -ENOIOCTLCMD;
1928 return nvme_ioctl(bdev, mode, cmd, arg);
1931 #define nvme_compat_ioctl NULL
1934 static void nvme_free_dev(struct kref *kref);
1935 static void nvme_free_ns(struct kref *kref)
1937 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
1939 if (ns->type == NVME_NS_LIGHTNVM)
1940 nvme_nvm_unregister(ns->queue, ns->disk->disk_name);
1942 spin_lock(&dev_list_lock);
1943 ns->disk->private_data = NULL;
1944 spin_unlock(&dev_list_lock);
1946 kref_put(&ns->dev->kref, nvme_free_dev);
1951 static int nvme_open(struct block_device *bdev, fmode_t mode)
1956 spin_lock(&dev_list_lock);
1957 ns = bdev->bd_disk->private_data;
1960 else if (!kref_get_unless_zero(&ns->kref))
1962 spin_unlock(&dev_list_lock);
1967 static void nvme_release(struct gendisk *disk, fmode_t mode)
1969 struct nvme_ns *ns = disk->private_data;
1970 kref_put(&ns->kref, nvme_free_ns);
1973 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1975 /* some standard values */
1976 geo->heads = 1 << 6;
1977 geo->sectors = 1 << 5;
1978 geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1982 static void nvme_config_discard(struct nvme_ns *ns)
1984 u32 logical_block_size = queue_logical_block_size(ns->queue);
1985 ns->queue->limits.discard_zeroes_data = 0;
1986 ns->queue->limits.discard_alignment = logical_block_size;
1987 ns->queue->limits.discard_granularity = logical_block_size;
1988 blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
1989 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1992 static int nvme_revalidate_disk(struct gendisk *disk)
1994 struct nvme_ns *ns = disk->private_data;
1995 struct nvme_dev *dev = ns->dev;
1996 struct nvme_id_ns *id;
2001 if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2002 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2003 dev->instance, ns->ns_id);
2006 if (id->ncap == 0) {
2011 if (nvme_nvm_ns_supported(ns, id) && ns->type != NVME_NS_LIGHTNVM) {
2012 if (nvme_nvm_register(ns->queue, disk->disk_name)) {
2014 "%s: LightNVM init failure\n", __func__);
2018 ns->type = NVME_NS_LIGHTNVM;
2022 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2023 ns->lba_shift = id->lbaf[lbaf].ds;
2024 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2025 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2028 * If identify namespace failed, use default 512 byte block size so
2029 * block layer can use before failing read/write for 0 capacity.
2031 if (ns->lba_shift == 0)
2033 bs = 1 << ns->lba_shift;
2035 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2036 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2037 id->dps & NVME_NS_DPS_PI_MASK : 0;
2039 blk_mq_freeze_queue(disk->queue);
2040 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2042 bs != queue_logical_block_size(disk->queue) ||
2043 (ns->ms && ns->ext)))
2044 blk_integrity_unregister(disk);
2046 ns->pi_type = pi_type;
2047 blk_queue_logical_block_size(ns->queue, bs);
2049 if (ns->ms && !ns->ext)
2050 nvme_init_integrity(ns);
2052 if ((ns->ms && !(ns->ms == 8 && ns->pi_type) &&
2053 !blk_get_integrity(disk)) ||
2054 ns->type == NVME_NS_LIGHTNVM)
2055 set_capacity(disk, 0);
2057 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2059 if (dev->oncs & NVME_CTRL_ONCS_DSM)
2060 nvme_config_discard(ns);
2061 blk_mq_unfreeze_queue(disk->queue);
2067 static const struct block_device_operations nvme_fops = {
2068 .owner = THIS_MODULE,
2069 .ioctl = nvme_ioctl,
2070 .compat_ioctl = nvme_compat_ioctl,
2072 .release = nvme_release,
2073 .getgeo = nvme_getgeo,
2074 .revalidate_disk= nvme_revalidate_disk,
2077 static int nvme_kthread(void *data)
2079 struct nvme_dev *dev, *next;
2081 while (!kthread_should_stop()) {
2082 set_current_state(TASK_INTERRUPTIBLE);
2083 spin_lock(&dev_list_lock);
2084 list_for_each_entry_safe(dev, next, &dev_list, node) {
2086 u32 csts = readl(&dev->bar->csts);
2088 if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2089 csts & NVME_CSTS_CFS) {
2090 if (!__nvme_reset(dev)) {
2092 "Failed status: %x, reset controller\n",
2093 readl(&dev->bar->csts));
2097 for (i = 0; i < dev->queue_count; i++) {
2098 struct nvme_queue *nvmeq = dev->queues[i];
2101 spin_lock_irq(&nvmeq->q_lock);
2102 nvme_process_cq(nvmeq);
2104 while ((i == 0) && (dev->event_limit > 0)) {
2105 if (nvme_submit_async_admin_req(dev))
2109 spin_unlock_irq(&nvmeq->q_lock);
2112 spin_unlock(&dev_list_lock);
2113 schedule_timeout(round_jiffies_relative(HZ));
2118 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2121 struct gendisk *disk;
2122 int node = dev_to_node(dev->dev);
2124 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2128 ns->queue = blk_mq_init_queue(&dev->tagset);
2129 if (IS_ERR(ns->queue))
2131 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2132 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2134 ns->queue->queuedata = ns;
2136 disk = alloc_disk_node(0, node);
2138 goto out_free_queue;
2140 kref_init(&ns->kref);
2143 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2144 list_add_tail(&ns->list, &dev->namespaces);
2146 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2147 if (dev->max_hw_sectors) {
2148 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2149 blk_queue_max_segments(ns->queue,
2150 ((dev->max_hw_sectors << 9) / dev->page_size) + 1);
2152 if (dev->stripe_size)
2153 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2154 if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2155 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2156 blk_queue_virt_boundary(ns->queue, dev->page_size - 1);
2158 disk->major = nvme_major;
2159 disk->first_minor = 0;
2160 disk->fops = &nvme_fops;
2161 disk->private_data = ns;
2162 disk->queue = ns->queue;
2163 disk->driverfs_dev = dev->device;
2164 disk->flags = GENHD_FL_EXT_DEVT;
2165 sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2168 * Initialize capacity to 0 until we establish the namespace format and
2169 * setup integrity extentions if necessary. The revalidate_disk after
2170 * add_disk allows the driver to register with integrity if the format
2173 set_capacity(disk, 0);
2174 if (nvme_revalidate_disk(ns->disk))
2177 kref_get(&dev->kref);
2178 if (ns->type != NVME_NS_LIGHTNVM) {
2181 struct block_device *bd = bdget_disk(ns->disk, 0);
2184 if (blkdev_get(bd, FMODE_READ, NULL)) {
2188 blkdev_reread_part(bd);
2189 blkdev_put(bd, FMODE_READ);
2195 list_del(&ns->list);
2197 blk_cleanup_queue(ns->queue);
2203 * Create I/O queues. Failing to create an I/O queue is not an issue,
2204 * we can continue with less than the desired amount of queues, and
2205 * even a controller without I/O queues an still be used to issue
2206 * admin commands. This might be useful to upgrade a buggy firmware
2209 static void nvme_create_io_queues(struct nvme_dev *dev)
2213 for (i = dev->queue_count; i <= dev->max_qid; i++)
2214 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2217 for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2218 if (nvme_create_queue(dev->queues[i], i)) {
2219 nvme_free_queues(dev, i);
2224 static int set_queue_count(struct nvme_dev *dev, int count)
2228 u32 q_count = (count - 1) | ((count - 1) << 16);
2230 status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2235 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2238 return min(result & 0xffff, result >> 16) + 1;
2241 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2243 u64 szu, size, offset;
2245 resource_size_t bar_size;
2246 struct pci_dev *pdev = to_pci_dev(dev->dev);
2248 dma_addr_t dma_addr;
2253 dev->cmbsz = readl(&dev->bar->cmbsz);
2254 if (!(NVME_CMB_SZ(dev->cmbsz)))
2257 cmbloc = readl(&dev->bar->cmbloc);
2259 szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2260 size = szu * NVME_CMB_SZ(dev->cmbsz);
2261 offset = szu * NVME_CMB_OFST(cmbloc);
2262 bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2264 if (offset > bar_size)
2268 * Controllers may support a CMB size larger than their BAR,
2269 * for example, due to being behind a bridge. Reduce the CMB to
2270 * the reported size of the BAR
2272 if (size > bar_size - offset)
2273 size = bar_size - offset;
2275 dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2276 cmb = ioremap_wc(dma_addr, size);
2280 dev->cmb_dma_addr = dma_addr;
2281 dev->cmb_size = size;
2285 static inline void nvme_release_cmb(struct nvme_dev *dev)
2293 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2295 return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2298 static int nvme_setup_io_queues(struct nvme_dev *dev)
2300 struct nvme_queue *adminq = dev->queues[0];
2301 struct pci_dev *pdev = to_pci_dev(dev->dev);
2302 int result, i, vecs, nr_io_queues, size;
2304 nr_io_queues = num_possible_cpus();
2305 result = set_queue_count(dev, nr_io_queues);
2308 if (result < nr_io_queues)
2309 nr_io_queues = result;
2311 if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2312 result = nvme_cmb_qdepth(dev, nr_io_queues,
2313 sizeof(struct nvme_command));
2315 dev->q_depth = result;
2317 nvme_release_cmb(dev);
2320 size = db_bar_size(dev, nr_io_queues);
2324 dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2327 if (!--nr_io_queues)
2329 size = db_bar_size(dev, nr_io_queues);
2331 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2332 adminq->q_db = dev->dbs;
2335 /* Deregister the admin queue's interrupt */
2336 free_irq(dev->entry[0].vector, adminq);
2339 * If we enable msix early due to not intx, disable it again before
2340 * setting up the full range we need.
2343 pci_disable_msix(pdev);
2345 for (i = 0; i < nr_io_queues; i++)
2346 dev->entry[i].entry = i;
2347 vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2349 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2353 for (i = 0; i < vecs; i++)
2354 dev->entry[i].vector = i + pdev->irq;
2359 * Should investigate if there's a performance win from allocating
2360 * more queues than interrupt vectors; it might allow the submission
2361 * path to scale better, even if the receive path is limited by the
2362 * number of interrupts.
2364 nr_io_queues = vecs;
2365 dev->max_qid = nr_io_queues;
2367 result = queue_request_irq(dev, adminq, adminq->irqname);
2369 adminq->cq_vector = -1;
2373 /* Free previously allocated queues that are no longer usable */
2374 nvme_free_queues(dev, nr_io_queues + 1);
2375 nvme_create_io_queues(dev);
2380 nvme_free_queues(dev, 1);
2384 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2386 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2387 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2389 return nsa->ns_id - nsb->ns_id;
2392 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2396 list_for_each_entry(ns, &dev->namespaces, list) {
2397 if (ns->ns_id == nsid)
2399 if (ns->ns_id > nsid)
2405 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2407 return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2408 dev->online_queues < 2);
2411 static void nvme_ns_remove(struct nvme_ns *ns)
2413 bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2416 blk_set_queue_dying(ns->queue);
2417 if (ns->disk->flags & GENHD_FL_UP)
2418 del_gendisk(ns->disk);
2419 if (kill || !blk_queue_dying(ns->queue)) {
2420 blk_mq_abort_requeue_list(ns->queue);
2421 blk_cleanup_queue(ns->queue);
2423 list_del_init(&ns->list);
2424 kref_put(&ns->kref, nvme_free_ns);
2427 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2429 struct nvme_ns *ns, *next;
2432 for (i = 1; i <= nn; i++) {
2433 ns = nvme_find_ns(dev, i);
2435 if (revalidate_disk(ns->disk))
2438 nvme_alloc_ns(dev, i);
2440 list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2444 list_sort(NULL, &dev->namespaces, ns_cmp);
2447 static void nvme_set_irq_hints(struct nvme_dev *dev)
2449 struct nvme_queue *nvmeq;
2452 for (i = 0; i < dev->online_queues; i++) {
2453 nvmeq = dev->queues[i];
2455 if (!nvmeq->tags || !(*nvmeq->tags))
2458 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2459 blk_mq_tags_cpumask(*nvmeq->tags));
2463 static void nvme_dev_scan(struct work_struct *work)
2465 struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2466 struct nvme_id_ctrl *ctrl;
2468 if (!dev->tagset.tags)
2470 if (nvme_identify_ctrl(dev, &ctrl))
2472 nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2474 nvme_set_irq_hints(dev);
2478 * Return: error value if an error occurred setting up the queues or calling
2479 * Identify Device. 0 if these succeeded, even if adding some of the
2480 * namespaces failed. At the moment, these failures are silent. TBD which
2481 * failures should be reported.
2483 static int nvme_dev_add(struct nvme_dev *dev)
2485 struct pci_dev *pdev = to_pci_dev(dev->dev);
2487 struct nvme_id_ctrl *ctrl;
2488 int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2490 res = nvme_identify_ctrl(dev, &ctrl);
2492 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2496 dev->oncs = le16_to_cpup(&ctrl->oncs);
2497 dev->abort_limit = ctrl->acl + 1;
2498 dev->vwc = ctrl->vwc;
2499 memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2500 memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2501 memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2503 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2504 if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2505 (pdev->device == 0x0953) && ctrl->vs[3]) {
2506 unsigned int max_hw_sectors;
2508 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2509 max_hw_sectors = dev->stripe_size >> (shift - 9);
2510 if (dev->max_hw_sectors) {
2511 dev->max_hw_sectors = min(max_hw_sectors,
2512 dev->max_hw_sectors);
2514 dev->max_hw_sectors = max_hw_sectors;
2518 if (!dev->tagset.tags) {
2519 dev->tagset.ops = &nvme_mq_ops;
2520 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2521 dev->tagset.timeout = NVME_IO_TIMEOUT;
2522 dev->tagset.numa_node = dev_to_node(dev->dev);
2523 dev->tagset.queue_depth =
2524 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2525 dev->tagset.cmd_size = nvme_cmd_size(dev);
2526 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2527 dev->tagset.driver_data = dev;
2529 if (blk_mq_alloc_tag_set(&dev->tagset))
2532 schedule_work(&dev->scan_work);
2536 static int nvme_dev_map(struct nvme_dev *dev)
2539 int bars, result = -ENOMEM;
2540 struct pci_dev *pdev = to_pci_dev(dev->dev);
2542 if (pci_enable_device_mem(pdev))
2545 dev->entry[0].vector = pdev->irq;
2546 pci_set_master(pdev);
2547 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2551 if (pci_request_selected_regions(pdev, bars, "nvme"))
2554 if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2555 dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2558 dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2562 if (readl(&dev->bar->csts) == -1) {
2568 * Some devices don't advertse INTx interrupts, pre-enable a single
2569 * MSIX vec for setup. We'll adjust this later.
2572 result = pci_enable_msix(pdev, dev->entry, 1);
2577 cap = readq(&dev->bar->cap);
2578 dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2579 dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2580 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2581 if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2582 dev->cmb = nvme_map_cmb(dev);
2590 pci_release_regions(pdev);
2592 pci_disable_device(pdev);
2596 static void nvme_dev_unmap(struct nvme_dev *dev)
2598 struct pci_dev *pdev = to_pci_dev(dev->dev);
2600 if (pdev->msi_enabled)
2601 pci_disable_msi(pdev);
2602 else if (pdev->msix_enabled)
2603 pci_disable_msix(pdev);
2608 pci_release_regions(pdev);
2611 if (pci_is_enabled(pdev))
2612 pci_disable_device(pdev);
2615 struct nvme_delq_ctx {
2616 struct task_struct *waiter;
2617 struct kthread_worker *worker;
2621 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2623 dq->waiter = current;
2627 set_current_state(TASK_KILLABLE);
2628 if (!atomic_read(&dq->refcount))
2630 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2631 fatal_signal_pending(current)) {
2633 * Disable the controller first since we can't trust it
2634 * at this point, but leave the admin queue enabled
2635 * until all queue deletion requests are flushed.
2636 * FIXME: This may take a while if there are more h/w
2637 * queues than admin tags.
2639 set_current_state(TASK_RUNNING);
2640 nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2641 nvme_clear_queue(dev->queues[0]);
2642 flush_kthread_worker(dq->worker);
2643 nvme_disable_queue(dev, 0);
2647 set_current_state(TASK_RUNNING);
2650 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2652 atomic_dec(&dq->refcount);
2654 wake_up_process(dq->waiter);
2657 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2659 atomic_inc(&dq->refcount);
2663 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2665 struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2669 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2670 kthread_work_func_t fn)
2672 struct nvme_command c;
2674 memset(&c, 0, sizeof(c));
2675 c.delete_queue.opcode = opcode;
2676 c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2678 init_kthread_work(&nvmeq->cmdinfo.work, fn);
2679 return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2683 static void nvme_del_cq_work_handler(struct kthread_work *work)
2685 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2687 nvme_del_queue_end(nvmeq);
2690 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2692 return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2693 nvme_del_cq_work_handler);
2696 static void nvme_del_sq_work_handler(struct kthread_work *work)
2698 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2700 int status = nvmeq->cmdinfo.status;
2703 status = nvme_delete_cq(nvmeq);
2705 nvme_del_queue_end(nvmeq);
2708 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2710 return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2711 nvme_del_sq_work_handler);
2714 static void nvme_del_queue_start(struct kthread_work *work)
2716 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2718 if (nvme_delete_sq(nvmeq))
2719 nvme_del_queue_end(nvmeq);
2722 static void nvme_disable_io_queues(struct nvme_dev *dev)
2725 DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2726 struct nvme_delq_ctx dq;
2727 struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2728 &worker, "nvme%d", dev->instance);
2730 if (IS_ERR(kworker_task)) {
2732 "Failed to create queue del task\n");
2733 for (i = dev->queue_count - 1; i > 0; i--)
2734 nvme_disable_queue(dev, i);
2739 atomic_set(&dq.refcount, 0);
2740 dq.worker = &worker;
2741 for (i = dev->queue_count - 1; i > 0; i--) {
2742 struct nvme_queue *nvmeq = dev->queues[i];
2744 if (nvme_suspend_queue(nvmeq))
2746 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2747 nvmeq->cmdinfo.worker = dq.worker;
2748 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2749 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2751 nvme_wait_dq(&dq, dev);
2752 kthread_stop(kworker_task);
2756 * Remove the node from the device list and check
2757 * for whether or not we need to stop the nvme_thread.
2759 static void nvme_dev_list_remove(struct nvme_dev *dev)
2761 struct task_struct *tmp = NULL;
2763 spin_lock(&dev_list_lock);
2764 list_del_init(&dev->node);
2765 if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2769 spin_unlock(&dev_list_lock);
2775 static void nvme_freeze_queues(struct nvme_dev *dev)
2779 list_for_each_entry(ns, &dev->namespaces, list) {
2780 blk_mq_freeze_queue_start(ns->queue);
2782 spin_lock_irq(ns->queue->queue_lock);
2783 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2784 spin_unlock_irq(ns->queue->queue_lock);
2786 blk_mq_cancel_requeue_work(ns->queue);
2787 blk_mq_stop_hw_queues(ns->queue);
2791 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2795 list_for_each_entry(ns, &dev->namespaces, list) {
2796 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2797 blk_mq_unfreeze_queue(ns->queue);
2798 blk_mq_start_stopped_hw_queues(ns->queue, true);
2799 blk_mq_kick_requeue_list(ns->queue);
2803 static void nvme_dev_shutdown(struct nvme_dev *dev)
2808 nvme_dev_list_remove(dev);
2811 nvme_freeze_queues(dev);
2812 csts = readl(&dev->bar->csts);
2814 if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2815 for (i = dev->queue_count - 1; i >= 0; i--) {
2816 struct nvme_queue *nvmeq = dev->queues[i];
2817 nvme_suspend_queue(nvmeq);
2820 nvme_disable_io_queues(dev);
2821 nvme_shutdown_ctrl(dev);
2822 nvme_disable_queue(dev, 0);
2824 nvme_dev_unmap(dev);
2826 for (i = dev->queue_count - 1; i >= 0; i--)
2827 nvme_clear_queue(dev->queues[i]);
2830 static void nvme_dev_remove(struct nvme_dev *dev)
2832 struct nvme_ns *ns, *next;
2834 list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2838 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2840 dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2841 PAGE_SIZE, PAGE_SIZE, 0);
2842 if (!dev->prp_page_pool)
2845 /* Optimisation for I/Os between 4k and 128k */
2846 dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2848 if (!dev->prp_small_pool) {
2849 dma_pool_destroy(dev->prp_page_pool);
2855 static void nvme_release_prp_pools(struct nvme_dev *dev)
2857 dma_pool_destroy(dev->prp_page_pool);
2858 dma_pool_destroy(dev->prp_small_pool);
2861 static DEFINE_IDA(nvme_instance_ida);
2863 static int nvme_set_instance(struct nvme_dev *dev)
2865 int instance, error;
2868 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2871 spin_lock(&dev_list_lock);
2872 error = ida_get_new(&nvme_instance_ida, &instance);
2873 spin_unlock(&dev_list_lock);
2874 } while (error == -EAGAIN);
2879 dev->instance = instance;
2883 static void nvme_release_instance(struct nvme_dev *dev)
2885 spin_lock(&dev_list_lock);
2886 ida_remove(&nvme_instance_ida, dev->instance);
2887 spin_unlock(&dev_list_lock);
2890 static void nvme_free_dev(struct kref *kref)
2892 struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2894 put_device(dev->dev);
2895 put_device(dev->device);
2896 nvme_release_instance(dev);
2897 if (dev->tagset.tags)
2898 blk_mq_free_tag_set(&dev->tagset);
2900 blk_put_queue(dev->admin_q);
2906 static int nvme_dev_open(struct inode *inode, struct file *f)
2908 struct nvme_dev *dev;
2909 int instance = iminor(inode);
2912 spin_lock(&dev_list_lock);
2913 list_for_each_entry(dev, &dev_list, node) {
2914 if (dev->instance == instance) {
2915 if (!dev->admin_q) {
2919 if (!kref_get_unless_zero(&dev->kref))
2921 f->private_data = dev;
2926 spin_unlock(&dev_list_lock);
2931 static int nvme_dev_release(struct inode *inode, struct file *f)
2933 struct nvme_dev *dev = f->private_data;
2934 kref_put(&dev->kref, nvme_free_dev);
2938 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2940 struct nvme_dev *dev = f->private_data;
2944 case NVME_IOCTL_ADMIN_CMD:
2945 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2946 case NVME_IOCTL_IO_CMD:
2947 if (list_empty(&dev->namespaces))
2949 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2950 return nvme_user_cmd(dev, ns, (void __user *)arg);
2951 case NVME_IOCTL_RESET:
2952 dev_warn(dev->dev, "resetting controller\n");
2953 return nvme_reset(dev);
2954 case NVME_IOCTL_SUBSYS_RESET:
2955 return nvme_subsys_reset(dev);
2961 static const struct file_operations nvme_dev_fops = {
2962 .owner = THIS_MODULE,
2963 .open = nvme_dev_open,
2964 .release = nvme_dev_release,
2965 .unlocked_ioctl = nvme_dev_ioctl,
2966 .compat_ioctl = nvme_dev_ioctl,
2969 static void nvme_probe_work(struct work_struct *work)
2971 struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
2972 bool start_thread = false;
2975 result = nvme_dev_map(dev);
2979 result = nvme_configure_admin_queue(dev);
2983 spin_lock(&dev_list_lock);
2984 if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2985 start_thread = true;
2988 list_add(&dev->node, &dev_list);
2989 spin_unlock(&dev_list_lock);
2992 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2993 wake_up_all(&nvme_kthread_wait);
2995 wait_event_killable(nvme_kthread_wait, nvme_thread);
2997 if (IS_ERR_OR_NULL(nvme_thread)) {
2998 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
3002 nvme_init_queue(dev->queues[0], 0);
3003 result = nvme_alloc_admin_tags(dev);
3007 result = nvme_setup_io_queues(dev);
3011 dev->event_limit = 1;
3014 * Keep the controller around but remove all namespaces if we don't have
3015 * any working I/O queue.
3017 if (dev->online_queues < 2) {
3018 dev_warn(dev->dev, "IO queues not created\n");
3019 nvme_dev_remove(dev);
3021 nvme_unfreeze_queues(dev);
3028 nvme_dev_remove_admin(dev);
3029 blk_put_queue(dev->admin_q);
3030 dev->admin_q = NULL;
3031 dev->queues[0]->tags = NULL;
3033 nvme_disable_queue(dev, 0);
3034 nvme_dev_list_remove(dev);
3036 nvme_dev_unmap(dev);
3038 if (!work_busy(&dev->reset_work))
3039 nvme_dead_ctrl(dev);
3042 static int nvme_remove_dead_ctrl(void *arg)
3044 struct nvme_dev *dev = (struct nvme_dev *)arg;
3045 struct pci_dev *pdev = to_pci_dev(dev->dev);
3047 if (pci_get_drvdata(pdev))
3048 pci_stop_and_remove_bus_device_locked(pdev);
3049 kref_put(&dev->kref, nvme_free_dev);
3053 static void nvme_dead_ctrl(struct nvme_dev *dev)
3055 dev_warn(dev->dev, "Device failed to resume\n");
3056 kref_get(&dev->kref);
3057 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3060 "Failed to start controller remove task\n");
3061 kref_put(&dev->kref, nvme_free_dev);
3065 static void nvme_reset_work(struct work_struct *ws)
3067 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3068 bool in_probe = work_busy(&dev->probe_work);
3070 nvme_dev_shutdown(dev);
3072 /* Synchronize with device probe so that work will see failure status
3073 * and exit gracefully without trying to schedule another reset */
3074 flush_work(&dev->probe_work);
3076 /* Fail this device if reset occured during probe to avoid
3077 * infinite initialization loops. */
3079 nvme_dead_ctrl(dev);
3082 /* Schedule device resume asynchronously so the reset work is available
3083 * to cleanup errors that may occur during reinitialization */
3084 schedule_work(&dev->probe_work);
3087 static int __nvme_reset(struct nvme_dev *dev)
3089 if (work_pending(&dev->reset_work))
3091 list_del_init(&dev->node);
3092 queue_work(nvme_workq, &dev->reset_work);
3096 static int nvme_reset(struct nvme_dev *dev)
3100 if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3103 spin_lock(&dev_list_lock);
3104 ret = __nvme_reset(dev);
3105 spin_unlock(&dev_list_lock);
3108 flush_work(&dev->reset_work);
3109 flush_work(&dev->probe_work);
3116 static ssize_t nvme_sysfs_reset(struct device *dev,
3117 struct device_attribute *attr, const char *buf,
3120 struct nvme_dev *ndev = dev_get_drvdata(dev);
3123 ret = nvme_reset(ndev);
3129 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3131 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3133 int node, result = -ENOMEM;
3134 struct nvme_dev *dev;
3136 node = dev_to_node(&pdev->dev);
3137 if (node == NUMA_NO_NODE)
3138 set_dev_node(&pdev->dev, 0);
3140 dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3143 dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3147 dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3152 INIT_LIST_HEAD(&dev->namespaces);
3153 INIT_WORK(&dev->reset_work, nvme_reset_work);
3154 dev->dev = get_device(&pdev->dev);
3155 pci_set_drvdata(pdev, dev);
3156 result = nvme_set_instance(dev);
3160 result = nvme_setup_prp_pools(dev);
3164 kref_init(&dev->kref);
3165 dev->device = device_create(nvme_class, &pdev->dev,
3166 MKDEV(nvme_char_major, dev->instance),
3167 dev, "nvme%d", dev->instance);
3168 if (IS_ERR(dev->device)) {
3169 result = PTR_ERR(dev->device);
3172 get_device(dev->device);
3173 dev_set_drvdata(dev->device, dev);
3175 result = device_create_file(dev->device, &dev_attr_reset_controller);
3179 INIT_LIST_HEAD(&dev->node);
3180 INIT_WORK(&dev->scan_work, nvme_dev_scan);
3181 INIT_WORK(&dev->probe_work, nvme_probe_work);
3182 schedule_work(&dev->probe_work);
3186 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3187 put_device(dev->device);
3189 nvme_release_prp_pools(dev);
3191 nvme_release_instance(dev);
3193 put_device(dev->dev);
3201 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3203 struct nvme_dev *dev = pci_get_drvdata(pdev);
3206 nvme_dev_shutdown(dev);
3208 schedule_work(&dev->probe_work);
3211 static void nvme_shutdown(struct pci_dev *pdev)
3213 struct nvme_dev *dev = pci_get_drvdata(pdev);
3214 nvme_dev_shutdown(dev);
3217 static void nvme_remove(struct pci_dev *pdev)
3219 struct nvme_dev *dev = pci_get_drvdata(pdev);
3221 spin_lock(&dev_list_lock);
3222 list_del_init(&dev->node);
3223 spin_unlock(&dev_list_lock);
3225 pci_set_drvdata(pdev, NULL);
3226 flush_work(&dev->probe_work);
3227 flush_work(&dev->reset_work);
3228 flush_work(&dev->scan_work);
3229 device_remove_file(dev->device, &dev_attr_reset_controller);
3230 nvme_dev_remove(dev);
3231 nvme_dev_shutdown(dev);
3232 nvme_dev_remove_admin(dev);
3233 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3234 nvme_free_queues(dev, 0);
3235 nvme_release_cmb(dev);
3236 nvme_release_prp_pools(dev);
3237 kref_put(&dev->kref, nvme_free_dev);
3240 /* These functions are yet to be implemented */
3241 #define nvme_error_detected NULL
3242 #define nvme_dump_registers NULL
3243 #define nvme_link_reset NULL
3244 #define nvme_slot_reset NULL
3245 #define nvme_error_resume NULL
3247 #ifdef CONFIG_PM_SLEEP
3248 static int nvme_suspend(struct device *dev)
3250 struct pci_dev *pdev = to_pci_dev(dev);
3251 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3253 nvme_dev_shutdown(ndev);
3257 static int nvme_resume(struct device *dev)
3259 struct pci_dev *pdev = to_pci_dev(dev);
3260 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3262 schedule_work(&ndev->probe_work);
3267 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3269 static const struct pci_error_handlers nvme_err_handler = {
3270 .error_detected = nvme_error_detected,
3271 .mmio_enabled = nvme_dump_registers,
3272 .link_reset = nvme_link_reset,
3273 .slot_reset = nvme_slot_reset,
3274 .resume = nvme_error_resume,
3275 .reset_notify = nvme_reset_notify,
3278 /* Move to pci_ids.h later */
3279 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
3281 static const struct pci_device_id nvme_id_table[] = {
3282 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3285 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3287 static struct pci_driver nvme_driver = {
3289 .id_table = nvme_id_table,
3290 .probe = nvme_probe,
3291 .remove = nvme_remove,
3292 .shutdown = nvme_shutdown,
3294 .pm = &nvme_dev_pm_ops,
3296 .err_handler = &nvme_err_handler,
3299 static int __init nvme_init(void)
3303 init_waitqueue_head(&nvme_kthread_wait);
3305 nvme_workq = create_singlethread_workqueue("nvme");
3309 result = register_blkdev(nvme_major, "nvme");
3312 else if (result > 0)
3313 nvme_major = result;
3315 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3318 goto unregister_blkdev;
3319 else if (result > 0)
3320 nvme_char_major = result;
3322 nvme_class = class_create(THIS_MODULE, "nvme");
3323 if (IS_ERR(nvme_class)) {
3324 result = PTR_ERR(nvme_class);
3325 goto unregister_chrdev;
3328 result = pci_register_driver(&nvme_driver);
3334 class_destroy(nvme_class);
3336 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3338 unregister_blkdev(nvme_major, "nvme");
3340 destroy_workqueue(nvme_workq);
3344 static void __exit nvme_exit(void)
3346 pci_unregister_driver(&nvme_driver);
3347 unregister_blkdev(nvme_major, "nvme");
3348 destroy_workqueue(nvme_workq);
3349 class_destroy(nvme_class);
3350 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3351 BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3355 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3356 MODULE_LICENSE("GPL");
3357 MODULE_VERSION("1.0");
3358 module_init(nvme_init);
3359 module_exit(nvme_exit);