2 * Rockchip eFuse Driver
4 * Copyright (c) 2015 Rockchip Electronics Co. Ltd.
5 * Author: Caesar Wang <wxt@rock-chips.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/device.h>
21 #include <linux/module.h>
22 #include <linux/nvmem-provider.h>
23 #include <linux/slab.h>
25 #include <linux/of_platform.h>
26 #include <linux/platform_device.h>
28 #define RK3288_A_SHIFT 6
29 #define RK3288_A_MASK 0x3ff
30 #define RK3288_PGENB BIT(3)
31 #define RK3288_LOAD BIT(2)
32 #define RK3288_STROBE BIT(1)
33 #define RK3288_CSB BIT(0)
35 #define RK3366_A_SHIFT 6
36 #define RK3366_A_MASK 0x3ff
37 #define RK3366_RDEN BIT(2)
38 #define RK3366_AEN BIT(1)
40 #define RK3399_A_SHIFT 16
41 #define RK3399_A_MASK 0x3ff
42 #define RK3399_NBYTES 4
43 #define RK3399_STROBSFTSEL BIT(9)
44 #define RK3399_RSB BIT(7)
45 #define RK3399_PD BIT(5)
46 #define RK3399_PGENB BIT(3)
47 #define RK3399_LOAD BIT(2)
48 #define RK3399_STROBE BIT(1)
49 #define RK3399_CSB BIT(0)
51 #define REG_EFUSE_CTRL 0x0000
52 #define REG_EFUSE_DOUT 0x0004
54 struct rockchip_efuse_chip {
60 static int rockchip_rk3288_efuse_read(void *context, unsigned int offset,
61 void *val, size_t bytes)
63 struct rockchip_efuse_chip *efuse = context;
67 ret = clk_prepare_enable(efuse->clk);
69 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
73 writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL);
76 writel(readl(efuse->base + REG_EFUSE_CTRL) &
77 (~(RK3288_A_MASK << RK3288_A_SHIFT)),
78 efuse->base + REG_EFUSE_CTRL);
79 writel(readl(efuse->base + REG_EFUSE_CTRL) |
80 ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
81 efuse->base + REG_EFUSE_CTRL);
83 writel(readl(efuse->base + REG_EFUSE_CTRL) |
84 RK3288_STROBE, efuse->base + REG_EFUSE_CTRL);
86 *buf++ = readb(efuse->base + REG_EFUSE_DOUT);
87 writel(readl(efuse->base + REG_EFUSE_CTRL) &
88 (~RK3288_STROBE), efuse->base + REG_EFUSE_CTRL);
92 /* Switch to standby mode */
93 writel(RK3288_PGENB | RK3288_CSB, efuse->base + REG_EFUSE_CTRL);
95 clk_disable_unprepare(efuse->clk);
100 static int rockchip_rk3366_efuse_read(void *context, unsigned int offset,
101 void *val, size_t bytes)
103 struct rockchip_efuse_chip *efuse = context;
107 ret = clk_prepare_enable(efuse->clk);
109 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
113 writel(RK3366_RDEN, efuse->base + REG_EFUSE_CTRL);
116 writel(readl(efuse->base + REG_EFUSE_CTRL) &
117 (~(RK3366_A_MASK << RK3366_A_SHIFT)),
118 efuse->base + REG_EFUSE_CTRL);
119 writel(readl(efuse->base + REG_EFUSE_CTRL) |
120 ((offset++ & RK3366_A_MASK) << RK3366_A_SHIFT),
121 efuse->base + REG_EFUSE_CTRL);
123 writel(readl(efuse->base + REG_EFUSE_CTRL) |
124 RK3366_AEN, efuse->base + REG_EFUSE_CTRL);
126 *buf++ = readb(efuse->base + REG_EFUSE_DOUT);
127 writel(readl(efuse->base + REG_EFUSE_CTRL) &
128 (~RK3366_AEN), efuse->base + REG_EFUSE_CTRL);
132 writel(readl(efuse->base + REG_EFUSE_CTRL) &
133 (~RK3366_RDEN), efuse->base + REG_EFUSE_CTRL);
135 clk_disable_unprepare(efuse->clk);
140 static int rockchip_rk3399_efuse_read(void *context, unsigned int offset,
141 void *val, size_t bytes)
143 struct rockchip_efuse_chip *efuse = context;
144 unsigned int addr_start, addr_end, addr_offset, addr_len;
149 ret = clk_prepare_enable(efuse->clk);
151 dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
155 addr_start = rounddown(offset, RK3399_NBYTES) / RK3399_NBYTES;
156 addr_end = roundup(offset + bytes, RK3399_NBYTES) / RK3399_NBYTES;
157 addr_offset = offset % RK3399_NBYTES;
158 addr_len = addr_end - addr_start;
160 buf = kzalloc(sizeof(*buf) * addr_len * RK3399_NBYTES, GFP_KERNEL);
162 clk_disable_unprepare(efuse->clk);
166 writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB,
167 efuse->base + REG_EFUSE_CTRL);
170 writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3399_STROBE |
171 ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
172 efuse->base + REG_EFUSE_CTRL);
174 out_value = readl(efuse->base + REG_EFUSE_DOUT);
175 writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3399_STROBE),
176 efuse->base + REG_EFUSE_CTRL);
179 memcpy(&buf[i], &out_value, RK3399_NBYTES);
183 /* Switch to standby mode */
184 writel(RK3399_PD | RK3399_CSB, efuse->base + REG_EFUSE_CTRL);
186 memcpy(val, buf + addr_offset, bytes);
190 clk_disable_unprepare(efuse->clk);
195 static struct nvmem_config econfig = {
196 .name = "rockchip-efuse",
197 .owner = THIS_MODULE,
203 static const struct of_device_id rockchip_efuse_match[] = {
204 /* deprecated but kept around for dts binding compatibility */
206 .compatible = "rockchip,rockchip-efuse",
207 .data = (void *)&rockchip_rk3288_efuse_read,
210 .compatible = "rockchip,rk3066a-efuse",
211 .data = (void *)&rockchip_rk3288_efuse_read,
214 .compatible = "rockchip,rk3188-efuse",
215 .data = (void *)&rockchip_rk3288_efuse_read,
218 .compatible = "rockchip,rk3288-efuse",
219 .data = (void *)&rockchip_rk3288_efuse_read,
222 .compatible = "rockchip,rk3366-efuse",
223 .data = (void *)&rockchip_rk3366_efuse_read,
226 .compatible = "rockchip,rk3399-efuse",
227 .data = (void *)&rockchip_rk3399_efuse_read,
231 MODULE_DEVICE_TABLE(of, rockchip_efuse_match);
233 static int __init rockchip_efuse_probe(struct platform_device *pdev)
235 struct resource *res;
236 struct nvmem_device *nvmem;
237 struct rockchip_efuse_chip *efuse;
238 const struct of_device_id *match;
239 struct device *dev = &pdev->dev;
241 match = of_match_device(dev->driver->of_match_table, dev);
242 if (!match || !match->data) {
243 dev_err(dev, "failed to get match data\n");
247 efuse = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_efuse_chip),
252 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
253 efuse->base = devm_ioremap_resource(&pdev->dev, res);
254 if (IS_ERR(efuse->base))
255 return PTR_ERR(efuse->base);
257 efuse->clk = devm_clk_get(&pdev->dev, "pclk_efuse");
258 if (IS_ERR(efuse->clk))
259 return PTR_ERR(efuse->clk);
261 efuse->dev = &pdev->dev;
262 econfig.size = resource_size(res);
263 econfig.reg_read = match->data;
264 econfig.priv = efuse;
265 econfig.dev = efuse->dev;
266 nvmem = nvmem_register(&econfig);
268 return PTR_ERR(nvmem);
270 platform_set_drvdata(pdev, nvmem);
275 static int rockchip_efuse_remove(struct platform_device *pdev)
277 struct nvmem_device *nvmem = platform_get_drvdata(pdev);
279 return nvmem_unregister(nvmem);
282 static struct platform_driver rockchip_efuse_driver = {
283 .remove = rockchip_efuse_remove,
285 .name = "rockchip-efuse",
286 .of_match_table = rockchip_efuse_match,
290 static int __init rockchip_efuse_module_init(void)
292 return platform_driver_probe(&rockchip_efuse_driver,
293 rockchip_efuse_probe);
296 subsys_initcall(rockchip_efuse_module_init);
298 MODULE_DESCRIPTION("rockchip_efuse driver");
299 MODULE_LICENSE("GPL v2");