4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 * Copyright (C) 2011 Advanced Micro Devices,
7 * PCI Express I/O Virtualization (IOV) support.
8 * Address Translation Service 1.0
9 * Page Request Interface added by Joerg Roedel <joerg.roedel@amd.com>
10 * PASID support added by Joerg Roedel <joerg.roedel@amd.com>
13 #include <linux/export.h>
14 #include <linux/pci-ats.h>
15 #include <linux/pci.h>
19 static int ats_alloc_one(struct pci_dev *dev, int ps)
25 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
29 ats = kzalloc(sizeof(*ats), GFP_KERNEL);
35 pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
36 ats->qdep = PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
43 static void ats_free_one(struct pci_dev *dev)
50 * pci_enable_ats - enable the ATS capability
51 * @dev: the PCI device
52 * @ps: the IOMMU page shift
54 * Returns 0 on success, or negative on failure.
56 int pci_enable_ats(struct pci_dev *dev, int ps)
61 BUG_ON(dev->ats && dev->ats->is_enabled);
63 if (ps < PCI_ATS_MIN_STU)
66 if (dev->is_physfn || dev->is_virtfn) {
67 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
69 mutex_lock(&pdev->sriov->lock);
71 rc = pdev->ats->stu == ps ? 0 : -EINVAL;
73 rc = ats_alloc_one(pdev, ps);
77 mutex_unlock(&pdev->sriov->lock);
82 if (!dev->is_physfn) {
83 rc = ats_alloc_one(dev, ps);
88 ctrl = PCI_ATS_CTRL_ENABLE;
90 ctrl |= PCI_ATS_CTRL_STU(ps - PCI_ATS_MIN_STU);
91 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
93 dev->ats->is_enabled = 1;
97 EXPORT_SYMBOL_GPL(pci_enable_ats);
100 * pci_disable_ats - disable the ATS capability
101 * @dev: the PCI device
103 void pci_disable_ats(struct pci_dev *dev)
107 BUG_ON(!dev->ats || !dev->ats->is_enabled);
109 pci_read_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, &ctrl);
110 ctrl &= ~PCI_ATS_CTRL_ENABLE;
111 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
113 dev->ats->is_enabled = 0;
115 if (dev->is_physfn || dev->is_virtfn) {
116 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
118 mutex_lock(&pdev->sriov->lock);
119 pdev->ats->ref_cnt--;
120 if (!pdev->ats->ref_cnt)
122 mutex_unlock(&pdev->sriov->lock);
128 EXPORT_SYMBOL_GPL(pci_disable_ats);
131 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
132 * @dev: the PCI device
134 * Returns the queue depth on success, or negative on failure.
136 * The ATS spec uses 0 in the Invalidate Queue Depth field to
137 * indicate that the function can accept 32 Invalidate Request.
138 * But here we use the `real' values (i.e. 1~32) for the Queue
139 * Depth; and 0 indicates the function shares the Queue with
140 * other functions (doesn't exclusively own a Queue).
142 int pci_ats_queue_depth(struct pci_dev *dev)
151 return dev->ats->qdep;
153 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
157 pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
159 return PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
162 EXPORT_SYMBOL_GPL(pci_ats_queue_depth);
164 #ifdef CONFIG_PCI_PRI
166 * pci_enable_pri - Enable PRI capability
167 * @ pdev: PCI device structure
169 * Returns 0 on success, negative value on error
171 int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
177 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
181 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
182 pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status);
183 if ((control & PCI_PRI_ENABLE) || !(status & PCI_PRI_STATUS_STOPPED))
186 pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ_OFF, &max_requests);
187 reqs = min(max_requests, reqs);
188 pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ_OFF, reqs);
190 control |= PCI_PRI_ENABLE;
191 pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
195 EXPORT_SYMBOL_GPL(pci_enable_pri);
198 * pci_disable_pri - Disable PRI capability
199 * @pdev: PCI device structure
201 * Only clears the enabled-bit, regardless of its former value
203 void pci_disable_pri(struct pci_dev *pdev)
208 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
212 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
213 control &= ~PCI_PRI_ENABLE;
214 pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
216 EXPORT_SYMBOL_GPL(pci_disable_pri);
219 * pci_pri_enabled - Checks if PRI capability is enabled
220 * @pdev: PCI device structure
222 * Returns true if PRI is enabled on the device, false otherwise
224 bool pci_pri_enabled(struct pci_dev *pdev)
229 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
233 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
235 return (control & PCI_PRI_ENABLE) ? true : false;
237 EXPORT_SYMBOL_GPL(pci_pri_enabled);
240 * pci_reset_pri - Resets device's PRI state
241 * @pdev: PCI device structure
243 * The PRI capability must be disabled before this function is called.
244 * Returns 0 on success, negative value on error.
246 int pci_reset_pri(struct pci_dev *pdev)
251 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
255 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
256 if (control & PCI_PRI_ENABLE)
259 control |= PCI_PRI_RESET;
261 pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control);
265 EXPORT_SYMBOL_GPL(pci_reset_pri);
268 * pci_pri_stopped - Checks whether the PRI capability is stopped
269 * @pdev: PCI device structure
271 * Returns true if the PRI capability on the device is disabled and the
272 * device has no outstanding PRI requests, false otherwise. The device
273 * indicates this via the STOPPED bit in the status register of the
275 * The device internal state can be cleared by resetting the PRI state
276 * with pci_reset_pri(). This can force the capability into the STOPPED
279 bool pci_pri_stopped(struct pci_dev *pdev)
284 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
288 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
289 pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status);
291 if (control & PCI_PRI_ENABLE)
294 return (status & PCI_PRI_STATUS_STOPPED) ? true : false;
296 EXPORT_SYMBOL_GPL(pci_pri_stopped);
299 * pci_pri_status - Request PRI status of a device
300 * @pdev: PCI device structure
302 * Returns negative value on failure, status on success. The status can
303 * be checked against status-bits. Supported bits are currently:
304 * PCI_PRI_STATUS_RF: Response failure
305 * PCI_PRI_STATUS_UPRGI: Unexpected Page Request Group Index
306 * PCI_PRI_STATUS_STOPPED: PRI has stopped
308 int pci_pri_status(struct pci_dev *pdev)
313 pos = pci_find_ext_capability(pdev, PCI_PRI_CAP);
317 pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control);
318 pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status);
320 /* Stopped bit is undefined when enable == 1, so clear it */
321 if (control & PCI_PRI_ENABLE)
322 status &= ~PCI_PRI_STATUS_STOPPED;
326 EXPORT_SYMBOL_GPL(pci_pri_status);
327 #endif /* CONFIG_PCI_PRI */
329 #ifdef CONFIG_PCI_PASID
331 * pci_enable_pasid - Enable the PASID capability
332 * @pdev: PCI device structure
333 * @features: Features to enable
335 * Returns 0 on success, negative value on error. This function checks
336 * whether the features are actually supported by the device and returns
339 int pci_enable_pasid(struct pci_dev *pdev, int features)
341 u16 control, supported;
344 pos = pci_find_ext_capability(pdev, PCI_PASID_CAP);
348 pci_read_config_word(pdev, pos + PCI_PASID_CONTROL_OFF, &control);
349 pci_read_config_word(pdev, pos + PCI_PASID_CAP_OFF, &supported);
351 if (!(supported & PCI_PASID_ENABLE))
354 supported &= PCI_PASID_EXEC | PCI_PASID_PRIV;
356 /* User wants to enable anything unsupported? */
357 if ((supported & features) != features)
360 control = PCI_PASID_ENABLE | features;
362 pci_write_config_word(pdev, pos + PCI_PASID_CONTROL_OFF, control);
366 EXPORT_SYMBOL_GPL(pci_enable_pasid);
369 * pci_disable_pasid - Disable the PASID capability
370 * @pdev: PCI device structure
373 void pci_disable_pasid(struct pci_dev *pdev)
378 pos = pci_find_ext_capability(pdev, PCI_PASID_CAP);
382 pci_write_config_word(pdev, pos + PCI_PASID_CONTROL_OFF, control);
384 EXPORT_SYMBOL_GPL(pci_disable_pasid);
387 * pci_pasid_features - Check which PASID features are supported
388 * @pdev: PCI device structure
390 * Returns a negative value when no PASI capability is present.
391 * Otherwise is returns a bitmask with supported features. Current
392 * features reported are:
393 * PCI_PASID_ENABLE - PASID capability can be enabled
394 * PCI_PASID_EXEC - Execute permission supported
395 * PCI_PASID_PRIV - Priviledged mode supported
397 int pci_pasid_features(struct pci_dev *pdev)
402 pos = pci_find_ext_capability(pdev, PCI_PASID_CAP);
406 pci_read_config_word(pdev, pos + PCI_PASID_CAP_OFF, &supported);
408 supported &= PCI_PASID_ENABLE | PCI_PASID_EXEC | PCI_PASID_PRIV;
412 EXPORT_SYMBOL_GPL(pci_pasid_features);
414 #define PASID_NUMBER_SHIFT 8
415 #define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT)
417 * pci_max_pasid - Get maximum number of PASIDs supported by device
418 * @pdev: PCI device structure
420 * Returns negative value when PASID capability is not present.
421 * Otherwise it returns the numer of supported PASIDs.
423 int pci_max_pasids(struct pci_dev *pdev)
428 pos = pci_find_ext_capability(pdev, PCI_PASID_CAP);
432 pci_read_config_word(pdev, pos + PCI_PASID_CAP_OFF, &supported);
434 supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT;
436 return (1 << supported);
438 EXPORT_SYMBOL_GPL(pci_max_pasids);
439 #endif /* CONFIG_PCI_PASID */