4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 * Copyright (C) 2011 Advanced Micro Devices,
7 * PCI Express I/O Virtualization (IOV) support.
8 * Address Translation Service 1.0
9 * Page Request Interface added by Joerg Roedel <joerg.roedel@amd.com>
10 * PASID support added by Joerg Roedel <joerg.roedel@amd.com>
13 #include <linux/export.h>
14 #include <linux/pci-ats.h>
15 #include <linux/pci.h>
16 #include <linux/slab.h>
20 static int ats_alloc_one(struct pci_dev *dev, int ps)
26 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
30 ats = kzalloc(sizeof(*ats), GFP_KERNEL);
36 pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
37 ats->qdep = PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
44 static void ats_free_one(struct pci_dev *dev)
51 * pci_enable_ats - enable the ATS capability
52 * @dev: the PCI device
53 * @ps: the IOMMU page shift
55 * Returns 0 on success, or negative on failure.
57 int pci_enable_ats(struct pci_dev *dev, int ps)
62 BUG_ON(dev->ats && dev->ats->is_enabled);
64 if (ps < PCI_ATS_MIN_STU)
67 if (dev->is_physfn || dev->is_virtfn) {
68 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
70 mutex_lock(&pdev->sriov->lock);
72 rc = pdev->ats->stu == ps ? 0 : -EINVAL;
74 rc = ats_alloc_one(pdev, ps);
78 mutex_unlock(&pdev->sriov->lock);
83 if (!dev->is_physfn) {
84 rc = ats_alloc_one(dev, ps);
89 ctrl = PCI_ATS_CTRL_ENABLE;
91 ctrl |= PCI_ATS_CTRL_STU(ps - PCI_ATS_MIN_STU);
92 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
94 dev->ats->is_enabled = 1;
98 EXPORT_SYMBOL_GPL(pci_enable_ats);
101 * pci_disable_ats - disable the ATS capability
102 * @dev: the PCI device
104 void pci_disable_ats(struct pci_dev *dev)
108 BUG_ON(!dev->ats || !dev->ats->is_enabled);
110 pci_read_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, &ctrl);
111 ctrl &= ~PCI_ATS_CTRL_ENABLE;
112 pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl);
114 dev->ats->is_enabled = 0;
116 if (dev->is_physfn || dev->is_virtfn) {
117 struct pci_dev *pdev = dev->is_physfn ? dev : dev->physfn;
119 mutex_lock(&pdev->sriov->lock);
120 pdev->ats->ref_cnt--;
121 if (!pdev->ats->ref_cnt)
123 mutex_unlock(&pdev->sriov->lock);
129 EXPORT_SYMBOL_GPL(pci_disable_ats);
132 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
133 * @dev: the PCI device
135 * Returns the queue depth on success, or negative on failure.
137 * The ATS spec uses 0 in the Invalidate Queue Depth field to
138 * indicate that the function can accept 32 Invalidate Request.
139 * But here we use the `real' values (i.e. 1~32) for the Queue
140 * Depth; and 0 indicates the function shares the Queue with
141 * other functions (doesn't exclusively own a Queue).
143 int pci_ats_queue_depth(struct pci_dev *dev)
152 return dev->ats->qdep;
154 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
158 pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap);
160 return PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
163 EXPORT_SYMBOL_GPL(pci_ats_queue_depth);
165 #ifdef CONFIG_PCI_PRI
167 * pci_enable_pri - Enable PRI capability
168 * @ pdev: PCI device structure
170 * Returns 0 on success, negative value on error
172 int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
178 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
182 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
183 pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
184 if ((control & PCI_PRI_CTRL_ENABLE) ||
185 !(status & PCI_PRI_STATUS_STOPPED))
188 pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ, &max_requests);
189 reqs = min(max_requests, reqs);
190 pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs);
192 control |= PCI_PRI_CTRL_ENABLE;
193 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
197 EXPORT_SYMBOL_GPL(pci_enable_pri);
200 * pci_disable_pri - Disable PRI capability
201 * @pdev: PCI device structure
203 * Only clears the enabled-bit, regardless of its former value
205 void pci_disable_pri(struct pci_dev *pdev)
210 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
214 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
215 control &= ~PCI_PRI_CTRL_ENABLE;
216 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
218 EXPORT_SYMBOL_GPL(pci_disable_pri);
221 * pci_pri_enabled - Checks if PRI capability is enabled
222 * @pdev: PCI device structure
224 * Returns true if PRI is enabled on the device, false otherwise
226 bool pci_pri_enabled(struct pci_dev *pdev)
231 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
235 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
237 return (control & PCI_PRI_CTRL_ENABLE) ? true : false;
239 EXPORT_SYMBOL_GPL(pci_pri_enabled);
242 * pci_reset_pri - Resets device's PRI state
243 * @pdev: PCI device structure
245 * The PRI capability must be disabled before this function is called.
246 * Returns 0 on success, negative value on error.
248 int pci_reset_pri(struct pci_dev *pdev)
253 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
257 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
258 if (control & PCI_PRI_CTRL_ENABLE)
261 control |= PCI_PRI_CTRL_RESET;
263 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
267 EXPORT_SYMBOL_GPL(pci_reset_pri);
270 * pci_pri_stopped - Checks whether the PRI capability is stopped
271 * @pdev: PCI device structure
273 * Returns true if the PRI capability on the device is disabled and the
274 * device has no outstanding PRI requests, false otherwise. The device
275 * indicates this via the STOPPED bit in the status register of the
277 * The device internal state can be cleared by resetting the PRI state
278 * with pci_reset_pri(). This can force the capability into the STOPPED
281 bool pci_pri_stopped(struct pci_dev *pdev)
286 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
290 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
291 pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
293 if (control & PCI_PRI_CTRL_ENABLE)
296 return (status & PCI_PRI_STATUS_STOPPED) ? true : false;
298 EXPORT_SYMBOL_GPL(pci_pri_stopped);
301 * pci_pri_status - Request PRI status of a device
302 * @pdev: PCI device structure
304 * Returns negative value on failure, status on success. The status can
305 * be checked against status-bits. Supported bits are currently:
306 * PCI_PRI_STATUS_RF: Response failure
307 * PCI_PRI_STATUS_UPRGI: Unexpected Page Request Group Index
308 * PCI_PRI_STATUS_STOPPED: PRI has stopped
310 int pci_pri_status(struct pci_dev *pdev)
315 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
319 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
320 pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
322 /* Stopped bit is undefined when enable == 1, so clear it */
323 if (control & PCI_PRI_CTRL_ENABLE)
324 status &= ~PCI_PRI_STATUS_STOPPED;
328 EXPORT_SYMBOL_GPL(pci_pri_status);
329 #endif /* CONFIG_PCI_PRI */
331 #ifdef CONFIG_PCI_PASID
333 * pci_enable_pasid - Enable the PASID capability
334 * @pdev: PCI device structure
335 * @features: Features to enable
337 * Returns 0 on success, negative value on error. This function checks
338 * whether the features are actually supported by the device and returns
341 int pci_enable_pasid(struct pci_dev *pdev, int features)
343 u16 control, supported;
346 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
350 pci_read_config_word(pdev, pos + PCI_PASID_CTRL, &control);
351 pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
353 if (control & PCI_PASID_CTRL_ENABLE)
356 supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
358 /* User wants to enable anything unsupported? */
359 if ((supported & features) != features)
362 control = PCI_PASID_CTRL_ENABLE | features;
364 pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
368 EXPORT_SYMBOL_GPL(pci_enable_pasid);
371 * pci_disable_pasid - Disable the PASID capability
372 * @pdev: PCI device structure
375 void pci_disable_pasid(struct pci_dev *pdev)
380 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
384 pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
386 EXPORT_SYMBOL_GPL(pci_disable_pasid);
389 * pci_pasid_features - Check which PASID features are supported
390 * @pdev: PCI device structure
392 * Returns a negative value when no PASI capability is present.
393 * Otherwise is returns a bitmask with supported features. Current
394 * features reported are:
395 * PCI_PASID_CAP_EXEC - Execute permission supported
396 * PCI_PASID_CAP_PRIV - Priviledged mode supported
398 int pci_pasid_features(struct pci_dev *pdev)
403 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
407 pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
409 supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
413 EXPORT_SYMBOL_GPL(pci_pasid_features);
415 #define PASID_NUMBER_SHIFT 8
416 #define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT)
418 * pci_max_pasid - Get maximum number of PASIDs supported by device
419 * @pdev: PCI device structure
421 * Returns negative value when PASID capability is not present.
422 * Otherwise it returns the numer of supported PASIDs.
424 int pci_max_pasids(struct pci_dev *pdev)
429 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
433 pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
435 supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT;
437 return (1 << supported);
439 EXPORT_SYMBOL_GPL(pci_max_pasids);
440 #endif /* CONFIG_PCI_PASID */