2 * PCIE AER software error injection support.
4 * Debuging PCIE AER code is quite difficult because it is hard to
5 * trigger various real hardware errors. Software based error
6 * injection can fake almost all kinds of errors with the help of a
7 * user space helper tool aer-inject, which can be gotten from:
8 * http://www.kernel.org/pub/linux/utils/pci/aer-inject/
10 * Copyright 2009 Intel Corporation.
11 * Huang Ying <ying.huang@intel.com>
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; version 2
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/miscdevice.h>
23 #include <linux/pci.h>
25 #include <linux/uaccess.h>
28 struct aer_error_inj {
41 struct list_head list;
57 struct list_head list;
62 static LIST_HEAD(einjected);
64 static LIST_HEAD(pci_bus_ops_list);
66 /* Protect einjected and pci_bus_ops_list */
67 static DEFINE_SPINLOCK(inject_lock);
69 static void aer_error_init(struct aer_error *err, unsigned int bus,
70 unsigned int devfn, int pos_cap_err)
72 INIT_LIST_HEAD(&err->list);
75 err->pos_cap_err = pos_cap_err;
78 /* inject_lock must be held before calling */
79 static struct aer_error *__find_aer_error(unsigned int bus, unsigned int devfn)
81 struct aer_error *err;
83 list_for_each_entry(err, &einjected, list) {
84 if (bus == err->bus && devfn == err->devfn)
90 /* inject_lock must be held before calling */
91 static struct aer_error *__find_aer_error_by_dev(struct pci_dev *dev)
93 return __find_aer_error(dev->bus->number, dev->devfn);
96 /* inject_lock must be held before calling */
97 static struct pci_ops *__find_pci_bus_ops(struct pci_bus *bus)
99 struct pci_bus_ops *bus_ops;
101 list_for_each_entry(bus_ops, &pci_bus_ops_list, list) {
102 if (bus_ops->bus == bus)
108 static struct pci_bus_ops *pci_bus_ops_pop(void)
111 struct pci_bus_ops *bus_ops = NULL;
113 spin_lock_irqsave(&inject_lock, flags);
114 if (list_empty(&pci_bus_ops_list))
117 struct list_head *lh = pci_bus_ops_list.next;
119 bus_ops = list_entry(lh, struct pci_bus_ops, list);
121 spin_unlock_irqrestore(&inject_lock, flags);
125 static u32 *find_pci_config_dword(struct aer_error *err, int where,
131 if (err->pos_cap_err == -1)
134 switch (where - err->pos_cap_err) {
135 case PCI_ERR_UNCOR_STATUS:
136 target = &err->uncor_status;
139 case PCI_ERR_COR_STATUS:
140 target = &err->cor_status;
143 case PCI_ERR_HEADER_LOG:
144 target = &err->header_log0;
146 case PCI_ERR_HEADER_LOG+4:
147 target = &err->header_log1;
149 case PCI_ERR_HEADER_LOG+8:
150 target = &err->header_log2;
152 case PCI_ERR_HEADER_LOG+12:
153 target = &err->header_log3;
155 case PCI_ERR_ROOT_STATUS:
156 target = &err->root_status;
159 case PCI_ERR_ROOT_COR_SRC:
160 target = &err->source_id;
168 static int pci_read_aer(struct pci_bus *bus, unsigned int devfn, int where,
172 struct aer_error *err;
176 spin_lock_irqsave(&inject_lock, flags);
177 if (size != sizeof(u32))
179 err = __find_aer_error(bus->number, devfn);
183 sim = find_pci_config_dword(err, where, NULL);
186 spin_unlock_irqrestore(&inject_lock, flags);
190 ops = __find_pci_bus_ops(bus);
191 spin_unlock_irqrestore(&inject_lock, flags);
192 return ops->read(bus, devfn, where, size, val);
195 int pci_write_aer(struct pci_bus *bus, unsigned int devfn, int where, int size,
199 struct aer_error *err;
204 spin_lock_irqsave(&inject_lock, flags);
205 if (size != sizeof(u32))
207 err = __find_aer_error(bus->number, devfn);
211 sim = find_pci_config_dword(err, where, &rw1cs);
217 spin_unlock_irqrestore(&inject_lock, flags);
221 ops = __find_pci_bus_ops(bus);
222 spin_unlock_irqrestore(&inject_lock, flags);
223 return ops->write(bus, devfn, where, size, val);
226 static struct pci_ops pci_ops_aer = {
227 .read = pci_read_aer,
228 .write = pci_write_aer,
231 static void pci_bus_ops_init(struct pci_bus_ops *bus_ops,
235 INIT_LIST_HEAD(&bus_ops->list);
240 static int pci_bus_set_aer_ops(struct pci_bus *bus)
243 struct pci_bus_ops *bus_ops;
246 bus_ops = kmalloc(sizeof(*bus_ops), GFP_KERNEL);
249 ops = pci_bus_set_ops(bus, &pci_ops_aer);
250 spin_lock_irqsave(&inject_lock, flags);
251 if (ops == &pci_ops_aer)
253 pci_bus_ops_init(bus_ops, bus, ops);
254 list_add(&bus_ops->list, &pci_bus_ops_list);
257 spin_unlock_irqrestore(&inject_lock, flags);
262 static struct pci_dev *pcie_find_root_port(struct pci_dev *dev)
267 if (dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
271 dev = dev->bus->self;
276 static int find_aer_device_iter(struct device *device, void *data)
278 struct pcie_device **result = data;
279 struct pcie_device *pcie_dev;
281 if (device->bus == &pcie_port_bus_type) {
282 pcie_dev = to_pcie_device(device);
283 if (pcie_dev->service & PCIE_PORT_SERVICE_AER) {
291 static int find_aer_device(struct pci_dev *dev, struct pcie_device **result)
293 return device_for_each_child(&dev->dev, result, find_aer_device_iter);
296 static int aer_inject(struct aer_error_inj *einj)
298 struct aer_error *err, *rperr;
299 struct aer_error *err_alloc = NULL, *rperr_alloc = NULL;
300 struct pci_dev *dev, *rpdev;
301 struct pcie_device *edev;
303 unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn);
304 int pos_cap_err, rp_pos_cap_err;
308 dev = pci_get_bus_and_slot(einj->bus, devfn);
311 rpdev = pcie_find_root_port(dev);
317 pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
322 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever);
324 rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR);
325 if (!rp_pos_cap_err) {
330 err_alloc = kzalloc(sizeof(struct aer_error), GFP_KERNEL);
335 rperr_alloc = kzalloc(sizeof(struct aer_error), GFP_KERNEL);
341 spin_lock_irqsave(&inject_lock, flags);
343 err = __find_aer_error_by_dev(dev);
347 aer_error_init(err, einj->bus, devfn, pos_cap_err);
348 list_add(&err->list, &einjected);
350 err->uncor_status |= einj->uncor_status;
351 err->cor_status |= einj->cor_status;
352 err->header_log0 = einj->header_log0;
353 err->header_log1 = einj->header_log1;
354 err->header_log2 = einj->header_log2;
355 err->header_log3 = einj->header_log3;
357 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, &mask);
358 if (einj->cor_status && !(einj->cor_status & ~mask)) {
360 printk(KERN_WARNING "The correctable error(s) is masked "
362 spin_unlock_irqrestore(&inject_lock, flags);
366 pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK, &mask);
367 if (einj->uncor_status && !(einj->uncor_status & ~mask)) {
369 printk(KERN_WARNING "The uncorrectable error(s) is masked "
371 spin_unlock_irqrestore(&inject_lock, flags);
375 rperr = __find_aer_error_by_dev(rpdev);
379 aer_error_init(rperr, rpdev->bus->number, rpdev->devfn,
381 list_add(&rperr->list, &einjected);
383 if (einj->cor_status) {
384 if (rperr->root_status & PCI_ERR_ROOT_COR_RCV)
385 rperr->root_status |= PCI_ERR_ROOT_MULTI_COR_RCV;
387 rperr->root_status |= PCI_ERR_ROOT_COR_RCV;
388 rperr->source_id &= 0xffff0000;
389 rperr->source_id |= (einj->bus << 8) | devfn;
391 if (einj->uncor_status) {
392 if (rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV)
393 rperr->root_status |= PCI_ERR_ROOT_MULTI_UNCOR_RCV;
394 if (sever & einj->uncor_status) {
395 rperr->root_status |= PCI_ERR_ROOT_FATAL_RCV;
396 if (!(rperr->root_status & PCI_ERR_ROOT_UNCOR_RCV))
397 rperr->root_status |= PCI_ERR_ROOT_FIRST_FATAL;
399 rperr->root_status |= PCI_ERR_ROOT_NONFATAL_RCV;
400 rperr->root_status |= PCI_ERR_ROOT_UNCOR_RCV;
401 rperr->source_id &= 0x0000ffff;
402 rperr->source_id |= ((einj->bus << 8) | devfn) << 16;
404 spin_unlock_irqrestore(&inject_lock, flags);
406 ret = pci_bus_set_aer_ops(dev->bus);
409 ret = pci_bus_set_aer_ops(rpdev->bus);
413 if (find_aer_device(rpdev, &edev)) {
414 if (!get_service_data(edev)) {
415 printk(KERN_WARNING "AER service is not initialized\n");
430 static ssize_t aer_inject_write(struct file *filp, const char __user *ubuf,
431 size_t usize, loff_t *off)
433 struct aer_error_inj einj;
436 if (!capable(CAP_SYS_ADMIN))
439 if (usize != sizeof(struct aer_error_inj))
442 if (copy_from_user(&einj, ubuf, usize))
445 ret = aer_inject(&einj);
446 return ret ? ret : usize;
449 static const struct file_operations aer_inject_fops = {
450 .write = aer_inject_write,
451 .owner = THIS_MODULE,
454 static struct miscdevice aer_inject_device = {
455 .minor = MISC_DYNAMIC_MINOR,
456 .name = "aer_inject",
457 .fops = &aer_inject_fops,
460 static int __init aer_inject_init(void)
462 return misc_register(&aer_inject_device);
465 static void __exit aer_inject_exit(void)
467 struct aer_error *err, *err_next;
469 struct pci_bus_ops *bus_ops;
471 misc_deregister(&aer_inject_device);
473 while ((bus_ops = pci_bus_ops_pop())) {
474 pci_bus_set_ops(bus_ops->bus, bus_ops->ops);
478 spin_lock_irqsave(&inject_lock, flags);
479 list_for_each_entry_safe(err, err_next, &pci_bus_ops_list, list) {
480 list_del(&err->list);
483 spin_unlock_irqrestore(&inject_lock, flags);
486 module_init(aer_inject_init);
487 module_exit(aer_inject_exit);
489 MODULE_DESCRIPTION("PCIE AER software error injector");
490 MODULE_LICENSE("GPL");