2 * Allwinner sun4i USB phy driver
4 * Copyright (C) 2014 Hans de Goede <hdegoede@redhat.com>
7 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
9 * Modelled after: Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver
10 * Copyright (C) 2013 Samsung Electronics Co., Ltd.
11 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
24 #include <linux/clk.h>
25 #include <linux/err.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/mutex.h>
31 #include <linux/of_address.h>
32 #include <linux/phy/phy.h>
33 #include <linux/phy/phy-sun4i-usb.h>
34 #include <linux/platform_device.h>
35 #include <linux/regulator/consumer.h>
36 #include <linux/reset.h>
39 #define REG_PHYCTL 0x04
40 #define REG_PHYBIST 0x08
41 #define REG_PHYTUNE 0x0c
43 #define PHYCTL_DATA BIT(7)
45 #define SUNXI_AHB_ICHR8_EN BIT(10)
46 #define SUNXI_AHB_INCR4_BURST_EN BIT(9)
47 #define SUNXI_AHB_INCRX_ALIGN_EN BIT(8)
48 #define SUNXI_ULPI_BYPASS_EN BIT(0)
50 /* Common Control Bits for Both PHYs */
51 #define PHY_PLL_BW 0x03
52 #define PHY_RES45_CAL_EN 0x0c
54 /* Private Control Bits for Each PHY */
55 #define PHY_TX_AMPLITUDE_TUNE 0x20
56 #define PHY_TX_SLEWRATE_TUNE 0x22
57 #define PHY_VBUSVALID_TH_SEL 0x25
58 #define PHY_PULLUP_RES_SEL 0x27
59 #define PHY_OTG_FUNC_EN 0x28
60 #define PHY_VBUS_DET_EN 0x29
61 #define PHY_DISCON_TH_SEL 0x2a
62 #define PHY_SQUELCH_DETECT 0x3c
66 struct sun4i_usb_phy_data {
71 struct sun4i_usb_phy {
74 struct regulator *vbus;
75 struct reset_control *reset;
81 #define to_sun4i_usb_phy_data(phy) \
82 container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
84 static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
87 struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
88 u32 temp, usbc_bit = BIT(phy->index * 2);
91 mutex_lock(&phy_data->mutex);
93 for (i = 0; i < len; i++) {
94 temp = readl(phy_data->base + REG_PHYCTL);
96 /* clear the address portion */
100 temp |= ((addr + i) << 8);
101 writel(temp, phy_data->base + REG_PHYCTL);
103 /* set the data bit and clear usbc bit*/
104 temp = readb(phy_data->base + REG_PHYCTL);
108 temp &= ~PHYCTL_DATA;
110 writeb(temp, phy_data->base + REG_PHYCTL);
113 temp = readb(phy_data->base + REG_PHYCTL);
115 writeb(temp, phy_data->base + REG_PHYCTL);
117 temp = readb(phy_data->base + REG_PHYCTL);
119 writeb(temp, phy_data->base + REG_PHYCTL);
123 mutex_unlock(&phy_data->mutex);
126 static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable)
133 bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN |
134 SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN;
136 reg_value = readl(phy->pmu);
143 writel(reg_value, phy->pmu);
146 static int sun4i_usb_phy_init(struct phy *_phy)
148 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
149 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
152 ret = clk_prepare_enable(phy->clk);
156 ret = reset_control_deassert(phy->reset);
158 clk_disable_unprepare(phy->clk);
162 /* Enable USB 45 Ohm resistor calibration */
164 sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1);
166 /* Adjust PHY's magnitude and rate */
167 sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5);
169 /* Disconnect threshold adjustment */
170 sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL, data->disc_thresh, 2);
172 sun4i_usb_phy_passby(phy, 1);
177 static int sun4i_usb_phy_exit(struct phy *_phy)
179 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
181 sun4i_usb_phy_passby(phy, 0);
182 reset_control_assert(phy->reset);
183 clk_disable_unprepare(phy->clk);
188 static int sun4i_usb_phy_power_on(struct phy *_phy)
190 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
194 ret = regulator_enable(phy->vbus);
199 static int sun4i_usb_phy_power_off(struct phy *_phy)
201 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
204 regulator_disable(phy->vbus);
209 void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled)
211 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
213 sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2);
216 static struct phy_ops sun4i_usb_phy_ops = {
217 .init = sun4i_usb_phy_init,
218 .exit = sun4i_usb_phy_exit,
219 .power_on = sun4i_usb_phy_power_on,
220 .power_off = sun4i_usb_phy_power_off,
221 .owner = THIS_MODULE,
224 static struct phy *sun4i_usb_phy_xlate(struct device *dev,
225 struct of_phandle_args *args)
227 struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
229 if (args->args[0] >= data->num_phys)
230 return ERR_PTR(-ENODEV);
232 return data->phys[args->args[0]].phy;
235 static int sun4i_usb_phy_probe(struct platform_device *pdev)
237 struct sun4i_usb_phy_data *data;
238 struct device *dev = &pdev->dev;
239 struct device_node *np = dev->of_node;
240 struct phy_provider *phy_provider;
241 bool dedicated_clocks;
242 struct resource *res;
245 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
249 mutex_init(&data->mutex);
251 if (of_device_is_compatible(np, "allwinner,sun5i-a13-usb-phy"))
256 if (of_device_is_compatible(np, "allwinner,sun4i-a10-usb-phy") ||
257 of_device_is_compatible(np, "allwinner,sun6i-a31-usb-phy"))
258 data->disc_thresh = 3;
260 data->disc_thresh = 2;
262 if (of_device_is_compatible(np, "allwinner,sun6i-a31-usb-phy"))
263 dedicated_clocks = true;
265 dedicated_clocks = false;
267 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_ctrl");
268 data->base = devm_ioremap_resource(dev, res);
269 if (IS_ERR(data->base))
270 return PTR_ERR(data->base);
272 for (i = 0; i < data->num_phys; i++) {
273 struct sun4i_usb_phy *phy = data->phys + i;
276 snprintf(name, sizeof(name), "usb%d_vbus", i);
277 phy->vbus = devm_regulator_get_optional(dev, name);
278 if (IS_ERR(phy->vbus)) {
279 if (PTR_ERR(phy->vbus) == -EPROBE_DEFER)
280 return -EPROBE_DEFER;
284 if (dedicated_clocks)
285 snprintf(name, sizeof(name), "usb%d_phy", i);
287 strlcpy(name, "usb_phy", sizeof(name));
289 phy->clk = devm_clk_get(dev, name);
290 if (IS_ERR(phy->clk)) {
291 dev_err(dev, "failed to get clock %s\n", name);
292 return PTR_ERR(phy->clk);
295 snprintf(name, sizeof(name), "usb%d_reset", i);
296 phy->reset = devm_reset_control_get(dev, name);
297 if (IS_ERR(phy->reset)) {
298 dev_err(dev, "failed to get reset %s\n", name);
299 return PTR_ERR(phy->reset);
302 if (i) { /* No pmu for usbc0 */
303 snprintf(name, sizeof(name), "pmu%d", i);
304 res = platform_get_resource_byname(pdev,
305 IORESOURCE_MEM, name);
306 phy->pmu = devm_ioremap_resource(dev, res);
307 if (IS_ERR(phy->pmu))
308 return PTR_ERR(phy->pmu);
311 phy->phy = devm_phy_create(dev, NULL, &sun4i_usb_phy_ops);
312 if (IS_ERR(phy->phy)) {
313 dev_err(dev, "failed to create PHY %d\n", i);
314 return PTR_ERR(phy->phy);
318 phy_set_drvdata(phy->phy, &data->phys[i]);
321 dev_set_drvdata(dev, data);
322 phy_provider = devm_of_phy_provider_register(dev, sun4i_usb_phy_xlate);
324 return PTR_ERR_OR_ZERO(phy_provider);
327 static const struct of_device_id sun4i_usb_phy_of_match[] = {
328 { .compatible = "allwinner,sun4i-a10-usb-phy" },
329 { .compatible = "allwinner,sun5i-a13-usb-phy" },
330 { .compatible = "allwinner,sun6i-a31-usb-phy" },
331 { .compatible = "allwinner,sun7i-a20-usb-phy" },
334 MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);
336 static struct platform_driver sun4i_usb_phy_driver = {
337 .probe = sun4i_usb_phy_probe,
339 .of_match_table = sun4i_usb_phy_of_match,
340 .name = "sun4i-usb-phy",
343 module_platform_driver(sun4i_usb_phy_driver);
345 MODULE_DESCRIPTION("Allwinner sun4i USB phy driver");
346 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
347 MODULE_LICENSE("GPL v2");