rbd: fix copyup completion race
[firefly-linux-kernel-4.4.55.git] / drivers / pinctrl / pinctrl-imx.c
1 /*
2  * Core driver for the imx pin controller
3  *
4  * Copyright (C) 2012 Freescale Semiconductor, Inc.
5  * Copyright (C) 2012 Linaro Ltd.
6  *
7  * Author: Dong Aisheng <dong.aisheng@linaro.org>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  */
14
15 #include <linux/err.h>
16 #include <linux/init.h>
17 #include <linux/io.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/pinctrl/machine.h>
22 #include <linux/pinctrl/pinconf.h>
23 #include <linux/pinctrl/pinctrl.h>
24 #include <linux/pinctrl/pinmux.h>
25 #include <linux/slab.h>
26
27 #include "core.h"
28 #include "pinctrl-imx.h"
29
30 #define IMX_PMX_DUMP(info, p, m, c, n)                  \
31 {                                                       \
32         int i, j;                                       \
33         printk(KERN_DEBUG "Format: Pin Mux Config\n");  \
34         for (i = 0; i < n; i++) {                       \
35                 j = p[i];                               \
36                 printk(KERN_DEBUG "%s %d 0x%lx\n",      \
37                         info->pins[j].name,             \
38                         m[i], c[i]);                    \
39         }                                               \
40 }
41
42 /* The bits in CONFIG cell defined in binding doc*/
43 #define IMX_NO_PAD_CTL  0x80000000      /* no pin config need */
44 #define IMX_PAD_SION 0x40000000         /* set SION */
45
46 /**
47  * @dev: a pointer back to containing device
48  * @base: the offset to the controller in virtual memory
49  */
50 struct imx_pinctrl {
51         struct device *dev;
52         struct pinctrl_dev *pctl;
53         void __iomem *base;
54         const struct imx_pinctrl_soc_info *info;
55 };
56
57 static const inline struct imx_pin_group *imx_pinctrl_find_group_by_name(
58                                 const struct imx_pinctrl_soc_info *info,
59                                 const char *name)
60 {
61         const struct imx_pin_group *grp = NULL;
62         int i;
63
64         for (i = 0; i < info->ngroups; i++) {
65                 if (!strcmp(info->groups[i].name, name)) {
66                         grp = &info->groups[i];
67                         break;
68                 }
69         }
70
71         return grp;
72 }
73
74 static int imx_get_groups_count(struct pinctrl_dev *pctldev)
75 {
76         struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
77         const struct imx_pinctrl_soc_info *info = ipctl->info;
78
79         return info->ngroups;
80 }
81
82 static const char *imx_get_group_name(struct pinctrl_dev *pctldev,
83                                        unsigned selector)
84 {
85         struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
86         const struct imx_pinctrl_soc_info *info = ipctl->info;
87
88         return info->groups[selector].name;
89 }
90
91 static int imx_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
92                                const unsigned **pins,
93                                unsigned *npins)
94 {
95         struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
96         const struct imx_pinctrl_soc_info *info = ipctl->info;
97
98         if (selector >= info->ngroups)
99                 return -EINVAL;
100
101         *pins = info->groups[selector].pins;
102         *npins = info->groups[selector].npins;
103
104         return 0;
105 }
106
107 static void imx_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
108                    unsigned offset)
109 {
110         seq_printf(s, "%s", dev_name(pctldev->dev));
111 }
112
113 static int imx_dt_node_to_map(struct pinctrl_dev *pctldev,
114                         struct device_node *np,
115                         struct pinctrl_map **map, unsigned *num_maps)
116 {
117         struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
118         const struct imx_pinctrl_soc_info *info = ipctl->info;
119         const struct imx_pin_group *grp;
120         struct pinctrl_map *new_map;
121         struct device_node *parent;
122         int map_num = 1;
123         int i, j;
124
125         /*
126          * first find the group of this node and check if we need create
127          * config maps for pins
128          */
129         grp = imx_pinctrl_find_group_by_name(info, np->name);
130         if (!grp) {
131                 dev_err(info->dev, "unable to find group for node %s\n",
132                         np->name);
133                 return -EINVAL;
134         }
135
136         for (i = 0; i < grp->npins; i++) {
137                 if (!(grp->configs[i] & IMX_NO_PAD_CTL))
138                         map_num++;
139         }
140
141         new_map = kmalloc(sizeof(struct pinctrl_map) * map_num, GFP_KERNEL);
142         if (!new_map)
143                 return -ENOMEM;
144
145         *map = new_map;
146         *num_maps = map_num;
147
148         /* create mux map */
149         parent = of_get_parent(np);
150         if (!parent) {
151                 kfree(new_map);
152                 return -EINVAL;
153         }
154         new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;
155         new_map[0].data.mux.function = parent->name;
156         new_map[0].data.mux.group = np->name;
157         of_node_put(parent);
158
159         /* create config map */
160         new_map++;
161         for (i = j = 0; i < grp->npins; i++) {
162                 if (!(grp->configs[i] & IMX_NO_PAD_CTL)) {
163                         new_map[j].type = PIN_MAP_TYPE_CONFIGS_PIN;
164                         new_map[j].data.configs.group_or_pin =
165                                         pin_get_name(pctldev, grp->pins[i]);
166                         new_map[j].data.configs.configs = &grp->configs[i];
167                         new_map[j].data.configs.num_configs = 1;
168                         j++;
169                 }
170         }
171
172         dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n",
173                 (*map)->data.mux.function, (*map)->data.mux.group, map_num);
174
175         return 0;
176 }
177
178 static void imx_dt_free_map(struct pinctrl_dev *pctldev,
179                                 struct pinctrl_map *map, unsigned num_maps)
180 {
181         kfree(map);
182 }
183
184 static const struct pinctrl_ops imx_pctrl_ops = {
185         .get_groups_count = imx_get_groups_count,
186         .get_group_name = imx_get_group_name,
187         .get_group_pins = imx_get_group_pins,
188         .pin_dbg_show = imx_pin_dbg_show,
189         .dt_node_to_map = imx_dt_node_to_map,
190         .dt_free_map = imx_dt_free_map,
191
192 };
193
194 static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
195                            unsigned group)
196 {
197         struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
198         const struct imx_pinctrl_soc_info *info = ipctl->info;
199         const struct imx_pin_reg *pin_reg;
200         const unsigned *pins, *mux, *input_val;
201         u16 *input_reg;
202         unsigned int npins, pin_id;
203         int i;
204
205         /*
206          * Configure the mux mode for each pin in the group for a specific
207          * function.
208          */
209         pins = info->groups[group].pins;
210         npins = info->groups[group].npins;
211         mux = info->groups[group].mux_mode;
212         input_val = info->groups[group].input_val;
213         input_reg = info->groups[group].input_reg;
214
215         WARN_ON(!pins || !npins || !mux || !input_val || !input_reg);
216
217         dev_dbg(ipctl->dev, "enable function %s group %s\n",
218                 info->functions[selector].name, info->groups[group].name);
219
220         for (i = 0; i < npins; i++) {
221                 pin_id = pins[i];
222                 pin_reg = &info->pin_regs[pin_id];
223
224                 if (!pin_reg->mux_reg) {
225                         dev_err(ipctl->dev, "Pin(%s) does not support mux function\n",
226                                 info->pins[pin_id].name);
227                         return -EINVAL;
228                 }
229
230                 writel(mux[i], ipctl->base + pin_reg->mux_reg);
231                 dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
232                         pin_reg->mux_reg, mux[i]);
233
234                 /* some pins also need select input setting, set it if found */
235                 if (input_reg[i]) {
236                         writel(input_val[i], ipctl->base + input_reg[i]);
237                         dev_dbg(ipctl->dev,
238                                 "==>select_input: offset 0x%x val 0x%x\n",
239                                 input_reg[i], input_val[i]);
240                 }
241         }
242
243         return 0;
244 }
245
246 static int imx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
247 {
248         struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
249         const struct imx_pinctrl_soc_info *info = ipctl->info;
250
251         return info->nfunctions;
252 }
253
254 static const char *imx_pmx_get_func_name(struct pinctrl_dev *pctldev,
255                                           unsigned selector)
256 {
257         struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
258         const struct imx_pinctrl_soc_info *info = ipctl->info;
259
260         return info->functions[selector].name;
261 }
262
263 static int imx_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
264                                const char * const **groups,
265                                unsigned * const num_groups)
266 {
267         struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
268         const struct imx_pinctrl_soc_info *info = ipctl->info;
269
270         *groups = info->functions[selector].groups;
271         *num_groups = info->functions[selector].num_groups;
272
273         return 0;
274 }
275
276 static const struct pinmux_ops imx_pmx_ops = {
277         .get_functions_count = imx_pmx_get_funcs_count,
278         .get_function_name = imx_pmx_get_func_name,
279         .get_function_groups = imx_pmx_get_groups,
280         .enable = imx_pmx_enable,
281 };
282
283 static int imx_pinconf_get(struct pinctrl_dev *pctldev,
284                              unsigned pin_id, unsigned long *config)
285 {
286         struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
287         const struct imx_pinctrl_soc_info *info = ipctl->info;
288         const struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
289
290         if (!pin_reg->conf_reg) {
291                 dev_err(info->dev, "Pin(%s) does not support config function\n",
292                         info->pins[pin_id].name);
293                 return -EINVAL;
294         }
295
296         *config = readl(ipctl->base + pin_reg->conf_reg);
297
298         return 0;
299 }
300
301 static int imx_pinconf_set(struct pinctrl_dev *pctldev,
302                              unsigned pin_id, unsigned long config)
303 {
304         struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
305         const struct imx_pinctrl_soc_info *info = ipctl->info;
306         const struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
307
308         if (!pin_reg->conf_reg) {
309                 dev_err(info->dev, "Pin(%s) does not support config function\n",
310                         info->pins[pin_id].name);
311                 return -EINVAL;
312         }
313
314         dev_dbg(ipctl->dev, "pinconf set pin %s\n",
315                 info->pins[pin_id].name);
316
317         writel(config, ipctl->base + pin_reg->conf_reg);
318         dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%lx\n",
319                 pin_reg->conf_reg, config);
320
321         return 0;
322 }
323
324 static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
325                                    struct seq_file *s, unsigned pin_id)
326 {
327         struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
328         const struct imx_pinctrl_soc_info *info = ipctl->info;
329         const struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
330         unsigned long config;
331
332         if (!pin_reg || !pin_reg->conf_reg) {
333                 seq_printf(s, "N/A");
334                 return;
335         }
336
337         config = readl(ipctl->base + pin_reg->conf_reg);
338         seq_printf(s, "0x%lx", config);
339 }
340
341 static void imx_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
342                                          struct seq_file *s, unsigned group)
343 {
344         struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
345         const struct imx_pinctrl_soc_info *info = ipctl->info;
346         struct imx_pin_group *grp;
347         unsigned long config;
348         const char *name;
349         int i, ret;
350
351         if (group > info->ngroups)
352                 return;
353
354         seq_printf(s, "\n");
355         grp = &info->groups[group];
356         for (i = 0; i < grp->npins; i++) {
357                 name = pin_get_name(pctldev, grp->pins[i]);
358                 ret = imx_pinconf_get(pctldev, grp->pins[i], &config);
359                 if (ret)
360                         return;
361                 seq_printf(s, "%s: 0x%lx", name, config);
362         }
363 }
364
365 static const struct pinconf_ops imx_pinconf_ops = {
366         .pin_config_get = imx_pinconf_get,
367         .pin_config_set = imx_pinconf_set,
368         .pin_config_dbg_show = imx_pinconf_dbg_show,
369         .pin_config_group_dbg_show = imx_pinconf_group_dbg_show,
370 };
371
372 static struct pinctrl_desc imx_pinctrl_desc = {
373         .pctlops = &imx_pctrl_ops,
374         .pmxops = &imx_pmx_ops,
375         .confops = &imx_pinconf_ops,
376         .owner = THIS_MODULE,
377 };
378
379 /*
380  * Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and
381  * 1 u32 CONFIG, so 24 types in total for each pin.
382  */
383 #define FSL_PIN_SIZE 24
384
385 static int imx_pinctrl_parse_groups(struct device_node *np,
386                                     struct imx_pin_group *grp,
387                                     struct imx_pinctrl_soc_info *info,
388                                     u32 index)
389 {
390         int size;
391         const __be32 *list;
392         int i;
393         u32 config;
394
395         dev_dbg(info->dev, "group(%d): %s\n", index, np->name);
396
397         /* Initialise group */
398         grp->name = np->name;
399
400         /*
401          * the binding format is fsl,pins = <PIN_FUNC_ID CONFIG ...>,
402          * do sanity check and calculate pins number
403          */
404         list = of_get_property(np, "fsl,pins", &size);
405         /* we do not check return since it's safe node passed down */
406         if (!size || size % FSL_PIN_SIZE) {
407                 dev_err(info->dev, "Invalid fsl,pins property\n");
408                 return -EINVAL;
409         }
410
411         grp->npins = size / FSL_PIN_SIZE;
412         grp->pins = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
413                                 GFP_KERNEL);
414         grp->mux_mode = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
415                                 GFP_KERNEL);
416         grp->input_reg = devm_kzalloc(info->dev, grp->npins * sizeof(u16),
417                                 GFP_KERNEL);
418         grp->input_val = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
419                                 GFP_KERNEL);
420         grp->configs = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned long),
421                                 GFP_KERNEL);
422         for (i = 0; i < grp->npins; i++) {
423                 u32 mux_reg = be32_to_cpu(*list++);
424                 u32 conf_reg = be32_to_cpu(*list++);
425                 unsigned int pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
426                 struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
427
428                 grp->pins[i] = pin_id;
429                 pin_reg->mux_reg = mux_reg;
430                 pin_reg->conf_reg = conf_reg;
431                 grp->input_reg[i] = be32_to_cpu(*list++);
432                 grp->mux_mode[i] = be32_to_cpu(*list++);
433                 grp->input_val[i] = be32_to_cpu(*list++);
434
435                 /* SION bit is in mux register */
436                 config = be32_to_cpu(*list++);
437                 if (config & IMX_PAD_SION)
438                         grp->mux_mode[i] |= IOMUXC_CONFIG_SION;
439                 grp->configs[i] = config & ~IMX_PAD_SION;
440         }
441
442 #ifdef DEBUG
443         IMX_PMX_DUMP(info, grp->pins, grp->mux_mode, grp->configs, grp->npins);
444 #endif
445
446         return 0;
447 }
448
449 static int imx_pinctrl_parse_functions(struct device_node *np,
450                                        struct imx_pinctrl_soc_info *info,
451                                        u32 index)
452 {
453         struct device_node *child;
454         struct imx_pmx_func *func;
455         struct imx_pin_group *grp;
456         int ret;
457         static u32 grp_index;
458         u32 i = 0;
459
460         dev_dbg(info->dev, "parse function(%d): %s\n", index, np->name);
461
462         func = &info->functions[index];
463
464         /* Initialise function */
465         func->name = np->name;
466         func->num_groups = of_get_child_count(np);
467         if (func->num_groups <= 0) {
468                 dev_err(info->dev, "no groups defined\n");
469                 return -EINVAL;
470         }
471         func->groups = devm_kzalloc(info->dev,
472                         func->num_groups * sizeof(char *), GFP_KERNEL);
473
474         for_each_child_of_node(np, child) {
475                 func->groups[i] = child->name;
476                 grp = &info->groups[grp_index++];
477                 ret = imx_pinctrl_parse_groups(child, grp, info, i++);
478                 if (ret)
479                         return ret;
480         }
481
482         return 0;
483 }
484
485 static int imx_pinctrl_probe_dt(struct platform_device *pdev,
486                                 struct imx_pinctrl_soc_info *info)
487 {
488         struct device_node *np = pdev->dev.of_node;
489         struct device_node *child;
490         int ret;
491         u32 nfuncs = 0;
492         u32 i = 0;
493
494         if (!np)
495                 return -ENODEV;
496
497         nfuncs = of_get_child_count(np);
498         if (nfuncs <= 0) {
499                 dev_err(&pdev->dev, "no functions defined\n");
500                 return -EINVAL;
501         }
502
503         info->nfunctions = nfuncs;
504         info->functions = devm_kzalloc(&pdev->dev, nfuncs * sizeof(struct imx_pmx_func),
505                                         GFP_KERNEL);
506         if (!info->functions)
507                 return -ENOMEM;
508
509         info->ngroups = 0;
510         for_each_child_of_node(np, child)
511                 info->ngroups += of_get_child_count(child);
512         info->groups = devm_kzalloc(&pdev->dev, info->ngroups * sizeof(struct imx_pin_group),
513                                         GFP_KERNEL);
514         if (!info->groups)
515                 return -ENOMEM;
516
517         for_each_child_of_node(np, child) {
518                 ret = imx_pinctrl_parse_functions(child, info, i++);
519                 if (ret) {
520                         dev_err(&pdev->dev, "failed to parse function\n");
521                         return ret;
522                 }
523         }
524
525         return 0;
526 }
527
528 int imx_pinctrl_probe(struct platform_device *pdev,
529                       struct imx_pinctrl_soc_info *info)
530 {
531         struct imx_pinctrl *ipctl;
532         struct resource *res;
533         int ret;
534
535         if (!info || !info->pins || !info->npins) {
536                 dev_err(&pdev->dev, "wrong pinctrl info\n");
537                 return -EINVAL;
538         }
539         info->dev = &pdev->dev;
540
541         /* Create state holders etc for this driver */
542         ipctl = devm_kzalloc(&pdev->dev, sizeof(*ipctl), GFP_KERNEL);
543         if (!ipctl)
544                 return -ENOMEM;
545
546         info->pin_regs = devm_kzalloc(&pdev->dev, sizeof(*info->pin_regs) *
547                                       info->npins, GFP_KERNEL);
548         if (!info->pin_regs)
549                 return -ENOMEM;
550
551         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
552         if (!res)
553                 return -ENOENT;
554
555         ipctl->base = devm_ioremap_resource(&pdev->dev, res);
556         if (IS_ERR(ipctl->base))
557                 return PTR_ERR(ipctl->base);
558
559         imx_pinctrl_desc.name = dev_name(&pdev->dev);
560         imx_pinctrl_desc.pins = info->pins;
561         imx_pinctrl_desc.npins = info->npins;
562
563         ret = imx_pinctrl_probe_dt(pdev, info);
564         if (ret) {
565                 dev_err(&pdev->dev, "fail to probe dt properties\n");
566                 return ret;
567         }
568
569         ipctl->info = info;
570         ipctl->dev = info->dev;
571         platform_set_drvdata(pdev, ipctl);
572         ipctl->pctl = pinctrl_register(&imx_pinctrl_desc, &pdev->dev, ipctl);
573         if (!ipctl->pctl) {
574                 dev_err(&pdev->dev, "could not register IMX pinctrl driver\n");
575                 return -EINVAL;
576         }
577
578         dev_info(&pdev->dev, "initialized IMX pinctrl driver\n");
579
580         return 0;
581 }
582
583 int imx_pinctrl_remove(struct platform_device *pdev)
584 {
585         struct imx_pinctrl *ipctl = platform_get_drvdata(pdev);
586
587         pinctrl_unregister(ipctl->pctl);
588
589         return 0;
590 }