2 * Generic device tree based pinctrl driver for one register per pin
3 * type pinmux controllers
5 * Copyright (C) 2012 Texas Instruments, Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/err.h>
17 #include <linux/list.h>
20 #include <linux/of_device.h>
21 #include <linux/of_address.h>
23 #include <linux/pinctrl/pinctrl.h>
24 #include <linux/pinctrl/pinmux.h>
28 #define DRIVER_NAME "pinctrl-single"
29 #define PCS_MUX_PINS_NAME "pinctrl-single,pins"
30 #define PCS_MUX_BITS_NAME "pinctrl-single,bits"
31 #define PCS_REG_NAME_LEN ((sizeof(unsigned long) * 2) + 1)
32 #define PCS_OFF_DISABLED ~0U
33 #define PCS_MAX_GPIO_VALUES 2
36 * struct pcs_pingroup - pingroups for a function
37 * @np: pingroup device node pointer
38 * @name: pingroup name
39 * @gpins: array of the pins in the group
40 * @ngpins: number of pins in the group
44 struct device_node *np;
48 struct list_head node;
52 * struct pcs_func_vals - mux function register offset and value pair
53 * @reg: register virtual address
54 * @val: register value
56 struct pcs_func_vals {
63 * struct pcs_function - pinctrl function
64 * @name: pinctrl function name
65 * @vals: register and vals array
66 * @nvals: number of entries in vals array
67 * @pgnames: array of pingroup names the function uses
68 * @npgnames: number of pingroup names the function uses
73 struct pcs_func_vals *vals;
77 struct list_head node;
81 * struct pcs_gpio_range - pinctrl gpio range
82 * @range: subrange of the GPIO number space
83 * @gpio_func: gpio function value in the pinmux register
85 struct pcs_gpio_range {
86 struct pinctrl_gpio_range range;
91 * struct pcs_data - wrapper for data needed by pinctrl framework
93 * @cur: index to current element
95 * REVISIT: We should be able to drop this eventually by adding
96 * support for registering pins individually in the pinctrl
97 * framework for those drivers that don't need a static array.
100 struct pinctrl_pin_desc *pa;
105 * struct pcs_name - register name for a pin
106 * @name: name of the pinctrl register
108 * REVISIT: We may want to make names optional in the pinctrl
109 * framework as some drivers may not care about pin names to
110 * avoid kernel bloat. The pin names can be deciphered by user
111 * space tools using debugfs based on the register address and
112 * SoC packaging information.
115 char name[PCS_REG_NAME_LEN];
119 * struct pcs_device - pinctrl device instance
121 * @base: virtual address of the controller
122 * @size: size of the ioremapped area
124 * @pctl: pin controller device
125 * @mutex: mutex protecting the lists
126 * @width: bits per mux register
127 * @fmask: function register mask
128 * @fshift: function register shift
129 * @foff: value to turn mux off
130 * @fmax: max number of functions in fmask
131 * @names: array of register names for pins
132 * @pins: physical pins on the SoC
133 * @pgtree: pingroup index radix tree
134 * @ftree: function index radix tree
135 * @pingroups: list of pingroups
136 * @functions: list of functions
137 * @ngroups: number of pingroups
138 * @nfuncs: number of functions
139 * @desc: pin controller descriptor
140 * @read: register read function to use
141 * @write: register write function to use
144 struct resource *res;
148 struct pinctrl_dev *pctl;
156 struct pcs_name *names;
157 struct pcs_data pins;
158 struct radix_tree_root pgtree;
159 struct radix_tree_root ftree;
160 struct list_head pingroups;
161 struct list_head functions;
164 struct pinctrl_desc desc;
165 unsigned (*read)(void __iomem *reg);
166 void (*write)(unsigned val, void __iomem *reg);
170 * REVISIT: Reads and writes could eventually use regmap or something
171 * generic. But at least on omaps, some mux registers are performance
172 * critical as they may need to be remuxed every time before and after
173 * idle. Adding tests for register access width for every read and
174 * write like regmap is doing is not desired, and caching the registers
175 * does not help in this case.
178 static unsigned __maybe_unused pcs_readb(void __iomem *reg)
183 static unsigned __maybe_unused pcs_readw(void __iomem *reg)
188 static unsigned __maybe_unused pcs_readl(void __iomem *reg)
193 static void __maybe_unused pcs_writeb(unsigned val, void __iomem *reg)
198 static void __maybe_unused pcs_writew(unsigned val, void __iomem *reg)
203 static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg)
208 static int pcs_get_groups_count(struct pinctrl_dev *pctldev)
210 struct pcs_device *pcs;
212 pcs = pinctrl_dev_get_drvdata(pctldev);
217 static const char *pcs_get_group_name(struct pinctrl_dev *pctldev,
220 struct pcs_device *pcs;
221 struct pcs_pingroup *group;
223 pcs = pinctrl_dev_get_drvdata(pctldev);
224 group = radix_tree_lookup(&pcs->pgtree, gselector);
226 dev_err(pcs->dev, "%s could not find pingroup%i\n",
227 __func__, gselector);
234 static int pcs_get_group_pins(struct pinctrl_dev *pctldev,
236 const unsigned **pins,
239 struct pcs_device *pcs;
240 struct pcs_pingroup *group;
242 pcs = pinctrl_dev_get_drvdata(pctldev);
243 group = radix_tree_lookup(&pcs->pgtree, gselector);
245 dev_err(pcs->dev, "%s could not find pingroup%i\n",
246 __func__, gselector);
250 *pins = group->gpins;
251 *npins = group->ngpins;
256 static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev,
260 struct pcs_device *pcs;
261 unsigned val, mux_bytes;
263 pcs = pinctrl_dev_get_drvdata(pctldev);
265 mux_bytes = pcs->width / BITS_PER_BYTE;
266 val = pcs->read(pcs->base + pin * mux_bytes);
268 seq_printf(s, "%08x %s " , val, DRIVER_NAME);
271 static void pcs_dt_free_map(struct pinctrl_dev *pctldev,
272 struct pinctrl_map *map, unsigned num_maps)
274 struct pcs_device *pcs;
276 pcs = pinctrl_dev_get_drvdata(pctldev);
277 devm_kfree(pcs->dev, map);
280 static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
281 struct device_node *np_config,
282 struct pinctrl_map **map, unsigned *num_maps);
284 static struct pinctrl_ops pcs_pinctrl_ops = {
285 .get_groups_count = pcs_get_groups_count,
286 .get_group_name = pcs_get_group_name,
287 .get_group_pins = pcs_get_group_pins,
288 .pin_dbg_show = pcs_pin_dbg_show,
289 .dt_node_to_map = pcs_dt_node_to_map,
290 .dt_free_map = pcs_dt_free_map,
293 static int pcs_get_functions_count(struct pinctrl_dev *pctldev)
295 struct pcs_device *pcs;
297 pcs = pinctrl_dev_get_drvdata(pctldev);
302 static const char *pcs_get_function_name(struct pinctrl_dev *pctldev,
305 struct pcs_device *pcs;
306 struct pcs_function *func;
308 pcs = pinctrl_dev_get_drvdata(pctldev);
309 func = radix_tree_lookup(&pcs->ftree, fselector);
311 dev_err(pcs->dev, "%s could not find function%i\n",
312 __func__, fselector);
319 static int pcs_get_function_groups(struct pinctrl_dev *pctldev,
321 const char * const **groups,
322 unsigned * const ngroups)
324 struct pcs_device *pcs;
325 struct pcs_function *func;
327 pcs = pinctrl_dev_get_drvdata(pctldev);
328 func = radix_tree_lookup(&pcs->ftree, fselector);
330 dev_err(pcs->dev, "%s could not find function%i\n",
331 __func__, fselector);
334 *groups = func->pgnames;
335 *ngroups = func->npgnames;
340 static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector,
343 struct pcs_device *pcs;
344 struct pcs_function *func;
347 pcs = pinctrl_dev_get_drvdata(pctldev);
348 func = radix_tree_lookup(&pcs->ftree, fselector);
352 dev_dbg(pcs->dev, "enabling %s function%i\n",
353 func->name, fselector);
355 for (i = 0; i < func->nvals; i++) {
356 struct pcs_func_vals *vals;
359 vals = &func->vals[i];
360 val = pcs->read(vals->reg);
364 mask = pcs->fmask & vals->mask;
367 val |= (vals->val & mask);
368 pcs->write(val, vals->reg);
374 static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector,
377 struct pcs_device *pcs;
378 struct pcs_function *func;
381 pcs = pinctrl_dev_get_drvdata(pctldev);
382 func = radix_tree_lookup(&pcs->ftree, fselector);
384 dev_err(pcs->dev, "%s could not find function%i\n",
385 __func__, fselector);
390 * Ignore disable if function-off is not specified. Some hardware
391 * does not have clearly defined disable function. For pin specific
392 * off modes, you can use alternate named states as described in
393 * pinctrl-bindings.txt.
395 if (pcs->foff == PCS_OFF_DISABLED) {
396 dev_dbg(pcs->dev, "ignoring disable for %s function%i\n",
397 func->name, fselector);
401 dev_dbg(pcs->dev, "disabling function%i %s\n",
402 fselector, func->name);
404 for (i = 0; i < func->nvals; i++) {
405 struct pcs_func_vals *vals;
408 vals = &func->vals[i];
409 val = pcs->read(vals->reg);
411 val |= pcs->foff << pcs->fshift;
412 pcs->write(val, vals->reg);
416 static int pcs_request_gpio(struct pinctrl_dev *pctldev,
417 struct pinctrl_gpio_range *range, unsigned pin)
419 struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
420 struct pcs_gpio_range *gpio = NULL;
424 gpio = container_of(range, struct pcs_gpio_range, range);
425 end = range->pin_base + range->npins - 1;
426 if (pin < range->pin_base || pin > end) {
427 dev_err(pctldev->dev,
428 "pin %d isn't in the range of %d to %d\n",
429 pin, range->pin_base, end);
432 mux_bytes = pcs->width / BITS_PER_BYTE;
433 data = pcs->read(pcs->base + pin * mux_bytes) & ~pcs->fmask;
434 data |= gpio->gpio_func;
435 pcs->write(data, pcs->base + pin * mux_bytes);
439 static struct pinmux_ops pcs_pinmux_ops = {
440 .get_functions_count = pcs_get_functions_count,
441 .get_function_name = pcs_get_function_name,
442 .get_function_groups = pcs_get_function_groups,
443 .enable = pcs_enable,
444 .disable = pcs_disable,
445 .gpio_request_enable = pcs_request_gpio,
448 static int pcs_pinconf_get(struct pinctrl_dev *pctldev,
449 unsigned pin, unsigned long *config)
454 static int pcs_pinconf_set(struct pinctrl_dev *pctldev,
455 unsigned pin, unsigned long config)
460 static int pcs_pinconf_group_get(struct pinctrl_dev *pctldev,
461 unsigned group, unsigned long *config)
466 static int pcs_pinconf_group_set(struct pinctrl_dev *pctldev,
467 unsigned group, unsigned long config)
472 static void pcs_pinconf_dbg_show(struct pinctrl_dev *pctldev,
473 struct seq_file *s, unsigned offset)
477 static void pcs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
478 struct seq_file *s, unsigned selector)
482 static struct pinconf_ops pcs_pinconf_ops = {
483 .pin_config_get = pcs_pinconf_get,
484 .pin_config_set = pcs_pinconf_set,
485 .pin_config_group_get = pcs_pinconf_group_get,
486 .pin_config_group_set = pcs_pinconf_group_set,
487 .pin_config_dbg_show = pcs_pinconf_dbg_show,
488 .pin_config_group_dbg_show = pcs_pinconf_group_dbg_show,
492 * pcs_add_pin() - add a pin to the static per controller pin array
493 * @pcs: pcs driver instance
494 * @offset: register offset from base
496 static int __devinit pcs_add_pin(struct pcs_device *pcs, unsigned offset)
498 struct pinctrl_pin_desc *pin;
503 if (i >= pcs->desc.npins) {
504 dev_err(pcs->dev, "too many pins, max %i\n",
509 pin = &pcs->pins.pa[i];
511 sprintf(pn->name, "%lx",
512 (unsigned long)pcs->res->start + offset);
513 pin->name = pn->name;
521 * pcs_allocate_pin_table() - adds all the pins for the pinctrl driver
522 * @pcs: pcs driver instance
524 * In case of errors, resources are freed in pcs_free_resources.
526 * If your hardware needs holes in the address space, then just set
527 * up multiple driver instances.
529 static int __devinit pcs_allocate_pin_table(struct pcs_device *pcs)
531 int mux_bytes, nr_pins, i;
533 mux_bytes = pcs->width / BITS_PER_BYTE;
534 nr_pins = pcs->size / mux_bytes;
536 dev_dbg(pcs->dev, "allocating %i pins\n", nr_pins);
537 pcs->pins.pa = devm_kzalloc(pcs->dev,
538 sizeof(*pcs->pins.pa) * nr_pins,
543 pcs->names = devm_kzalloc(pcs->dev,
544 sizeof(struct pcs_name) * nr_pins,
549 pcs->desc.pins = pcs->pins.pa;
550 pcs->desc.npins = nr_pins;
552 for (i = 0; i < pcs->desc.npins; i++) {
556 offset = i * mux_bytes;
557 res = pcs_add_pin(pcs, offset);
559 dev_err(pcs->dev, "error adding pins: %i\n", res);
568 * pcs_add_function() - adds a new function to the function list
569 * @pcs: pcs driver instance
570 * @np: device node of the mux entry
571 * @name: name of the function
572 * @vals: array of mux register value pairs used by the function
573 * @nvals: number of mux register value pairs
574 * @pgnames: array of pingroup names for the function
575 * @npgnames: number of pingroup names
577 static struct pcs_function *pcs_add_function(struct pcs_device *pcs,
578 struct device_node *np,
580 struct pcs_func_vals *vals,
582 const char **pgnames,
585 struct pcs_function *function;
587 function = devm_kzalloc(pcs->dev, sizeof(*function), GFP_KERNEL);
591 function->name = name;
592 function->vals = vals;
593 function->nvals = nvals;
594 function->pgnames = pgnames;
595 function->npgnames = npgnames;
597 mutex_lock(&pcs->mutex);
598 list_add_tail(&function->node, &pcs->functions);
599 radix_tree_insert(&pcs->ftree, pcs->nfuncs, function);
601 mutex_unlock(&pcs->mutex);
606 static void pcs_remove_function(struct pcs_device *pcs,
607 struct pcs_function *function)
611 mutex_lock(&pcs->mutex);
612 for (i = 0; i < pcs->nfuncs; i++) {
613 struct pcs_function *found;
615 found = radix_tree_lookup(&pcs->ftree, i);
616 if (found == function)
617 radix_tree_delete(&pcs->ftree, i);
619 list_del(&function->node);
620 mutex_unlock(&pcs->mutex);
624 * pcs_add_pingroup() - add a pingroup to the pingroup list
625 * @pcs: pcs driver instance
626 * @np: device node of the mux entry
627 * @name: name of the pingroup
628 * @gpins: array of the pins that belong to the group
629 * @ngpins: number of pins in the group
631 static int pcs_add_pingroup(struct pcs_device *pcs,
632 struct device_node *np,
637 struct pcs_pingroup *pingroup;
639 pingroup = devm_kzalloc(pcs->dev, sizeof(*pingroup), GFP_KERNEL);
643 pingroup->name = name;
645 pingroup->gpins = gpins;
646 pingroup->ngpins = ngpins;
648 mutex_lock(&pcs->mutex);
649 list_add_tail(&pingroup->node, &pcs->pingroups);
650 radix_tree_insert(&pcs->pgtree, pcs->ngroups, pingroup);
652 mutex_unlock(&pcs->mutex);
658 * pcs_get_pin_by_offset() - get a pin index based on the register offset
659 * @pcs: pcs driver instance
660 * @offset: register offset from the base
662 * Note that this is OK as long as the pins are in a static array.
664 static int pcs_get_pin_by_offset(struct pcs_device *pcs, unsigned offset)
668 if (offset >= pcs->size) {
669 dev_err(pcs->dev, "mux offset out of range: 0x%x (0x%x)\n",
674 index = offset / (pcs->width / BITS_PER_BYTE);
680 * smux_parse_one_pinctrl_entry() - parses a device tree mux entry
681 * @pcs: pinctrl driver instance
682 * @np: device node of the mux entry
684 * @pgnames: pingroup names
686 * Note that this binding currently supports only sets of one register + value.
688 * Also note that this driver tries to avoid understanding pin and function
689 * names because of the extra bloat they would cause especially in the case of
690 * a large number of pins. This driver just sets what is specified for the board
691 * in the .dts file. Further user space debugging tools can be developed to
692 * decipher the pin and function names using debugfs.
694 * If you are concerned about the boot time, set up the static pins in
695 * the bootloader, and only set up selected pins as device tree entries.
697 static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
698 struct device_node *np,
699 struct pinctrl_map **map,
700 const char **pgnames)
702 struct pcs_func_vals *vals;
704 int size, params, rows, *pins, index = 0, found = 0, res = -ENOMEM;
705 struct pcs_function *function;
707 if (pcs->bits_per_mux) {
709 mux = of_get_property(np, PCS_MUX_BITS_NAME, &size);
712 mux = of_get_property(np, PCS_MUX_PINS_NAME, &size);
716 dev_err(pcs->dev, "no valid property for %s\n", np->name);
720 if (size < (sizeof(*mux) * params)) {
721 dev_err(pcs->dev, "bad data for %s\n", np->name);
725 size /= sizeof(*mux); /* Number of elements in array */
726 rows = size / params;
728 vals = devm_kzalloc(pcs->dev, sizeof(*vals) * rows, GFP_KERNEL);
732 pins = devm_kzalloc(pcs->dev, sizeof(*pins) * rows, GFP_KERNEL);
736 while (index < size) {
737 unsigned offset, val;
740 offset = be32_to_cpup(mux + index++);
741 val = be32_to_cpup(mux + index++);
742 vals[found].reg = pcs->base + offset;
743 vals[found].val = val;
745 val = be32_to_cpup(mux + index++);
746 vals[found].mask = val;
749 pin = pcs_get_pin_by_offset(pcs, offset);
752 "could not add functions for %s %ux\n",
759 pgnames[0] = np->name;
760 function = pcs_add_function(pcs, np, np->name, vals, found, pgnames, 1);
764 res = pcs_add_pingroup(pcs, np, np->name, pins, found);
768 (*map)->type = PIN_MAP_TYPE_MUX_GROUP;
769 (*map)->data.mux.group = np->name;
770 (*map)->data.mux.function = np->name;
775 pcs_remove_function(pcs, function);
778 devm_kfree(pcs->dev, pins);
781 devm_kfree(pcs->dev, vals);
786 * pcs_dt_node_to_map() - allocates and parses pinctrl maps
787 * @pctldev: pinctrl instance
788 * @np_config: device tree pinmux entry
789 * @map: array of map entries
790 * @num_maps: number of maps
792 static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
793 struct device_node *np_config,
794 struct pinctrl_map **map, unsigned *num_maps)
796 struct pcs_device *pcs;
797 const char **pgnames;
800 pcs = pinctrl_dev_get_drvdata(pctldev);
802 *map = devm_kzalloc(pcs->dev, sizeof(**map), GFP_KERNEL);
808 pgnames = devm_kzalloc(pcs->dev, sizeof(*pgnames), GFP_KERNEL);
814 ret = pcs_parse_one_pinctrl_entry(pcs, np_config, map, pgnames);
816 dev_err(pcs->dev, "no pins entries for %s\n",
825 devm_kfree(pcs->dev, pgnames);
827 devm_kfree(pcs->dev, *map);
833 * pcs_free_funcs() - free memory used by functions
834 * @pcs: pcs driver instance
836 static void pcs_free_funcs(struct pcs_device *pcs)
838 struct list_head *pos, *tmp;
841 mutex_lock(&pcs->mutex);
842 for (i = 0; i < pcs->nfuncs; i++) {
843 struct pcs_function *func;
845 func = radix_tree_lookup(&pcs->ftree, i);
848 radix_tree_delete(&pcs->ftree, i);
850 list_for_each_safe(pos, tmp, &pcs->functions) {
851 struct pcs_function *function;
853 function = list_entry(pos, struct pcs_function, node);
854 list_del(&function->node);
856 mutex_unlock(&pcs->mutex);
860 * pcs_free_pingroups() - free memory used by pingroups
861 * @pcs: pcs driver instance
863 static void pcs_free_pingroups(struct pcs_device *pcs)
865 struct list_head *pos, *tmp;
868 mutex_lock(&pcs->mutex);
869 for (i = 0; i < pcs->ngroups; i++) {
870 struct pcs_pingroup *pingroup;
872 pingroup = radix_tree_lookup(&pcs->pgtree, i);
875 radix_tree_delete(&pcs->pgtree, i);
877 list_for_each_safe(pos, tmp, &pcs->pingroups) {
878 struct pcs_pingroup *pingroup;
880 pingroup = list_entry(pos, struct pcs_pingroup, node);
881 list_del(&pingroup->node);
883 mutex_unlock(&pcs->mutex);
887 * pcs_free_resources() - free memory used by this driver
888 * @pcs: pcs driver instance
890 static void pcs_free_resources(struct pcs_device *pcs)
893 pinctrl_unregister(pcs->pctl);
896 pcs_free_pingroups(pcs);
899 #define PCS_GET_PROP_U32(name, reg, err) \
901 ret = of_property_read_u32(np, name, reg); \
903 dev_err(pcs->dev, err); \
908 static struct of_device_id pcs_of_match[];
910 static int __devinit pcs_add_gpio_range(struct device_node *node,
911 struct pcs_device *pcs)
913 struct pcs_gpio_range *gpio;
914 struct device_node *child;
916 const char name[] = "pinctrl-single";
917 u32 gpiores[PCS_MAX_GPIO_VALUES];
918 int ret, i = 0, mux_bytes = 0;
920 for_each_child_of_node(node, child) {
921 ret = of_address_to_resource(child, 0, &r);
924 memset(gpiores, 0, sizeof(u32) * PCS_MAX_GPIO_VALUES);
925 ret = of_property_read_u32_array(child, "pinctrl-single,gpio",
926 gpiores, PCS_MAX_GPIO_VALUES);
929 gpio = devm_kzalloc(pcs->dev, sizeof(*gpio), GFP_KERNEL);
931 dev_err(pcs->dev, "failed to allocate pcs gpio\n");
934 gpio->range.name = devm_kzalloc(pcs->dev, sizeof(name),
936 if (!gpio->range.name) {
937 dev_err(pcs->dev, "failed to allocate range name\n");
940 memcpy((char *)gpio->range.name, name, sizeof(name));
942 gpio->range.id = i++;
943 gpio->range.base = gpiores[0];
944 gpio->gpio_func = gpiores[1];
945 mux_bytes = pcs->width / BITS_PER_BYTE;
946 gpio->range.pin_base = (r.start - pcs->res->start) / mux_bytes;
947 gpio->range.npins = (r.end - r.start) / mux_bytes + 1;
949 pinctrl_add_gpio_range(pcs->pctl, &gpio->range);
954 static int __devinit pcs_probe(struct platform_device *pdev)
956 struct device_node *np = pdev->dev.of_node;
957 const struct of_device_id *match;
958 struct resource *res;
959 struct pcs_device *pcs;
962 match = of_match_device(pcs_of_match, &pdev->dev);
966 pcs = devm_kzalloc(&pdev->dev, sizeof(*pcs), GFP_KERNEL);
968 dev_err(&pdev->dev, "could not allocate\n");
971 pcs->dev = &pdev->dev;
972 mutex_init(&pcs->mutex);
973 INIT_LIST_HEAD(&pcs->pingroups);
974 INIT_LIST_HEAD(&pcs->functions);
976 PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width,
977 "register width not specified\n");
979 PCS_GET_PROP_U32("pinctrl-single,function-mask", &pcs->fmask,
980 "function register mask not specified\n");
981 pcs->fshift = ffs(pcs->fmask) - 1;
982 pcs->fmax = pcs->fmask >> pcs->fshift;
984 ret = of_property_read_u32(np, "pinctrl-single,function-off",
987 pcs->foff = PCS_OFF_DISABLED;
989 pcs->bits_per_mux = of_property_read_bool(np,
990 "pinctrl-single,bit-per-mux");
992 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
994 dev_err(pcs->dev, "could not get resource\n");
998 pcs->res = devm_request_mem_region(pcs->dev, res->start,
999 resource_size(res), DRIVER_NAME);
1001 dev_err(pcs->dev, "could not get mem_region\n");
1005 pcs->size = resource_size(pcs->res);
1006 pcs->base = devm_ioremap(pcs->dev, pcs->res->start, pcs->size);
1008 dev_err(pcs->dev, "could not ioremap\n");
1012 INIT_RADIX_TREE(&pcs->pgtree, GFP_KERNEL);
1013 INIT_RADIX_TREE(&pcs->ftree, GFP_KERNEL);
1014 platform_set_drvdata(pdev, pcs);
1016 switch (pcs->width) {
1018 pcs->read = pcs_readb;
1019 pcs->write = pcs_writeb;
1022 pcs->read = pcs_readw;
1023 pcs->write = pcs_writew;
1026 pcs->read = pcs_readl;
1027 pcs->write = pcs_writel;
1033 pcs->desc.name = DRIVER_NAME;
1034 pcs->desc.pctlops = &pcs_pinctrl_ops;
1035 pcs->desc.pmxops = &pcs_pinmux_ops;
1036 pcs->desc.confops = &pcs_pinconf_ops;
1037 pcs->desc.owner = THIS_MODULE;
1039 ret = pcs_allocate_pin_table(pcs);
1043 pcs->pctl = pinctrl_register(&pcs->desc, pcs->dev, pcs);
1045 dev_err(pcs->dev, "could not register single pinctrl driver\n");
1050 ret = pcs_add_gpio_range(np, pcs);
1054 dev_info(pcs->dev, "%i pins at pa %p size %u\n",
1055 pcs->desc.npins, pcs->base, pcs->size);
1060 pcs_free_resources(pcs);
1065 static int pcs_remove(struct platform_device *pdev)
1067 struct pcs_device *pcs = platform_get_drvdata(pdev);
1072 pcs_free_resources(pcs);
1077 static struct of_device_id pcs_of_match[] = {
1078 { .compatible = DRIVER_NAME, },
1081 MODULE_DEVICE_TABLE(of, pcs_of_match);
1083 static struct platform_driver pcs_driver = {
1085 .remove = pcs_remove,
1087 .owner = THIS_MODULE,
1088 .name = DRIVER_NAME,
1089 .of_match_table = pcs_of_match,
1093 module_platform_driver(pcs_driver);
1095 MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
1096 MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver");
1097 MODULE_LICENSE("GPL v2");