2 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2012 Linaro Ltd
7 * http://www.linaro.org
9 * Author: Thomas Abraham <thomas.ab@samsung.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
17 #ifndef __PINCTRL_SAMSUNG_H
18 #define __PINCTRL_SAMSUNG_H
20 #include <linux/pinctrl/pinctrl.h>
21 #include <linux/pinctrl/pinmux.h>
22 #include <linux/pinctrl/pinconf.h>
23 #include <linux/pinctrl/consumer.h>
24 #include <linux/pinctrl/machine.h>
26 #include <linux/gpio.h>
28 /* pinmux function number for pin as gpio output line */
29 #define FUNC_INPUT 0x0
30 #define FUNC_OUTPUT 0x1
33 * enum pincfg_type - possible pin configuration types supported.
34 * @PINCFG_TYPE_FUNC: Function configuration.
35 * @PINCFG_TYPE_DAT: Pin value configuration.
36 * @PINCFG_TYPE_PUD: Pull up/down configuration.
37 * @PINCFG_TYPE_DRV: Drive strength configuration.
38 * @PINCFG_TYPE_CON_PDN: Pin function in power down mode.
39 * @PINCFG_TYPE_PUD_PDN: Pull up/down configuration in power down mode.
53 * pin configuration (pull up/down and drive strength) type and its value are
54 * packed together into a 16-bits. The upper 8-bits represent the configuration
55 * type and the lower 8-bits hold the value of the configuration type.
57 #define PINCFG_TYPE_MASK 0xFF
58 #define PINCFG_VALUE_SHIFT 8
59 #define PINCFG_VALUE_MASK (0xFF << PINCFG_VALUE_SHIFT)
60 #define PINCFG_PACK(type, value) (((value) << PINCFG_VALUE_SHIFT) | type)
61 #define PINCFG_UNPACK_TYPE(cfg) ((cfg) & PINCFG_TYPE_MASK)
62 #define PINCFG_UNPACK_VALUE(cfg) (((cfg) & PINCFG_VALUE_MASK) >> \
65 * enum eint_type - possible external interrupt types.
66 * @EINT_TYPE_NONE: bank does not support external interrupts
67 * @EINT_TYPE_GPIO: bank supportes external gpio interrupts
68 * @EINT_TYPE_WKUP: bank supportes external wakeup interrupts
69 * @EINT_TYPE_WKUP_MUX: bank supports multiplexed external wakeup interrupts
71 * Samsung GPIO controller groups all the available pins into banks. The pins
72 * in a pin bank can support external gpio interrupts or external wakeup
73 * interrupts or no interrupts at all. From a software perspective, the only
74 * difference between external gpio and external wakeup interrupts is that
75 * the wakeup interrupts can additionally wakeup the system if it is in
85 /* maximum length of a pin in pin descriptor (example: "gpa0-0") */
86 #define PIN_NAME_LENGTH 10
88 #define PIN_GROUP(n, p, f) \
92 .num_pins = ARRAY_SIZE(p), \
96 #define PMX_FUNC(n, g) \
100 .num_groups = ARRAY_SIZE(g), \
103 struct samsung_pinctrl_drv_data;
106 * struct samsung_pin_bank_type: pin bank type description
107 * @fld_width: widths of configuration bitfields (0 if unavailable)
108 * @reg_offset: offsets of configuration registers (don't care of width is 0)
110 struct samsung_pin_bank_type {
111 u8 fld_width[PINCFG_TYPE_NUM];
112 u8 reg_offset[PINCFG_TYPE_NUM];
116 * struct samsung_pin_bank: represent a controller pin-bank.
117 * @type: type of the bank (register offsets and bitfield widths)
118 * @pctl_offset: starting offset of the pin-bank registers.
119 * @pin_base: starting pin number of the bank.
120 * @nr_pins: number of pins included in this bank.
121 * @eint_func: function to set in CON register to configure pin as EINT.
122 * @eint_type: type of the external interrupt supported by the bank.
123 * @eint_mask: bit mask of pins which support EINT function.
124 * @name: name to be prefixed for each pin in this pin bank.
125 * @of_node: OF node of the bank.
126 * @drvdata: link to controller driver data
127 * @irq_domain: IRQ domain of the bank.
128 * @gpio_chip: GPIO chip of the bank.
129 * @grange: linux gpio pin range supported by this bank.
130 * @slock: spinlock protecting bank registers
131 * @pm_save: saved register values during suspend
133 struct samsung_pin_bank {
134 struct samsung_pin_bank_type *type;
139 enum eint_type eint_type;
144 struct device_node *of_node;
145 struct samsung_pinctrl_drv_data *drvdata;
146 struct irq_domain *irq_domain;
147 struct gpio_chip gpio_chip;
148 struct pinctrl_gpio_range grange;
151 u32 pm_save[PINCFG_TYPE_NUM + 1]; /* +1 to handle double CON registers*/
155 * struct samsung_pin_ctrl: represent a pin controller.
156 * @pin_banks: list of pin banks included in this controller.
157 * @nr_banks: number of pin banks.
158 * @base: starting system wide pin number.
159 * @nr_pins: number of pins supported by the controller.
160 * @eint_gpio_init: platform specific callback to setup the external gpio
161 * interrupts for the controller.
162 * @eint_wkup_init: platform specific callback to setup the external wakeup
163 * interrupts for the controller.
164 * @label: for debug information.
166 struct samsung_pin_ctrl {
167 struct samsung_pin_bank *pin_banks;
173 int (*eint_gpio_init)(struct samsung_pinctrl_drv_data *);
174 int (*eint_wkup_init)(struct samsung_pinctrl_drv_data *);
175 void (*suspend)(struct samsung_pinctrl_drv_data *);
176 void (*resume)(struct samsung_pinctrl_drv_data *);
182 * struct samsung_pinctrl_drv_data: wrapper for holding driver data together.
183 * @node: global list node
184 * @virt_base: register base address of the controller.
185 * @dev: device instance representing the controller.
186 * @irq: interrpt number used by the controller to notify gpio interrupts.
187 * @ctrl: pin controller instance managed by the driver.
188 * @pctl: pin controller descriptor registered with the pinctrl subsystem.
189 * @pctl_dev: cookie representing pinctrl device instance.
190 * @pin_groups: list of pin groups available to the driver.
191 * @nr_groups: number of such pin groups.
192 * @pmx_functions: list of pin functions available to the driver.
193 * @nr_function: number of such pin functions.
195 struct samsung_pinctrl_drv_data {
196 struct list_head node;
197 void __iomem *virt_base;
201 struct samsung_pin_ctrl *ctrl;
202 struct pinctrl_desc pctl;
203 struct pinctrl_dev *pctl_dev;
205 const struct samsung_pin_group *pin_groups;
206 unsigned int nr_groups;
207 const struct samsung_pmx_func *pmx_functions;
208 unsigned int nr_functions;
212 * struct samsung_pin_group: represent group of pins of a pinmux function.
213 * @name: name of the pin group, used to lookup the group.
214 * @pins: the pins included in this group.
215 * @num_pins: number of pins included in this group.
216 * @func: the function number to be programmed when selected.
218 struct samsung_pin_group {
220 const unsigned int *pins;
226 * struct samsung_pmx_func: represent a pin function.
227 * @name: name of the pin function, used to lookup the function.
228 * @groups: one or more names of pin groups that provide this function.
229 * @num_groups: number of groups included in @groups.
231 struct samsung_pmx_func {
238 /* list of all exported SoC specific data */
239 extern struct samsung_pin_ctrl exynos3250_pin_ctrl[];
240 extern struct samsung_pin_ctrl exynos4210_pin_ctrl[];
241 extern struct samsung_pin_ctrl exynos4x12_pin_ctrl[];
242 extern struct samsung_pin_ctrl exynos5250_pin_ctrl[];
243 extern struct samsung_pin_ctrl exynos5260_pin_ctrl[];
244 extern struct samsung_pin_ctrl exynos5420_pin_ctrl[];
245 extern struct samsung_pin_ctrl s3c64xx_pin_ctrl[];
246 extern struct samsung_pin_ctrl s3c2412_pin_ctrl[];
247 extern struct samsung_pin_ctrl s3c2416_pin_ctrl[];
248 extern struct samsung_pin_ctrl s3c2440_pin_ctrl[];
249 extern struct samsung_pin_ctrl s3c2450_pin_ctrl[];
250 extern struct samsung_pin_ctrl s5pv210_pin_ctrl[];
252 #endif /* __PINCTRL_SAMSUNG_H */