2 * SuperH Pin Function Controller GPIO driver.
4 * Copyright (C) 2008 Magnus Damm
5 * Copyright (C) 2009 - 2012 Paul Mundt
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
12 #define pr_fmt(fmt) KBUILD_MODNAME " gpio: " fmt
14 #include <linux/device.h>
15 #include <linux/gpio.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/pinctrl/consumer.h>
19 #include <linux/slab.h>
20 #include <linux/spinlock.h>
24 struct sh_pfc_gpio_data_reg {
25 const struct pinmux_data_reg *info;
31 struct gpio_chip gpio_chip;
33 struct sh_pfc_window *mem;
34 struct sh_pfc_gpio_data_reg *regs;
37 static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
39 return container_of(gc, struct sh_pfc_chip, gpio_chip);
42 static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
44 return gpio_to_pfc_chip(gc)->pfc;
47 static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int gpio,
48 struct sh_pfc_gpio_data_reg **reg,
51 struct sh_pfc_pin *gpiop = sh_pfc_get_pin(chip->pfc, gpio);
54 reg_idx = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
56 *reg = &chip->regs[reg_idx];
57 *bit = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
60 static unsigned long gpio_read_data_reg(struct sh_pfc_chip *chip,
61 const struct pinmux_data_reg *dreg)
63 void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
65 return sh_pfc_read_raw_reg(mem, dreg->reg_width);
68 static void gpio_write_data_reg(struct sh_pfc_chip *chip,
69 const struct pinmux_data_reg *dreg,
72 void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
74 sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
77 static void gpio_setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
79 struct sh_pfc_pin *gpiop = &pfc->info->pins[gpio];
80 const struct pinmux_data_reg *dreg;
84 for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) {
85 for (bit = 0; bit < dreg->reg_width; bit++) {
86 if (dreg->enum_ids[bit] == gpiop->enum_id) {
87 gpiop->flags &= ~PINMUX_FLAG_DREG;
88 gpiop->flags |= i << PINMUX_FLAG_DREG_SHIFT;
89 gpiop->flags &= ~PINMUX_FLAG_DBIT;
90 gpiop->flags |= bit << PINMUX_FLAG_DBIT_SHIFT;
99 static int gpio_setup_data_regs(struct sh_pfc_chip *chip)
101 struct sh_pfc *pfc = chip->pfc;
102 unsigned long addr = pfc->info->data_regs[0].reg;
103 const struct pinmux_data_reg *dreg;
106 /* Find the window that contain the GPIO registers. */
107 for (i = 0; i < pfc->num_windows; ++i) {
108 struct sh_pfc_window *window = &pfc->window[i];
110 if (addr >= window->phys && addr < window->phys + window->size)
114 if (i == pfc->num_windows)
117 /* GPIO data registers must be in the first memory resource. */
118 chip->mem = &pfc->window[i];
120 /* Count the number of data registers, allocate memory and initialize
123 for (i = 0; pfc->info->data_regs[i].reg_width; ++i)
126 chip->regs = devm_kzalloc(pfc->dev, i * sizeof(*chip->regs),
128 if (chip->regs == NULL)
131 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
132 chip->regs[i].info = dreg;
133 chip->regs[i].shadow = gpio_read_data_reg(chip, dreg);
136 for (i = 0; i < pfc->info->nr_pins; i++) {
137 if (pfc->info->pins[i].enum_id == 0)
140 gpio_setup_data_reg(pfc, i);
146 /* -----------------------------------------------------------------------------
150 static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
152 struct sh_pfc *pfc = gpio_to_pfc(gc);
153 struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
155 if (pin == NULL || pin->enum_id == 0)
158 return pinctrl_request_gpio(offset);
161 static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
163 return pinctrl_free_gpio(offset);
166 static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
169 struct sh_pfc_gpio_data_reg *reg;
173 gpio_get_data_reg(chip, offset, ®, &bit);
175 pos = reg->info->reg_width - (bit + 1);
178 set_bit(pos, ®->shadow);
180 clear_bit(pos, ®->shadow);
182 gpio_write_data_reg(chip, reg->info, reg->shadow);
185 static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
187 return pinctrl_gpio_direction_input(offset);
190 static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
193 gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
195 return pinctrl_gpio_direction_output(offset);
198 static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
200 struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc);
201 struct sh_pfc_gpio_data_reg *reg;
205 gpio_get_data_reg(chip, offset, ®, &bit);
207 pos = reg->info->reg_width - (bit + 1);
209 return (gpio_read_data_reg(chip, reg->info) >> pos) & 1;
212 static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
214 gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
217 static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
219 struct sh_pfc *pfc = gpio_to_pfc(gc);
222 for (i = 0; i < pfc->info->gpio_irq_size; i++) {
223 unsigned short *gpios = pfc->info->gpio_irq[i].gpios;
225 for (k = 0; gpios[k]; k++) {
226 if (gpios[k] == offset)
227 return pfc->info->gpio_irq[i].irq;
234 static int gpio_pin_setup(struct sh_pfc_chip *chip)
236 struct sh_pfc *pfc = chip->pfc;
237 struct gpio_chip *gc = &chip->gpio_chip;
240 ret = gpio_setup_data_regs(chip);
244 gc->request = gpio_pin_request;
245 gc->free = gpio_pin_free;
246 gc->direction_input = gpio_pin_direction_input;
247 gc->get = gpio_pin_get;
248 gc->direction_output = gpio_pin_direction_output;
249 gc->set = gpio_pin_set;
250 gc->to_irq = gpio_pin_to_irq;
252 gc->label = pfc->info->name;
254 gc->owner = THIS_MODULE;
256 gc->ngpio = pfc->nr_pins;
261 /* -----------------------------------------------------------------------------
265 static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
267 struct sh_pfc *pfc = gpio_to_pfc(gc);
268 unsigned int mark = pfc->info->func_gpios[offset].enum_id;
272 pr_notice_once("Use of GPIO API for function requests is deprecated, convert to pinctrl\n");
277 spin_lock_irqsave(&pfc->lock, flags);
279 if (sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION, GPIO_CFG_DRYRUN))
282 if (sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION, GPIO_CFG_REQ))
288 spin_unlock_irqrestore(&pfc->lock, flags);
292 static void gpio_function_free(struct gpio_chip *gc, unsigned offset)
294 struct sh_pfc *pfc = gpio_to_pfc(gc);
295 unsigned int mark = pfc->info->func_gpios[offset].enum_id;
298 spin_lock_irqsave(&pfc->lock, flags);
300 sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION, GPIO_CFG_FREE);
302 spin_unlock_irqrestore(&pfc->lock, flags);
305 static int gpio_function_setup(struct sh_pfc_chip *chip)
307 struct sh_pfc *pfc = chip->pfc;
308 struct gpio_chip *gc = &chip->gpio_chip;
310 gc->request = gpio_function_request;
311 gc->free = gpio_function_free;
313 gc->label = pfc->info->name;
314 gc->owner = THIS_MODULE;
315 gc->base = pfc->nr_pins;
316 gc->ngpio = pfc->info->nr_func_gpios;
321 /* -----------------------------------------------------------------------------
322 * Register/unregister
325 static struct sh_pfc_chip *
326 sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *))
328 struct sh_pfc_chip *chip;
331 chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
333 return ERR_PTR(-ENOMEM);
341 ret = gpiochip_add(&chip->gpio_chip);
342 if (unlikely(ret < 0))
345 pr_info("%s handling gpio %u -> %u\n",
346 chip->gpio_chip.label, chip->gpio_chip.base,
347 chip->gpio_chip.base + chip->gpio_chip.ngpio - 1);
352 int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
354 const struct pinmux_range *ranges;
355 struct pinmux_range def_range;
356 struct sh_pfc_chip *chip;
357 unsigned int nr_ranges;
361 /* Register the real GPIOs chip. */
362 chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup);
364 return PTR_ERR(chip);
368 /* Register the GPIO to pin mappings. */
369 if (pfc->info->ranges == NULL) {
371 def_range.end = pfc->info->nr_pins - 1;
375 ranges = pfc->info->ranges;
376 nr_ranges = pfc->info->nr_ranges;
379 for (i = 0; i < nr_ranges; ++i) {
380 const struct pinmux_range *range = &ranges[i];
382 ret = gpiochip_add_pin_range(&chip->gpio_chip,
384 range->begin, range->begin,
385 range->end - range->begin + 1);
390 /* Register the function GPIOs chip. */
391 chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup);
393 return PTR_ERR(chip);
400 int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
405 ret = gpiochip_remove(&pfc->gpio->gpio_chip);
406 err = gpiochip_remove(&pfc->func->gpio_chip);
408 return ret < 0 ? ret : err;