2 * SuperH Pin Function Controller pinmux support.
4 * Copyright (C) 2012 Paul Mundt
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
11 #define DRV_NAME "sh-pfc"
13 #include <linux/device.h>
14 #include <linux/err.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
18 #include <linux/pinctrl/consumer.h>
19 #include <linux/pinctrl/machine.h>
20 #include <linux/pinctrl/pinconf.h>
21 #include <linux/pinctrl/pinconf-generic.h>
22 #include <linux/pinctrl/pinctrl.h>
23 #include <linux/pinctrl/pinmux.h>
24 #include <linux/slab.h>
25 #include <linux/spinlock.h>
29 #include "../pinconf.h"
31 struct sh_pfc_pin_config {
35 struct sh_pfc_pinctrl {
36 struct pinctrl_dev *pctl;
37 struct pinctrl_desc pctl_desc;
41 struct pinctrl_pin_desc *pins;
42 struct sh_pfc_pin_config *configs;
45 static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
47 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
49 return pmx->pfc->info->nr_groups;
52 static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
55 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
57 return pmx->pfc->info->groups[selector].name;
60 static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
61 const unsigned **pins, unsigned *num_pins)
63 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
65 *pins = pmx->pfc->info->groups[selector].pins;
66 *num_pins = pmx->pfc->info->groups[selector].nr_pins;
71 static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
74 seq_printf(s, "%s", DRV_NAME);
78 static int sh_pfc_map_add_config(struct pinctrl_map *map,
79 const char *group_or_pin,
80 enum pinctrl_map_type type,
81 unsigned long *configs,
82 unsigned int num_configs)
86 cfgs = kmemdup(configs, num_configs * sizeof(*cfgs),
92 map->data.configs.group_or_pin = group_or_pin;
93 map->data.configs.configs = cfgs;
94 map->data.configs.num_configs = num_configs;
99 static int sh_pfc_dt_subnode_to_map(struct device *dev, struct device_node *np,
100 struct pinctrl_map **map,
101 unsigned int *num_maps, unsigned int *index)
103 struct pinctrl_map *maps = *map;
104 unsigned int nmaps = *num_maps;
105 unsigned int idx = *index;
106 unsigned int num_configs;
107 const char *function = NULL;
108 unsigned long *configs;
109 struct property *prop;
110 unsigned int num_groups;
111 unsigned int num_pins;
116 /* Parse the function and configuration properties. At least a function
117 * or one configuration must be specified.
119 ret = of_property_read_string(np, "renesas,function", &function);
120 if (ret < 0 && ret != -EINVAL) {
121 dev_err(dev, "Invalid function in DT\n");
125 ret = pinconf_generic_parse_dt_config(np, NULL, &configs, &num_configs);
129 if (!function && num_configs == 0) {
131 "DT node must contain at least a function or config\n");
135 /* Count the number of pins and groups and reallocate mappings. */
136 ret = of_property_count_strings(np, "renesas,pins");
137 if (ret == -EINVAL) {
139 } else if (ret < 0) {
140 dev_err(dev, "Invalid pins list in DT\n");
146 ret = of_property_count_strings(np, "renesas,groups");
147 if (ret == -EINVAL) {
149 } else if (ret < 0) {
150 dev_err(dev, "Invalid pin groups list in DT\n");
156 if (!num_pins && !num_groups) {
157 dev_err(dev, "No pin or group provided in DT node\n");
165 nmaps += num_pins + num_groups;
167 maps = krealloc(maps, sizeof(*maps) * nmaps, GFP_KERNEL);
176 /* Iterate over pins and groups and create the mappings. */
177 of_property_for_each_string(np, "renesas,groups", prop, group) {
179 maps[idx].type = PIN_MAP_TYPE_MUX_GROUP;
180 maps[idx].data.mux.group = group;
181 maps[idx].data.mux.function = function;
186 ret = sh_pfc_map_add_config(&maps[idx], group,
187 PIN_MAP_TYPE_CONFIGS_GROUP,
188 configs, num_configs);
201 of_property_for_each_string(np, "renesas,pins", prop, pin) {
202 ret = sh_pfc_map_add_config(&maps[idx], pin,
203 PIN_MAP_TYPE_CONFIGS_PIN,
204 configs, num_configs);
217 static void sh_pfc_dt_free_map(struct pinctrl_dev *pctldev,
218 struct pinctrl_map *map, unsigned num_maps)
225 for (i = 0; i < num_maps; ++i) {
226 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP ||
227 map[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
228 kfree(map[i].data.configs.configs);
234 static int sh_pfc_dt_node_to_map(struct pinctrl_dev *pctldev,
235 struct device_node *np,
236 struct pinctrl_map **map, unsigned *num_maps)
238 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
239 struct device *dev = pmx->pfc->dev;
240 struct device_node *child;
248 for_each_child_of_node(np, child) {
249 ret = sh_pfc_dt_subnode_to_map(dev, child, map, num_maps,
255 /* If no mapping has been found in child nodes try the config node. */
256 if (*num_maps == 0) {
257 ret = sh_pfc_dt_subnode_to_map(dev, np, map, num_maps, &index);
265 dev_err(dev, "no mapping found in node %s\n", np->full_name);
270 sh_pfc_dt_free_map(pctldev, *map, *num_maps);
274 #endif /* CONFIG_OF */
276 static const struct pinctrl_ops sh_pfc_pinctrl_ops = {
277 .get_groups_count = sh_pfc_get_groups_count,
278 .get_group_name = sh_pfc_get_group_name,
279 .get_group_pins = sh_pfc_get_group_pins,
280 .pin_dbg_show = sh_pfc_pin_dbg_show,
282 .dt_node_to_map = sh_pfc_dt_node_to_map,
283 .dt_free_map = sh_pfc_dt_free_map,
287 static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
289 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
291 return pmx->pfc->info->nr_functions;
294 static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
297 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
299 return pmx->pfc->info->functions[selector].name;
302 static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev,
304 const char * const **groups,
305 unsigned * const num_groups)
307 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
309 *groups = pmx->pfc->info->functions[selector].groups;
310 *num_groups = pmx->pfc->info->functions[selector].nr_groups;
315 static int sh_pfc_func_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
318 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
319 struct sh_pfc *pfc = pmx->pfc;
320 const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];
325 spin_lock_irqsave(&pfc->lock, flags);
327 for (i = 0; i < grp->nr_pins; ++i) {
328 int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);
329 struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
331 if (cfg->type != PINMUX_TYPE_NONE) {
337 for (i = 0; i < grp->nr_pins; ++i) {
338 ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION);
344 spin_unlock_irqrestore(&pfc->lock, flags);
348 static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
349 struct pinctrl_gpio_range *range,
352 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
353 struct sh_pfc *pfc = pmx->pfc;
354 int idx = sh_pfc_get_pin_index(pfc, offset);
355 struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
359 spin_lock_irqsave(&pfc->lock, flags);
361 if (cfg->type != PINMUX_TYPE_NONE) {
363 "Pin %u is busy, can't configure it as GPIO.\n",
370 /* If GPIOs are handled externally the pin mux type need to be
373 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
375 ret = sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO);
380 cfg->type = PINMUX_TYPE_GPIO;
385 spin_unlock_irqrestore(&pfc->lock, flags);
390 static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
391 struct pinctrl_gpio_range *range,
394 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
395 struct sh_pfc *pfc = pmx->pfc;
396 int idx = sh_pfc_get_pin_index(pfc, offset);
397 struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
400 spin_lock_irqsave(&pfc->lock, flags);
401 cfg->type = PINMUX_TYPE_NONE;
402 spin_unlock_irqrestore(&pfc->lock, flags);
405 static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
406 struct pinctrl_gpio_range *range,
407 unsigned offset, bool input)
409 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
410 struct sh_pfc *pfc = pmx->pfc;
411 int new_type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
412 int idx = sh_pfc_get_pin_index(pfc, offset);
413 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
414 struct sh_pfc_pin_config *cfg = &pmx->configs[idx];
419 /* Check if the requested direction is supported by the pin. Not all SoC
420 * provide pin config data, so perform the check conditionally.
423 dir = input ? SH_PFC_PIN_CFG_INPUT : SH_PFC_PIN_CFG_OUTPUT;
424 if (!(pin->configs & dir))
428 spin_lock_irqsave(&pfc->lock, flags);
430 ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type);
434 cfg->type = new_type;
437 spin_unlock_irqrestore(&pfc->lock, flags);
441 static const struct pinmux_ops sh_pfc_pinmux_ops = {
442 .get_functions_count = sh_pfc_get_functions_count,
443 .get_function_name = sh_pfc_get_function_name,
444 .get_function_groups = sh_pfc_get_function_groups,
445 .set_mux = sh_pfc_func_set_mux,
446 .gpio_request_enable = sh_pfc_gpio_request_enable,
447 .gpio_disable_free = sh_pfc_gpio_disable_free,
448 .gpio_set_direction = sh_pfc_gpio_set_direction,
451 /* Check whether the requested parameter is supported for a pin. */
452 static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin,
453 enum pin_config_param param)
455 int idx = sh_pfc_get_pin_index(pfc, _pin);
456 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
459 case PIN_CONFIG_BIAS_DISABLE:
462 case PIN_CONFIG_BIAS_PULL_UP:
463 return pin->configs & SH_PFC_PIN_CFG_PULL_UP;
465 case PIN_CONFIG_BIAS_PULL_DOWN:
466 return pin->configs & SH_PFC_PIN_CFG_PULL_DOWN;
473 static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
474 unsigned long *config)
476 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
477 struct sh_pfc *pfc = pmx->pfc;
478 enum pin_config_param param = pinconf_to_config_param(*config);
482 if (!sh_pfc_pinconf_validate(pfc, _pin, param))
486 case PIN_CONFIG_BIAS_DISABLE:
487 case PIN_CONFIG_BIAS_PULL_UP:
488 case PIN_CONFIG_BIAS_PULL_DOWN:
489 if (!pfc->info->ops || !pfc->info->ops->get_bias)
492 spin_lock_irqsave(&pfc->lock, flags);
493 bias = pfc->info->ops->get_bias(pfc, _pin);
494 spin_unlock_irqrestore(&pfc->lock, flags);
509 static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin,
510 unsigned long *configs, unsigned num_configs)
512 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
513 struct sh_pfc *pfc = pmx->pfc;
514 enum pin_config_param param;
518 for (i = 0; i < num_configs; i++) {
519 param = pinconf_to_config_param(configs[i]);
521 if (!sh_pfc_pinconf_validate(pfc, _pin, param))
525 case PIN_CONFIG_BIAS_PULL_UP:
526 case PIN_CONFIG_BIAS_PULL_DOWN:
527 case PIN_CONFIG_BIAS_DISABLE:
528 if (!pfc->info->ops || !pfc->info->ops->set_bias)
531 spin_lock_irqsave(&pfc->lock, flags);
532 pfc->info->ops->set_bias(pfc, _pin, param);
533 spin_unlock_irqrestore(&pfc->lock, flags);
540 } /* for each config */
545 static int sh_pfc_pinconf_group_set(struct pinctrl_dev *pctldev, unsigned group,
546 unsigned long *configs,
547 unsigned num_configs)
549 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
550 const unsigned int *pins;
551 unsigned int num_pins;
554 pins = pmx->pfc->info->groups[group].pins;
555 num_pins = pmx->pfc->info->groups[group].nr_pins;
557 for (i = 0; i < num_pins; ++i)
558 sh_pfc_pinconf_set(pctldev, pins[i], configs, num_configs);
563 static const struct pinconf_ops sh_pfc_pinconf_ops = {
565 .pin_config_get = sh_pfc_pinconf_get,
566 .pin_config_set = sh_pfc_pinconf_set,
567 .pin_config_group_set = sh_pfc_pinconf_group_set,
568 .pin_config_config_dbg_show = pinconf_generic_dump_config,
571 /* PFC ranges -> pinctrl pin descs */
572 static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
576 /* Allocate and initialize the pins and configs arrays. */
577 pmx->pins = devm_kzalloc(pfc->dev,
578 sizeof(*pmx->pins) * pfc->info->nr_pins,
580 if (unlikely(!pmx->pins))
583 pmx->configs = devm_kzalloc(pfc->dev,
584 sizeof(*pmx->configs) * pfc->info->nr_pins,
586 if (unlikely(!pmx->configs))
589 for (i = 0; i < pfc->info->nr_pins; ++i) {
590 const struct sh_pfc_pin *info = &pfc->info->pins[i];
591 struct sh_pfc_pin_config *cfg = &pmx->configs[i];
592 struct pinctrl_pin_desc *pin = &pmx->pins[i];
594 /* If the pin number is equal to -1 all pins are considered */
595 pin->number = info->pin != (u16)-1 ? info->pin : i;
596 pin->name = info->name;
597 cfg->type = PINMUX_TYPE_NONE;
603 int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
605 struct sh_pfc_pinctrl *pmx;
608 pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
615 ret = sh_pfc_map_pins(pfc, pmx);
619 pmx->pctl_desc.name = DRV_NAME;
620 pmx->pctl_desc.owner = THIS_MODULE;
621 pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops;
622 pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops;
623 pmx->pctl_desc.confops = &sh_pfc_pinconf_ops;
624 pmx->pctl_desc.pins = pmx->pins;
625 pmx->pctl_desc.npins = pfc->info->nr_pins;
627 pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx);
628 if (pmx->pctl == NULL)
634 int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc)
636 struct sh_pfc_pinctrl *pmx = pfc->pinctrl;
638 pinctrl_unregister(pmx->pctl);