2 * Allwinner A31 SoCs pinctrl driver.
4 * Copyright (C) 2014 Maxime Ripard
6 * Maxime Ripard <maxime.ripard@free-electrons.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/module.h>
14 #include <linux/platform_device.h>
16 #include <linux/of_device.h>
17 #include <linux/pinctrl/pinctrl.h>
19 #include "pinctrl-sunxi.h"
21 static const struct sunxi_desc_pin sun6i_a31_pins[] = {
22 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
23 SUNXI_FUNCTION(0x0, "gpio_in"),
24 SUNXI_FUNCTION(0x1, "gpio_out"),
25 SUNXI_FUNCTION(0x2, "gmac"), /* TXD0 */
26 SUNXI_FUNCTION(0x3, "lcd1"), /* D0 */
27 SUNXI_FUNCTION(0x4, "uart1")), /* DTR */
28 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
29 SUNXI_FUNCTION(0x0, "gpio_in"),
30 SUNXI_FUNCTION(0x1, "gpio_out"),
31 SUNXI_FUNCTION(0x2, "gmac"), /* TXD1 */
32 SUNXI_FUNCTION(0x3, "lcd1"), /* D1 */
33 SUNXI_FUNCTION(0x4, "uart1")), /* DSR */
34 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
35 SUNXI_FUNCTION(0x0, "gpio_in"),
36 SUNXI_FUNCTION(0x1, "gpio_out"),
37 SUNXI_FUNCTION(0x2, "gmac"), /* TXD2 */
38 SUNXI_FUNCTION(0x3, "lcd1"), /* D2 */
39 SUNXI_FUNCTION(0x4, "uart1")), /* DCD */
40 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
41 SUNXI_FUNCTION(0x0, "gpio_in"),
42 SUNXI_FUNCTION(0x1, "gpio_out"),
43 SUNXI_FUNCTION(0x2, "gmac"), /* TXD3 */
44 SUNXI_FUNCTION(0x3, "lcd1"), /* D3 */
45 SUNXI_FUNCTION(0x4, "uart1")), /* RING */
46 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
47 SUNXI_FUNCTION(0x0, "gpio_in"),
48 SUNXI_FUNCTION(0x1, "gpio_out"),
49 SUNXI_FUNCTION(0x2, "gmac"), /* TXD4 */
50 SUNXI_FUNCTION(0x3, "lcd1"), /* D4 */
51 SUNXI_FUNCTION(0x4, "uart1")), /* TX */
52 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
53 SUNXI_FUNCTION(0x0, "gpio_in"),
54 SUNXI_FUNCTION(0x1, "gpio_out"),
55 SUNXI_FUNCTION(0x2, "gmac"), /* TXD5 */
56 SUNXI_FUNCTION(0x3, "lcd1"), /* D5 */
57 SUNXI_FUNCTION(0x4, "uart1")), /* RX */
58 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
59 SUNXI_FUNCTION(0x0, "gpio_in"),
60 SUNXI_FUNCTION(0x1, "gpio_out"),
61 SUNXI_FUNCTION(0x2, "gmac"), /* TXD6 */
62 SUNXI_FUNCTION(0x3, "lcd1"), /* D6 */
63 SUNXI_FUNCTION(0x4, "uart1")), /* RTS */
64 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
65 SUNXI_FUNCTION(0x0, "gpio_in"),
66 SUNXI_FUNCTION(0x1, "gpio_out"),
67 SUNXI_FUNCTION(0x2, "gmac"), /* TXD7 */
68 SUNXI_FUNCTION(0x3, "lcd1"), /* D7 */
69 SUNXI_FUNCTION(0x4, "uart1")), /* CTS */
70 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
71 SUNXI_FUNCTION(0x0, "gpio_in"),
72 SUNXI_FUNCTION(0x1, "gpio_out"),
73 SUNXI_FUNCTION(0x2, "gmac"), /* TXCLK */
74 SUNXI_FUNCTION(0x3, "lcd1")), /* D8 */
75 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
76 SUNXI_FUNCTION(0x0, "gpio_in"),
77 SUNXI_FUNCTION(0x1, "gpio_out"),
78 SUNXI_FUNCTION(0x2, "gmac"), /* TXEN */
79 SUNXI_FUNCTION(0x3, "lcd1"), /* D9 */
80 SUNXI_FUNCTION(0x4, "mmc3"), /* CMD */
81 SUNXI_FUNCTION(0x5, "mmc2")), /* CMD */
82 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
83 SUNXI_FUNCTION(0x0, "gpio_in"),
84 SUNXI_FUNCTION(0x1, "gpio_out"),
85 SUNXI_FUNCTION(0x2, "gmac"), /* GTXCLK */
86 SUNXI_FUNCTION(0x3, "lcd1"), /* D10 */
87 SUNXI_FUNCTION(0x4, "mmc3"), /* CLK */
88 SUNXI_FUNCTION(0x5, "mmc2")), /* CLK */
89 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
90 SUNXI_FUNCTION(0x0, "gpio_in"),
91 SUNXI_FUNCTION(0x1, "gpio_out"),
92 SUNXI_FUNCTION(0x2, "gmac"), /* RXD0 */
93 SUNXI_FUNCTION(0x3, "lcd1"), /* D11 */
94 SUNXI_FUNCTION(0x4, "mmc3"), /* D0 */
95 SUNXI_FUNCTION(0x5, "mmc2")), /* D0 */
96 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
97 SUNXI_FUNCTION(0x0, "gpio_in"),
98 SUNXI_FUNCTION(0x1, "gpio_out"),
99 SUNXI_FUNCTION(0x2, "gmac"), /* RXD1 */
100 SUNXI_FUNCTION(0x3, "lcd1"), /* D12 */
101 SUNXI_FUNCTION(0x4, "mmc3"), /* D1 */
102 SUNXI_FUNCTION(0x5, "mmc2")), /* D1 */
103 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
104 SUNXI_FUNCTION(0x0, "gpio_in"),
105 SUNXI_FUNCTION(0x1, "gpio_out"),
106 SUNXI_FUNCTION(0x2, "gmac"), /* RXD2 */
107 SUNXI_FUNCTION(0x3, "lcd1"), /* D13 */
108 SUNXI_FUNCTION(0x4, "mmc3"), /* D2 */
109 SUNXI_FUNCTION(0x5, "mmc2")), /* D2 */
110 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
111 SUNXI_FUNCTION(0x0, "gpio_in"),
112 SUNXI_FUNCTION(0x1, "gpio_out"),
113 SUNXI_FUNCTION(0x2, "gmac"), /* RXD3 */
114 SUNXI_FUNCTION(0x3, "lcd1"), /* D14 */
115 SUNXI_FUNCTION(0x4, "mmc3"), /* D3 */
116 SUNXI_FUNCTION(0x5, "mmc2")), /* D3 */
117 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
118 SUNXI_FUNCTION(0x0, "gpio_in"),
119 SUNXI_FUNCTION(0x1, "gpio_out"),
120 SUNXI_FUNCTION(0x2, "gmac"), /* RXD4 */
121 SUNXI_FUNCTION(0x3, "lcd1")), /* D15 */
122 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
123 SUNXI_FUNCTION(0x0, "gpio_in"),
124 SUNXI_FUNCTION(0x1, "gpio_out"),
125 SUNXI_FUNCTION(0x2, "gmac"), /* RXD5 */
126 SUNXI_FUNCTION(0x3, "lcd1")), /* D16 */
127 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
128 SUNXI_FUNCTION(0x0, "gpio_in"),
129 SUNXI_FUNCTION(0x1, "gpio_out"),
130 SUNXI_FUNCTION(0x2, "gmac"), /* RXD6 */
131 SUNXI_FUNCTION(0x3, "lcd1")), /* D17 */
132 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18),
133 SUNXI_FUNCTION(0x0, "gpio_in"),
134 SUNXI_FUNCTION(0x1, "gpio_out"),
135 SUNXI_FUNCTION(0x2, "gmac"), /* RXD7 */
136 SUNXI_FUNCTION(0x3, "lcd1")), /* D18 */
137 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19),
138 SUNXI_FUNCTION(0x0, "gpio_in"),
139 SUNXI_FUNCTION(0x1, "gpio_out"),
140 SUNXI_FUNCTION(0x2, "gmac"), /* RXDV */
141 SUNXI_FUNCTION(0x3, "lcd1"), /* D19 */
142 SUNXI_FUNCTION(0x4, "pwm3")), /* Positive */
143 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 20),
144 SUNXI_FUNCTION(0x0, "gpio_in"),
145 SUNXI_FUNCTION(0x1, "gpio_out"),
146 SUNXI_FUNCTION(0x2, "gmac"), /* RXCLK */
147 SUNXI_FUNCTION(0x3, "lcd1"), /* D20 */
148 SUNXI_FUNCTION(0x4, "pwm3")), /* Negative */
149 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 21),
150 SUNXI_FUNCTION(0x0, "gpio_in"),
151 SUNXI_FUNCTION(0x1, "gpio_out"),
152 SUNXI_FUNCTION(0x2, "gmac"), /* TXERR */
153 SUNXI_FUNCTION(0x3, "lcd1"), /* D21 */
154 SUNXI_FUNCTION(0x4, "spi3")), /* CS0 */
155 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 22),
156 SUNXI_FUNCTION(0x0, "gpio_in"),
157 SUNXI_FUNCTION(0x1, "gpio_out"),
158 SUNXI_FUNCTION(0x2, "gmac"), /* RXERR */
159 SUNXI_FUNCTION(0x3, "lcd1"), /* D22 */
160 SUNXI_FUNCTION(0x4, "spi3")), /* CLK */
161 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 23),
162 SUNXI_FUNCTION(0x0, "gpio_in"),
163 SUNXI_FUNCTION(0x1, "gpio_out"),
164 SUNXI_FUNCTION(0x2, "gmac"), /* COL */
165 SUNXI_FUNCTION(0x3, "lcd1"), /* D23 */
166 SUNXI_FUNCTION(0x4, "spi3")), /* MOSI */
167 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 24),
168 SUNXI_FUNCTION(0x0, "gpio_in"),
169 SUNXI_FUNCTION(0x1, "gpio_out"),
170 SUNXI_FUNCTION(0x2, "gmac"), /* CRS */
171 SUNXI_FUNCTION(0x3, "lcd1"), /* CLK */
172 SUNXI_FUNCTION(0x4, "spi3")), /* MISO */
173 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 25),
174 SUNXI_FUNCTION(0x0, "gpio_in"),
175 SUNXI_FUNCTION(0x1, "gpio_out"),
176 SUNXI_FUNCTION(0x2, "gmac"), /* CLKIN */
177 SUNXI_FUNCTION(0x3, "lcd1"), /* DE */
178 SUNXI_FUNCTION(0x4, "spi3")), /* CS1 */
179 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 26),
180 SUNXI_FUNCTION(0x0, "gpio_in"),
181 SUNXI_FUNCTION(0x1, "gpio_out"),
182 SUNXI_FUNCTION(0x2, "gmac"), /* MDC */
183 SUNXI_FUNCTION(0x3, "lcd1")), /* HSYNC */
184 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 27),
185 SUNXI_FUNCTION(0x0, "gpio_in"),
186 SUNXI_FUNCTION(0x1, "gpio_out"),
187 SUNXI_FUNCTION(0x2, "gmac"), /* MDIO */
188 SUNXI_FUNCTION(0x3, "lcd1")), /* VSYNC */
190 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
191 SUNXI_FUNCTION(0x0, "gpio_in"),
192 SUNXI_FUNCTION(0x1, "gpio_out"),
193 SUNXI_FUNCTION(0x2, "i2s0"), /* MCLK */
194 SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
195 SUNXI_FUNCTION(0x4, "csi")), /* MCLK1 */
196 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
197 SUNXI_FUNCTION(0x0, "gpio_in"),
198 SUNXI_FUNCTION(0x1, "gpio_out"),
199 SUNXI_FUNCTION(0x2, "i2s0")), /* BCLK */
200 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
201 SUNXI_FUNCTION(0x0, "gpio_in"),
202 SUNXI_FUNCTION(0x1, "gpio_out"),
203 SUNXI_FUNCTION(0x2, "i2s0")), /* LRCK */
204 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
205 SUNXI_FUNCTION(0x0, "gpio_in"),
206 SUNXI_FUNCTION(0x1, "gpio_out"),
207 SUNXI_FUNCTION(0x2, "i2s0")), /* DO0 */
208 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
209 SUNXI_FUNCTION(0x0, "gpio_in"),
210 SUNXI_FUNCTION(0x1, "gpio_out"),
211 SUNXI_FUNCTION(0x2, "i2s0"), /* DO1 */
212 SUNXI_FUNCTION(0x3, "uart3")), /* RTS */
213 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
214 SUNXI_FUNCTION(0x0, "gpio_in"),
215 SUNXI_FUNCTION(0x1, "gpio_out"),
216 SUNXI_FUNCTION(0x2, "i2s0"), /* DO2 */
217 SUNXI_FUNCTION(0x3, "uart3"), /* TX */
218 SUNXI_FUNCTION(0x4, "i2c3")), /* SCK */
219 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
220 SUNXI_FUNCTION(0x0, "gpio_in"),
221 SUNXI_FUNCTION(0x1, "gpio_out"),
222 SUNXI_FUNCTION(0x2, "i2s0"), /* DO3 */
223 SUNXI_FUNCTION(0x3, "uart3"), /* RX */
224 SUNXI_FUNCTION(0x4, "i2c3")), /* SDA */
225 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
226 SUNXI_FUNCTION(0x0, "gpio_in"),
227 SUNXI_FUNCTION(0x1, "gpio_out"),
228 SUNXI_FUNCTION(0x3, "i2s0")), /* DI */
230 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
231 SUNXI_FUNCTION(0x0, "gpio_in"),
232 SUNXI_FUNCTION(0x1, "gpio_out"),
233 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
234 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
235 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
236 SUNXI_FUNCTION(0x0, "gpio_in"),
237 SUNXI_FUNCTION(0x1, "gpio_out"),
238 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
239 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
240 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
241 SUNXI_FUNCTION(0x0, "gpio_in"),
242 SUNXI_FUNCTION(0x1, "gpio_out"),
243 SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
244 SUNXI_FUNCTION(0x3, "spi0")), /* CLK */
245 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
246 SUNXI_FUNCTION(0x0, "gpio_in"),
247 SUNXI_FUNCTION(0x1, "gpio_out"),
248 SUNXI_FUNCTION(0x2, "nand0")), /* CE1 */
249 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
250 SUNXI_FUNCTION(0x0, "gpio_in"),
251 SUNXI_FUNCTION(0x1, "gpio_out"),
252 SUNXI_FUNCTION(0x2, "nand0")), /* CE0 */
253 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
254 SUNXI_FUNCTION(0x0, "gpio_in"),
255 SUNXI_FUNCTION(0x1, "gpio_out"),
256 SUNXI_FUNCTION(0x2, "nand0")), /* RE */
257 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
258 SUNXI_FUNCTION(0x0, "gpio_in"),
259 SUNXI_FUNCTION(0x1, "gpio_out"),
260 SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
261 SUNXI_FUNCTION(0x3, "mmc2"), /* CMD */
262 SUNXI_FUNCTION(0x4, "mmc3")), /* CMD */
263 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
264 SUNXI_FUNCTION(0x0, "gpio_in"),
265 SUNXI_FUNCTION(0x1, "gpio_out"),
266 SUNXI_FUNCTION(0x2, "nand0"), /* RB1 */
267 SUNXI_FUNCTION(0x3, "mmc2"), /* CLK */
268 SUNXI_FUNCTION(0x4, "mmc3")), /* CLK */
269 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
270 SUNXI_FUNCTION(0x0, "gpio_in"),
271 SUNXI_FUNCTION(0x1, "gpio_out"),
272 SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
273 SUNXI_FUNCTION(0x3, "mmc2"), /* D0 */
274 SUNXI_FUNCTION(0x4, "mmc3")), /* D0 */
275 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
276 SUNXI_FUNCTION(0x0, "gpio_in"),
277 SUNXI_FUNCTION(0x1, "gpio_out"),
278 SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
279 SUNXI_FUNCTION(0x3, "mmc2"), /* D1 */
280 SUNXI_FUNCTION(0x4, "mmc3")), /* D1 */
281 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
282 SUNXI_FUNCTION(0x0, "gpio_in"),
283 SUNXI_FUNCTION(0x1, "gpio_out"),
284 SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
285 SUNXI_FUNCTION(0x3, "mmc2"), /* D2 */
286 SUNXI_FUNCTION(0x4, "mmc3")), /* D2 */
287 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
288 SUNXI_FUNCTION(0x0, "gpio_in"),
289 SUNXI_FUNCTION(0x1, "gpio_out"),
290 SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
291 SUNXI_FUNCTION(0x3, "mmc2"), /* D3 */
292 SUNXI_FUNCTION(0x4, "mmc3")), /* D3 */
293 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
294 SUNXI_FUNCTION(0x0, "gpio_in"),
295 SUNXI_FUNCTION(0x1, "gpio_out"),
296 SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
297 SUNXI_FUNCTION(0x3, "mmc2"), /* D4 */
298 SUNXI_FUNCTION(0x4, "mmc3")), /* D4 */
299 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
300 SUNXI_FUNCTION(0x0, "gpio_in"),
301 SUNXI_FUNCTION(0x1, "gpio_out"),
302 SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
303 SUNXI_FUNCTION(0x3, "mmc2"), /* D5 */
304 SUNXI_FUNCTION(0x4, "mmc3")), /* D5 */
305 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
306 SUNXI_FUNCTION(0x0, "gpio_in"),
307 SUNXI_FUNCTION(0x1, "gpio_out"),
308 SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
309 SUNXI_FUNCTION(0x3, "mmc2"), /* D6 */
310 SUNXI_FUNCTION(0x4, "mmc3")), /* D6 */
311 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
312 SUNXI_FUNCTION(0x0, "gpio_in"),
313 SUNXI_FUNCTION(0x1, "gpio_out"),
314 SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
315 SUNXI_FUNCTION(0x3, "mmc2"), /* D7 */
316 SUNXI_FUNCTION(0x4, "mmc3")), /* D7 */
317 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
318 SUNXI_FUNCTION(0x0, "gpio_in"),
319 SUNXI_FUNCTION(0x1, "gpio_out"),
320 SUNXI_FUNCTION(0x2, "nand0"), /* DQ8 */
321 SUNXI_FUNCTION(0x3, "nand1")), /* DQ0 */
322 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 17),
323 SUNXI_FUNCTION(0x0, "gpio_in"),
324 SUNXI_FUNCTION(0x1, "gpio_out"),
325 SUNXI_FUNCTION(0x2, "nand0"), /* DQ9 */
326 SUNXI_FUNCTION(0x3, "nand1")), /* DQ1 */
327 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 18),
328 SUNXI_FUNCTION(0x0, "gpio_in"),
329 SUNXI_FUNCTION(0x1, "gpio_out"),
330 SUNXI_FUNCTION(0x2, "nand0"), /* DQ10 */
331 SUNXI_FUNCTION(0x3, "nand1")), /* DQ2 */
332 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
333 SUNXI_FUNCTION(0x0, "gpio_in"),
334 SUNXI_FUNCTION(0x1, "gpio_out"),
335 SUNXI_FUNCTION(0x2, "nand0"), /* DQ11 */
336 SUNXI_FUNCTION(0x3, "nand1")), /* DQ3 */
337 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 20),
338 SUNXI_FUNCTION(0x0, "gpio_in"),
339 SUNXI_FUNCTION(0x1, "gpio_out"),
340 SUNXI_FUNCTION(0x2, "nand0"), /* DQ12 */
341 SUNXI_FUNCTION(0x3, "nand1")), /* DQ4 */
342 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 21),
343 SUNXI_FUNCTION(0x0, "gpio_in"),
344 SUNXI_FUNCTION(0x1, "gpio_out"),
345 SUNXI_FUNCTION(0x2, "nand0"), /* DQ13 */
346 SUNXI_FUNCTION(0x3, "nand1")), /* DQ5 */
347 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 22),
348 SUNXI_FUNCTION(0x0, "gpio_in"),
349 SUNXI_FUNCTION(0x1, "gpio_out"),
350 SUNXI_FUNCTION(0x2, "nand0"), /* DQ14 */
351 SUNXI_FUNCTION(0x3, "nand1")), /* DQ6 */
352 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 23),
353 SUNXI_FUNCTION(0x0, "gpio_in"),
354 SUNXI_FUNCTION(0x1, "gpio_out"),
355 SUNXI_FUNCTION(0x2, "nand0"), /* DQ15 */
356 SUNXI_FUNCTION(0x3, "nand1")), /* DQ7 */
357 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 24),
358 SUNXI_FUNCTION(0x0, "gpio_in"),
359 SUNXI_FUNCTION(0x1, "gpio_out"),
360 SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
361 SUNXI_FUNCTION(0x3, "mmc2"), /* RST */
362 SUNXI_FUNCTION(0x4, "mmc3")), /* RST */
363 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 25),
364 SUNXI_FUNCTION(0x0, "gpio_in"),
365 SUNXI_FUNCTION(0x1, "gpio_out"),
366 SUNXI_FUNCTION(0x2, "nand0")), /* CE2 */
367 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 26),
368 SUNXI_FUNCTION(0x0, "gpio_in"),
369 SUNXI_FUNCTION(0x1, "gpio_out"),
370 SUNXI_FUNCTION(0x2, "nand0")), /* CE3 */
371 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 27),
372 SUNXI_FUNCTION(0x0, "gpio_in"),
373 SUNXI_FUNCTION(0x1, "gpio_out"),
374 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
376 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
377 SUNXI_FUNCTION(0x0, "gpio_in"),
378 SUNXI_FUNCTION(0x1, "gpio_out"),
379 SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */
380 SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */
381 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
382 SUNXI_FUNCTION(0x0, "gpio_in"),
383 SUNXI_FUNCTION(0x1, "gpio_out"),
384 SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */
385 SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */
386 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
387 SUNXI_FUNCTION(0x0, "gpio_in"),
388 SUNXI_FUNCTION(0x1, "gpio_out"),
389 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
390 SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */
391 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
392 SUNXI_FUNCTION(0x0, "gpio_in"),
393 SUNXI_FUNCTION(0x1, "gpio_out"),
394 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
395 SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */
396 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
397 SUNXI_FUNCTION(0x0, "gpio_in"),
398 SUNXI_FUNCTION(0x1, "gpio_out"),
399 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
400 SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */
401 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
402 SUNXI_FUNCTION(0x0, "gpio_in"),
403 SUNXI_FUNCTION(0x1, "gpio_out"),
404 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
405 SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */
406 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
407 SUNXI_FUNCTION(0x0, "gpio_in"),
408 SUNXI_FUNCTION(0x1, "gpio_out"),
409 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
410 SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */
411 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
412 SUNXI_FUNCTION(0x0, "gpio_in"),
413 SUNXI_FUNCTION(0x1, "gpio_out"),
414 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
415 SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */
416 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
417 SUNXI_FUNCTION(0x0, "gpio_in"),
418 SUNXI_FUNCTION(0x1, "gpio_out"),
419 SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */
420 SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */
421 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
422 SUNXI_FUNCTION(0x0, "gpio_in"),
423 SUNXI_FUNCTION(0x1, "gpio_out"),
424 SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */
425 SUNXI_FUNCTION(0x3, "lvds0")), /* VN3 */
426 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
427 SUNXI_FUNCTION(0x0, "gpio_in"),
428 SUNXI_FUNCTION(0x1, "gpio_out"),
429 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
430 SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */
431 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
432 SUNXI_FUNCTION(0x0, "gpio_in"),
433 SUNXI_FUNCTION(0x1, "gpio_out"),
434 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
435 SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */
436 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
437 SUNXI_FUNCTION(0x0, "gpio_in"),
438 SUNXI_FUNCTION(0x1, "gpio_out"),
439 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
440 SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */
441 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
442 SUNXI_FUNCTION(0x0, "gpio_in"),
443 SUNXI_FUNCTION(0x1, "gpio_out"),
444 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
445 SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */
446 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
447 SUNXI_FUNCTION(0x0, "gpio_in"),
448 SUNXI_FUNCTION(0x1, "gpio_out"),
449 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
450 SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */
451 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
452 SUNXI_FUNCTION(0x0, "gpio_in"),
453 SUNXI_FUNCTION(0x1, "gpio_out"),
454 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
455 SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */
456 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
457 SUNXI_FUNCTION(0x0, "gpio_in"),
458 SUNXI_FUNCTION(0x1, "gpio_out"),
459 SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */
460 SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */
461 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
462 SUNXI_FUNCTION(0x0, "gpio_in"),
463 SUNXI_FUNCTION(0x1, "gpio_out"),
464 SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */
465 SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */
466 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
467 SUNXI_FUNCTION(0x0, "gpio_in"),
468 SUNXI_FUNCTION(0x1, "gpio_out"),
469 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
470 SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */
471 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
472 SUNXI_FUNCTION(0x0, "gpio_in"),
473 SUNXI_FUNCTION(0x1, "gpio_out"),
474 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
475 SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */
476 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
477 SUNXI_FUNCTION(0x0, "gpio_in"),
478 SUNXI_FUNCTION(0x1, "gpio_out"),
479 SUNXI_FUNCTION(0x2, "lcd0")), /* D20 */
480 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
481 SUNXI_FUNCTION(0x0, "gpio_in"),
482 SUNXI_FUNCTION(0x1, "gpio_out"),
483 SUNXI_FUNCTION(0x2, "lcd0")), /* D21 */
484 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
485 SUNXI_FUNCTION(0x0, "gpio_in"),
486 SUNXI_FUNCTION(0x1, "gpio_out"),
487 SUNXI_FUNCTION(0x2, "lcd0")), /* D22 */
488 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
489 SUNXI_FUNCTION(0x0, "gpio_in"),
490 SUNXI_FUNCTION(0x1, "gpio_out"),
491 SUNXI_FUNCTION(0x2, "lcd0")), /* D23 */
492 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
493 SUNXI_FUNCTION(0x0, "gpio_in"),
494 SUNXI_FUNCTION(0x1, "gpio_out"),
495 SUNXI_FUNCTION(0x2, "lcd0")), /* CLK */
496 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
497 SUNXI_FUNCTION(0x0, "gpio_in"),
498 SUNXI_FUNCTION(0x1, "gpio_out"),
499 SUNXI_FUNCTION(0x2, "lcd0")), /* DE */
500 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
501 SUNXI_FUNCTION(0x0, "gpio_in"),
502 SUNXI_FUNCTION(0x1, "gpio_out"),
503 SUNXI_FUNCTION(0x2, "lcd0")), /* HSYNC */
504 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
505 SUNXI_FUNCTION(0x0, "gpio_in"),
506 SUNXI_FUNCTION(0x1, "gpio_out"),
507 SUNXI_FUNCTION(0x2, "lcd0")), /* VSYNC */
509 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
510 SUNXI_FUNCTION(0x0, "gpio_in"),
511 SUNXI_FUNCTION(0x1, "gpio_out"),
512 SUNXI_FUNCTION(0x2, "csi"), /* PCLK */
513 SUNXI_FUNCTION(0x3, "ts")), /* CLK */
514 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
515 SUNXI_FUNCTION(0x0, "gpio_in"),
516 SUNXI_FUNCTION(0x1, "gpio_out"),
517 SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
518 SUNXI_FUNCTION(0x3, "ts")), /* ERR */
519 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
520 SUNXI_FUNCTION(0x0, "gpio_in"),
521 SUNXI_FUNCTION(0x1, "gpio_out"),
522 SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */
523 SUNXI_FUNCTION(0x3, "ts")), /* SYNC */
524 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
525 SUNXI_FUNCTION(0x0, "gpio_in"),
526 SUNXI_FUNCTION(0x1, "gpio_out"),
527 SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */
528 SUNXI_FUNCTION(0x3, "ts")), /* DVLD */
529 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
530 SUNXI_FUNCTION(0x0, "gpio_in"),
531 SUNXI_FUNCTION(0x1, "gpio_out"),
532 SUNXI_FUNCTION(0x2, "csi"), /* D0 */
533 SUNXI_FUNCTION(0x3, "uart5")), /* TX */
534 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
535 SUNXI_FUNCTION(0x0, "gpio_in"),
536 SUNXI_FUNCTION(0x1, "gpio_out"),
537 SUNXI_FUNCTION(0x2, "csi"), /* D1 */
538 SUNXI_FUNCTION(0x3, "uart5")), /* RX */
539 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
540 SUNXI_FUNCTION(0x0, "gpio_in"),
541 SUNXI_FUNCTION(0x1, "gpio_out"),
542 SUNXI_FUNCTION(0x2, "csi"), /* D2 */
543 SUNXI_FUNCTION(0x3, "uart5")), /* RTS */
544 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
545 SUNXI_FUNCTION(0x0, "gpio_in"),
546 SUNXI_FUNCTION(0x1, "gpio_out"),
547 SUNXI_FUNCTION(0x2, "csi"), /* D3 */
548 SUNXI_FUNCTION(0x3, "uart5")), /* CTS */
549 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
550 SUNXI_FUNCTION(0x0, "gpio_in"),
551 SUNXI_FUNCTION(0x1, "gpio_out"),
552 SUNXI_FUNCTION(0x2, "csi"), /* D4 */
553 SUNXI_FUNCTION(0x3, "ts")), /* D0 */
554 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
555 SUNXI_FUNCTION(0x0, "gpio_in"),
556 SUNXI_FUNCTION(0x1, "gpio_out"),
557 SUNXI_FUNCTION(0x2, "csi"), /* D5 */
558 SUNXI_FUNCTION(0x3, "ts")), /* D1 */
559 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
560 SUNXI_FUNCTION(0x0, "gpio_in"),
561 SUNXI_FUNCTION(0x1, "gpio_out"),
562 SUNXI_FUNCTION(0x2, "csi"), /* D6 */
563 SUNXI_FUNCTION(0x3, "ts")), /* D2 */
564 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
565 SUNXI_FUNCTION(0x0, "gpio_in"),
566 SUNXI_FUNCTION(0x1, "gpio_out"),
567 SUNXI_FUNCTION(0x2, "csi"), /* D7 */
568 SUNXI_FUNCTION(0x3, "ts")), /* D3 */
569 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
570 SUNXI_FUNCTION(0x0, "gpio_in"),
571 SUNXI_FUNCTION(0x1, "gpio_out"),
572 SUNXI_FUNCTION(0x2, "csi"), /* D8 */
573 SUNXI_FUNCTION(0x3, "ts")), /* D4 */
574 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
575 SUNXI_FUNCTION(0x0, "gpio_in"),
576 SUNXI_FUNCTION(0x1, "gpio_out"),
577 SUNXI_FUNCTION(0x2, "csi"), /* D9 */
578 SUNXI_FUNCTION(0x3, "ts")), /* D5 */
579 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
580 SUNXI_FUNCTION(0x0, "gpio_in"),
581 SUNXI_FUNCTION(0x1, "gpio_out"),
582 SUNXI_FUNCTION(0x2, "csi"), /* D10 */
583 SUNXI_FUNCTION(0x3, "ts")), /* D6 */
584 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
585 SUNXI_FUNCTION(0x0, "gpio_in"),
586 SUNXI_FUNCTION(0x1, "gpio_out"),
587 SUNXI_FUNCTION(0x2, "csi"), /* D11 */
588 SUNXI_FUNCTION(0x3, "ts")), /* D7 */
589 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 16),
590 SUNXI_FUNCTION(0x0, "gpio_in"),
591 SUNXI_FUNCTION(0x1, "gpio_out"),
592 SUNXI_FUNCTION(0x2, "csi")), /* MIPI CSI MCLK */
594 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
595 SUNXI_FUNCTION(0x0, "gpio_in"),
596 SUNXI_FUNCTION(0x1, "gpio_out"),
597 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
598 SUNXI_FUNCTION(0x4, "jtag")), /* MS1 */
599 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
600 SUNXI_FUNCTION(0x0, "gpio_in"),
601 SUNXI_FUNCTION(0x1, "gpio_out"),
602 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
603 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
604 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
605 SUNXI_FUNCTION(0x0, "gpio_in"),
606 SUNXI_FUNCTION(0x1, "gpio_out"),
607 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
608 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
609 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
610 SUNXI_FUNCTION(0x0, "gpio_in"),
611 SUNXI_FUNCTION(0x1, "gpio_out"),
612 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
613 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
614 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
615 SUNXI_FUNCTION(0x0, "gpio_in"),
616 SUNXI_FUNCTION(0x1, "gpio_out"),
617 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
618 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
619 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
620 SUNXI_FUNCTION(0x0, "gpio_in"),
621 SUNXI_FUNCTION(0x1, "gpio_out"),
622 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
623 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
625 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
626 SUNXI_FUNCTION(0x0, "gpio_in"),
627 SUNXI_FUNCTION(0x1, "gpio_out"),
628 SUNXI_FUNCTION(0x2, "mmc1")), /* CLK */
629 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
630 SUNXI_FUNCTION(0x0, "gpio_in"),
631 SUNXI_FUNCTION(0x1, "gpio_out"),
632 SUNXI_FUNCTION(0x2, "mmc1")), /* CMD */
633 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
634 SUNXI_FUNCTION(0x0, "gpio_in"),
635 SUNXI_FUNCTION(0x1, "gpio_out"),
636 SUNXI_FUNCTION(0x2, "mmc1")), /* D0 */
637 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
638 SUNXI_FUNCTION(0x0, "gpio_in"),
639 SUNXI_FUNCTION(0x1, "gpio_out"),
640 SUNXI_FUNCTION(0x2, "mmc1")), /* D1 */
641 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
642 SUNXI_FUNCTION(0x0, "gpio_in"),
643 SUNXI_FUNCTION(0x1, "gpio_out"),
644 SUNXI_FUNCTION(0x2, "mmc1")), /* D2 */
645 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
646 SUNXI_FUNCTION(0x0, "gpio_in"),
647 SUNXI_FUNCTION(0x1, "gpio_out"),
648 SUNXI_FUNCTION(0x2, "mmc1")), /* D3 */
649 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
650 SUNXI_FUNCTION(0x0, "gpio_in"),
651 SUNXI_FUNCTION(0x1, "gpio_out"),
652 SUNXI_FUNCTION(0x2, "uart2")), /* TX */
653 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
654 SUNXI_FUNCTION(0x0, "gpio_in"),
655 SUNXI_FUNCTION(0x1, "gpio_out"),
656 SUNXI_FUNCTION(0x2, "uart2")), /* RX */
657 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
658 SUNXI_FUNCTION(0x0, "gpio_in"),
659 SUNXI_FUNCTION(0x1, "gpio_out"),
660 SUNXI_FUNCTION(0x2, "uart2")), /* RTS */
661 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
662 SUNXI_FUNCTION(0x0, "gpio_in"),
663 SUNXI_FUNCTION(0x1, "gpio_out"),
664 SUNXI_FUNCTION(0x2, "uart2")), /* CTS */
665 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
666 SUNXI_FUNCTION(0x0, "gpio_in"),
667 SUNXI_FUNCTION(0x1, "gpio_out"),
668 SUNXI_FUNCTION(0x2, "i2c3"), /* SCK */
669 SUNXI_FUNCTION(0x3, "usb")), /* DP3 */
670 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
671 SUNXI_FUNCTION(0x0, "gpio_in"),
672 SUNXI_FUNCTION(0x1, "gpio_out"),
673 SUNXI_FUNCTION(0x2, "i2c3"), /* SDA */
674 SUNXI_FUNCTION(0x3, "usb")), /* DM3 */
675 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
676 SUNXI_FUNCTION(0x0, "gpio_in"),
677 SUNXI_FUNCTION(0x1, "gpio_out"),
678 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
679 SUNXI_FUNCTION(0x3, "i2s1")), /* MCLK */
680 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
681 SUNXI_FUNCTION(0x0, "gpio_in"),
682 SUNXI_FUNCTION(0x1, "gpio_out"),
683 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
684 SUNXI_FUNCTION(0x3, "i2s1")), /* BCLK */
685 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 14),
686 SUNXI_FUNCTION(0x0, "gpio_in"),
687 SUNXI_FUNCTION(0x1, "gpio_out"),
688 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
689 SUNXI_FUNCTION(0x3, "i2s1")), /* LRCK */
690 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 15),
691 SUNXI_FUNCTION(0x0, "gpio_in"),
692 SUNXI_FUNCTION(0x1, "gpio_out"),
693 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
694 SUNXI_FUNCTION(0x3, "i2s1")), /* DIN */
695 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 16),
696 SUNXI_FUNCTION(0x0, "gpio_in"),
697 SUNXI_FUNCTION(0x1, "gpio_out"),
698 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
699 SUNXI_FUNCTION(0x3, "i2s1")), /* DOUT */
700 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 17),
701 SUNXI_FUNCTION(0x0, "gpio_in"),
702 SUNXI_FUNCTION(0x1, "gpio_out"),
703 SUNXI_FUNCTION(0x2, "uart4")), /* TX */
704 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 18),
705 SUNXI_FUNCTION(0x0, "gpio_in"),
706 SUNXI_FUNCTION(0x1, "gpio_out"),
707 SUNXI_FUNCTION(0x2, "uart4")), /* RX */
709 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 0),
710 SUNXI_FUNCTION(0x0, "gpio_in"),
711 SUNXI_FUNCTION(0x1, "gpio_out"),
712 SUNXI_FUNCTION(0x2, "nand1")), /* WE */
713 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 1),
714 SUNXI_FUNCTION(0x0, "gpio_in"),
715 SUNXI_FUNCTION(0x1, "gpio_out"),
716 SUNXI_FUNCTION(0x2, "nand1")), /* ALE */
717 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 2),
718 SUNXI_FUNCTION(0x0, "gpio_in"),
719 SUNXI_FUNCTION(0x1, "gpio_out"),
720 SUNXI_FUNCTION(0x2, "nand1")), /* CLE */
721 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 3),
722 SUNXI_FUNCTION(0x0, "gpio_in"),
723 SUNXI_FUNCTION(0x1, "gpio_out"),
724 SUNXI_FUNCTION(0x2, "nand1")), /* CE1 */
725 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 4),
726 SUNXI_FUNCTION(0x0, "gpio_in"),
727 SUNXI_FUNCTION(0x1, "gpio_out"),
728 SUNXI_FUNCTION(0x2, "nand1")), /* CE0 */
729 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 5),
730 SUNXI_FUNCTION(0x0, "gpio_in"),
731 SUNXI_FUNCTION(0x1, "gpio_out"),
732 SUNXI_FUNCTION(0x2, "nand1")), /* RE */
733 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 6),
734 SUNXI_FUNCTION(0x0, "gpio_in"),
735 SUNXI_FUNCTION(0x1, "gpio_out"),
736 SUNXI_FUNCTION(0x2, "nand1")), /* RB0 */
737 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 7),
738 SUNXI_FUNCTION(0x0, "gpio_in"),
739 SUNXI_FUNCTION(0x1, "gpio_out"),
740 SUNXI_FUNCTION(0x2, "nand1")), /* RB1 */
741 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 8),
742 SUNXI_FUNCTION(0x0, "gpio_in"),
743 SUNXI_FUNCTION(0x1, "gpio_out"),
744 SUNXI_FUNCTION(0x2, "nand1")), /* DQS */
745 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 9),
746 SUNXI_FUNCTION(0x0, "gpio_in"),
747 SUNXI_FUNCTION(0x1, "gpio_out"),
748 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
749 SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */
750 SUNXI_FUNCTION(0x4, "pwm1")), /* Positive */
751 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 10),
752 SUNXI_FUNCTION(0x0, "gpio_in"),
753 SUNXI_FUNCTION(0x1, "gpio_out"),
754 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
755 SUNXI_FUNCTION(0x3, "jtag"), /* CK0 */
756 SUNXI_FUNCTION(0x4, "pwm1")), /* Negative */
757 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 11),
758 SUNXI_FUNCTION(0x0, "gpio_in"),
759 SUNXI_FUNCTION(0x1, "gpio_out"),
760 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
761 SUNXI_FUNCTION(0x3, "jtag"), /* DO0 */
762 SUNXI_FUNCTION(0x4, "pwm2")), /* Positive */
763 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 12),
764 SUNXI_FUNCTION(0x0, "gpio_in"),
765 SUNXI_FUNCTION(0x1, "gpio_out"),
766 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
767 SUNXI_FUNCTION(0x3, "jtag"), /* DI0 */
768 SUNXI_FUNCTION(0x4, "pwm2")), /* Negative */
769 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 13),
770 SUNXI_FUNCTION(0x0, "gpio_in"),
771 SUNXI_FUNCTION(0x1, "gpio_out"),
772 SUNXI_FUNCTION(0x2, "pwm0")),
773 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 14),
774 SUNXI_FUNCTION(0x0, "gpio_in"),
775 SUNXI_FUNCTION(0x1, "gpio_out"),
776 SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
777 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 15),
778 SUNXI_FUNCTION(0x0, "gpio_in"),
779 SUNXI_FUNCTION(0x1, "gpio_out"),
780 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
781 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 16),
782 SUNXI_FUNCTION(0x0, "gpio_in"),
783 SUNXI_FUNCTION(0x1, "gpio_out"),
784 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
785 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 17),
786 SUNXI_FUNCTION(0x0, "gpio_in"),
787 SUNXI_FUNCTION(0x1, "gpio_out"),
788 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
789 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 18),
790 SUNXI_FUNCTION(0x0, "gpio_in"),
791 SUNXI_FUNCTION(0x1, "gpio_out"),
792 SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
793 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
794 SUNXI_FUNCTION(0x0, "gpio_in"),
795 SUNXI_FUNCTION(0x1, "gpio_out"),
796 SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
797 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 20),
798 SUNXI_FUNCTION(0x0, "gpio_in"),
799 SUNXI_FUNCTION(0x1, "gpio_out"),
800 SUNXI_FUNCTION(0x2, "uart0")), /* TX */
801 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 21),
802 SUNXI_FUNCTION(0x0, "gpio_in"),
803 SUNXI_FUNCTION(0x1, "gpio_out"),
804 SUNXI_FUNCTION(0x2, "uart0")), /* RX */
805 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 22),
806 SUNXI_FUNCTION(0x0, "gpio_in"),
807 SUNXI_FUNCTION(0x1, "gpio_out")),
808 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 23),
809 SUNXI_FUNCTION(0x0, "gpio_in"),
810 SUNXI_FUNCTION(0x1, "gpio_out")),
811 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 24),
812 SUNXI_FUNCTION(0x0, "gpio_in"),
813 SUNXI_FUNCTION(0x1, "gpio_out")),
814 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 25),
815 SUNXI_FUNCTION(0x0, "gpio_in"),
816 SUNXI_FUNCTION(0x1, "gpio_out")),
817 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 26),
818 SUNXI_FUNCTION(0x0, "gpio_in"),
819 SUNXI_FUNCTION(0x1, "gpio_out")),
820 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 27),
821 SUNXI_FUNCTION(0x0, "gpio_in"),
822 SUNXI_FUNCTION(0x1, "gpio_out")),
823 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 28),
824 SUNXI_FUNCTION(0x0, "gpio_in"),
825 SUNXI_FUNCTION(0x1, "gpio_out")),
826 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 29),
827 SUNXI_FUNCTION(0x0, "gpio_in"),
828 SUNXI_FUNCTION(0x1, "gpio_out"),
829 SUNXI_FUNCTION(0x2, "nand1")), /* CE2 */
830 SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 30),
831 SUNXI_FUNCTION(0x0, "gpio_in"),
832 SUNXI_FUNCTION(0x1, "gpio_out"),
833 SUNXI_FUNCTION(0x2, "nand1")), /* CE3 */
836 static const struct sunxi_pinctrl_desc sun6i_a31_pinctrl_data = {
837 .pins = sun6i_a31_pins,
838 .npins = ARRAY_SIZE(sun6i_a31_pins),
841 static int sun6i_a31_pinctrl_probe(struct platform_device *pdev)
843 return sunxi_pinctrl_init(pdev,
844 &sun6i_a31_pinctrl_data);
847 static struct of_device_id sun6i_a31_pinctrl_match[] = {
848 { .compatible = "allwinner,sun6i-a31-pinctrl", },
851 MODULE_DEVICE_TABLE(of, sun6i_a31_pinctrl_match);
853 static struct platform_driver sun6i_a31_pinctrl_driver = {
854 .probe = sun6i_a31_pinctrl_probe,
856 .name = "sun6i-a31-pinctrl",
857 .owner = THIS_MODULE,
858 .of_match_table = sun6i_a31_pinctrl_match,
861 module_platform_driver(sun6i_a31_pinctrl_driver);
863 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
864 MODULE_DESCRIPTION("Allwinner A31 pinctrl driver");
865 MODULE_LICENSE("GPL");
projects / firefly-linux-kernel-4.4.55.git / blob