2 * PWM driver for Rockchip SoCs
4 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
5 * Copyright (C) 2014 ROCKCHIP, Inc.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
12 #include <linux/clk.h>
14 #include <linux/module.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <linux/pwm.h>
19 #include <linux/time.h>
21 #define PWM_CTRL_TIMER_EN (1 << 0)
22 #define PWM_CTRL_OUTPUT_EN (1 << 3)
24 #define PWM_ENABLE (1 << 0)
25 #define PWM_CONTINUOUS (1 << 1)
26 #define PWM_DUTY_POSITIVE (1 << 3)
27 #define PWM_DUTY_NEGATIVE (0 << 3)
28 #define PWM_INACTIVE_NEGATIVE (0 << 4)
29 #define PWM_INACTIVE_POSITIVE (1 << 4)
30 #define PWM_OUTPUT_LEFT (0 << 5)
31 #define PWM_LP_DISABLE (0 << 8)
33 struct rockchip_pwm_chip {
36 const struct rockchip_pwm_data *data;
40 struct rockchip_pwm_regs {
47 struct rockchip_pwm_data {
48 struct rockchip_pwm_regs regs;
49 unsigned int prescaler;
50 const struct pwm_ops *ops;
52 void (*set_enable)(struct pwm_chip *chip,
53 struct pwm_device *pwm, bool enable);
56 static inline struct rockchip_pwm_chip *to_rockchip_pwm_chip(struct pwm_chip *c)
58 return container_of(c, struct rockchip_pwm_chip, chip);
61 static void rockchip_pwm_set_enable_v1(struct pwm_chip *chip,
62 struct pwm_device *pwm, bool enable)
64 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
65 u32 enable_conf = PWM_CTRL_OUTPUT_EN | PWM_CTRL_TIMER_EN;
68 val = readl_relaxed(pc->base + pc->data->regs.ctrl);
75 writel_relaxed(val, pc->base + pc->data->regs.ctrl);
78 static void rockchip_pwm_set_enable_v2(struct pwm_chip *chip,
79 struct pwm_device *pwm, bool enable)
81 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
82 u32 enable_conf = PWM_OUTPUT_LEFT | PWM_LP_DISABLE | PWM_ENABLE |
86 if (pwm_get_polarity(pwm) == PWM_POLARITY_INVERSED)
87 enable_conf |= PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSITIVE;
89 enable_conf |= PWM_DUTY_POSITIVE | PWM_INACTIVE_NEGATIVE;
91 val = readl_relaxed(pc->base + pc->data->regs.ctrl);
92 val &= ~(GENMASK(5, 0) | BIT(8));
99 writel_relaxed(val, pc->base + pc->data->regs.ctrl);
102 static int rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
103 int duty_ns, int period_ns)
105 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
106 unsigned long period, duty;
110 clk_rate = clk_get_rate(pc->clk);
113 * Since period and duty cycle registers have a width of 32
114 * bits, every possible input period can be obtained using the
115 * default prescaler value for all practical clock rate values.
117 div = clk_rate * period_ns;
118 do_div(div, pc->data->prescaler * NSEC_PER_SEC);
121 div = clk_rate * duty_ns;
122 do_div(div, pc->data->prescaler * NSEC_PER_SEC);
125 ret = clk_enable(pc->clk);
129 writel(period, pc->base + pc->data->regs.period);
130 writel(duty, pc->base + pc->data->regs.duty);
131 writel(0, pc->base + pc->data->regs.cntr);
133 clk_disable(pc->clk);
138 static int rockchip_pwm_set_polarity(struct pwm_chip *chip,
139 struct pwm_device *pwm,
140 enum pwm_polarity polarity)
143 * No action needed here because pwm->polarity will be set by the core
144 * and the core will only change polarity when the PWM is not enabled.
145 * We'll handle things in set_enable().
151 static int rockchip_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
153 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
156 ret = clk_enable(pc->clk);
160 pc->data->set_enable(chip, pwm, true);
165 static void rockchip_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
167 struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip);
169 pc->data->set_enable(chip, pwm, false);
171 clk_disable(pc->clk);
174 static const struct pwm_ops rockchip_pwm_ops_v1 = {
175 .config = rockchip_pwm_config,
176 .enable = rockchip_pwm_enable,
177 .disable = rockchip_pwm_disable,
178 .owner = THIS_MODULE,
181 static const struct pwm_ops rockchip_pwm_ops_v2 = {
182 .config = rockchip_pwm_config,
183 .set_polarity = rockchip_pwm_set_polarity,
184 .enable = rockchip_pwm_enable,
185 .disable = rockchip_pwm_disable,
186 .owner = THIS_MODULE,
189 static const struct rockchip_pwm_data pwm_data_v1 = {
197 .ops = &rockchip_pwm_ops_v1,
198 .set_enable = rockchip_pwm_set_enable_v1,
201 static const struct rockchip_pwm_data pwm_data_v2 = {
209 .ops = &rockchip_pwm_ops_v2,
210 .set_enable = rockchip_pwm_set_enable_v2,
213 static const struct rockchip_pwm_data pwm_data_vop = {
221 .ops = &rockchip_pwm_ops_v2,
222 .set_enable = rockchip_pwm_set_enable_v2,
225 static const struct of_device_id rockchip_pwm_dt_ids[] = {
226 { .compatible = "rockchip,rk2928-pwm", .data = &pwm_data_v1},
227 { .compatible = "rockchip,rk3288-pwm", .data = &pwm_data_v2},
228 { .compatible = "rockchip,vop-pwm", .data = &pwm_data_vop},
229 { .compatible = "rockchip,rk3399-pwm", .data = &pwm_data_v2},
232 MODULE_DEVICE_TABLE(of, rockchip_pwm_dt_ids);
234 static int rockchip_pwm_probe(struct platform_device *pdev)
236 const struct of_device_id *id;
237 struct rockchip_pwm_chip *pc;
241 id = of_match_device(rockchip_pwm_dt_ids, &pdev->dev);
245 pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
249 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
250 pc->base = devm_ioremap(&pdev->dev, r->start,
252 if (IS_ERR(pc->base))
253 return PTR_ERR(pc->base);
255 pc->clk = devm_clk_get(&pdev->dev, NULL);
257 return PTR_ERR(pc->clk);
259 ret = clk_prepare(pc->clk);
263 platform_set_drvdata(pdev, pc);
266 pc->chip.dev = &pdev->dev;
267 pc->chip.ops = pc->data->ops;
271 if (pc->data->ops->set_polarity) {
272 pc->chip.of_xlate = of_pwm_xlate_with_flags;
273 pc->chip.of_pwm_n_cells = 3;
276 ret = pwmchip_add(&pc->chip);
278 clk_unprepare(pc->clk);
279 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
285 static int rockchip_pwm_remove(struct platform_device *pdev)
287 struct rockchip_pwm_chip *pc = platform_get_drvdata(pdev);
289 clk_unprepare(pc->clk);
291 return pwmchip_remove(&pc->chip);
294 static struct platform_driver rockchip_pwm_driver = {
296 .name = "rockchip-pwm",
297 .of_match_table = rockchip_pwm_dt_ids,
299 .probe = rockchip_pwm_probe,
300 .remove = rockchip_pwm_remove,
302 module_platform_driver(rockchip_pwm_driver);
304 MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");
305 MODULE_DESCRIPTION("Rockchip SoC PWM driver");
306 MODULE_LICENSE("GPL v2");