regulator: ab8500: Also check for AB8505 based platforms
[firefly-linux-kernel-4.4.55.git] / drivers / regulator / ab8500.c
1 /*
2  * Copyright (C) ST-Ericsson SA 2010
3  *
4  * License Terms: GNU General Public License v2
5  *
6  * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7  *          Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
8  *          Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
9  *
10  * AB8500 peripheral regulators
11  *
12  * AB8500 supports the following regulators:
13  *   VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
14  *
15  * AB8505 supports the following regulators:
16  *   VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
17  */
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/err.h>
22 #include <linux/platform_device.h>
23 #include <linux/mfd/abx500.h>
24 #include <linux/mfd/abx500/ab8500.h>
25 #include <linux/of.h>
26 #include <linux/regulator/of_regulator.h>
27 #include <linux/regulator/driver.h>
28 #include <linux/regulator/machine.h>
29 #include <linux/regulator/ab8500.h>
30 #include <linux/slab.h>
31
32 /**
33  * struct ab8500_regulator_info - ab8500 regulator information
34  * @dev: device pointer
35  * @desc: regulator description
36  * @regulator_dev: regulator device
37  * @is_enabled: status of regulator (on/off)
38  * @load_lp_uA: maximum load in idle (low power) mode
39  * @update_bank: bank to control on/off
40  * @update_reg: register to control on/off
41  * @update_mask: mask to enable/disable and set mode of regulator
42  * @update_val: bits holding the regulator current mode
43  * @update_val_idle: bits to enable the regulator in idle (low power) mode
44  * @update_val_normal: bits to enable the regulator in normal (high power) mode
45  * @voltage_bank: bank to control regulator voltage
46  * @voltage_reg: register to control regulator voltage
47  * @voltage_mask: mask to control regulator voltage
48  * @voltage_shift: shift to control regulator voltage
49  */
50 struct ab8500_regulator_info {
51         struct device           *dev;
52         struct regulator_desc   desc;
53         struct regulator_dev    *regulator;
54         bool is_enabled;
55         int load_lp_uA;
56         u8 update_bank;
57         u8 update_reg;
58         u8 update_mask;
59         u8 update_val;
60         u8 update_val_idle;
61         u8 update_val_normal;
62         u8 voltage_bank;
63         u8 voltage_reg;
64         u8 voltage_mask;
65         u8 voltage_shift;
66 };
67
68 /* voltage tables for the vauxn/vintcore supplies */
69 static const unsigned int ldo_vauxn_voltages[] = {
70         1100000,
71         1200000,
72         1300000,
73         1400000,
74         1500000,
75         1800000,
76         1850000,
77         1900000,
78         2500000,
79         2650000,
80         2700000,
81         2750000,
82         2800000,
83         2900000,
84         3000000,
85         3300000,
86 };
87
88 static const unsigned int ldo_vaux3_voltages[] = {
89         1200000,
90         1500000,
91         1800000,
92         2100000,
93         2500000,
94         2750000,
95         2790000,
96         2910000,
97 };
98
99 static const unsigned int ldo_vaux56_voltages[] = {
100         1800000,
101         1050000,
102         1100000,
103         1200000,
104         1500000,
105         2200000,
106         2500000,
107         2790000,
108 };
109
110 static const unsigned int ldo_vaux3_ab8540_voltages[] = {
111         1200000,
112         1500000,
113         1800000,
114         2100000,
115         2500000,
116         2750000,
117         2790000,
118         2910000,
119         3050000,
120 };
121
122 static const unsigned int ldo_vintcore_voltages[] = {
123         1200000,
124         1225000,
125         1250000,
126         1275000,
127         1300000,
128         1325000,
129         1350000,
130 };
131
132 static const unsigned int ldo_sdio_voltages[] = {
133         1160000,
134         1050000,
135         1100000,
136         1500000,
137         1800000,
138         2200000,
139         2910000,
140         3050000,
141 };
142
143 static const unsigned int fixed_1200000_voltage[] = {
144         1200000,
145 };
146
147 static const unsigned int fixed_1800000_voltage[] = {
148         1800000,
149 };
150
151 static const unsigned int fixed_2000000_voltage[] = {
152         2000000,
153 };
154
155 static const unsigned int fixed_2050000_voltage[] = {
156         2050000,
157 };
158
159 static const unsigned int fixed_3300000_voltage[] = {
160         3300000,
161 };
162
163 static const unsigned int ldo_vana_voltages[] = {
164         1050000,
165         1075000,
166         1100000,
167         1125000,
168         1150000,
169         1175000,
170         1200000,
171         1225000,
172 };
173
174 static const unsigned int ldo_vaudio_voltages[] = {
175         2000000,
176         2100000,
177         2200000,
178         2300000,
179         2400000,
180         2500000,
181         2600000,
182         2600000,        /* Duplicated in Vaudio and IsoUicc Control register. */
183 };
184
185 static int ab8500_regulator_enable(struct regulator_dev *rdev)
186 {
187         int ret;
188         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
189
190         if (info == NULL) {
191                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
192                 return -EINVAL;
193         }
194
195         ret = abx500_mask_and_set_register_interruptible(info->dev,
196                 info->update_bank, info->update_reg,
197                 info->update_mask, info->update_val);
198         if (ret < 0) {
199                 dev_err(rdev_get_dev(rdev),
200                         "couldn't set enable bits for regulator\n");
201                 return ret;
202         }
203
204         info->is_enabled = true;
205
206         dev_vdbg(rdev_get_dev(rdev),
207                 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
208                 info->desc.name, info->update_bank, info->update_reg,
209                 info->update_mask, info->update_val);
210
211         return ret;
212 }
213
214 static int ab8500_regulator_disable(struct regulator_dev *rdev)
215 {
216         int ret;
217         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
218
219         if (info == NULL) {
220                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
221                 return -EINVAL;
222         }
223
224         ret = abx500_mask_and_set_register_interruptible(info->dev,
225                 info->update_bank, info->update_reg,
226                 info->update_mask, 0x0);
227         if (ret < 0) {
228                 dev_err(rdev_get_dev(rdev),
229                         "couldn't set disable bits for regulator\n");
230                 return ret;
231         }
232
233         info->is_enabled = false;
234
235         dev_vdbg(rdev_get_dev(rdev),
236                 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
237                 info->desc.name, info->update_bank, info->update_reg,
238                 info->update_mask, 0x0);
239
240         return ret;
241 }
242
243 static unsigned int ab8500_regulator_get_optimum_mode(
244                 struct regulator_dev *rdev, int input_uV,
245                 int output_uV, int load_uA)
246 {
247         unsigned int mode;
248
249         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
250
251         if (info == NULL) {
252                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
253                 return -EINVAL;
254         }
255
256         if (load_uA <= info->load_lp_uA)
257                 mode = REGULATOR_MODE_IDLE;
258         else
259                 mode = REGULATOR_MODE_NORMAL;
260
261         return mode;
262 }
263
264 static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
265                                      unsigned int mode)
266 {
267         int ret;
268         u8 update_val;
269         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
270
271         if (info == NULL) {
272                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
273                 return -EINVAL;
274         }
275
276         switch (mode) {
277         case REGULATOR_MODE_NORMAL:
278                 update_val = info->update_val_normal;
279                 break;
280         case REGULATOR_MODE_IDLE:
281                 update_val = info->update_val_idle;
282                 break;
283         default:
284                 return -EINVAL;
285         }
286
287         /* ab8500 regulators share mode and enable in the same register bits.
288            off = 0b00
289            low power mode= 0b11
290            full powermode = 0b01
291            (HW control mode = 0b10)
292            Thus we don't write to the register when regulator is disabled.
293         */
294         if (info->is_enabled) {
295                 ret = abx500_mask_and_set_register_interruptible(info->dev,
296                         info->update_bank, info->update_reg,
297                         info->update_mask, update_val);
298                 if (ret < 0) {
299                         dev_err(rdev_get_dev(rdev),
300                                 "couldn't set regulator mode\n");
301                         return ret;
302                 }
303
304                 dev_vdbg(rdev_get_dev(rdev),
305                         "%s-set_mode (bank, reg, mask, value): "
306                         "0x%x, 0x%x, 0x%x, 0x%x\n",
307                         info->desc.name, info->update_bank, info->update_reg,
308                         info->update_mask, update_val);
309         }
310
311         info->update_val = update_val;
312
313         return 0;
314 }
315
316 static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
317 {
318         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
319         int ret;
320
321         if (info == NULL) {
322                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
323                 return -EINVAL;
324         }
325
326         if (info->update_val == info->update_val_normal)
327                 ret = REGULATOR_MODE_NORMAL;
328         else if (info->update_val == info->update_val_idle)
329                 ret = REGULATOR_MODE_IDLE;
330         else
331                 ret = -EINVAL;
332
333         return ret;
334 }
335
336 static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
337 {
338         int ret;
339         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
340         u8 regval;
341
342         if (info == NULL) {
343                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
344                 return -EINVAL;
345         }
346
347         ret = abx500_get_register_interruptible(info->dev,
348                 info->update_bank, info->update_reg, &regval);
349         if (ret < 0) {
350                 dev_err(rdev_get_dev(rdev),
351                         "couldn't read 0x%x register\n", info->update_reg);
352                 return ret;
353         }
354
355         dev_vdbg(rdev_get_dev(rdev),
356                 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
357                 " 0x%x\n",
358                 info->desc.name, info->update_bank, info->update_reg,
359                 info->update_mask, regval);
360
361         if (regval & info->update_mask)
362                 info->is_enabled = true;
363         else
364                 info->is_enabled = false;
365
366         return info->is_enabled;
367 }
368
369 static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
370 {
371         int ret, val;
372         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
373         u8 regval;
374
375         if (info == NULL) {
376                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
377                 return -EINVAL;
378         }
379
380         ret = abx500_get_register_interruptible(info->dev,
381                         info->voltage_bank, info->voltage_reg, &regval);
382         if (ret < 0) {
383                 dev_err(rdev_get_dev(rdev),
384                         "couldn't read voltage reg for regulator\n");
385                 return ret;
386         }
387
388         dev_vdbg(rdev_get_dev(rdev),
389                 "%s-get_voltage (bank, reg, mask, shift, value): "
390                 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
391                 info->desc.name, info->voltage_bank,
392                 info->voltage_reg, info->voltage_mask,
393                 info->voltage_shift, regval);
394
395         val = regval & info->voltage_mask;
396         return val >> info->voltage_shift;
397 }
398
399 static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
400                                             unsigned selector)
401 {
402         int ret;
403         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
404         u8 regval;
405
406         if (info == NULL) {
407                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
408                 return -EINVAL;
409         }
410
411         /* set the registers for the request */
412         regval = (u8)selector << info->voltage_shift;
413         ret = abx500_mask_and_set_register_interruptible(info->dev,
414                         info->voltage_bank, info->voltage_reg,
415                         info->voltage_mask, regval);
416         if (ret < 0)
417                 dev_err(rdev_get_dev(rdev),
418                 "couldn't set voltage reg for regulator\n");
419
420         dev_vdbg(rdev_get_dev(rdev),
421                 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
422                 " 0x%x\n",
423                 info->desc.name, info->voltage_bank, info->voltage_reg,
424                 info->voltage_mask, regval);
425
426         return ret;
427 }
428
429 static struct regulator_ops ab8500_regulator_volt_mode_ops = {
430         .enable                 = ab8500_regulator_enable,
431         .disable                = ab8500_regulator_disable,
432         .is_enabled             = ab8500_regulator_is_enabled,
433         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
434         .set_mode               = ab8500_regulator_set_mode,
435         .get_mode               = ab8500_regulator_get_mode,
436         .get_voltage_sel        = ab8500_regulator_get_voltage_sel,
437         .set_voltage_sel        = ab8500_regulator_set_voltage_sel,
438         .list_voltage           = regulator_list_voltage_table,
439 };
440
441 static struct regulator_ops ab8500_regulator_volt_ops = {
442         .enable         = ab8500_regulator_enable,
443         .disable        = ab8500_regulator_disable,
444         .is_enabled     = ab8500_regulator_is_enabled,
445         .get_voltage_sel = ab8500_regulator_get_voltage_sel,
446         .set_voltage_sel = ab8500_regulator_set_voltage_sel,
447         .list_voltage   = regulator_list_voltage_table,
448         .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
449 };
450
451 static struct regulator_ops ab8500_regulator_mode_ops = {
452         .enable                 = ab8500_regulator_enable,
453         .disable                = ab8500_regulator_disable,
454         .is_enabled             = ab8500_regulator_is_enabled,
455         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
456         .set_mode               = ab8500_regulator_set_mode,
457         .get_mode               = ab8500_regulator_get_mode,
458         .list_voltage           = regulator_list_voltage_linear,
459 };
460
461 static struct regulator_ops ab8500_regulator_ops = {
462         .enable                 = ab8500_regulator_enable,
463         .disable                = ab8500_regulator_disable,
464         .is_enabled             = ab8500_regulator_is_enabled,
465         .list_voltage           = regulator_list_voltage_linear,
466 };
467
468 /* AB8500 regulator information */
469 static struct ab8500_regulator_info
470                 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
471         /*
472          * Variable Voltage Regulators
473          *   name, min mV, max mV,
474          *   update bank, reg, mask, enable val
475          *   volt bank, reg, mask
476          */
477         [AB8500_LDO_AUX1] = {
478                 .desc = {
479                         .name           = "LDO-AUX1",
480                         .ops            = &ab8500_regulator_volt_mode_ops,
481                         .type           = REGULATOR_VOLTAGE,
482                         .id             = AB8500_LDO_AUX1,
483                         .owner          = THIS_MODULE,
484                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
485                         .volt_table     = ldo_vauxn_voltages,
486                         .enable_time    = 200,
487                 },
488                 .load_lp_uA             = 5000,
489                 .update_bank            = 0x04,
490                 .update_reg             = 0x09,
491                 .update_mask            = 0x03,
492                 .update_val             = 0x01,
493                 .update_val_idle        = 0x03,
494                 .update_val_normal      = 0x01,
495                 .voltage_bank           = 0x04,
496                 .voltage_reg            = 0x1f,
497                 .voltage_mask           = 0x0f,
498         },
499         [AB8500_LDO_AUX2] = {
500                 .desc = {
501                         .name           = "LDO-AUX2",
502                         .ops            = &ab8500_regulator_volt_mode_ops,
503                         .type           = REGULATOR_VOLTAGE,
504                         .id             = AB8500_LDO_AUX2,
505                         .owner          = THIS_MODULE,
506                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
507                         .volt_table     = ldo_vauxn_voltages,
508                         .enable_time    = 200,
509                 },
510                 .load_lp_uA             = 5000,
511                 .update_bank            = 0x04,
512                 .update_reg             = 0x09,
513                 .update_mask            = 0x0c,
514                 .update_val             = 0x04,
515                 .update_val_idle        = 0x0c,
516                 .update_val_normal      = 0x04,
517                 .voltage_bank           = 0x04,
518                 .voltage_reg            = 0x20,
519                 .voltage_mask           = 0x0f,
520         },
521         [AB8500_LDO_AUX3] = {
522                 .desc = {
523                         .name           = "LDO-AUX3",
524                         .ops            = &ab8500_regulator_volt_mode_ops,
525                         .type           = REGULATOR_VOLTAGE,
526                         .id             = AB8500_LDO_AUX3,
527                         .owner          = THIS_MODULE,
528                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
529                         .volt_table     = ldo_vaux3_voltages,
530                         .enable_time    = 450,
531                 },
532                 .load_lp_uA             = 5000,
533                 .update_bank            = 0x04,
534                 .update_reg             = 0x0a,
535                 .update_mask            = 0x03,
536                 .update_val             = 0x01,
537                 .update_val_idle        = 0x03,
538                 .update_val_normal      = 0x01,
539                 .voltage_bank           = 0x04,
540                 .voltage_reg            = 0x21,
541                 .voltage_mask           = 0x07,
542         },
543         [AB8500_LDO_INTCORE] = {
544                 .desc = {
545                         .name           = "LDO-INTCORE",
546                         .ops            = &ab8500_regulator_volt_mode_ops,
547                         .type           = REGULATOR_VOLTAGE,
548                         .id             = AB8500_LDO_INTCORE,
549                         .owner          = THIS_MODULE,
550                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
551                         .volt_table     = ldo_vintcore_voltages,
552                         .enable_time    = 750,
553                 },
554                 .load_lp_uA             = 5000,
555                 .update_bank            = 0x03,
556                 .update_reg             = 0x80,
557                 .update_mask            = 0x44,
558                 .update_val             = 0x44,
559                 .update_val_idle        = 0x44,
560                 .update_val_normal      = 0x04,
561                 .voltage_bank           = 0x03,
562                 .voltage_reg            = 0x80,
563                 .voltage_mask           = 0x38,
564                 .voltage_shift          = 3,
565         },
566
567         /*
568          * Fixed Voltage Regulators
569          *   name, fixed mV,
570          *   update bank, reg, mask, enable val
571          */
572         [AB8500_LDO_TVOUT] = {
573                 .desc = {
574                         .name           = "LDO-TVOUT",
575                         .ops            = &ab8500_regulator_mode_ops,
576                         .type           = REGULATOR_VOLTAGE,
577                         .id             = AB8500_LDO_TVOUT,
578                         .owner          = THIS_MODULE,
579                         .n_voltages     = 1,
580                         .volt_table     = fixed_2000000_voltage,
581                         .enable_time    = 500,
582                 },
583                 .load_lp_uA             = 1000,
584                 .update_bank            = 0x03,
585                 .update_reg             = 0x80,
586                 .update_mask            = 0x82,
587                 .update_val             = 0x02,
588                 .update_val_idle        = 0x82,
589                 .update_val_normal      = 0x02,
590         },
591         [AB8500_LDO_AUDIO] = {
592                 .desc = {
593                         .name           = "LDO-AUDIO",
594                         .ops            = &ab8500_regulator_ops,
595                         .type           = REGULATOR_VOLTAGE,
596                         .id             = AB8500_LDO_AUDIO,
597                         .owner          = THIS_MODULE,
598                         .n_voltages     = 1,
599                         .enable_time    = 140,
600                         .volt_table     = fixed_2000000_voltage,
601                 },
602                 .update_bank            = 0x03,
603                 .update_reg             = 0x83,
604                 .update_mask            = 0x02,
605                 .update_val             = 0x02,
606         },
607         [AB8500_LDO_ANAMIC1] = {
608                 .desc = {
609                         .name           = "LDO-ANAMIC1",
610                         .ops            = &ab8500_regulator_ops,
611                         .type           = REGULATOR_VOLTAGE,
612                         .id             = AB8500_LDO_ANAMIC1,
613                         .owner          = THIS_MODULE,
614                         .n_voltages     = 1,
615                         .enable_time    = 500,
616                         .volt_table     = fixed_2050000_voltage,
617                 },
618                 .update_bank            = 0x03,
619                 .update_reg             = 0x83,
620                 .update_mask            = 0x08,
621                 .update_val             = 0x08,
622         },
623         [AB8500_LDO_ANAMIC2] = {
624                 .desc = {
625                         .name           = "LDO-ANAMIC2",
626                         .ops            = &ab8500_regulator_ops,
627                         .type           = REGULATOR_VOLTAGE,
628                         .id             = AB8500_LDO_ANAMIC2,
629                         .owner          = THIS_MODULE,
630                         .n_voltages     = 1,
631                         .enable_time    = 500,
632                         .volt_table     = fixed_2050000_voltage,
633                 },
634                 .update_bank            = 0x03,
635                 .update_reg             = 0x83,
636                 .update_mask            = 0x10,
637                 .update_val             = 0x10,
638         },
639         [AB8500_LDO_DMIC] = {
640                 .desc = {
641                         .name           = "LDO-DMIC",
642                         .ops            = &ab8500_regulator_ops,
643                         .type           = REGULATOR_VOLTAGE,
644                         .id             = AB8500_LDO_DMIC,
645                         .owner          = THIS_MODULE,
646                         .n_voltages     = 1,
647                         .enable_time    = 420,
648                         .volt_table     = fixed_1800000_voltage,
649                 },
650                 .update_bank            = 0x03,
651                 .update_reg             = 0x83,
652                 .update_mask            = 0x04,
653                 .update_val             = 0x04,
654         },
655
656         /*
657          * Regulators with fixed voltage and normal/idle modes
658          */
659         [AB8500_LDO_ANA] = {
660                 .desc = {
661                         .name           = "LDO-ANA",
662                         .ops            = &ab8500_regulator_mode_ops,
663                         .type           = REGULATOR_VOLTAGE,
664                         .id             = AB8500_LDO_ANA,
665                         .owner          = THIS_MODULE,
666                         .n_voltages     = 1,
667                         .enable_time    = 140,
668                         .volt_table     = fixed_1200000_voltage,
669                 },
670                 .load_lp_uA             = 1000,
671                 .update_bank            = 0x04,
672                 .update_reg             = 0x06,
673                 .update_mask            = 0x0c,
674                 .update_val             = 0x04,
675                 .update_val_idle        = 0x0c,
676                 .update_val_normal      = 0x04,
677         },
678 };
679
680 /* AB8505 regulator information */
681 static struct ab8500_regulator_info
682                 ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
683         /*
684          * Variable Voltage Regulators
685          *   name, min mV, max mV,
686          *   update bank, reg, mask, enable val
687          *   volt bank, reg, mask, table, table length
688          */
689         [AB8505_LDO_AUX1] = {
690                 .desc = {
691                         .name           = "LDO-AUX1",
692                         .ops            = &ab8500_regulator_volt_mode_ops,
693                         .type           = REGULATOR_VOLTAGE,
694                         .id             = AB8505_LDO_AUX1,
695                         .owner          = THIS_MODULE,
696                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
697                         .volt_table     = ldo_vauxn_voltages,
698                 },
699                 .load_lp_uA             = 5000,
700                 .update_bank            = 0x04,
701                 .update_reg             = 0x09,
702                 .update_mask            = 0x03,
703                 .update_val             = 0x01,
704                 .update_val_idle        = 0x03,
705                 .update_val_normal      = 0x01,
706                 .voltage_bank           = 0x04,
707                 .voltage_reg            = 0x1f,
708                 .voltage_mask           = 0x0f,
709         },
710         [AB8505_LDO_AUX2] = {
711                 .desc = {
712                         .name           = "LDO-AUX2",
713                         .ops            = &ab8500_regulator_volt_mode_ops,
714                         .type           = REGULATOR_VOLTAGE,
715                         .id             = AB8505_LDO_AUX2,
716                         .owner          = THIS_MODULE,
717                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
718                         .volt_table     = ldo_vauxn_voltages,
719                 },
720                 .load_lp_uA             = 5000,
721                 .update_bank            = 0x04,
722                 .update_reg             = 0x09,
723                 .update_mask            = 0x0c,
724                 .update_val             = 0x04,
725                 .update_val_idle        = 0x0c,
726                 .update_val_normal      = 0x04,
727                 .voltage_bank           = 0x04,
728                 .voltage_reg            = 0x20,
729                 .voltage_mask           = 0x0f,
730         },
731         [AB8505_LDO_AUX3] = {
732                 .desc = {
733                         .name           = "LDO-AUX3",
734                         .ops            = &ab8500_regulator_volt_mode_ops,
735                         .type           = REGULATOR_VOLTAGE,
736                         .id             = AB8505_LDO_AUX3,
737                         .owner          = THIS_MODULE,
738                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
739                         .volt_table     = ldo_vaux3_voltages,
740                 },
741                 .load_lp_uA             = 5000,
742                 .update_bank            = 0x04,
743                 .update_reg             = 0x0a,
744                 .update_mask            = 0x03,
745                 .update_val             = 0x01,
746                 .update_val_idle        = 0x03,
747                 .update_val_normal      = 0x01,
748                 .voltage_bank           = 0x04,
749                 .voltage_reg            = 0x21,
750                 .voltage_mask           = 0x07,
751         },
752         [AB8505_LDO_AUX4] = {
753                 .desc = {
754                         .name           = "LDO-AUX4",
755                         .ops            = &ab8500_regulator_volt_mode_ops,
756                         .type           = REGULATOR_VOLTAGE,
757                         .id             = AB8505_LDO_AUX4,
758                         .owner          = THIS_MODULE,
759                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
760                         .volt_table     = ldo_vauxn_voltages,
761                 },
762                 .load_lp_uA             = 5000,
763                 /* values for Vaux4Regu register */
764                 .update_bank            = 0x04,
765                 .update_reg             = 0x2e,
766                 .update_mask            = 0x03,
767                 .update_val             = 0x01,
768                 .update_val_idle        = 0x03,
769                 .update_val_normal      = 0x01,
770                 /* values for Vaux4SEL register */
771                 .voltage_bank           = 0x04,
772                 .voltage_reg            = 0x2f,
773                 .voltage_mask           = 0x0f,
774         },
775         [AB8505_LDO_AUX5] = {
776                 .desc = {
777                         .name           = "LDO-AUX5",
778                         .ops            = &ab8500_regulator_volt_mode_ops,
779                         .type           = REGULATOR_VOLTAGE,
780                         .id             = AB8505_LDO_AUX5,
781                         .owner          = THIS_MODULE,
782                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
783                         .volt_table     = ldo_vaux56_voltages,
784                 },
785                 .load_lp_uA             = 2000,
786                 /* values for CtrlVaux5 register */
787                 .update_bank            = 0x01,
788                 .update_reg             = 0x55,
789                 .update_mask            = 0x18,
790                 .update_val             = 0x10,
791                 .update_val_idle        = 0x18,
792                 .update_val_normal      = 0x10,
793                 .voltage_bank           = 0x01,
794                 .voltage_reg            = 0x55,
795                 .voltage_mask           = 0x07,
796         },
797         [AB8505_LDO_AUX6] = {
798                 .desc = {
799                         .name           = "LDO-AUX6",
800                         .ops            = &ab8500_regulator_volt_mode_ops,
801                         .type           = REGULATOR_VOLTAGE,
802                         .id             = AB8505_LDO_AUX6,
803                         .owner          = THIS_MODULE,
804                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
805                         .volt_table     = ldo_vaux56_voltages,
806                 },
807                 .load_lp_uA             = 2000,
808                 /* values for CtrlVaux6 register */
809                 .update_bank            = 0x01,
810                 .update_reg             = 0x56,
811                 .update_mask            = 0x18,
812                 .update_val             = 0x10,
813                 .update_val_idle        = 0x18,
814                 .update_val_normal      = 0x10,
815                 .voltage_bank           = 0x01,
816                 .voltage_reg            = 0x56,
817                 .voltage_mask           = 0x07,
818         },
819         [AB8505_LDO_INTCORE] = {
820                 .desc = {
821                         .name           = "LDO-INTCORE",
822                         .ops            = &ab8500_regulator_volt_mode_ops,
823                         .type           = REGULATOR_VOLTAGE,
824                         .id             = AB8505_LDO_INTCORE,
825                         .owner          = THIS_MODULE,
826                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
827                         .volt_table     = ldo_vintcore_voltages,
828                 },
829                 .load_lp_uA             = 5000,
830                 .update_bank            = 0x03,
831                 .update_reg             = 0x80,
832                 .update_mask            = 0x44,
833                 .update_val             = 0x04,
834                 .update_val_idle        = 0x44,
835                 .update_val_normal      = 0x04,
836                 .voltage_bank           = 0x03,
837                 .voltage_reg            = 0x80,
838                 .voltage_mask           = 0x38,
839                 .voltage_shift          = 3,
840         },
841
842         /*
843          * Fixed Voltage Regulators
844          *   name, fixed mV,
845          *   update bank, reg, mask, enable val
846          */
847         [AB8505_LDO_ADC] = {
848                 .desc = {
849                         .name           = "LDO-ADC",
850                         .ops            = &ab8500_regulator_mode_ops,
851                         .type           = REGULATOR_VOLTAGE,
852                         .id             = AB8505_LDO_ADC,
853                         .owner          = THIS_MODULE,
854                         .n_voltages     = 1,
855                         .volt_table     = fixed_2000000_voltage,
856                 },
857                 .delay                  = 10000,
858                 .load_lp_uA             = 1000,
859                 .update_bank            = 0x03,
860                 .update_reg             = 0x80,
861                 .update_mask            = 0x82,
862                 .update_val             = 0x02,
863                 .update_val_idle        = 0x82,
864                 .update_val_normal      = 0x02,
865         },
866         [AB8505_LDO_USB] = {
867                 .desc = {
868                         .name           = "LDO-USB",
869                         .ops            = &ab8500_regulator_mode_ops,
870                         .type           = REGULATOR_VOLTAGE,
871                         .id             = AB8505_LDO_USB,
872                         .owner          = THIS_MODULE,
873                         .n_voltages     = 1,
874                         .volt_table     = fixed_3300000_voltage,
875                 },
876                 .update_bank            = 0x03,
877                 .update_reg             = 0x82,
878                 .update_mask            = 0x03,
879                 .update_val             = 0x01,
880                 .update_val_idle        = 0x03,
881                 .update_val_normal      = 0x01,
882         },
883         [AB8505_LDO_AUDIO] = {
884                 .desc = {
885                         .name           = "LDO-AUDIO",
886                         .ops            = &ab8500_regulator_volt_ops,
887                         .type           = REGULATOR_VOLTAGE,
888                         .id             = AB8505_LDO_AUDIO,
889                         .owner          = THIS_MODULE,
890                         .n_voltages     = ARRAY_SIZE(ldo_vaudio_voltages),
891                         .volt_table     = ldo_vaudio_voltages,
892                 },
893                 .update_bank            = 0x03,
894                 .update_reg             = 0x83,
895                 .update_mask            = 0x02,
896                 .update_val             = 0x02,
897                 .voltage_bank           = 0x01,
898                 .voltage_reg            = 0x57,
899                 .voltage_mask           = 0x7,
900                 .voltage_shift          = 4,
901                 .voltages               = ldo_vaudio_voltages,
902                 .voltages_len           = ARRAY_SIZE(ldo_vaudio_voltages),
903         },
904         [AB8505_LDO_ANAMIC1] = {
905                 .desc = {
906                         .name           = "LDO-ANAMIC1",
907                         .ops            = &ab8500_regulator_ops,
908                         .type           = REGULATOR_VOLTAGE,
909                         .id             = AB8505_LDO_ANAMIC1,
910                         .owner          = THIS_MODULE,
911                         .n_voltages     = 1,
912                         .volt_table     = fixed_2050000_voltage,
913                 },
914                 .update_bank            = 0x03,
915                 .update_reg             = 0x83,
916                 .update_mask            = 0x08,
917                 .update_val             = 0x08,
918         },
919         [AB8505_LDO_ANAMIC2] = {
920                 .desc = {
921                         .name           = "LDO-ANAMIC2",
922                         .ops            = &ab8500_regulator_ops,
923                         .type           = REGULATOR_VOLTAGE,
924                         .id             = AB8505_LDO_ANAMIC2,
925                         .owner          = THIS_MODULE,
926                         .n_voltages     = 1,
927                         .volt_table     = fixed_2050000_voltage,
928                 },
929                 .update_bank            = 0x03,
930                 .update_reg             = 0x83,
931                 .update_mask            = 0x10,
932                 .update_val             = 0x10,
933         },
934         [AB8505_LDO_AUX8] = {
935                 .desc = {
936                         .name           = "LDO-AUX8",
937                         .ops            = &ab8500_regulator_ops,
938                         .type           = REGULATOR_VOLTAGE,
939                         .id             = AB8505_LDO_AUX8,
940                         .owner          = THIS_MODULE,
941                         .n_voltages     = 1,
942                         .volt_table     = fixed_1800000_voltage,
943                 },
944                 .update_bank            = 0x03,
945                 .update_reg             = 0x83,
946                 .update_mask            = 0x04,
947                 .update_val             = 0x04,
948         },
949         /*
950          * Regulators with fixed voltage and normal/idle modes
951          */
952         [AB8505_LDO_ANA] = {
953                 .desc = {
954                         .name           = "LDO-ANA",
955                         .ops            = &ab8500_regulator_volt_mode_ops,
956                         .type           = REGULATOR_VOLTAGE,
957                         .id             = AB8505_LDO_ANA,
958                         .owner          = THIS_MODULE,
959                         .n_voltages     = ARRAY_SIZE(ldo_vana_voltages),
960                         .volt_table     = ldo_vana_voltages,
961                 },
962                 .load_lp_uA             = 1000,
963                 .update_bank            = 0x04,
964                 .update_reg             = 0x06,
965                 .update_mask            = 0x0c,
966                 .update_val             = 0x04,
967                 .update_val_idle        = 0x0c,
968                 .update_val_normal      = 0x04,
969                 .voltage_bank           = 0x04,
970                 .voltage_reg            = 0x29,
971                 .voltage_mask           = 0x7,
972                 .voltages               = ldo_vana_voltages,
973                 .voltages_len           = ARRAY_SIZE(ldo_vana_voltages),
974         },
975 };
976
977 /* AB9540 regulator information */
978 static struct ab8500_regulator_info
979                 ab9540_regulator_info[AB9540_NUM_REGULATORS] = {
980         /*
981          * Variable Voltage Regulators
982          *   name, min mV, max mV,
983          *   update bank, reg, mask, enable val
984          *   volt bank, reg, mask, table, table length
985          */
986         [AB9540_LDO_AUX1] = {
987                 .desc = {
988                         .name           = "LDO-AUX1",
989                         .ops            = &ab8500_regulator_volt_mode_ops,
990                         .type           = REGULATOR_VOLTAGE,
991                         .id             = AB9540_LDO_AUX1,
992                         .owner          = THIS_MODULE,
993                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
994                         .volt_table     = ldo_vauxn_voltages,
995                 },
996                 .load_lp_uA             = 5000,
997                 .update_bank            = 0x04,
998                 .update_reg             = 0x09,
999                 .update_mask            = 0x03,
1000                 .update_val             = 0x01,
1001                 .update_val_idle        = 0x03,
1002                 .update_val_normal      = 0x01,
1003                 .voltage_bank           = 0x04,
1004                 .voltage_reg            = 0x1f,
1005                 .voltage_mask           = 0x0f,
1006         },
1007         [AB9540_LDO_AUX2] = {
1008                 .desc = {
1009                         .name           = "LDO-AUX2",
1010                         .ops            = &ab8500_regulator_volt_mode_ops,
1011                         .type           = REGULATOR_VOLTAGE,
1012                         .id             = AB9540_LDO_AUX2,
1013                         .owner          = THIS_MODULE,
1014                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1015                         .volt_table     = ldo_vauxn_voltages,
1016                 },
1017                 .load_lp_uA             = 5000,
1018                 .update_bank            = 0x04,
1019                 .update_reg             = 0x09,
1020                 .update_mask            = 0x0c,
1021                 .update_val             = 0x04,
1022                 .update_val_idle        = 0x0c,
1023                 .update_val_normal      = 0x04,
1024                 .voltage_bank           = 0x04,
1025                 .voltage_reg            = 0x20,
1026                 .voltage_mask           = 0x0f,
1027         },
1028         [AB9540_LDO_AUX3] = {
1029                 .desc = {
1030                         .name           = "LDO-AUX3",
1031                         .ops            = &ab8500_regulator_volt_mode_ops,
1032                         .type           = REGULATOR_VOLTAGE,
1033                         .id             = AB9540_LDO_AUX3,
1034                         .owner          = THIS_MODULE,
1035                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
1036                         .volt_table     = ldo_vaux3_voltages,
1037                 },
1038                 .load_lp_uA             = 5000,
1039                 .update_bank            = 0x04,
1040                 .update_reg             = 0x0a,
1041                 .update_mask            = 0x03,
1042                 .update_val             = 0x01,
1043                 .update_val_idle        = 0x03,
1044                 .update_val_normal      = 0x01,
1045                 .voltage_bank           = 0x04,
1046                 .voltage_reg            = 0x21,
1047                 .voltage_mask           = 0x07,
1048         },
1049         [AB9540_LDO_AUX4] = {
1050                 .desc = {
1051                         .name           = "LDO-AUX4",
1052                         .ops            = &ab8500_regulator_volt_mode_ops,
1053                         .type           = REGULATOR_VOLTAGE,
1054                         .id             = AB9540_LDO_AUX4,
1055                         .owner          = THIS_MODULE,
1056                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1057                         .volt_table     = ldo_vauxn_voltages,
1058                 },
1059                 .load_lp_uA             = 5000,
1060                 /* values for Vaux4Regu register */
1061                 .update_bank            = 0x04,
1062                 .update_reg             = 0x2e,
1063                 .update_mask            = 0x03,
1064                 .update_val             = 0x01,
1065                 .update_val_idle        = 0x03,
1066                 .update_val_normal      = 0x01,
1067                 /* values for Vaux4SEL register */
1068                 .voltage_bank           = 0x04,
1069                 .voltage_reg            = 0x2f,
1070                 .voltage_mask           = 0x0f,
1071         },
1072         [AB9540_LDO_INTCORE] = {
1073                 .desc = {
1074                         .name           = "LDO-INTCORE",
1075                         .ops            = &ab8500_regulator_volt_mode_ops,
1076                         .type           = REGULATOR_VOLTAGE,
1077                         .id             = AB9540_LDO_INTCORE,
1078                         .owner          = THIS_MODULE,
1079                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1080                         .volt_table     = ldo_vintcore_voltages,
1081                 },
1082                 .load_lp_uA             = 5000,
1083                 .update_bank            = 0x03,
1084                 .update_reg             = 0x80,
1085                 .update_mask            = 0x44,
1086                 .update_val             = 0x44,
1087                 .update_val_idle        = 0x44,
1088                 .update_val_normal      = 0x04,
1089                 .voltage_bank           = 0x03,
1090                 .voltage_reg            = 0x80,
1091                 .voltage_mask           = 0x38,
1092                 .voltage_shift          = 3,
1093         },
1094
1095         /*
1096          * Fixed Voltage Regulators
1097          *   name, fixed mV,
1098          *   update bank, reg, mask, enable val
1099          */
1100         [AB9540_LDO_TVOUT] = {
1101                 .desc = {
1102                         .name           = "LDO-TVOUT",
1103                         .ops            = &ab8500_regulator_mode_ops,
1104                         .type           = REGULATOR_VOLTAGE,
1105                         .id             = AB9540_LDO_TVOUT,
1106                         .owner          = THIS_MODULE,
1107                         .n_voltages     = 1,
1108                         .volt_table     = fixed_2000000_voltage,
1109                 },
1110                 .delay                  = 10000,
1111                 .load_lp_uA             = 1000,
1112                 .update_bank            = 0x03,
1113                 .update_reg             = 0x80,
1114                 .update_mask            = 0x82,
1115                 .update_val             = 0x02,
1116                 .update_val_idle        = 0x82,
1117                 .update_val_normal      = 0x02,
1118         },
1119         [AB9540_LDO_USB] = {
1120                 .desc = {
1121                         .name           = "LDO-USB",
1122                         .ops            = &ab8500_regulator_ops,
1123                         .type           = REGULATOR_VOLTAGE,
1124                         .id             = AB9540_LDO_USB,
1125                         .owner          = THIS_MODULE,
1126                         .n_voltages     = 1,
1127                         .volt_table     = fixed_3300000_voltage,
1128                 },
1129                 .update_bank            = 0x03,
1130                 .update_reg             = 0x82,
1131                 .update_mask            = 0x03,
1132                 .update_val             = 0x01,
1133                 .update_val_idle        = 0x03,
1134                 .update_val_normal      = 0x01,
1135         },
1136         [AB9540_LDO_AUDIO] = {
1137                 .desc = {
1138                         .name           = "LDO-AUDIO",
1139                         .ops            = &ab8500_regulator_ops,
1140                         .type           = REGULATOR_VOLTAGE,
1141                         .id             = AB9540_LDO_AUDIO,
1142                         .owner          = THIS_MODULE,
1143                         .n_voltages     = 1,
1144                         .volt_table     = fixed_2000000_voltage,
1145                 },
1146                 .update_bank            = 0x03,
1147                 .update_reg             = 0x83,
1148                 .update_mask            = 0x02,
1149                 .update_val             = 0x02,
1150         },
1151         [AB9540_LDO_ANAMIC1] = {
1152                 .desc = {
1153                         .name           = "LDO-ANAMIC1",
1154                         .ops            = &ab8500_regulator_ops,
1155                         .type           = REGULATOR_VOLTAGE,
1156                         .id             = AB9540_LDO_ANAMIC1,
1157                         .owner          = THIS_MODULE,
1158                         .n_voltages     = 1,
1159                         .volt_table     = fixed_2050000_voltage,
1160                 },
1161                 .update_bank            = 0x03,
1162                 .update_reg             = 0x83,
1163                 .update_mask            = 0x08,
1164                 .update_val             = 0x08,
1165         },
1166         [AB9540_LDO_ANAMIC2] = {
1167                 .desc = {
1168                         .name           = "LDO-ANAMIC2",
1169                         .ops            = &ab8500_regulator_ops,
1170                         .type           = REGULATOR_VOLTAGE,
1171                         .id             = AB9540_LDO_ANAMIC2,
1172                         .owner          = THIS_MODULE,
1173                         .n_voltages     = 1,
1174                         .volt_table     = fixed_2050000_voltage,
1175                 },
1176                 .update_bank            = 0x03,
1177                 .update_reg             = 0x83,
1178                 .update_mask            = 0x10,
1179                 .update_val             = 0x10,
1180         },
1181         [AB9540_LDO_DMIC] = {
1182                 .desc = {
1183                         .name           = "LDO-DMIC",
1184                         .ops            = &ab8500_regulator_ops,
1185                         .type           = REGULATOR_VOLTAGE,
1186                         .id             = AB9540_LDO_DMIC,
1187                         .owner          = THIS_MODULE,
1188                         .n_voltages     = 1,
1189                         .volt_table     = fixed_1800000_voltage,
1190                 },
1191                 .update_bank            = 0x03,
1192                 .update_reg             = 0x83,
1193                 .update_mask            = 0x04,
1194                 .update_val             = 0x04,
1195         },
1196
1197         /*
1198          * Regulators with fixed voltage and normal/idle modes
1199          */
1200         [AB9540_LDO_ANA] = {
1201                 .desc = {
1202                         .name           = "LDO-ANA",
1203                         .ops            = &ab8500_regulator_mode_ops,
1204                         .type           = REGULATOR_VOLTAGE,
1205                         .id             = AB9540_LDO_ANA,
1206                         .owner          = THIS_MODULE,
1207                         .n_voltages     = 1,
1208                         .volt_table     = fixed_1200000_voltage,
1209                 },
1210                 .load_lp_uA             = 1000,
1211                 .update_bank            = 0x04,
1212                 .update_reg             = 0x06,
1213                 .update_mask            = 0x0c,
1214                 .update_val             = 0x08,
1215                 .update_val_idle        = 0x0c,
1216                 .update_val_normal      = 0x08,
1217         },
1218 };
1219
1220 /* AB8540 regulator information */
1221 static struct ab8500_regulator_info
1222                 ab8540_regulator_info[AB8540_NUM_REGULATORS] = {
1223         /*
1224          * Variable Voltage Regulators
1225          *   name, min mV, max mV,
1226          *   update bank, reg, mask, enable val
1227          *   volt bank, reg, mask, table, table length
1228          */
1229         [AB8540_LDO_AUX1] = {
1230                 .desc = {
1231                         .name           = "LDO-AUX1",
1232                         .ops            = &ab8500_regulator_volt_mode_ops,
1233                         .type           = REGULATOR_VOLTAGE,
1234                         .id             = AB8540_LDO_AUX1,
1235                         .owner          = THIS_MODULE,
1236                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1237                         .volt_table     = ldo_vauxn_voltages,
1238                 },
1239                 .load_lp_uA             = 5000,
1240                 .update_bank            = 0x04,
1241                 .update_reg             = 0x09,
1242                 .update_mask            = 0x03,
1243                 .update_val             = 0x01,
1244                 .update_val_idle        = 0x03,
1245                 .update_val_normal      = 0x01,
1246                 .voltage_bank           = 0x04,
1247                 .voltage_reg            = 0x1f,
1248                 .voltage_mask           = 0x0f,
1249         },
1250         [AB8540_LDO_AUX2] = {
1251                 .desc = {
1252                         .name           = "LDO-AUX2",
1253                         .ops            = &ab8500_regulator_volt_mode_ops,
1254                         .type           = REGULATOR_VOLTAGE,
1255                         .id             = AB8540_LDO_AUX2,
1256                         .owner          = THIS_MODULE,
1257                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1258                         .volt_table     = ldo_vauxn_voltages,
1259                 },
1260                 .load_lp_uA             = 5000,
1261                 .update_bank            = 0x04,
1262                 .update_reg             = 0x09,
1263                 .update_mask            = 0x0c,
1264                 .update_val             = 0x04,
1265                 .update_val_idle        = 0x0c,
1266                 .update_val_normal      = 0x04,
1267                 .voltage_bank           = 0x04,
1268                 .voltage_reg            = 0x20,
1269                 .voltage_mask           = 0x0f,
1270         },
1271         [AB8540_LDO_AUX3] = {
1272                 .desc = {
1273                         .name           = "LDO-AUX3",
1274                         .ops            = &ab8500_regulator_volt_mode_ops,
1275                         .type           = REGULATOR_VOLTAGE,
1276                         .id             = AB8540_LDO_AUX3,
1277                         .owner          = THIS_MODULE,
1278                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_ab8540_voltages),
1279                         .volt_table     = ldo_vaux3_ab8540_voltages,
1280                 },
1281                 .load_lp_uA             = 5000,
1282                 .update_bank            = 0x04,
1283                 .update_reg             = 0x0a,
1284                 .update_mask            = 0x03,
1285                 .update_val             = 0x01,
1286                 .update_val_idle        = 0x03,
1287                 .update_val_normal      = 0x01,
1288                 .voltage_bank           = 0x04,
1289                 .voltage_reg            = 0x21,
1290                 .voltage_mask           = 0x07,
1291         },
1292         [AB8540_LDO_AUX4] = {
1293                 .desc = {
1294                         .name           = "LDO-AUX4",
1295                         .ops            = &ab8500_regulator_volt_mode_ops,
1296                         .type           = REGULATOR_VOLTAGE,
1297                         .id             = AB8540_LDO_AUX4,
1298                         .owner          = THIS_MODULE,
1299                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1300                         .volt_table     = ldo_vauxn_voltages,
1301                 },
1302                 .load_lp_uA             = 5000,
1303                 /* values for Vaux4Regu register */
1304                 .update_bank            = 0x04,
1305                 .update_reg             = 0x2e,
1306                 .update_mask            = 0x03,
1307                 .update_val             = 0x01,
1308                 .update_val_idle        = 0x03,
1309                 .update_val_normal      = 0x01,
1310                 /* values for Vaux4SEL register */
1311                 .voltage_bank           = 0x04,
1312                 .voltage_reg            = 0x2f,
1313                 .voltage_mask           = 0x0f,
1314         },
1315         [AB8540_LDO_INTCORE] = {
1316                 .desc = {
1317                         .name           = "LDO-INTCORE",
1318                         .ops            = &ab8500_regulator_volt_mode_ops,
1319                         .type           = REGULATOR_VOLTAGE,
1320                         .id             = AB8540_LDO_INTCORE,
1321                         .owner          = THIS_MODULE,
1322                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1323                         .volt_table     = ldo_vintcore_voltages,
1324                 },
1325                 .load_lp_uA             = 5000,
1326                 .update_bank            = 0x03,
1327                 .update_reg             = 0x80,
1328                 .update_mask            = 0x44,
1329                 .update_val             = 0x44,
1330                 .update_val_idle        = 0x44,
1331                 .update_val_normal      = 0x04,
1332                 .voltage_bank           = 0x03,
1333                 .voltage_reg            = 0x80,
1334                 .voltage_mask           = 0x38,
1335                 .voltage_shift          = 3,
1336         },
1337
1338         /*
1339          * Fixed Voltage Regulators
1340          *   name, fixed mV,
1341          *   update bank, reg, mask, enable val
1342          */
1343         [AB8540_LDO_TVOUT] = {
1344                 .desc = {
1345                         .name           = "LDO-TVOUT",
1346                         .ops            = &ab8500_regulator_mode_ops,
1347                         .type           = REGULATOR_VOLTAGE,
1348                         .id             = AB8540_LDO_TVOUT,
1349                         .owner          = THIS_MODULE,
1350                         .n_voltages     = 1,
1351                 },
1352                 .delay                  = 10000,
1353                 .load_lp_uA             = 1000,
1354                 .update_bank            = 0x03,
1355                 .update_reg             = 0x80,
1356                 .update_mask            = 0x82,
1357                 .update_val             = 0x02,
1358                 .update_val_idle        = 0x82,
1359                 .update_val_normal      = 0x02,
1360         },
1361         [AB8540_LDO_AUDIO] = {
1362                 .desc = {
1363                         .name           = "LDO-AUDIO",
1364                         .ops            = &ab8500_regulator_ops,
1365                         .type           = REGULATOR_VOLTAGE,
1366                         .id             = AB8540_LDO_AUDIO,
1367                         .owner          = THIS_MODULE,
1368                         .n_voltages     = 1,
1369                         .volt_table     = fixed_2000000_voltage,
1370                 },
1371                 .update_bank            = 0x03,
1372                 .update_reg             = 0x83,
1373                 .update_mask            = 0x02,
1374                 .update_val             = 0x02,
1375         },
1376         [AB8540_LDO_ANAMIC1] = {
1377                 .desc = {
1378                         .name           = "LDO-ANAMIC1",
1379                         .ops            = &ab8500_regulator_ops,
1380                         .type           = REGULATOR_VOLTAGE,
1381                         .id             = AB8540_LDO_ANAMIC1,
1382                         .owner          = THIS_MODULE,
1383                         .n_voltages     = 1,
1384                         .volt_table     = fixed_2050000_voltage,
1385                 },
1386                 .update_bank            = 0x03,
1387                 .update_reg             = 0x83,
1388                 .update_mask            = 0x08,
1389                 .update_val             = 0x08,
1390         },
1391         [AB8540_LDO_ANAMIC2] = {
1392                 .desc = {
1393                         .name           = "LDO-ANAMIC2",
1394                         .ops            = &ab8500_regulator_ops,
1395                         .type           = REGULATOR_VOLTAGE,
1396                         .id             = AB8540_LDO_ANAMIC2,
1397                         .owner          = THIS_MODULE,
1398                         .n_voltages     = 1,
1399                         .volt_table     = fixed_2050000_voltage,
1400                 },
1401                 .update_bank            = 0x03,
1402                 .update_reg             = 0x83,
1403                 .update_mask            = 0x10,
1404                 .update_val             = 0x10,
1405         },
1406         [AB8540_LDO_DMIC] = {
1407                 .desc = {
1408                         .name           = "LDO-DMIC",
1409                         .ops            = &ab8500_regulator_ops,
1410                         .type           = REGULATOR_VOLTAGE,
1411                         .id             = AB8540_LDO_DMIC,
1412                         .owner          = THIS_MODULE,
1413                         .n_voltages     = 1,
1414                 },
1415                 .update_bank            = 0x03,
1416                 .update_reg             = 0x83,
1417                 .update_mask            = 0x04,
1418                 .update_val             = 0x04,
1419         },
1420
1421         /*
1422          * Regulators with fixed voltage and normal/idle modes
1423          */
1424         [AB8540_LDO_ANA] = {
1425                 .desc = {
1426                         .name           = "LDO-ANA",
1427                         .ops            = &ab8500_regulator_mode_ops,
1428                         .type           = REGULATOR_VOLTAGE,
1429                         .id             = AB8540_LDO_ANA,
1430                         .owner          = THIS_MODULE,
1431                         .n_voltages     = 1,
1432                         .volt_table     = fixed_1200000_voltage,
1433                 },
1434                 .load_lp_uA             = 1000,
1435                 .update_bank            = 0x04,
1436                 .update_reg             = 0x06,
1437                 .update_mask            = 0x0c,
1438                 .update_val             = 0x04,
1439                 .update_val_idle        = 0x0c,
1440                 .update_val_normal      = 0x04,
1441         },
1442         [AB8540_LDO_SDIO] = {
1443                 .desc = {
1444                         .name           = "LDO-SDIO",
1445                         .ops            = &ab8500_regulator_volt_mode_ops,
1446                         .type           = REGULATOR_VOLTAGE,
1447                         .id             = AB8540_LDO_SDIO,
1448                         .owner          = THIS_MODULE,
1449                         .n_voltages     = ARRAY_SIZE(ldo_sdio_voltages),
1450                         .volt_table     = ldo_sdio_voltages,
1451                 },
1452                 .load_lp_uA             = 5000,
1453                 .update_bank            = 0x03,
1454                 .update_reg             = 0x88,
1455                 .update_mask            = 0x30,
1456                 .update_val             = 0x10,
1457                 .update_val_idle        = 0x30,
1458                 .update_val_normal      = 0x10,
1459                 .voltage_bank           = 0x03,
1460                 .voltage_reg            = 0x88,
1461                 .voltage_mask           = 0x07,
1462         },
1463 };
1464
1465 struct ab8500_reg_init {
1466         u8 bank;
1467         u8 addr;
1468         u8 mask;
1469 };
1470
1471 #define REG_INIT(_id, _bank, _addr, _mask)      \
1472         [_id] = {                               \
1473                 .bank = _bank,                  \
1474                 .addr = _addr,                  \
1475                 .mask = _mask,                  \
1476         }
1477
1478 /* AB8500 register init */
1479 static struct ab8500_reg_init ab8500_reg_init[] = {
1480         /*
1481          * 0x30, VanaRequestCtrl
1482          * 0xc0, VextSupply1RequestCtrl
1483          */
1484         REG_INIT(AB8500_REGUREQUESTCTRL2,       0x03, 0x04, 0xf0),
1485         /*
1486          * 0x03, VextSupply2RequestCtrl
1487          * 0x0c, VextSupply3RequestCtrl
1488          * 0x30, Vaux1RequestCtrl
1489          * 0xc0, Vaux2RequestCtrl
1490          */
1491         REG_INIT(AB8500_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
1492         /*
1493          * 0x03, Vaux3RequestCtrl
1494          * 0x04, SwHPReq
1495          */
1496         REG_INIT(AB8500_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1497         /*
1498          * 0x08, VanaSysClkReq1HPValid
1499          * 0x20, Vaux1SysClkReq1HPValid
1500          * 0x40, Vaux2SysClkReq1HPValid
1501          * 0x80, Vaux3SysClkReq1HPValid
1502          */
1503         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
1504         /*
1505          * 0x10, VextSupply1SysClkReq1HPValid
1506          * 0x20, VextSupply2SysClkReq1HPValid
1507          * 0x40, VextSupply3SysClkReq1HPValid
1508          */
1509         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
1510         /*
1511          * 0x08, VanaHwHPReq1Valid
1512          * 0x20, Vaux1HwHPReq1Valid
1513          * 0x40, Vaux2HwHPReq1Valid
1514          * 0x80, Vaux3HwHPReq1Valid
1515          */
1516         REG_INIT(AB8500_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xe8),
1517         /*
1518          * 0x01, VextSupply1HwHPReq1Valid
1519          * 0x02, VextSupply2HwHPReq1Valid
1520          * 0x04, VextSupply3HwHPReq1Valid
1521          */
1522         REG_INIT(AB8500_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
1523         /*
1524          * 0x08, VanaHwHPReq2Valid
1525          * 0x20, Vaux1HwHPReq2Valid
1526          * 0x40, Vaux2HwHPReq2Valid
1527          * 0x80, Vaux3HwHPReq2Valid
1528          */
1529         REG_INIT(AB8500_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xe8),
1530         /*
1531          * 0x01, VextSupply1HwHPReq2Valid
1532          * 0x02, VextSupply2HwHPReq2Valid
1533          * 0x04, VextSupply3HwHPReq2Valid
1534          */
1535         REG_INIT(AB8500_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
1536         /*
1537          * 0x20, VanaSwHPReqValid
1538          * 0x80, Vaux1SwHPReqValid
1539          */
1540         REG_INIT(AB8500_REGUSWHPREQVALID1,      0x03, 0x0d, 0xa0),
1541         /*
1542          * 0x01, Vaux2SwHPReqValid
1543          * 0x02, Vaux3SwHPReqValid
1544          * 0x04, VextSupply1SwHPReqValid
1545          * 0x08, VextSupply2SwHPReqValid
1546          * 0x10, VextSupply3SwHPReqValid
1547          */
1548         REG_INIT(AB8500_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
1549         /*
1550          * 0x02, SysClkReq2Valid1
1551          * 0x04, SysClkReq3Valid1
1552          * 0x08, SysClkReq4Valid1
1553          * 0x10, SysClkReq5Valid1
1554          * 0x20, SysClkReq6Valid1
1555          * 0x40, SysClkReq7Valid1
1556          * 0x80, SysClkReq8Valid1
1557          */
1558         REG_INIT(AB8500_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
1559         /*
1560          * 0x02, SysClkReq2Valid2
1561          * 0x04, SysClkReq3Valid2
1562          * 0x08, SysClkReq4Valid2
1563          * 0x10, SysClkReq5Valid2
1564          * 0x20, SysClkReq6Valid2
1565          * 0x40, SysClkReq7Valid2
1566          * 0x80, SysClkReq8Valid2
1567          */
1568         REG_INIT(AB8500_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
1569         /*
1570          * 0x02, VTVoutEna
1571          * 0x04, Vintcore12Ena
1572          * 0x38, Vintcore12Sel
1573          * 0x40, Vintcore12LP
1574          * 0x80, VTVoutLP
1575          */
1576         REG_INIT(AB8500_REGUMISC1,              0x03, 0x80, 0xfe),
1577         /*
1578          * 0x02, VaudioEna
1579          * 0x04, VdmicEna
1580          * 0x08, Vamic1Ena
1581          * 0x10, Vamic2Ena
1582          */
1583         REG_INIT(AB8500_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1584         /*
1585          * 0x01, Vamic1_dzout
1586          * 0x02, Vamic2_dzout
1587          */
1588         REG_INIT(AB8500_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1589         /*
1590          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1591          * 0x0c, VanaRegu
1592          */
1593         REG_INIT(AB8500_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1594         /*
1595          * 0x01, VrefDDREna
1596          * 0x02, VrefDDRSleepMode
1597          */
1598         REG_INIT(AB8500_VREFDDR,                0x04, 0x07, 0x03),
1599         /*
1600          * 0x03, VextSupply1Regu
1601          * 0x0c, VextSupply2Regu
1602          * 0x30, VextSupply3Regu
1603          * 0x40, ExtSupply2Bypass
1604          * 0x80, ExtSupply3Bypass
1605          */
1606         REG_INIT(AB8500_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1607         /*
1608          * 0x03, Vaux1Regu
1609          * 0x0c, Vaux2Regu
1610          */
1611         REG_INIT(AB8500_VAUX12REGU,             0x04, 0x09, 0x0f),
1612         /*
1613          * 0x03, Vaux3Regu
1614          */
1615         REG_INIT(AB8500_VRF1VAUX3REGU,          0x04, 0x0a, 0x03),
1616         /*
1617          * 0x0f, Vaux1Sel
1618          */
1619         REG_INIT(AB8500_VAUX1SEL,               0x04, 0x1f, 0x0f),
1620         /*
1621          * 0x0f, Vaux2Sel
1622          */
1623         REG_INIT(AB8500_VAUX2SEL,               0x04, 0x20, 0x0f),
1624         /*
1625          * 0x07, Vaux3Sel
1626          */
1627         REG_INIT(AB8500_VRF1VAUX3SEL,           0x04, 0x21, 0x07),
1628         /*
1629          * 0x01, VextSupply12LP
1630          */
1631         REG_INIT(AB8500_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
1632         /*
1633          * 0x04, Vaux1Disch
1634          * 0x08, Vaux2Disch
1635          * 0x10, Vaux3Disch
1636          * 0x20, Vintcore12Disch
1637          * 0x40, VTVoutDisch
1638          * 0x80, VaudioDisch
1639          */
1640         REG_INIT(AB8500_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1641         /*
1642          * 0x02, VanaDisch
1643          * 0x04, VdmicPullDownEna
1644          * 0x10, VdmicDisch
1645          */
1646         REG_INIT(AB8500_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1647 };
1648
1649 /* AB8505 register init */
1650 static struct ab8500_reg_init ab8505_reg_init[] = {
1651         /*
1652          * 0x03, VarmRequestCtrl
1653          * 0x0c, VsmpsCRequestCtrl
1654          * 0x30, VsmpsARequestCtrl
1655          * 0xc0, VsmpsBRequestCtrl
1656          */
1657         REG_INIT(AB8505_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
1658         /*
1659          * 0x03, VsafeRequestCtrl
1660          * 0x0c, VpllRequestCtrl
1661          * 0x30, VanaRequestCtrl
1662          */
1663         REG_INIT(AB8505_REGUREQUESTCTRL2,       0x03, 0x04, 0x3f),
1664         /*
1665          * 0x30, Vaux1RequestCtrl
1666          * 0xc0, Vaux2RequestCtrl
1667          */
1668         REG_INIT(AB8505_REGUREQUESTCTRL3,       0x03, 0x05, 0xf0),
1669         /*
1670          * 0x03, Vaux3RequestCtrl
1671          * 0x04, SwHPReq
1672          */
1673         REG_INIT(AB8505_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1674         /*
1675          * 0x01, VsmpsASysClkReq1HPValid
1676          * 0x02, VsmpsBSysClkReq1HPValid
1677          * 0x04, VsafeSysClkReq1HPValid
1678          * 0x08, VanaSysClkReq1HPValid
1679          * 0x10, VpllSysClkReq1HPValid
1680          * 0x20, Vaux1SysClkReq1HPValid
1681          * 0x40, Vaux2SysClkReq1HPValid
1682          * 0x80, Vaux3SysClkReq1HPValid
1683          */
1684         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
1685         /*
1686          * 0x01, VsmpsCSysClkReq1HPValid
1687          * 0x02, VarmSysClkReq1HPValid
1688          * 0x04, VbbSysClkReq1HPValid
1689          * 0x08, VsmpsMSysClkReq1HPValid
1690          */
1691         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
1692         /*
1693          * 0x01, VsmpsAHwHPReq1Valid
1694          * 0x02, VsmpsBHwHPReq1Valid
1695          * 0x04, VsafeHwHPReq1Valid
1696          * 0x08, VanaHwHPReq1Valid
1697          * 0x10, VpllHwHPReq1Valid
1698          * 0x20, Vaux1HwHPReq1Valid
1699          * 0x40, Vaux2HwHPReq1Valid
1700          * 0x80, Vaux3HwHPReq1Valid
1701          */
1702         REG_INIT(AB8505_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
1703         /*
1704          * 0x08, VsmpsMHwHPReq1Valid
1705          */
1706         REG_INIT(AB8505_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x08),
1707         /*
1708          * 0x01, VsmpsAHwHPReq2Valid
1709          * 0x02, VsmpsBHwHPReq2Valid
1710          * 0x04, VsafeHwHPReq2Valid
1711          * 0x08, VanaHwHPReq2Valid
1712          * 0x10, VpllHwHPReq2Valid
1713          * 0x20, Vaux1HwHPReq2Valid
1714          * 0x40, Vaux2HwHPReq2Valid
1715          * 0x80, Vaux3HwHPReq2Valid
1716          */
1717         REG_INIT(AB8505_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
1718         /*
1719          * 0x08, VsmpsMHwHPReq2Valid
1720          */
1721         REG_INIT(AB8505_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x08),
1722         /*
1723          * 0x01, VsmpsCSwHPReqValid
1724          * 0x02, VarmSwHPReqValid
1725          * 0x04, VsmpsASwHPReqValid
1726          * 0x08, VsmpsBSwHPReqValid
1727          * 0x10, VsafeSwHPReqValid
1728          * 0x20, VanaSwHPReqValid
1729          * 0x40, VpllSwHPReqValid
1730          * 0x80, Vaux1SwHPReqValid
1731          */
1732         REG_INIT(AB8505_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
1733         /*
1734          * 0x01, Vaux2SwHPReqValid
1735          * 0x02, Vaux3SwHPReqValid
1736          * 0x20, VsmpsMSwHPReqValid
1737          */
1738         REG_INIT(AB8505_REGUSWHPREQVALID2,      0x03, 0x0e, 0x23),
1739         /*
1740          * 0x02, SysClkReq2Valid1
1741          * 0x04, SysClkReq3Valid1
1742          * 0x08, SysClkReq4Valid1
1743          */
1744         REG_INIT(AB8505_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0x0e),
1745         /*
1746          * 0x02, SysClkReq2Valid2
1747          * 0x04, SysClkReq3Valid2
1748          * 0x08, SysClkReq4Valid2
1749          */
1750         REG_INIT(AB8505_REGUSYSCLKREQVALID2,    0x03, 0x10, 0x0e),
1751         /*
1752          * 0x01, Vaux4SwHPReqValid
1753          * 0x02, Vaux4HwHPReq2Valid
1754          * 0x04, Vaux4HwHPReq1Valid
1755          * 0x08, Vaux4SysClkReq1HPValid
1756          */
1757         REG_INIT(AB8505_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
1758         /*
1759          * 0x02, VadcEna
1760          * 0x04, VintCore12Ena
1761          * 0x38, VintCore12Sel
1762          * 0x40, VintCore12LP
1763          * 0x80, VadcLP
1764          */
1765         REG_INIT(AB8505_REGUMISC1,              0x03, 0x80, 0xfe),
1766         /*
1767          * 0x02, VaudioEna
1768          * 0x04, VdmicEna
1769          * 0x08, Vamic1Ena
1770          * 0x10, Vamic2Ena
1771          */
1772         REG_INIT(AB8505_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1773         /*
1774          * 0x01, Vamic1_dzout
1775          * 0x02, Vamic2_dzout
1776          */
1777         REG_INIT(AB8505_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1778         /*
1779          * 0x03, VsmpsARegu
1780          * 0x0c, VsmpsASelCtrl
1781          * 0x10, VsmpsAAutoMode
1782          * 0x20, VsmpsAPWMMode
1783          */
1784         REG_INIT(AB8505_VSMPSAREGU,             0x04, 0x03, 0x3f),
1785         /*
1786          * 0x03, VsmpsBRegu
1787          * 0x0c, VsmpsBSelCtrl
1788          * 0x10, VsmpsBAutoMode
1789          * 0x20, VsmpsBPWMMode
1790          */
1791         REG_INIT(AB8505_VSMPSBREGU,             0x04, 0x04, 0x3f),
1792         /*
1793          * 0x03, VsafeRegu
1794          * 0x0c, VsafeSelCtrl
1795          * 0x10, VsafeAutoMode
1796          * 0x20, VsafePWMMode
1797          */
1798         REG_INIT(AB8505_VSAFEREGU,              0x04, 0x05, 0x3f),
1799         /*
1800          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1801          * 0x0c, VanaRegu
1802          */
1803         REG_INIT(AB8505_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1804         /*
1805          * 0x03, VextSupply1Regu
1806          * 0x0c, VextSupply2Regu
1807          * 0x30, VextSupply3Regu
1808          * 0x40, ExtSupply2Bypass
1809          * 0x80, ExtSupply3Bypass
1810          */
1811         REG_INIT(AB8505_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1812         /*
1813          * 0x03, Vaux1Regu
1814          * 0x0c, Vaux2Regu
1815          */
1816         REG_INIT(AB8505_VAUX12REGU,             0x04, 0x09, 0x0f),
1817         /*
1818          * 0x0f, Vaux3Regu
1819          */
1820         REG_INIT(AB8505_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
1821         /*
1822          * 0x3f, VsmpsASel1
1823          */
1824         REG_INIT(AB8505_VSMPSASEL1,             0x04, 0x13, 0x3f),
1825         /*
1826          * 0x3f, VsmpsASel2
1827          */
1828         REG_INIT(AB8505_VSMPSASEL2,             0x04, 0x14, 0x3f),
1829         /*
1830          * 0x3f, VsmpsASel3
1831          */
1832         REG_INIT(AB8505_VSMPSASEL3,             0x04, 0x15, 0x3f),
1833         /*
1834          * 0x3f, VsmpsBSel1
1835          */
1836         REG_INIT(AB8505_VSMPSBSEL1,             0x04, 0x17, 0x3f),
1837         /*
1838          * 0x3f, VsmpsBSel2
1839          */
1840         REG_INIT(AB8505_VSMPSBSEL2,             0x04, 0x18, 0x3f),
1841         /*
1842          * 0x3f, VsmpsBSel3
1843          */
1844         REG_INIT(AB8505_VSMPSBSEL3,             0x04, 0x19, 0x3f),
1845         /*
1846          * 0x7f, VsafeSel1
1847          */
1848         REG_INIT(AB8505_VSAFESEL1,              0x04, 0x1b, 0x7f),
1849         /*
1850          * 0x3f, VsafeSel2
1851          */
1852         REG_INIT(AB8505_VSAFESEL2,              0x04, 0x1c, 0x7f),
1853         /*
1854          * 0x3f, VsafeSel3
1855          */
1856         REG_INIT(AB8505_VSAFESEL3,              0x04, 0x1d, 0x7f),
1857         /*
1858          * 0x0f, Vaux1Sel
1859          */
1860         REG_INIT(AB8505_VAUX1SEL,               0x04, 0x1f, 0x0f),
1861         /*
1862          * 0x0f, Vaux2Sel
1863          */
1864         REG_INIT(AB8505_VAUX2SEL,               0x04, 0x20, 0x0f),
1865         /*
1866          * 0x07, Vaux3Sel
1867          * 0x30, VRF1Sel
1868          */
1869         REG_INIT(AB8505_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
1870         /*
1871          * 0x03, Vaux4RequestCtrl
1872          */
1873         REG_INIT(AB8505_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
1874         /*
1875          * 0x03, Vaux4Regu
1876          */
1877         REG_INIT(AB8505_VAUX4REGU,              0x04, 0x2e, 0x03),
1878         /*
1879          * 0x0f, Vaux4Sel
1880          */
1881         REG_INIT(AB8505_VAUX4SEL,               0x04, 0x2f, 0x0f),
1882         /*
1883          * 0x04, Vaux1Disch
1884          * 0x08, Vaux2Disch
1885          * 0x10, Vaux3Disch
1886          * 0x20, Vintcore12Disch
1887          * 0x40, VTVoutDisch
1888          * 0x80, VaudioDisch
1889          */
1890         REG_INIT(AB8505_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1891         /*
1892          * 0x02, VanaDisch
1893          * 0x04, VdmicPullDownEna
1894          * 0x10, VdmicDisch
1895          */
1896         REG_INIT(AB8505_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1897         /*
1898          * 0x01, Vaux4Disch
1899          */
1900         REG_INIT(AB8505_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
1901         /*
1902          * 0x07, Vaux5Sel
1903          * 0x08, Vaux5LP
1904          * 0x10, Vaux5Ena
1905          * 0x20, Vaux5Disch
1906          * 0x40, Vaux5DisSfst
1907          * 0x80, Vaux5DisPulld
1908          */
1909         REG_INIT(AB8505_CTRLVAUX5,              0x01, 0x55, 0xff),
1910         /*
1911          * 0x07, Vaux6Sel
1912          * 0x08, Vaux6LP
1913          * 0x10, Vaux6Ena
1914          * 0x80, Vaux6DisPulld
1915          */
1916         REG_INIT(AB8505_CTRLVAUX6,              0x01, 0x56, 0x9f),
1917 };
1918
1919 /* AB9540 register init */
1920 static struct ab8500_reg_init ab9540_reg_init[] = {
1921         /*
1922          * 0x03, VarmRequestCtrl
1923          * 0x0c, VapeRequestCtrl
1924          * 0x30, Vsmps1RequestCtrl
1925          * 0xc0, Vsmps2RequestCtrl
1926          */
1927         REG_INIT(AB9540_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
1928         /*
1929          * 0x03, Vsmps3RequestCtrl
1930          * 0x0c, VpllRequestCtrl
1931          * 0x30, VanaRequestCtrl
1932          * 0xc0, VextSupply1RequestCtrl
1933          */
1934         REG_INIT(AB9540_REGUREQUESTCTRL2,       0x03, 0x04, 0xff),
1935         /*
1936          * 0x03, VextSupply2RequestCtrl
1937          * 0x0c, VextSupply3RequestCtrl
1938          * 0x30, Vaux1RequestCtrl
1939          * 0xc0, Vaux2RequestCtrl
1940          */
1941         REG_INIT(AB9540_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
1942         /*
1943          * 0x03, Vaux3RequestCtrl
1944          * 0x04, SwHPReq
1945          */
1946         REG_INIT(AB9540_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1947         /*
1948          * 0x01, Vsmps1SysClkReq1HPValid
1949          * 0x02, Vsmps2SysClkReq1HPValid
1950          * 0x04, Vsmps3SysClkReq1HPValid
1951          * 0x08, VanaSysClkReq1HPValid
1952          * 0x10, VpllSysClkReq1HPValid
1953          * 0x20, Vaux1SysClkReq1HPValid
1954          * 0x40, Vaux2SysClkReq1HPValid
1955          * 0x80, Vaux3SysClkReq1HPValid
1956          */
1957         REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
1958         /*
1959          * 0x01, VapeSysClkReq1HPValid
1960          * 0x02, VarmSysClkReq1HPValid
1961          * 0x04, VbbSysClkReq1HPValid
1962          * 0x08, VmodSysClkReq1HPValid
1963          * 0x10, VextSupply1SysClkReq1HPValid
1964          * 0x20, VextSupply2SysClkReq1HPValid
1965          * 0x40, VextSupply3SysClkReq1HPValid
1966          */
1967         REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x7f),
1968         /*
1969          * 0x01, Vsmps1HwHPReq1Valid
1970          * 0x02, Vsmps2HwHPReq1Valid
1971          * 0x04, Vsmps3HwHPReq1Valid
1972          * 0x08, VanaHwHPReq1Valid
1973          * 0x10, VpllHwHPReq1Valid
1974          * 0x20, Vaux1HwHPReq1Valid
1975          * 0x40, Vaux2HwHPReq1Valid
1976          * 0x80, Vaux3HwHPReq1Valid
1977          */
1978         REG_INIT(AB9540_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
1979         /*
1980          * 0x01, VextSupply1HwHPReq1Valid
1981          * 0x02, VextSupply2HwHPReq1Valid
1982          * 0x04, VextSupply3HwHPReq1Valid
1983          * 0x08, VmodHwHPReq1Valid
1984          */
1985         REG_INIT(AB9540_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x0f),
1986         /*
1987          * 0x01, Vsmps1HwHPReq2Valid
1988          * 0x02, Vsmps2HwHPReq2Valid
1989          * 0x03, Vsmps3HwHPReq2Valid
1990          * 0x08, VanaHwHPReq2Valid
1991          * 0x10, VpllHwHPReq2Valid
1992          * 0x20, Vaux1HwHPReq2Valid
1993          * 0x40, Vaux2HwHPReq2Valid
1994          * 0x80, Vaux3HwHPReq2Valid
1995          */
1996         REG_INIT(AB9540_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
1997         /*
1998          * 0x01, VextSupply1HwHPReq2Valid
1999          * 0x02, VextSupply2HwHPReq2Valid
2000          * 0x04, VextSupply3HwHPReq2Valid
2001          * 0x08, VmodHwHPReq2Valid
2002          */
2003         REG_INIT(AB9540_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x0f),
2004         /*
2005          * 0x01, VapeSwHPReqValid
2006          * 0x02, VarmSwHPReqValid
2007          * 0x04, Vsmps1SwHPReqValid
2008          * 0x08, Vsmps2SwHPReqValid
2009          * 0x10, Vsmps3SwHPReqValid
2010          * 0x20, VanaSwHPReqValid
2011          * 0x40, VpllSwHPReqValid
2012          * 0x80, Vaux1SwHPReqValid
2013          */
2014         REG_INIT(AB9540_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2015         /*
2016          * 0x01, Vaux2SwHPReqValid
2017          * 0x02, Vaux3SwHPReqValid
2018          * 0x04, VextSupply1SwHPReqValid
2019          * 0x08, VextSupply2SwHPReqValid
2020          * 0x10, VextSupply3SwHPReqValid
2021          * 0x20, VmodSwHPReqValid
2022          */
2023         REG_INIT(AB9540_REGUSWHPREQVALID2,      0x03, 0x0e, 0x3f),
2024         /*
2025          * 0x02, SysClkReq2Valid1
2026          * ...
2027          * 0x80, SysClkReq8Valid1
2028          */
2029         REG_INIT(AB9540_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
2030         /*
2031          * 0x02, SysClkReq2Valid2
2032          * ...
2033          * 0x80, SysClkReq8Valid2
2034          */
2035         REG_INIT(AB9540_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
2036         /*
2037          * 0x01, Vaux4SwHPReqValid
2038          * 0x02, Vaux4HwHPReq2Valid
2039          * 0x04, Vaux4HwHPReq1Valid
2040          * 0x08, Vaux4SysClkReq1HPValid
2041          */
2042         REG_INIT(AB9540_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2043         /*
2044          * 0x02, VTVoutEna
2045          * 0x04, Vintcore12Ena
2046          * 0x38, Vintcore12Sel
2047          * 0x40, Vintcore12LP
2048          * 0x80, VTVoutLP
2049          */
2050         REG_INIT(AB9540_REGUMISC1,              0x03, 0x80, 0xfe),
2051         /*
2052          * 0x02, VaudioEna
2053          * 0x04, VdmicEna
2054          * 0x08, Vamic1Ena
2055          * 0x10, Vamic2Ena
2056          */
2057         REG_INIT(AB9540_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
2058         /*
2059          * 0x01, Vamic1_dzout
2060          * 0x02, Vamic2_dzout
2061          */
2062         REG_INIT(AB9540_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2063         /*
2064          * 0x03, Vsmps1Regu
2065          * 0x0c, Vsmps1SelCtrl
2066          * 0x10, Vsmps1AutoMode
2067          * 0x20, Vsmps1PWMMode
2068          */
2069         REG_INIT(AB9540_VSMPS1REGU,             0x04, 0x03, 0x3f),
2070         /*
2071          * 0x03, Vsmps2Regu
2072          * 0x0c, Vsmps2SelCtrl
2073          * 0x10, Vsmps2AutoMode
2074          * 0x20, Vsmps2PWMMode
2075          */
2076         REG_INIT(AB9540_VSMPS2REGU,             0x04, 0x04, 0x3f),
2077         /*
2078          * 0x03, Vsmps3Regu
2079          * 0x0c, Vsmps3SelCtrl
2080          * NOTE! PRCMU register
2081          */
2082         REG_INIT(AB9540_VSMPS3REGU,             0x04, 0x05, 0x0f),
2083         /*
2084          * 0x03, VpllRegu
2085          * 0x0c, VanaRegu
2086          */
2087         REG_INIT(AB9540_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2088         /*
2089          * 0x03, VextSupply1Regu
2090          * 0x0c, VextSupply2Regu
2091          * 0x30, VextSupply3Regu
2092          * 0x40, ExtSupply2Bypass
2093          * 0x80, ExtSupply3Bypass
2094          */
2095         REG_INIT(AB9540_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2096         /*
2097          * 0x03, Vaux1Regu
2098          * 0x0c, Vaux2Regu
2099          */
2100         REG_INIT(AB9540_VAUX12REGU,             0x04, 0x09, 0x0f),
2101         /*
2102          * 0x0c, Vrf1Regu
2103          * 0x03, Vaux3Regu
2104          */
2105         REG_INIT(AB9540_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2106         /*
2107          * 0x3f, Vsmps1Sel1
2108          */
2109         REG_INIT(AB9540_VSMPS1SEL1,             0x04, 0x13, 0x3f),
2110         /*
2111          * 0x3f, Vsmps1Sel2
2112          */
2113         REG_INIT(AB9540_VSMPS1SEL2,             0x04, 0x14, 0x3f),
2114         /*
2115          * 0x3f, Vsmps1Sel3
2116          */
2117         REG_INIT(AB9540_VSMPS1SEL3,             0x04, 0x15, 0x3f),
2118         /*
2119          * 0x3f, Vsmps2Sel1
2120          */
2121         REG_INIT(AB9540_VSMPS2SEL1,             0x04, 0x17, 0x3f),
2122         /*
2123          * 0x3f, Vsmps2Sel2
2124          */
2125         REG_INIT(AB9540_VSMPS2SEL2,             0x04, 0x18, 0x3f),
2126         /*
2127          * 0x3f, Vsmps2Sel3
2128          */
2129         REG_INIT(AB9540_VSMPS2SEL3,             0x04, 0x19, 0x3f),
2130         /*
2131          * 0x7f, Vsmps3Sel1
2132          * NOTE! PRCMU register
2133          */
2134         REG_INIT(AB9540_VSMPS3SEL1,             0x04, 0x1b, 0x7f),
2135         /*
2136          * 0x7f, Vsmps3Sel2
2137          * NOTE! PRCMU register
2138          */
2139         REG_INIT(AB9540_VSMPS3SEL2,             0x04, 0x1c, 0x7f),
2140         /*
2141          * 0x0f, Vaux1Sel
2142          */
2143         REG_INIT(AB9540_VAUX1SEL,               0x04, 0x1f, 0x0f),
2144         /*
2145          * 0x0f, Vaux2Sel
2146          */
2147         REG_INIT(AB9540_VAUX2SEL,               0x04, 0x20, 0x0f),
2148         /*
2149          * 0x07, Vaux3Sel
2150          * 0x30, Vrf1Sel
2151          */
2152         REG_INIT(AB9540_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
2153         /*
2154          * 0x01, VextSupply12LP
2155          */
2156         REG_INIT(AB9540_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
2157         /*
2158          * 0x03, Vaux4RequestCtrl
2159          */
2160         REG_INIT(AB9540_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2161         /*
2162          * 0x03, Vaux4Regu
2163          */
2164         REG_INIT(AB9540_VAUX4REGU,              0x04, 0x2e, 0x03),
2165         /*
2166          * 0x08, Vaux4Sel
2167          */
2168         REG_INIT(AB9540_VAUX4SEL,               0x04, 0x2f, 0x0f),
2169         /*
2170          * 0x01, VpllDisch
2171          * 0x02, Vrf1Disch
2172          * 0x04, Vaux1Disch
2173          * 0x08, Vaux2Disch
2174          * 0x10, Vaux3Disch
2175          * 0x20, Vintcore12Disch
2176          * 0x40, VTVoutDisch
2177          * 0x80, VaudioDisch
2178          */
2179         REG_INIT(AB9540_REGUCTRLDISCH,          0x04, 0x43, 0xff),
2180         /*
2181          * 0x01, VsimDisch
2182          * 0x02, VanaDisch
2183          * 0x04, VdmicPullDownEna
2184          * 0x08, VpllPullDownEna
2185          * 0x10, VdmicDisch
2186          */
2187         REG_INIT(AB9540_REGUCTRLDISCH2,         0x04, 0x44, 0x1f),
2188         /*
2189          * 0x01, Vaux4Disch
2190          */
2191         REG_INIT(AB9540_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2192 };
2193
2194 /* AB8540 register init */
2195 static struct ab8500_reg_init ab8540_reg_init[] = {
2196         /*
2197          * 0x01, VSimSycClkReq1Valid
2198          * 0x02, VSimSycClkReq2Valid
2199          * 0x04, VSimSycClkReq3Valid
2200          * 0x08, VSimSycClkReq4Valid
2201          * 0x10, VSimSycClkReq5Valid
2202          * 0x20, VSimSycClkReq6Valid
2203          * 0x40, VSimSycClkReq7Valid
2204          * 0x80, VSimSycClkReq8Valid
2205          */
2206         REG_INIT(AB8540_VSIMSYSCLKCTRL,         0x02, 0x33, 0xff),
2207         /*
2208          * 0x03, VarmRequestCtrl
2209          * 0x0c, VapeRequestCtrl
2210          * 0x30, Vsmps1RequestCtrl
2211          * 0xc0, Vsmps2RequestCtrl
2212          */
2213         REG_INIT(AB8540_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
2214         /*
2215          * 0x03, Vsmps3RequestCtrl
2216          * 0x0c, VpllRequestCtrl
2217          * 0x30, VanaRequestCtrl
2218          * 0xc0, VextSupply1RequestCtrl
2219          */
2220         REG_INIT(AB8540_REGUREQUESTCTRL2,       0x03, 0x04, 0xff),
2221         /*
2222          * 0x03, VextSupply2RequestCtrl
2223          * 0x0c, VextSupply3RequestCtrl
2224          * 0x30, Vaux1RequestCtrl
2225          * 0xc0, Vaux2RequestCtrl
2226          */
2227         REG_INIT(AB8540_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
2228         /*
2229          * 0x03, Vaux3RequestCtrl
2230          * 0x04, SwHPReq
2231          */
2232         REG_INIT(AB8540_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2233         /*
2234          * 0x01, Vsmps1SysClkReq1HPValid
2235          * 0x02, Vsmps2SysClkReq1HPValid
2236          * 0x04, Vsmps3SysClkReq1HPValid
2237          * 0x08, VanaSysClkReq1HPValid
2238          * 0x10, VpllSysClkReq1HPValid
2239          * 0x20, Vaux1SysClkReq1HPValid
2240          * 0x40, Vaux2SysClkReq1HPValid
2241          * 0x80, Vaux3SysClkReq1HPValid
2242          */
2243         REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2244         /*
2245          * 0x01, VapeSysClkReq1HPValid
2246          * 0x02, VarmSysClkReq1HPValid
2247          * 0x04, VbbSysClkReq1HPValid
2248          * 0x10, VextSupply1SysClkReq1HPValid
2249          * 0x20, VextSupply2SysClkReq1HPValid
2250          * 0x40, VextSupply3SysClkReq1HPValid
2251          */
2252         REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x77),
2253         /*
2254          * 0x01, Vsmps1HwHPReq1Valid
2255          * 0x02, Vsmps2HwHPReq1Valid
2256          * 0x04, Vsmps3HwHPReq1Valid
2257          * 0x08, VanaHwHPReq1Valid
2258          * 0x10, VpllHwHPReq1Valid
2259          * 0x20, Vaux1HwHPReq1Valid
2260          * 0x40, Vaux2HwHPReq1Valid
2261          * 0x80, Vaux3HwHPReq1Valid
2262          */
2263         REG_INIT(AB8540_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2264         /*
2265          * 0x01, VextSupply1HwHPReq1Valid
2266          * 0x02, VextSupply2HwHPReq1Valid
2267          * 0x04, VextSupply3HwHPReq1Valid
2268          */
2269         REG_INIT(AB8540_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
2270         /*
2271          * 0x01, Vsmps1HwHPReq2Valid
2272          * 0x02, Vsmps2HwHPReq2Valid
2273          * 0x03, Vsmps3HwHPReq2Valid
2274          * 0x08, VanaHwHPReq2Valid
2275          * 0x10, VpllHwHPReq2Valid
2276          * 0x20, Vaux1HwHPReq2Valid
2277          * 0x40, Vaux2HwHPReq2Valid
2278          * 0x80, Vaux3HwHPReq2Valid
2279          */
2280         REG_INIT(AB8540_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2281         /*
2282          * 0x01, VextSupply1HwHPReq2Valid
2283          * 0x02, VextSupply2HwHPReq2Valid
2284          * 0x04, VextSupply3HwHPReq2Valid
2285          */
2286         REG_INIT(AB8540_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
2287         /*
2288          * 0x01, VapeSwHPReqValid
2289          * 0x02, VarmSwHPReqValid
2290          * 0x04, Vsmps1SwHPReqValid
2291          * 0x08, Vsmps2SwHPReqValid
2292          * 0x10, Vsmps3SwHPReqValid
2293          * 0x20, VanaSwHPReqValid
2294          * 0x40, VpllSwHPReqValid
2295          * 0x80, Vaux1SwHPReqValid
2296          */
2297         REG_INIT(AB8540_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2298         /*
2299          * 0x01, Vaux2SwHPReqValid
2300          * 0x02, Vaux3SwHPReqValid
2301          * 0x04, VextSupply1SwHPReqValid
2302          * 0x08, VextSupply2SwHPReqValid
2303          * 0x10, VextSupply3SwHPReqValid
2304          */
2305         REG_INIT(AB8540_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
2306         /*
2307          * 0x02, SysClkReq2Valid1
2308          * ...
2309          * 0x80, SysClkReq8Valid1
2310          */
2311         REG_INIT(AB8540_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xff),
2312         /*
2313          * 0x02, SysClkReq2Valid2
2314          * ...
2315          * 0x80, SysClkReq8Valid2
2316          */
2317         REG_INIT(AB8540_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xff),
2318         /*
2319          * 0x01, Vaux4SwHPReqValid
2320          * 0x02, Vaux4HwHPReq2Valid
2321          * 0x04, Vaux4HwHPReq1Valid
2322          * 0x08, Vaux4SysClkReq1HPValid
2323          */
2324         REG_INIT(AB8540_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2325         /*
2326          * 0x01, Vaux5SwHPReqValid
2327          * 0x02, Vaux5HwHPReq2Valid
2328          * 0x04, Vaux5HwHPReq1Valid
2329          * 0x08, Vaux5SysClkReq1HPValid
2330          */
2331         REG_INIT(AB8540_REGUVAUX5REQVALID,      0x03, 0x12, 0x0f),
2332         /*
2333          * 0x01, Vaux6SwHPReqValid
2334          * 0x02, Vaux6HwHPReq2Valid
2335          * 0x04, Vaux6HwHPReq1Valid
2336          * 0x08, Vaux6SysClkReq1HPValid
2337          */
2338         REG_INIT(AB8540_REGUVAUX6REQVALID,      0x03, 0x13, 0x0f),
2339         /*
2340          * 0x01, VclkbSwHPReqValid
2341          * 0x02, VclkbHwHPReq2Valid
2342          * 0x04, VclkbHwHPReq1Valid
2343          * 0x08, VclkbSysClkReq1HPValid
2344          */
2345         REG_INIT(AB8540_REGUVCLKBREQVALID,      0x03, 0x14, 0x0f),
2346         /*
2347          * 0x01, Vrf1SwHPReqValid
2348          * 0x02, Vrf1HwHPReq2Valid
2349          * 0x04, Vrf1HwHPReq1Valid
2350          * 0x08, Vrf1SysClkReq1HPValid
2351          */
2352         REG_INIT(AB8540_REGUVRF1REQVALID,       0x03, 0x15, 0x0f),
2353         /*
2354          * 0x02, VTVoutEna
2355          * 0x04, Vintcore12Ena
2356          * 0x38, Vintcore12Sel
2357          * 0x40, Vintcore12LP
2358          * 0x80, VTVoutLP
2359          */
2360         REG_INIT(AB8540_REGUMISC1,              0x03, 0x80, 0xfe),
2361         /*
2362          * 0x02, VaudioEna
2363          * 0x04, VdmicEna
2364          * 0x08, Vamic1Ena
2365          * 0x10, Vamic2Ena
2366          * 0x20, Vamic12LP
2367          * 0xC0, VdmicSel
2368          */
2369         REG_INIT(AB8540_VAUDIOSUPPLY,           0x03, 0x83, 0xfe),
2370         /*
2371          * 0x01, Vamic1_dzout
2372          * 0x02, Vamic2_dzout
2373          */
2374         REG_INIT(AB8540_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2375         /*
2376          * 0x07, VHSICSel
2377          * 0x08, VHSICOffState
2378          * 0x10, VHSIEna
2379          * 0x20, VHSICLP
2380          */
2381         REG_INIT(AB8540_VHSIC,                  0x03, 0x87, 0x3f),
2382         /*
2383          * 0x07, VSDIOSel
2384          * 0x08, VSDIOOffState
2385          * 0x10, VSDIOEna
2386          * 0x20, VSDIOLP
2387          */
2388         REG_INIT(AB8540_VSDIO,                  0x03, 0x88, 0x3f),
2389         /*
2390          * 0x03, Vsmps1Regu
2391          * 0x0c, Vsmps1SelCtrl
2392          * 0x10, Vsmps1AutoMode
2393          * 0x20, Vsmps1PWMMode
2394          */
2395         REG_INIT(AB8540_VSMPS1REGU,             0x04, 0x03, 0x3f),
2396         /*
2397          * 0x03, Vsmps2Regu
2398          * 0x0c, Vsmps2SelCtrl
2399          * 0x10, Vsmps2AutoMode
2400          * 0x20, Vsmps2PWMMode
2401          */
2402         REG_INIT(AB8540_VSMPS2REGU,             0x04, 0x04, 0x3f),
2403         /*
2404          * 0x03, Vsmps3Regu
2405          * 0x0c, Vsmps3SelCtrl
2406          * 0x10, Vsmps3AutoMode
2407          * 0x20, Vsmps3PWMMode
2408          * NOTE! PRCMU register
2409          */
2410         REG_INIT(AB8540_VSMPS3REGU,             0x04, 0x05, 0x0f),
2411         /*
2412          * 0x03, VpllRegu
2413          * 0x0c, VanaRegu
2414          */
2415         REG_INIT(AB8540_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2416         /*
2417          * 0x03, VextSupply1Regu
2418          * 0x0c, VextSupply2Regu
2419          * 0x30, VextSupply3Regu
2420          * 0x40, ExtSupply2Bypass
2421          * 0x80, ExtSupply3Bypass
2422          */
2423         REG_INIT(AB8540_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2424         /*
2425          * 0x03, Vaux1Regu
2426          * 0x0c, Vaux2Regu
2427          */
2428         REG_INIT(AB8540_VAUX12REGU,             0x04, 0x09, 0x0f),
2429         /*
2430          * 0x0c, VRF1Regu
2431          * 0x03, Vaux3Regu
2432          */
2433         REG_INIT(AB8540_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2434         /*
2435          * 0x3f, Vsmps1Sel1
2436          */
2437         REG_INIT(AB8540_VSMPS1SEL1,             0x04, 0x13, 0x3f),
2438         /*
2439          * 0x3f, Vsmps1Sel2
2440          */
2441         REG_INIT(AB8540_VSMPS1SEL2,             0x04, 0x14, 0x3f),
2442         /*
2443          * 0x3f, Vsmps1Sel3
2444          */
2445         REG_INIT(AB8540_VSMPS1SEL3,             0x04, 0x15, 0x3f),
2446         /*
2447          * 0x3f, Vsmps2Sel1
2448          */
2449         REG_INIT(AB8540_VSMPS2SEL1,             0x04, 0x17, 0x3f),
2450         /*
2451          * 0x3f, Vsmps2Sel2
2452          */
2453         REG_INIT(AB8540_VSMPS2SEL2,             0x04, 0x18, 0x3f),
2454         /*
2455          * 0x3f, Vsmps2Sel3
2456          */
2457         REG_INIT(AB8540_VSMPS2SEL3,             0x04, 0x19, 0x3f),
2458         /*
2459          * 0x7f, Vsmps3Sel1
2460          * NOTE! PRCMU register
2461          */
2462         REG_INIT(AB8540_VSMPS3SEL1,             0x04, 0x1b, 0x7f),
2463         /*
2464          * 0x7f, Vsmps3Sel2
2465          * NOTE! PRCMU register
2466          */
2467         REG_INIT(AB8540_VSMPS3SEL2,             0x04, 0x1c, 0x7f),
2468         /*
2469          * 0x0f, Vaux1Sel
2470          */
2471         REG_INIT(AB8540_VAUX1SEL,               0x04, 0x1f, 0x0f),
2472         /*
2473          * 0x0f, Vaux2Sel
2474          */
2475         REG_INIT(AB8540_VAUX2SEL,               0x04, 0x20, 0x0f),
2476         /*
2477          * 0x07, Vaux3Sel
2478          * 0x70, Vrf1Sel
2479          */
2480         REG_INIT(AB8540_VRF1VAUX3SEL,           0x04, 0x21, 0x77),
2481         /*
2482          * 0x01, VextSupply12LP
2483          */
2484         REG_INIT(AB8540_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
2485         /*
2486          * 0x07, Vanasel
2487          * 0x30, Vpllsel
2488          */
2489         REG_INIT(AB8540_VANAVPLLSEL,            0x04, 0x29, 0x37),
2490         /*
2491          * 0x03, Vaux4RequestCtrl
2492          */
2493         REG_INIT(AB8540_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2494         /*
2495          * 0x03, Vaux4Regu
2496          */
2497         REG_INIT(AB8540_VAUX4REGU,              0x04, 0x2e, 0x03),
2498         /*
2499          * 0x0f, Vaux4Sel
2500          */
2501         REG_INIT(AB8540_VAUX4SEL,               0x04, 0x2f, 0x0f),
2502         /*
2503          * 0x03, Vaux5RequestCtrl
2504          */
2505         REG_INIT(AB8540_VAUX5REQCTRL,           0x04, 0x31, 0x03),
2506         /*
2507          * 0x03, Vaux5Regu
2508          */
2509         REG_INIT(AB8540_VAUX5REGU,              0x04, 0x32, 0x03),
2510         /*
2511          * 0x3f, Vaux5Sel
2512          */
2513         REG_INIT(AB8540_VAUX5SEL,               0x04, 0x33, 0x3f),
2514         /*
2515          * 0x03, Vaux6RequestCtrl
2516          */
2517         REG_INIT(AB8540_VAUX6REQCTRL,           0x04, 0x34, 0x03),
2518         /*
2519          * 0x03, Vaux6Regu
2520          */
2521         REG_INIT(AB8540_VAUX6REGU,              0x04, 0x35, 0x03),
2522         /*
2523          * 0x3f, Vaux6Sel
2524          */
2525         REG_INIT(AB8540_VAUX6SEL,               0x04, 0x36, 0x3f),
2526         /*
2527          * 0x03, VCLKBRequestCtrl
2528          */
2529         REG_INIT(AB8540_VCLKBREQCTRL,           0x04, 0x37, 0x03),
2530         /*
2531          * 0x03, VCLKBRegu
2532          */
2533         REG_INIT(AB8540_VCLKBREGU,              0x04, 0x38, 0x03),
2534         /*
2535          * 0x07, VCLKBSel
2536          */
2537         REG_INIT(AB8540_VCLKBSEL,               0x04, 0x39, 0x07),
2538         /*
2539          * 0x03, Vrf1RequestCtrl
2540          */
2541         REG_INIT(AB8540_VRF1REQCTRL,            0x04, 0x3a, 0x03),
2542         /*
2543          * 0x01, VpllDisch
2544          * 0x02, Vrf1Disch
2545          * 0x04, Vaux1Disch
2546          * 0x08, Vaux2Disch
2547          * 0x10, Vaux3Disch
2548          * 0x20, Vintcore12Disch
2549          * 0x40, VTVoutDisch
2550          * 0x80, VaudioDisch
2551          */
2552         REG_INIT(AB8540_REGUCTRLDISCH,          0x04, 0x43, 0xff),
2553         /*
2554          * 0x02, VanaDisch
2555          * 0x04, VdmicPullDownEna
2556          * 0x08, VpllPullDownEna
2557          * 0x10, VdmicDisch
2558          */
2559         REG_INIT(AB8540_REGUCTRLDISCH2,         0x04, 0x44, 0x1e),
2560         /*
2561          * 0x01, Vaux4Disch
2562          */
2563         REG_INIT(AB8540_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2564         /*
2565          * 0x01, Vaux5Disch
2566          * 0x02, Vaux6Disch
2567          * 0x04, VCLKBDisch
2568          */
2569         REG_INIT(AB8540_REGUCTRLDISCH4,         0x04, 0x49, 0x07),
2570 };
2571
2572 static int ab8500_regulator_init_registers(struct platform_device *pdev,
2573                                            struct ab8500_reg_init *reg_init,
2574                                            int id, int mask, int value)
2575 {
2576         int err;
2577
2578         BUG_ON(value & ~mask);
2579         BUG_ON(mask & ~reg_init[id].mask);
2580
2581         /* initialize register */
2582         err = abx500_mask_and_set_register_interruptible(
2583                 &pdev->dev,
2584                 reg_init[id].bank,
2585                 reg_init[id].addr,
2586                 mask, value);
2587         if (err < 0) {
2588                 dev_err(&pdev->dev,
2589                         "Failed to initialize 0x%02x, 0x%02x.\n",
2590                         reg_init[id].bank,
2591                         reg_init[id].addr);
2592                 return err;
2593         }
2594         dev_vdbg(&pdev->dev,
2595                  "  init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
2596                  reg_init[id].bank,
2597                  reg_init[id].addr,
2598                  mask, value);
2599
2600         return 0;
2601 }
2602
2603 static int ab8500_regulator_register(struct platform_device *pdev,
2604                                      struct regulator_init_data *init_data,
2605                                      struct ab8500_regulator_info *regulator_info,
2606                                      int id, struct device_node *np)
2607 {
2608         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
2609         struct ab8500_regulator_info *info = NULL;
2610         struct regulator_config config = { };
2611         int err;
2612
2613         /* assign per-regulator data */
2614         info = &regulator_info[id];
2615         info->dev = &pdev->dev;
2616
2617         config.dev = &pdev->dev;
2618         config.init_data = init_data;
2619         config.driver_data = info;
2620         config.of_node = np;
2621
2622         /* fix for hardware before ab8500v2.0 */
2623         if (is_ab8500_1p1_or_earlier(ab8500)) {
2624                 if (info->desc.id == AB8500_LDO_AUX3) {
2625                         info->desc.n_voltages =
2626                                 ARRAY_SIZE(ldo_vauxn_voltages);
2627                         info->desc.volt_table = ldo_vauxn_voltages;
2628                         info->voltage_mask = 0xf;
2629                 }
2630         }
2631
2632         /* register regulator with framework */
2633         info->regulator = regulator_register(&info->desc, &config);
2634         if (IS_ERR(info->regulator)) {
2635                 err = PTR_ERR(info->regulator);
2636                 dev_err(&pdev->dev, "failed to register regulator %s\n",
2637                         info->desc.name);
2638                 /* when we fail, un-register all earlier regulators */
2639                 while (--id >= 0) {
2640                         info = &regulator_info[id];
2641                         regulator_unregister(info->regulator);
2642                 }
2643                 return err;
2644         }
2645
2646         return 0;
2647 }
2648
2649 static struct of_regulator_match ab8500_regulator_match[] = {
2650         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8500_LDO_AUX1, },
2651         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8500_LDO_AUX2, },
2652         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8500_LDO_AUX3, },
2653         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
2654         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8500_LDO_TVOUT, },
2655         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8500_LDO_AUDIO, },
2656         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
2657         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
2658         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8500_LDO_DMIC, },
2659         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8500_LDO_ANA, },
2660 };
2661
2662 static struct of_regulator_match ab8505_regulator_match[] = {
2663         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8505_LDO_AUX1, },
2664         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8505_LDO_AUX2, },
2665         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8505_LDO_AUX3, },
2666         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8505_LDO_AUX4, },
2667         { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8505_LDO_AUX5, },
2668         { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8505_LDO_AUX6, },
2669         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
2670         { .name = "ab8500_ldo_adc",     .driver_data = (void *) AB8505_LDO_ADC, },
2671         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8505_LDO_AUDIO, },
2672         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
2673         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
2674         { .name = "ab8500_ldo_aux8",    .driver_data = (void *) AB8505_LDO_AUX8, },
2675         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8505_LDO_ANA, },
2676 };
2677
2678 static struct of_regulator_match ab8540_regulator_match[] = {
2679         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8540_LDO_AUX1, },
2680         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8540_LDO_AUX2, },
2681         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8540_LDO_AUX3, },
2682         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8540_LDO_AUX4, },
2683         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8540_LDO_INTCORE, },
2684         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8540_LDO_TVOUT, },
2685         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8540_LDO_AUDIO, },
2686         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8540_LDO_ANAMIC1, },
2687         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8540_LDO_ANAMIC2, },
2688         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8540_LDO_DMIC, },
2689         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8540_LDO_ANA, },
2690         { .name = "ab8500_ldo_sdio",    .driver_data = (void *) AB8540_LDO_SDIO, },
2691 };
2692
2693 static struct of_regulator_match ab9540_regulator_match[] = {
2694         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB9540_LDO_AUX1, },
2695         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB9540_LDO_AUX2, },
2696         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB9540_LDO_AUX3, },
2697         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB9540_LDO_AUX4, },
2698         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB9540_LDO_INTCORE, },
2699         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB9540_LDO_TVOUT, },
2700         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB9540_LDO_AUDIO, },
2701         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB9540_LDO_ANAMIC1, },
2702         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB9540_LDO_ANAMIC2, },
2703         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB9540_LDO_DMIC, },
2704         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB9540_LDO_ANA, },
2705 };
2706
2707 static int
2708 ab8500_regulator_of_probe(struct platform_device *pdev,
2709                           struct ab8500_regulator_info *regulator_info,
2710                           int regulator_info_size,
2711                           struct of_regulator_match *match,
2712                           struct device_node *np)
2713 {
2714         int err, i;
2715
2716         for (i = 0; i < regulator_info_size; i++) {
2717                 err = ab8500_regulator_register(
2718                         pdev, match[i].init_data, regulator_info,
2719                         i, match[i].of_node);
2720                 if (err)
2721                         return err;
2722         }
2723
2724         return 0;
2725 }
2726
2727 static int ab8500_regulator_probe(struct platform_device *pdev)
2728 {
2729         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
2730         struct device_node *np = pdev->dev.of_node;
2731         struct of_regulator_match *match;
2732         struct ab8500_platform_data *ppdata;
2733         struct ab8500_regulator_platform_data *pdata;
2734         int i, err;
2735         struct ab8500_regulator_info *regulator_info;
2736         int regulator_info_size;
2737         struct ab8500_reg_init *reg_init;
2738         int reg_init_size;
2739
2740         if (is_ab9540(ab8500)) {
2741                 regulator_info = ab9540_regulator_info;
2742                 regulator_info_size = ARRAY_SIZE(ab9540_regulator_info);
2743                 reg_init = ab9540_reg_init;
2744                 reg_init_size = AB9540_NUM_REGULATOR_REGISTERS;
2745                 match = ab9540_regulator_match;
2746                 match_size = ARRAY_SIZE(ab9540_regulator_match)
2747         } else if (is_ab8505(ab8500)) {
2748                 regulator_info = ab8505_regulator_info;
2749                 regulator_info_size = ARRAY_SIZE(ab8505_regulator_info);
2750                 reg_init = ab8505_reg_init;
2751                 reg_init_size = AB8505_NUM_REGULATOR_REGISTERS;
2752         } else if (is_ab8540(ab8500)) {
2753                 regulator_info = ab8540_regulator_info;
2754                 regulator_info_size = ARRAY_SIZE(ab8540_regulator_info);
2755                 reg_init = ab8540_reg_init;
2756                 reg_init_size = AB8540_NUM_REGULATOR_REGISTERS;
2757         } else {
2758                 regulator_info = ab8500_regulator_info;
2759                 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
2760                 reg_init = ab8500_reg_init;
2761                 reg_init_size = AB8500_NUM_REGULATOR_REGISTERS;
2762                 match = ab8500_regulator_match;
2763                 match_size = ARRAY_SIZE(ab8500_regulator_match)
2764         }
2765
2766         if (np) {
2767                 err = of_regulator_match(&pdev->dev, np, match, match_size);
2768                 if (err < 0) {
2769                         dev_err(&pdev->dev,
2770                                 "Error parsing regulator init data: %d\n", err);
2771                         return err;
2772                 }
2773
2774                 err = ab8500_regulator_of_probe(pdev, regulator_info,
2775                                                 regulator_info_size, match, np);
2776                 return err;
2777         }
2778
2779         if (!ab8500) {
2780                 dev_err(&pdev->dev, "null mfd parent\n");
2781                 return -EINVAL;
2782         }
2783
2784         ppdata = dev_get_platdata(ab8500->dev);
2785         if (!ppdata) {
2786                 dev_err(&pdev->dev, "null parent pdata\n");
2787                 return -EINVAL;
2788         }
2789
2790         pdata = ppdata->regulator;
2791         if (!pdata) {
2792                 dev_err(&pdev->dev, "null pdata\n");
2793                 return -EINVAL;
2794         }
2795
2796         /* make sure the platform data has the correct size */
2797         if (pdata->num_regulator != regulator_info_size) {
2798                 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
2799                 return -EINVAL;
2800         }
2801
2802         /* initialize debug (initial state is recorded with this call) */
2803         err = ab8500_regulator_debug_init(pdev);
2804         if (err)
2805                 return err;
2806
2807         /* initialize registers */
2808         for (i = 0; i < pdata->num_reg_init; i++) {
2809                 int id, mask, value;
2810
2811                 id = pdata->reg_init[i].id;
2812                 mask = pdata->reg_init[i].mask;
2813                 value = pdata->reg_init[i].value;
2814
2815                 /* check for configuration errors */
2816                 BUG_ON(id >= AB8500_NUM_REGULATOR_REGISTERS);
2817
2818                 err = ab8500_regulator_init_registers(pdev, reg_init, id, mask, value);
2819                 if (err < 0)
2820                         return err;
2821         }
2822
2823         if (!is_ab8505(ab8500)) {
2824                 /* register external regulators (before Vaux1, 2 and 3) */
2825                 err = ab8500_ext_regulator_init(pdev);
2826                 if (err)
2827                         return err;
2828         }
2829
2830         /* register all regulators */
2831         for (i = 0; i < regulator_info_size; i++) {
2832                 err = ab8500_regulator_register(pdev, &pdata->regulator[i],
2833                                                 regulator_info, i, NULL);
2834                 if (err < 0)
2835                         return err;
2836         }
2837
2838         return 0;
2839 }
2840
2841 static int ab8500_regulator_remove(struct platform_device *pdev)
2842 {
2843         int i, err;
2844         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
2845         struct ab8500_regulator_info *regulator_info;
2846         int regulator_info_size;
2847
2848
2849         if (is_ab9540(ab8500)) {
2850                 regulator_info = ab9540_regulator_info;
2851                 regulator_info_size = ARRAY_SIZE(ab9540_regulator_info);
2852         } else if (is_ab8505(ab8500)) {
2853                 regulator_info = ab8505_regulator_info;
2854                 regulator_info_size = ARRAY_SIZE(ab8505_regulator_info);
2855         } else if (is_ab8540(ab8500)) {
2856                 regulator_info = ab8540_regulator_info;
2857                 regulator_info_size = ARRAY_SIZE(ab8540_regulator_info);
2858         } else {
2859                 regulator_info = ab8500_regulator_info;
2860                 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
2861         }
2862
2863         for (i = 0; i < regulator_info_size; i++) {
2864                 struct ab8500_regulator_info *info = NULL;
2865                 info = &regulator_info[i];
2866
2867                 dev_vdbg(rdev_get_dev(info->regulator),
2868                         "%s-remove\n", info->desc.name);
2869
2870                 regulator_unregister(info->regulator);
2871         }
2872
2873         if (!is_ab8505(ab8500)) {
2874                 /* remove external regulators (after Vaux1, 2 and 3) */
2875                 err = ab8500_ext_regulator_exit(pdev);
2876                 if (err)
2877                         return err;
2878         }
2879
2880         /* remove regulator debug */
2881         err = ab8500_regulator_debug_exit(pdev);
2882         if (err)
2883                 return err;
2884
2885         return 0;
2886 }
2887
2888 static struct platform_driver ab8500_regulator_driver = {
2889         .probe = ab8500_regulator_probe,
2890         .remove = ab8500_regulator_remove,
2891         .driver         = {
2892                 .name   = "ab8500-regulator",
2893                 .owner  = THIS_MODULE,
2894         },
2895 };
2896
2897 static int __init ab8500_regulator_init(void)
2898 {
2899         int ret;
2900
2901         ret = platform_driver_register(&ab8500_regulator_driver);
2902         if (ret != 0)
2903                 pr_err("Failed to register ab8500 regulator: %d\n", ret);
2904
2905         return ret;
2906 }
2907 subsys_initcall(ab8500_regulator_init);
2908
2909 static void __exit ab8500_regulator_exit(void)
2910 {
2911         platform_driver_unregister(&ab8500_regulator_driver);
2912 }
2913 module_exit(ab8500_regulator_exit);
2914
2915 MODULE_LICENSE("GPL v2");
2916 MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
2917 MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
2918 MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
2919 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
2920 MODULE_ALIAS("platform:ab8500-regulator");