2 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/err.h>
23 #include <linux/of_device.h>
24 #include <linux/regulator/of_regulator.h>
25 #include <linux/platform_device.h>
26 #include <linux/regulator/driver.h>
27 #include <linux/regulator/machine.h>
28 #include <linux/regulator/pfuze100.h>
29 #include <linux/i2c.h>
30 #include <linux/slab.h>
31 #include <linux/regmap.h>
33 #define PFUZE_NUMREGS 128
34 #define PFUZE100_VOL_OFFSET 0
35 #define PFUZE100_STANDBY_OFFSET 1
36 #define PFUZE100_MODE_OFFSET 3
37 #define PFUZE100_CONF_OFFSET 4
39 #define PFUZE100_DEVICEID 0x0
40 #define PFUZE100_REVID 0x3
41 #define PFUZE100_FABID 0x4
43 #define PFUZE100_SW1ABVOL 0x20
44 #define PFUZE100_SW1CVOL 0x2e
45 #define PFUZE100_SW2VOL 0x35
46 #define PFUZE100_SW3AVOL 0x3c
47 #define PFUZE100_SW3BVOL 0x43
48 #define PFUZE100_SW4VOL 0x4a
49 #define PFUZE100_SWBSTCON1 0x66
50 #define PFUZE100_VREFDDRCON 0x6a
51 #define PFUZE100_VSNVSVOL 0x6b
52 #define PFUZE100_VGEN1VOL 0x6c
53 #define PFUZE100_VGEN2VOL 0x6d
54 #define PFUZE100_VGEN3VOL 0x6e
55 #define PFUZE100_VGEN4VOL 0x6f
56 #define PFUZE100_VGEN5VOL 0x70
57 #define PFUZE100_VGEN6VOL 0x71
59 enum chips { PFUZE100, PFUZE200 };
61 struct pfuze_regulator {
62 struct regulator_desc desc;
63 unsigned char stby_reg;
64 unsigned char stby_mask;
69 struct regmap *regmap;
71 struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR];
72 struct regulator_dev *regulators[PFUZE100_MAX_REGULATOR];
75 static const int pfuze100_swbst[] = {
76 5000000, 5050000, 5100000, 5150000,
79 static const int pfuze100_vsnvs[] = {
80 1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000,
83 static const struct i2c_device_id pfuze_device_id[] = {
84 {.name = "pfuze100", .driver_data = PFUZE100},
85 {.name = "pfuze200", .driver_data = PFUZE200},
88 MODULE_DEVICE_TABLE(i2c, pfuze_device_id);
90 static const struct of_device_id pfuze_dt_ids[] = {
91 { .compatible = "fsl,pfuze100", .data = (void *)PFUZE100},
92 { .compatible = "fsl,pfuze200", .data = (void *)PFUZE200},
95 MODULE_DEVICE_TABLE(of, pfuze_dt_ids);
97 static int pfuze100_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
99 struct pfuze_chip *pfuze100 = rdev_get_drvdata(rdev);
100 int id = rdev_get_id(rdev);
101 unsigned int ramp_bits;
104 if (id < PFUZE100_SWBST) {
105 ramp_delay = 12500 / ramp_delay;
106 ramp_bits = (ramp_delay >> 1) - (ramp_delay >> 3);
107 ret = regmap_update_bits(pfuze100->regmap,
108 rdev->desc->vsel_reg + 4,
109 0xc0, ramp_bits << 6);
111 dev_err(pfuze100->dev, "ramp failed, err %d\n", ret);
118 static struct regulator_ops pfuze100_ldo_regulator_ops = {
119 .enable = regulator_enable_regmap,
120 .disable = regulator_disable_regmap,
121 .is_enabled = regulator_is_enabled_regmap,
122 .list_voltage = regulator_list_voltage_linear,
123 .set_voltage_sel = regulator_set_voltage_sel_regmap,
124 .get_voltage_sel = regulator_get_voltage_sel_regmap,
127 static struct regulator_ops pfuze100_fixed_regulator_ops = {
128 .list_voltage = regulator_list_voltage_linear,
131 static struct regulator_ops pfuze100_sw_regulator_ops = {
132 .list_voltage = regulator_list_voltage_linear,
133 .set_voltage_sel = regulator_set_voltage_sel_regmap,
134 .get_voltage_sel = regulator_get_voltage_sel_regmap,
135 .set_voltage_time_sel = regulator_set_voltage_time_sel,
136 .set_ramp_delay = pfuze100_set_ramp_delay,
139 static struct regulator_ops pfuze100_swb_regulator_ops = {
140 .list_voltage = regulator_list_voltage_table,
141 .map_voltage = regulator_map_voltage_ascend,
142 .set_voltage_sel = regulator_set_voltage_sel_regmap,
143 .get_voltage_sel = regulator_get_voltage_sel_regmap,
147 #define PFUZE100_FIXED_REG(_chip, _name, base, voltage) \
148 [_chip ## _ ## _name] = { \
152 .ops = &pfuze100_fixed_regulator_ops, \
153 .type = REGULATOR_VOLTAGE, \
154 .id = _chip ## _ ## _name, \
155 .owner = THIS_MODULE, \
156 .min_uV = (voltage), \
157 .enable_reg = (base), \
158 .enable_mask = 0x10, \
162 #define PFUZE100_SW_REG(_chip, _name, base, min, max, step) \
163 [_chip ## _ ## _name] = { \
166 .n_voltages = ((max) - (min)) / (step) + 1, \
167 .ops = &pfuze100_sw_regulator_ops, \
168 .type = REGULATOR_VOLTAGE, \
169 .id = _chip ## _ ## _name, \
170 .owner = THIS_MODULE, \
173 .vsel_reg = (base) + PFUZE100_VOL_OFFSET, \
176 .stby_reg = (base) + PFUZE100_STANDBY_OFFSET, \
180 #define PFUZE100_SWB_REG(_chip, _name, base, mask, voltages) \
181 [_chip ## _ ## _name] = { \
184 .n_voltages = ARRAY_SIZE(voltages), \
185 .ops = &pfuze100_swb_regulator_ops, \
186 .type = REGULATOR_VOLTAGE, \
187 .id = _chip ## _ ## _name, \
188 .owner = THIS_MODULE, \
189 .volt_table = voltages, \
190 .vsel_reg = (base), \
191 .vsel_mask = (mask), \
195 #define PFUZE100_VGEN_REG(_chip, _name, base, min, max, step) \
196 [_chip ## _ ## _name] = { \
199 .n_voltages = ((max) - (min)) / (step) + 1, \
200 .ops = &pfuze100_ldo_regulator_ops, \
201 .type = REGULATOR_VOLTAGE, \
202 .id = _chip ## _ ## _name, \
203 .owner = THIS_MODULE, \
206 .vsel_reg = (base), \
208 .enable_reg = (base), \
209 .enable_mask = 0x10, \
211 .stby_reg = (base), \
216 static struct pfuze_regulator pfuze100_regulators[] = {
217 PFUZE100_SW_REG(PFUZE100, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
218 PFUZE100_SW_REG(PFUZE100, SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000),
219 PFUZE100_SW_REG(PFUZE100, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
220 PFUZE100_SW_REG(PFUZE100, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
221 PFUZE100_SW_REG(PFUZE100, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
222 PFUZE100_SW_REG(PFUZE100, SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000),
223 PFUZE100_SWB_REG(PFUZE100, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
224 PFUZE100_SWB_REG(PFUZE100, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
225 PFUZE100_FIXED_REG(PFUZE100, VREFDDR, PFUZE100_VREFDDRCON, 750000),
226 PFUZE100_VGEN_REG(PFUZE100, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
227 PFUZE100_VGEN_REG(PFUZE100, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
228 PFUZE100_VGEN_REG(PFUZE100, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
229 PFUZE100_VGEN_REG(PFUZE100, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
230 PFUZE100_VGEN_REG(PFUZE100, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
231 PFUZE100_VGEN_REG(PFUZE100, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
234 static struct pfuze_regulator pfuze200_regulators[] = {
235 PFUZE100_SW_REG(PFUZE200, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
236 PFUZE100_SW_REG(PFUZE200, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
237 PFUZE100_SW_REG(PFUZE200, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
238 PFUZE100_SW_REG(PFUZE200, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
239 PFUZE100_SWB_REG(PFUZE200, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
240 PFUZE100_SWB_REG(PFUZE200, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
241 PFUZE100_FIXED_REG(PFUZE200, VREFDDR, PFUZE100_VREFDDRCON, 750000),
242 PFUZE100_VGEN_REG(PFUZE200, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
243 PFUZE100_VGEN_REG(PFUZE200, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
244 PFUZE100_VGEN_REG(PFUZE200, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
245 PFUZE100_VGEN_REG(PFUZE200, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
246 PFUZE100_VGEN_REG(PFUZE200, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
247 PFUZE100_VGEN_REG(PFUZE200, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
250 static struct pfuze_regulator *pfuze_regulators;
254 static struct of_regulator_match pfuze100_matches[] = {
255 { .name = "sw1ab", },
261 { .name = "swbst", },
262 { .name = "vsnvs", },
263 { .name = "vrefddr", },
264 { .name = "vgen1", },
265 { .name = "vgen2", },
266 { .name = "vgen3", },
267 { .name = "vgen4", },
268 { .name = "vgen5", },
269 { .name = "vgen6", },
273 static struct of_regulator_match pfuze200_matches[] = {
275 { .name = "sw1ab", },
279 { .name = "swbst", },
280 { .name = "vsnvs", },
281 { .name = "vrefddr", },
282 { .name = "vgen1", },
283 { .name = "vgen2", },
284 { .name = "vgen3", },
285 { .name = "vgen4", },
286 { .name = "vgen5", },
287 { .name = "vgen6", },
290 static struct of_regulator_match *pfuze_matches;
292 static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
294 struct device *dev = chip->dev;
295 struct device_node *np, *parent;
298 np = of_node_get(dev->of_node);
302 parent = of_get_child_by_name(np, "regulators");
304 dev_err(dev, "regulators node not found\n");
308 switch (chip->chip_id) {
310 pfuze_matches = pfuze200_matches;
311 ret = of_regulator_match(dev, parent, pfuze200_matches,
312 ARRAY_SIZE(pfuze200_matches));
317 pfuze_matches = pfuze100_matches;
318 ret = of_regulator_match(dev, parent, pfuze100_matches,
319 ARRAY_SIZE(pfuze100_matches));
325 dev_err(dev, "Error parsing regulator init data: %d\n",
333 static inline struct regulator_init_data *match_init_data(int index)
335 return pfuze_matches[index].init_data;
338 static inline struct device_node *match_of_node(int index)
340 return pfuze_matches[index].of_node;
343 static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
348 static inline struct regulator_init_data *match_init_data(int index)
353 static inline struct device_node *match_of_node(int index)
359 static int pfuze_identify(struct pfuze_chip *pfuze_chip)
364 ret = regmap_read(pfuze_chip->regmap, PFUZE100_DEVICEID, &value);
368 if (((value & 0x0f) == 0x8) && (pfuze_chip->chip_id == PFUZE100)) {
370 * Freescale misprogrammed 1-3% of parts prior to week 8 of 2013
371 * as ID=8 in PFUZE100
373 dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8");
374 } else if ((value & 0x0f) != pfuze_chip->chip_id) {
375 /* device id NOT match with your setting */
376 dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
380 ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);
383 dev_info(pfuze_chip->dev,
384 "Full layer: %x, Metal layer: %x\n",
385 (value & 0xf0) >> 4, value & 0x0f);
387 ret = regmap_read(pfuze_chip->regmap, PFUZE100_FABID, &value);
390 dev_info(pfuze_chip->dev, "FAB: %x, FIN: %x\n",
391 (value & 0xc) >> 2, value & 0x3);
396 static const struct regmap_config pfuze_regmap_config = {
399 .max_register = PFUZE_NUMREGS - 1,
400 .cache_type = REGCACHE_RBTREE,
403 static int pfuze100_regulator_probe(struct i2c_client *client,
404 const struct i2c_device_id *id)
406 struct pfuze_chip *pfuze_chip;
407 struct pfuze_regulator_platform_data *pdata =
408 dev_get_platdata(&client->dev);
409 struct regulator_config config = { };
411 const struct of_device_id *match;
413 u32 sw_check_start, sw_check_end;
415 pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip),
420 if (client->dev.of_node) {
421 match = of_match_device(of_match_ptr(pfuze_dt_ids),
424 dev_err(&client->dev, "Error: No device match found\n");
427 pfuze_chip->chip_id = (int)(long)match->data;
429 pfuze_chip->chip_id = id->driver_data;
431 dev_err(&client->dev, "No dts match or id table match found\n");
435 i2c_set_clientdata(client, pfuze_chip);
436 pfuze_chip->dev = &client->dev;
438 pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config);
439 if (IS_ERR(pfuze_chip->regmap)) {
440 ret = PTR_ERR(pfuze_chip->regmap);
441 dev_err(&client->dev,
442 "regmap allocation failed with err %d\n", ret);
446 ret = pfuze_identify(pfuze_chip);
448 dev_err(&client->dev, "unrecognized pfuze chip ID!\n");
452 /* use the right regulators after identify the right device */
453 switch (pfuze_chip->chip_id) {
455 pfuze_regulators = pfuze200_regulators;
456 regulator_num = ARRAY_SIZE(pfuze200_regulators);
457 sw_check_start = PFUZE200_SW2;
458 sw_check_end = PFUZE200_SW3B;
463 pfuze_regulators = pfuze100_regulators;
464 regulator_num = ARRAY_SIZE(pfuze100_regulators);
465 sw_check_start = PFUZE100_SW2;
466 sw_check_end = PFUZE100_SW4;
469 dev_info(&client->dev, "pfuze%s found.\n",
470 (pfuze_chip->chip_id == PFUZE100) ? "100" : "200");
472 memcpy(pfuze_chip->regulator_descs, pfuze_regulators,
473 sizeof(pfuze_chip->regulator_descs));
475 ret = pfuze_parse_regulators_dt(pfuze_chip);
479 for (i = 0; i < regulator_num; i++) {
480 struct regulator_init_data *init_data;
481 struct regulator_desc *desc;
484 desc = &pfuze_chip->regulator_descs[i].desc;
487 init_data = pdata->init_data[i];
489 init_data = match_init_data(i);
491 /* SW2~SW4 high bit check and modify the voltage value table */
492 if (i >= sw_check_start && i <= sw_check_end) {
493 regmap_read(pfuze_chip->regmap, desc->vsel_reg, &val);
495 desc->min_uV = 800000;
496 desc->uV_step = 50000;
497 desc->n_voltages = 51;
501 config.dev = &client->dev;
502 config.init_data = init_data;
503 config.driver_data = pfuze_chip;
504 config.of_node = match_of_node(i);
506 pfuze_chip->regulators[i] =
507 devm_regulator_register(&client->dev, desc, &config);
508 if (IS_ERR(pfuze_chip->regulators[i])) {
509 dev_err(&client->dev, "register regulator%s failed\n",
510 pfuze_regulators[i].desc.name);
511 return PTR_ERR(pfuze_chip->regulators[i]);
518 static struct i2c_driver pfuze_driver = {
519 .id_table = pfuze_device_id,
521 .name = "pfuze100-regulator",
522 .owner = THIS_MODULE,
523 .of_match_table = pfuze_dt_ids,
525 .probe = pfuze100_regulator_probe,
527 module_i2c_driver(pfuze_driver);
529 MODULE_AUTHOR("Robin Gong <b38343@freescale.com>");
530 MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100/PFUZE200 PMIC");
531 MODULE_LICENSE("GPL v2");
532 MODULE_ALIAS("i2c:pfuze100-regulator");