2 * RTC driver for the Armada 38x Marvell SoCs
4 * Copyright (C) 2015 Marvell
6 * Gregory Clement <gregory.clement@free-electrons.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
15 #include <linux/delay.h>
17 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/rtc.h>
22 #define RTC_STATUS 0x0
23 #define RTC_STATUS_ALARM1 BIT(0)
24 #define RTC_STATUS_ALARM2 BIT(1)
25 #define RTC_IRQ1_CONF 0x4
26 #define RTC_IRQ1_AL_EN BIT(0)
27 #define RTC_IRQ1_FREQ_EN BIT(1)
28 #define RTC_IRQ1_FREQ_1HZ BIT(2)
30 #define RTC_ALARM1 0x10
32 #define SOC_RTC_INTERRUPT 0x8
33 #define SOC_RTC_ALARM1 BIT(0)
34 #define SOC_RTC_ALARM2 BIT(1)
35 #define SOC_RTC_ALARM1_MASK BIT(2)
36 #define SOC_RTC_ALARM2_MASK BIT(3)
38 struct armada38x_rtc {
39 struct rtc_device *rtc_dev;
41 void __iomem *regs_soc;
44 * While setting the time, the RTC TIME register should not be
45 * accessed. Setting the RTC time involves sleeping during
46 * 100ms, so a mutex instead of a spinlock is used to protect
49 struct mutex mutex_time;
54 * According to the datasheet, the OS should wait 5us after every
55 * register write to the RTC hard macro so that the required update
56 * can occur without holding off the system bus
58 static void rtc_delayed_write(u32 val, struct armada38x_rtc *rtc, int offset)
60 writel(val, rtc->regs + offset);
64 static int armada38x_rtc_read_time(struct device *dev, struct rtc_time *tm)
66 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
67 unsigned long time, time_check;
69 mutex_lock(&rtc->mutex_time);
70 time = readl(rtc->regs + RTC_TIME);
72 * WA for failing time set attempts. As stated in HW ERRATA if
73 * more than one second between two time reads is detected
74 * then read once again.
76 time_check = readl(rtc->regs + RTC_TIME);
77 if ((time_check - time) > 1)
78 time_check = readl(rtc->regs + RTC_TIME);
80 mutex_unlock(&rtc->mutex_time);
82 rtc_time_to_tm(time_check, tm);
87 static int armada38x_rtc_set_time(struct device *dev, struct rtc_time *tm)
89 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
93 ret = rtc_tm_to_time(tm, &time);
98 * Setting the RTC time not always succeeds. According to the
99 * errata we need to first write on the status register and
100 * then wait for 100ms before writing to the time register to be
101 * sure that the data will be taken into account.
103 mutex_lock(&rtc->mutex_time);
104 rtc_delayed_write(0, rtc, RTC_STATUS);
106 rtc_delayed_write(time, rtc, RTC_TIME);
107 mutex_unlock(&rtc->mutex_time);
113 static int armada38x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
115 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
116 unsigned long time, flags;
119 spin_lock_irqsave(&rtc->lock, flags);
121 time = readl(rtc->regs + RTC_ALARM1);
122 val = readl(rtc->regs + RTC_IRQ1_CONF) & RTC_IRQ1_AL_EN;
124 spin_unlock_irqrestore(&rtc->lock, flags);
126 alrm->enabled = val ? 1 : 0;
127 rtc_time_to_tm(time, &alrm->time);
132 static int armada38x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
134 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
135 unsigned long time, flags;
139 ret = rtc_tm_to_time(&alrm->time, &time);
144 spin_lock_irqsave(&rtc->lock, flags);
146 rtc_delayed_write(time, rtc, RTC_ALARM1);
149 rtc_delayed_write(RTC_IRQ1_AL_EN, rtc, RTC_IRQ1_CONF);
150 val = readl(rtc->regs_soc + SOC_RTC_INTERRUPT);
151 writel(val | SOC_RTC_ALARM1_MASK,
152 rtc->regs_soc + SOC_RTC_INTERRUPT);
155 spin_unlock_irqrestore(&rtc->lock, flags);
161 static int armada38x_rtc_alarm_irq_enable(struct device *dev,
162 unsigned int enabled)
164 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
167 spin_lock_irqsave(&rtc->lock, flags);
170 rtc_delayed_write(RTC_IRQ1_AL_EN, rtc, RTC_IRQ1_CONF);
172 rtc_delayed_write(0, rtc, RTC_IRQ1_CONF);
174 spin_unlock_irqrestore(&rtc->lock, flags);
179 static irqreturn_t armada38x_rtc_alarm_irq(int irq, void *data)
181 struct armada38x_rtc *rtc = data;
183 int event = RTC_IRQF | RTC_AF;
185 dev_dbg(&rtc->rtc_dev->dev, "%s:irq(%d)\n", __func__, irq);
187 spin_lock(&rtc->lock);
189 val = readl(rtc->regs_soc + SOC_RTC_INTERRUPT);
191 writel(val & ~SOC_RTC_ALARM1, rtc->regs_soc + SOC_RTC_INTERRUPT);
192 val = readl(rtc->regs + RTC_IRQ1_CONF);
193 /* disable all the interrupts for alarm 1 */
194 rtc_delayed_write(0, rtc, RTC_IRQ1_CONF);
196 rtc_delayed_write(RTC_STATUS_ALARM1, rtc, RTC_STATUS);
198 spin_unlock(&rtc->lock);
200 if (val & RTC_IRQ1_FREQ_EN) {
201 if (val & RTC_IRQ1_FREQ_1HZ)
207 rtc_update_irq(rtc->rtc_dev, 1, event);
212 static struct rtc_class_ops armada38x_rtc_ops = {
213 .read_time = armada38x_rtc_read_time,
214 .set_time = armada38x_rtc_set_time,
215 .read_alarm = armada38x_rtc_read_alarm,
216 .set_alarm = armada38x_rtc_set_alarm,
217 .alarm_irq_enable = armada38x_rtc_alarm_irq_enable,
220 static __init int armada38x_rtc_probe(struct platform_device *pdev)
222 struct resource *res;
223 struct armada38x_rtc *rtc;
226 rtc = devm_kzalloc(&pdev->dev, sizeof(struct armada38x_rtc),
231 spin_lock_init(&rtc->lock);
232 mutex_init(&rtc->mutex_time);
234 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rtc");
235 rtc->regs = devm_ioremap_resource(&pdev->dev, res);
236 if (IS_ERR(rtc->regs))
237 return PTR_ERR(rtc->regs);
238 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rtc-soc");
239 rtc->regs_soc = devm_ioremap_resource(&pdev->dev, res);
240 if (IS_ERR(rtc->regs_soc))
241 return PTR_ERR(rtc->regs_soc);
243 rtc->irq = platform_get_irq(pdev, 0);
246 dev_err(&pdev->dev, "no irq\n");
249 if (devm_request_irq(&pdev->dev, rtc->irq, armada38x_rtc_alarm_irq,
250 0, pdev->name, rtc) < 0) {
251 dev_warn(&pdev->dev, "Interrupt not available.\n");
254 * If there is no interrupt available then we can't
257 armada38x_rtc_ops.set_alarm = NULL;
258 armada38x_rtc_ops.alarm_irq_enable = NULL;
260 platform_set_drvdata(pdev, rtc);
262 device_init_wakeup(&pdev->dev, 1);
264 rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, pdev->name,
265 &armada38x_rtc_ops, THIS_MODULE);
266 if (IS_ERR(rtc->rtc_dev)) {
267 ret = PTR_ERR(rtc->rtc_dev);
268 dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret);
274 #ifdef CONFIG_PM_SLEEP
275 static int armada38x_rtc_suspend(struct device *dev)
277 if (device_may_wakeup(dev)) {
278 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
280 return enable_irq_wake(rtc->irq);
286 static int armada38x_rtc_resume(struct device *dev)
288 if (device_may_wakeup(dev)) {
289 struct armada38x_rtc *rtc = dev_get_drvdata(dev);
291 return disable_irq_wake(rtc->irq);
298 static SIMPLE_DEV_PM_OPS(armada38x_rtc_pm_ops,
299 armada38x_rtc_suspend, armada38x_rtc_resume);
302 static const struct of_device_id armada38x_rtc_of_match_table[] = {
303 { .compatible = "marvell,armada-380-rtc", },
308 static struct platform_driver armada38x_rtc_driver = {
310 .name = "armada38x-rtc",
311 .pm = &armada38x_rtc_pm_ops,
312 .of_match_table = of_match_ptr(armada38x_rtc_of_match_table),
316 module_platform_driver_probe(armada38x_rtc_driver, armada38x_rtc_probe);
318 MODULE_DESCRIPTION("Marvell Armada 38x RTC driver");
319 MODULE_AUTHOR("Gregory CLEMENT <gregory.clement@free-electrons.com>");
320 MODULE_LICENSE("GPL");